Method of fabricating circuit structure

Abstract

A method for making a circuit structure includes embedding a patterned resist layer in an insulating layer, removing the patterned resist layer to form a plurality of grooves, and then filling the plurality of grooves with a conductive material to form a circuit layer. By embedding the circuit layer in the insulating layer, it is advantageous to thin a packaging substrate having the circuit structure.

Description

Technical Field

[0001] The invention relates to a semiconductor process, and in particular to a method for manufacturing a circuit structure on a substrate. Background Art

[0002] With the rapid development of the electronics industry, electronic products tend to be thinner, lighter, shorter and smaller in shape, and their functions are developing in the direction of high performance, high functionality and high speed. Therefore, in order to meet the needs of high integration and miniaturization of semiconductor devices, packaging substrates with high-density and fine-pitch circuits are often used in the packaging process.

[0003] However, the existing method of manufacturing the circuit structure forms the circuit on the surface of the dielectric layer. Therefore, when the package substrate adopts a multi-layer layout design, the circuit structure of each layer needs to consider the total thickness of the circuit layer and the dielectric layer, making it difficult to thin the package substrate.

[0004] Therefore, how to overcome the various problems of the above-mentioned prior art has become a topic that needs to be solved urgently. Summary of the invention

[0005] In view of the various defects of the above-mentioned prior art, the present invention provides a method for manufacturing a circuit structure, including: embedding a patterned resist layer in the insulating layer so that the patterned resist layer is exposed on the surface of the insulating layer; removing the patterned resist layer to form a plurality of grooves on the surface of the insulating layer; and forming a conductive material in the plurality of grooves so that the conductive material in the plurality of grooves serves as a circuit layer.

[0006] In the aforementioned manufacturing method, the material forming the insulating layer is a dielectric material.

[0007] In the above-mentioned manufacturing method, the patterned resist layer is photoresist.

[0008] In the aforementioned manufacturing method, the pattern of the patterned resist layer presents the shape of the circuit layer.

[0009] In the aforementioned manufacturing method, the patterned resist layer is removed by stripping.

[0010] In the aforementioned manufacturing method, the process of embedding the patterned resist layer in the insulating layer includes: forming the patterned resist layer on a carrier; forming the insulating layer on the carrier so that the insulating layer covers the patterned resist layer and the patterned resist layer is embedded in the insulating layer; and removing the carrier. For example, a release film and a metal layer are sequentially formed on the carrier so that the insulating layer and the patterned resist layer are combined on the metal layer, and when the carrier is removed, the release film and the metal layer are sequentially removed.

[0011] Alternatively, the insulating layer is formed on the carrier by lamination. For example, the lamination method includes: forming the insulating layer on a support; laminating the support with the insulating layer thereon toward the carrier to cover the patterned resist layer; and removing the support.

[0012] In the above-mentioned manufacturing method, the process of the circuit layer includes forming the conductive material on the surface of the insulating layer and in the groove, and then removing the conductive material on the surface of the insulating layer and retaining the conductive material in the groove.

[0013] As can be seen from the above, the method for manufacturing the circuit structure of the present invention is mainly to embed the circuit layer in the insulating layer so that the thickness of the circuit structure is the thickness of the insulating layer. Therefore, compared with the prior art, when the method of the present invention is applied to the design of a multi-layer circuit structure, the circuit structure of each layer only needs to consider the thickness of the insulating layer, and does not need to consider the thickness of the circuit layer. This is conducive to thinning the packaging substrate with a multi-layer circuit structure, so that the packaging substrate can easily meet the requirements of being light, thin and short. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figures 1A to 1G It is a cross-sectional schematic diagram of the method for manufacturing the circuit structure of the present invention.

[0015] The reference numerals are as follows:

[0016] 1: Line structure

[0017] 10: Bearing

[0018] 100: Release film

[0019] 101:Metal layer

[0020] 11: Patterned resist layer

[0021] 11a: Top surface

[0022] 11b: Bottom

[0023] 11c: Side

[0024] 12: Insulation layer

[0025] 12a,12b: Surface

[0026] 120: Groove

[0027] 13: Support

[0028] 14: Circuit layer

[0029] 14a: Conductive material

[0030] d,t: thickness DETAILED DESCRIPTION

[0031] The following describes the implementation of the present invention by means of specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0032] It should be noted that the structures, proportions, sizes, etc. shown in the attached drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size, without affecting the effects and purposes that can be produced by the present invention, should still fall within the scope of the technical contents disclosed in the present invention. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0033] Figures 1A to 1G FIG. 1 is a cross-sectional view of a method for manufacturing a circuit structure of the present invention. In this embodiment, the circuit layer 14 is embedded in the insulating layer 12 .

[0034] like Figure 1A As shown, a patterned resist layer 11 is formed on a carrier 10 , and the pattern of the patterned resist layer 11 presents a predetermined circuit shape.

[0035] In this embodiment, the carrier 10 is, for example, a plate of a semiconductor material (such as silicon or glass) or other substrate consumables, on which a release film 100 and a metal layer 101 such as copper can be formed in sequence as required, and the patterned resist layer 11 can be a photoresist.

[0036] like Figure 1B As shown, an insulating layer 12 is formed on the carrier 10 (or the metal layer 101 ) so that the insulating layer 12 covers the patterned resist layer 11 .

[0037] In this embodiment, the insulating layer 12 is formed of a material such as prepreg (PP) or other dielectric materials, and the insulating layer 12 is formed on the carrier 10 (or the metal layer 101) by lamination to cover the top surface 11a and the side surface 11c of the patterned resist layer 11. For example, the insulating layer 12 is first formed on a hard support body 13 such as copper or other metal materials, and then the support body 13 is pressed toward the carrier 10 (or the metal layer 101) with the insulating layer 12 thereon to cover the patterned resist layer 11.

[0038] like Figure 1CAs shown, the carrier 10 and the release film 100 thereon are removed to retain the metal layer 101 on the insulating layer 12 .

[0039] In this embodiment, the carrier 10 can be easily peeled off due to the design of the release film 100 , and the carrier 10 can be removed without etching using chemical solutions.

[0040] like Figure 1D As shown, the support body 13 and the metal layer 101 are removed so that the bottom surface 11 b of the patterned resist layer 11 is exposed on the surface 12 a of the insulating layer 12 .

[0041] In this embodiment, the support 13 and the metal layer 101 are both made of copper, so the support 13 and the metal layer 101 can be removed simultaneously in the same manner, for example, by using chemical solution etching to remove the support 13 and the metal layer 101 .

[0042] like Figure 1E As shown, the patterned resist layer 11 is removed to form a plurality of grooves 120 on the surface 12 a of the insulating layer 12 .

[0043] In this embodiment, the patterned resist layer 11 is removed by stripping, and the pattern of the groove 120 presents a predetermined circuit shape.

[0044] like Figure 1F As shown, a conductive material 14 a such as copper or other metal material is formed on each surface 12 a , 12 b of the insulating layer 12 and in the grooves 120 , so that the conductive materials 14 a in the grooves 120 serve as the circuit layer 14 .

[0045] In this embodiment, the conductive material 14 a is formed on the surfaces 12 a and 12 b of the insulating layer 12 and in the groove 120 by electroplating, deposition or other methods.

[0046] like Figure 1G As shown, the conductive material 14 a on each surface 12 a, 12 b of the insulating layer 12 is removed, and the circuit layer 14 is retained, so that the circuit layer 14 is embedded in the insulating layer 12 in an embedded circuit specification.

[0047] Therefore, the method for preparing the circuit layer 14 of the present invention first embeds the patterned resist layer 11 in the insulating layer 12, and then removes the patterned resist layer 11 to form a groove 120 for configuring the circuit layer 14, so that the circuit layer 14 can be embedded in the insulating layer 12, and thus the thickness of the circuit structure 1 is the thickness d of the insulating layer 12. Therefore, compared with the prior art, when the method of the present invention is applied to the design of multi-layer wiring, the circuit structure 1 of each layer only needs to consider the thickness d of the insulating layer 12, and does not need to consider the thickness t of the circuit layer 14, which is conducive to thinning the packaging substrate with the multi-layer circuit structure 1, so that the packaging substrate can easily meet the requirements of being light, thin and short.

[0048] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Those skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. A method for manufacturing a circuit structure, comprising: Embedding a patterned resist layer in the insulating layer so that the patterned resist layer is exposed on the surface of the insulating layer; removing the patterned resist layer to form a plurality of grooves on the surface of the insulating layer; as well as forming conductive materials in the plurality of grooves so that the conductive materials in the plurality of grooves serve as circuit layers, The process of embedding the patterned resist layer in the insulating layer includes: The patterned resist layer is formed on a carrier, wherein a release film and a metal layer are sequentially formed on the carrier; forming the insulating layer on the carrier by lamination, so that the insulating layer covers the patterned resist layer and the patterned resist layer is embedded in the insulating layer; and removing the carrier, The pressing method includes the following steps: forming the insulating layer on a support; Pressing the support body with the insulating layer thereon toward the carrier to cover the patterned resist layer; and The support body and the metal layer are removed simultaneously.

2. The method for manufacturing a circuit structure according to claim 1, wherein: The insulating layer is formed of a dielectric material.

3. The method for manufacturing a circuit structure according to claim 1, wherein: The patterned resist layer is photoresist.

4. The method for manufacturing a circuit structure according to claim 1, wherein: The pattern of the patterned resist layer presents the shape of the circuit layer.

5. The method for manufacturing a circuit structure according to claim 1, wherein: The patterned resist layer is removed by lift-off.

6. The method for manufacturing a circuit structure according to claim 1, wherein: The insulating layer and the patterned resist layer are combined on the metal layer, and when the carrier is removed, the release film and the metal layer are removed in sequence.

7. The method for manufacturing a circuit structure according to claim 1, wherein: The process of the circuit layer includes forming the conductive material on the surface of the insulating layer and in the groove, and then removing the conductive material on the surface of the insulating layer and retaining the conductive material in the groove.

Images