Image sensor driving method, driving device and image sensor

Abstract

The present invention describes a method for driving an image sensor, comprising: obtaining a pre-exposure row address digital signal, a sampling row address digital signal, a pre-exposure row transmission digital signal, and a sampling row transmission digital signal; outputting a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal via a voltage level converter; and outputting a latch address analog signal based on the analog signals; and outputting a gate transmission control signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal, and the latch address analog signal. The present invention also provides an image sensor driving device and an image sensor incorporating the driving device. The present invention can achieve a smaller design area and power consumption, save the number of voltage level converters, and reduce hardware overhead.

Description

Technical Field

[0001] The present invention relates to the field of image sensors, and in particular to a driving method and a driving device of an image sensor, and an image sensor comprising the driving device. Background Art

[0002] With the rapid development of the intelligent era, cameras have become a familiar term for consumers, and the performance of photos is directly related to the CMOS image sensor (CIS) chip.

[0003] Currently, exposure methods of image sensors can be divided into rolling shutter and global shutter.

[0004] For the rolling exposure method, the exposure time or time period of each row of the pixel array is different. Only one row is in the reading state at the same time. In order to ensure the correct timing, some rows of pixels are in a state of neither exposure nor reading. For the global exposure method, all rows of the pixel array are exposed at the same time and read at different time periods. Therefore, when a certain pixel row is in the reading state, the other pixel rows are equivalent to being idle.

[0005] Therefore, controlling each pixel row requires multiple control signals, which are input by an external control unit. This means that each pixel row requires multiple voltage level converters, which will further increase the hardware overhead for a pixel array consisting of multiple rows and columns. Summary of the Invention

[0006] In view of this, the present invention provides a driving method of an image sensor and an image sensor including the driving method of the image sensor.

[0007] The present invention provides a method for driving an image sensor, comprising: acquiring a pre-exposure row address digital signal (d_sp_add), a sampling row address digital signal (d_rp_add), a pre-exposure row transmission digital signal (d_sp_tx), and a sampling row transmission digital signal (d_rp_tx), and outputting a pre-exposure row address analog signal (a_sp_add), a sampling row address analog signal (a_rp_add), a pre-exposure row transmission analog signal (a_sp_tx), and a sampling row transmission analog signal (a_rp_tx) through a voltage level converter (level shift);

[0008] Outputting a latch address analog signal (a_lat_addb) based on the pre-exposure row address analog signal (a_sp_add), the sampling row address analog signal (a_rp_add), the pre-exposure row transmission analog signal (a_sp_tx), and the sampling row transmission analog signal (a_rp_tx);

[0009] and outputting a gate transmission control signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal, and the latch address analog signal;

[0010] The gate transfer control signal is used to control the on and off of the transfer transistor in the pixel circuit of the image sensor.

[0011] The present invention also provides a driving device for an image sensor, comprising: a control module and a driving module, wherein the control module is coupled to the driving module, wherein the control module at least includes an inverting adjustment module, and the driving module at least includes a gate driving module;

[0012] The driving device further includes a voltage level converter, the voltage level converter being configured to output a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal based on the pre-exposure row address digital signal, the sampling row address digital signal, the pre-exposure row transmission digital signal, and the sampling row transmission digital signal;

[0013] The inversion adjustment module is used to output a latch address analog signal according to the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal and the sampling row transmission analog signal;

[0014] The gate drive module is used to output a gate transmission control signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal and the latch address analog signal; wherein the gate transmission control signal is used to control the opening and closing of the transmission transistor of the pixel unit.

[0015] The present invention also provides an image sensor including a driving method of the image sensor, comprising: a pixel array and the above-mentioned driving device, the pixel array including a plurality of pixel units arranged in rows and columns, and each pixel unit including: a photodiode and a transfer transistor, the photodiode being used to respond to incident light to accumulate image charge, the transfer transistor being coupled between the photodiode and a floating diffusion node to selectively transfer the image charge accumulated in the photodiode to the floating diffusion node; and a control module being used to determine the state of a pixel row of the pixel array.

[0016] Compared with the prior art, the present invention has at least one of the following outstanding advantages:

[0017] The pixel circuit driving method of the present invention avoids the use of a latching method to control the generation of a latched address analog signal. Instead, it directly implements a transfer transistor driving circuit through analog level logic, thereby generating a transfer transistor control signal with a latching function to optimize pixel blooming. Compared with the latch-and-drive control method, this method can achieve a smaller design area and power consumption, save the number of voltage level converters, and reduce hardware overhead. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of a pixel circuit of an image sensor in the prior art;

[0019] Figure 2 A method for driving an image sensor in the prior art;

[0020] Figure 3 A flow chart of a driving method for an image sensor provided by the present invention;

[0021] Figure 4 A partial structural block diagram of an image sensor provided by the present invention;

[0022] Figure 5 A partial structural block diagram of another image sensor provided by the present invention;

[0023] Figure 6 A schematic diagram of the partial structure of an image sensor provided by the present invention;

[0024] Figure 7 A timing control diagram of an image sensor driving method provided by the present invention;

[0025] Figure 8 A timing control diagram of an application example of an image sensor driving method provided by the present invention;

[0026] Figure 9 A schematic diagram of a pixel circuit of an image sensor provided by the present invention;

[0027] Figure 10 This is a flow chart of another image sensor driving method provided by the present invention. DETAILED DESCRIPTION

[0028] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0029] It should be noted that the following description sets forth specific details to facilitate a full understanding of the present invention. However, the present invention can be implemented in a variety of other ways than those described herein, and those skilled in the art may make similar generalizations without departing from the scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0030] like Figure 1 As shown, Figure 1 This is a structural diagram of an image sensor in the prior art. The image sensor includes a pixel array 10, a control module 20, and a driving module 30, wherein the control module 20 is coupled to the driving module 30 and is used to determine the state of the pixel rows of the pixel array 10. The pixel array 10 includes a plurality of pixel units arranged in rows and columns. In the pixel array, all pixels (pixel units) in each column are simultaneously selected by a column selection line, and all pixels in each row are selectively output through a row selection line. Each pixel has a row address and a column address. The column address of the pixel corresponds to the column selection signal line driven by the column driving unit, and the row address of the pixel corresponds to the row selection signal line driven by the row driving unit. The control module controls the row driving unit and the column driving unit to selectively read the pixels corresponding to the appropriate rows and columns in the pixel array to output image signals.

[0031] Figure 2 A driving method of an image sensor in the prior art, combined with reference to Figure 1-2The control module 20 obtains the pre-exposure row address digital signal (d_sp_add), the sampling row address digital signal (d_rp_add), the pre-exposure row transmission digital signal (d_sp_tx), and the sampling row transmission digital signal (d_rp_tx), and obtains the latch address digital signal (d_lat_addb) through the latch unit 40 and the latch enable signal (lat_en). The latch address digital signal (d_lat_addb) is converted into the corresponding latch address analog signal (a_lat_addb) through the voltage level converter level shifter, and the pre-exposure row address digital signal (d_sp_add), the sampling row address digital signal (d_rp_add), the pre-exposure row transmission digital signal (d_sp_tx), and the sampling row transmission digital signal (d_rp_tx) are also converted into the corresponding latch address analog signal (a_lat_addb) through the voltage level converter level shifter. The shifter converts the corresponding pre-exposure row address analog signal (a_sp_add), sampling row address analog signal (a_rp_add), pre-exposure row transmission analog signal (a_sp_tx), and sampling row transmission analog signal (a_rp_tx). The analog signals obtained from these conversions control the output of the gate transmission control signal tx of the transfer transistor, thereby controlling the on and off of the transfer transistor. Controlling each pixel row requires multiple control signals, which are input by an external control unit. This means that each pixel row requires multiple voltage level converters. For a pixel array consisting of multiple rows and columns, this will further increase the hardware overhead.

[0032] In view of this, the technical solution of the present invention provides an image sensor driving method, a driving device and an image sensor including the driving device, so as to achieve a smaller design area and power consumption, save the number of voltage level converters, and thus reduce hardware overhead.

[0033] like Figure 3-4 As shown, Figure 3 This is a flow chart of a driving method for an image sensor provided by the present invention. Figure 4 This is a partial structural block diagram of an image sensor provided by the present invention. The driving method of the image sensor provided by the present invention includes the following steps:

[0034] S10: Acquire a pre-exposure row address digital signal, a sampling row address digital signal, a pre-exposure row transmission digital signal, and a sampling row transmission digital signal, and output a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal through a voltage level converter.

[0035] It can be understood that the voltage level converter enables devices with different I / O voltages to establish communication. In electronic design, the voltage level converter is used to convert the digital level of the row addressing circuit in the image sensor control circuit into a higher analog level or to convert the digital level of the column addressing circuit in the image sensor control circuit into a higher analog level. For example, the digital level is 0-1.8V, and the corresponding analog level output after the voltage level converter is 0-2.8V. Of course, the analog level to be output can be set according to the circuit design requirements and is not limited here.

[0036] S20: Outputting a latch address analog signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, and the sampling row transmission analog signal;

[0037] S30: outputting a gate transmission control signal tx based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal, and the latch address analog signal;

[0038] The gate transmission control signal tx is used to control the on and off of the transmission transistor TX in the pixel circuit of the image sensor.

[0039] Among them, such as Figure 5 As shown, Figure 5 This is a partial structural block diagram of another image sensor provided by the present invention. The pre-exposure row address analog signal includes a pre-exposure row address forward signal (sp_add) and a pre-exposure row address reverse signal (sp_addb), the sampling row address analog signal includes a sampling row address forward signal (rp_add) and a sampling row address reverse signal (rp_addb), the pre-exposure row transmission analog signal includes a pre-exposure row transmission forward signal (sp_tx) and a pre-exposure row transmission reverse signal (sp_txb), and the sampling row transmission analog signal includes a sampling row transmission forward signal (rp_tx) and a sampling row transmission reverse signal (rp_txb). It should be noted that the forward signal and reverse signal hereafter refer to analog signals and will not be described in detail.

[0040] Therefore, the method of outputting the gate transfer control signal tx may include: outputting the gate transfer control signal tx to the transfer transistor of the pixel unit in the pixel array based on the pre-exposure row address positive signal (sp_add), the pre-exposure row address negative signal (sp_addb), the sampling row address positive signal (rp_add), the sampling row address negative signal (rp_addb), the pre-exposure row transmission positive signal (sp_tx), the pre-exposure row transmission negative signal (sp_txb), the sampling row transmission positive signal (rp_tx), the sampling row transmission negative signal (rp_txb) and the latch address analog signal.

[0041] In an embodiment of the present invention, by first converting the digital signal output by the row address circuit in the control module into an analog signal through a voltage level converter, and using the analog signal corresponding to the output of the above-mentioned row address circuit to output the latch address analog signal, the number of voltage level converters is saved, thereby reducing hardware overhead.

[0042] The following describes the corresponding image sensor driving method with specific embodiments. Figure 6 As shown, Figure 6 This is a partial structural diagram of an image sensor provided by the present invention. The control module 20 is coupled to the driver module 30 and is configured to determine the state of a pixel row in the pixel array. The control module 20 includes at least an inverting adjustment module 50 for outputting a latched address analog signal (lat_addb). Specifically, the inverting adjustment module 50 outputs the latched address analog signal (lat_addb) based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, and the sampling row transmission analog signal.

[0043] The driving module 30 includes at least a gate driving module 60 to control the opening and closing of the transfer transistor of the pixel unit. Specifically, the gate driving module 60 outputs a gate transfer control signal tx based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal, and the latch address analog signal. The gate transfer control signal tx is used to control the opening and closing of the transfer transistor TX of the pixel unit.

[0044] The image sensor further includes a voltage level converter (not shown in the figure), which outputs a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal based on the pre-exposure row address digital signal, the sampling row address digital signal, the pre-exposure row transmission digital signal, and the sampling row transmission digital signal;

[0045] Optionally, in some embodiments, Figure 6 As shown, the inversion adjustment module 50 includes a first inverter I1, a second inverter I2 and a third inverter I3; wherein, the input end of the first inverter I1 receives the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal and the sampling row transmission analog signal, the output end of the first inverter I1 is coupled to the input end of the second inverter I2, and the output end of the second inverter I2 outputs the latch address analog signal; the input end of the third inverter I3 is coupled to the output end of the first inverter I1 and the input end of the second inverter I2, and the output end of the third inverter I3 is coupled to the input end of the first inverter I1.

[0046] Optional, combined with reference Figure 6and Figure 7 , Figure 7 A timing control diagram of an image sensor driving method provided by the present invention. The control module 20 also includes a first control path 221 and a second control path 222. The first control path 221 is used to control the inverting adjustment module 50 to output the latch address analog signal (lat_addb) as a second latching level. The second control path 222 is used to control the inverting adjustment module 50 to output the latch address analog signal (lat_addb) as a first latching level, wherein the first latching level is a low level and the second latching level is a high level. Further, optionally, the first control path 221 includes two PMOS transistors, and the gates of the two PMOS transistors are respectively connected to the pre-exposure row address reverse signal (sp_addb) and the pre-exposure row transmission reverse signal (sp_txb); the second control path 222 includes two NMOS transistors, and the two NMOS transistors are respectively connected to the sampling row address positive signal (rp_add) and the sampling row transmission positive signal (rp_tx).

[0047] That is, the corresponding method for outputting the latch address analog signal includes: outputting the latch address analog signal (lat_addb) based on the pre-exposure row address reverse signal (sp_addb), the pre-exposure row transmission reverse signal (sp_txb), the sampling row address forward signal (rp_add) and the sampling row transmission forward signal (rp_tx).

[0048] Specifically, when the pre-exposure row address reverse signal (sp_addb) and the pre-exposure row transmission reverse signal (sp_txb) are low, the voltage at point A is pulled up to AVDD, and inverters I1 and I2 are used to drive point A. A positive feedback inverter I3 is added to prevent point A from becoming a floating point. Therefore, even if the pre-exposure row address reverse signal (sp_addb) and the pre-exposure row transmission reverse signal (sp_txb) are restored to a high level, the level at point A remains high until the sampling row address forward signal (rp_add) and the sampling row address forward signal (rp_txb) are restored to a high level. The row transmission positive signal (rp_tx) is all high, the voltage at point A is pulled down to AGND, and the latch address analog signal (lat_addb) driven by point A cooperates with the pre-exposure row address signal (sp_add, sp_addb), the pre-exposure row transmission signal (sp_txb, sp_tx), the sampling row address signal (rp_add, rp_addb) and the sampling row transmission signal (rp_txb, rp_tx) to generate the gate transmission control signal tx that controls the conduction and shutdown of the transmission transistor.

[0049] In an embodiment of the present invention, through the aforementioned multiple analog signal controls and the operation of the inverting regulation module, the latch address analog signal is set to a low level when the pixel row is in an idle state and a high level in other states. Alternatively, the latch address analog signal can be set to a high level in the idle state and a low level in other states. This is not limited to this embodiment, as long as the latch address analog signal in the idle state and other states is an inverted signal. The latch address analog signal is then output to the driver module, and in conjunction with the exposure row address signal, the pre-exposure row transmission signal, the sampling row address signal, and the sampling row transmission signal, the driver module outputs a gate transmission control signal tx to the transmission transistor of the pixel row in the idle state.

[0050] like Figure 9 As shown, Figure 9 A schematic diagram of a pixel circuit of an image sensor provided by the present invention. Each pixel unit in the pixel array includes a photodiode PD, a transfer transistor TX, a reset transistor RST, a source follower transistor SF, and a row select transistor RS. During operation of the image sensor, the photodiode PD generates photoelectric charges in response to incident light, and the transfer transistor TX receives a transfer signal tx, so that the transfer transistor TX transfers the charge accumulated in the photodiode PD to the floating diffusion point FD. The reset transistor RST is coupled between the power supply VDD and the floating diffusion point FD to reset the pixel unit in response to the reset signal rst. The floating diffusion point FD is coupled to control the gate of the source follower transistor SF. The source follower transistor SF is also coupled between the power supply VDD and the row select transistor RS to amplify the signal generated by the charge on the floating diffusion point FD. The row select transistor RS outputs a corresponding pixel signal in response to the row select signal rs.

[0051] As you can understand, the exposure period begins when transfer transistor TX is off. During this period, photodiode PD receives incident light and continuously accumulates photogenerated electrons. Since electrons are negative charge carriers, the voltage at photodiode PD decreases accordingly. After the exposure period ends, transfer transistor TX turns on, coupling the charge in photodiode PD to floating diffusion FD, causing the voltage at floating diffusion FD to decrease.

[0052] At the same time, the states of the pixel rows of the pixel array include an idle state, a pre-charge state, an exposure state, and a sampling state; wherein, the row address between the pre-exposure row address analog signal and the sampling row address analog signal is determined as a pixel row in the exposure state, the row address receiving the pre-exposure row address analog signal is determined as a pixel row in the pre-charge state, the row address receiving the sampling row address analog signal is determined as a pixel row in the sampling state, and the pixel row that is not in the pre-charge state, the exposure state, and the sampling state is determined as a pixel row in the idle state.

[0053] It is precisely because each row of pixels has the above-mentioned multiple states, the timing characteristics of rolling exposure, and the long and short exposure characteristics in HDR mode that the pixels in the idle row will continue to receive incident light to generate charges, resulting in overexposure, and then the charge will overflow to the pixels in the adjacent rows, affecting the charge accumulation of the pixels in the adjacent pixel rows that are in the normal exposure state. For the global exposure method, each row of the pixel array is exposed at the same time and read at different time periods. Therefore, when a certain pixel row is in the reading state, the other pixel rows are equivalent to being in the idle state, and the photodiode PD will also continue to receive light and convert it into photoelectric charges.

[0054] Therefore, the technical solution of the present invention can also solve the influence of pixels in an idle pixel row on pixels in adjacent pixel rows, and play an anti-blooming role.

[0055] In an embodiment of the present invention, the digital signal output by the row address circuit is first converted into an analog signal through a voltage level converter, and the analog signal corresponding to the output of the row address circuit is used to output a latch address analog signal, thereby saving the number of voltage level converters and reducing hardware overhead. At the same time, based on the analog signal corresponding to the output of the row address circuit and the latch address analog signal, a gate transmission control signal is output to further control the opening and closing of the transmission transistor during the exposure process of the pixel unit, thereby reducing the overexposure phenomenon generated by the pixel unit and solving the halo phenomenon caused by the pixel unit in the idle state when it is exposed to strong light.

[0056] In some embodiments, continue to refer to Figure 6 Optionally, the gate drive module 60 includes: a first path 301 for controlling the on / off switching of the transfer transistors of the pixel rows in the pre-charge state in the pixel array; a second path 302 for controlling the on / off switching of the transfer transistors of the pixel rows in the sampling state in the pixel array; and a third path 303 for controlling the on / off switching of the transfer transistors of the pixel rows in the idle state in the pixel array. The first path 301, the second path 302, and the third path 303 each include two PMOS transistors and three NMOS transistors.

[0057] The two PMOS transistors in the first path 301 are used to control the output gate transmission control signal to be an on voltage to turn on the transmission transistor, and the gates of the two PMOS transistors in the first path 301 are respectively connected to the pre-exposure row transmission reverse signal and the pre-exposure row address reverse signal. The three NMOS transistors in the first path 301 are used to control the output gate transmission control signal to be an off voltage to turn off the transmission transistor, and the gates of the three NMOS transistors in the first path 301 are respectively connected to the pre-exposure row address positive signal, the latch address analog signal, and the pre-exposure row transmission reverse signal.

[0058] The two PMOS transistors of the second path 302 are used to control the output gate transmission control signal to be an on voltage to turn on the transmission transistor, and the gates of the two PMOS transistors of the second path 302 are respectively connected to the sampling row transmission reverse signal and the sampling row address reverse signal; the three NMOS transistors of the second path 302 are used to control the output gate transmission control signal to be an off voltage to turn off the transmission transistor, and the gates of the three NMOS transistors of the second path 302 are respectively connected to the sampling row address positive signal, the sampling row address positive signal, and the sampling row transmission reverse signal;

[0059] The two PMOS transistors of the third path 303 are used to control the output gate transmission control signal to be a turn-on voltage to turn on the transmission transistor, and the gates of the two PMOS transistors of the third path 303 are respectively connected to the latch address analog signal and the sampling row address positive signal; the three NMOS transistors of the third path 303 are used to control the output gate transmission control signal to be a turn-off voltage to turn off the transmission transistor, and the gates of the three NMOS transistors of the third path 303 are respectively connected to the pre-exposure row address reverse signal, the sampling row address reverse signal, and the latch address analog signal.

[0060] Combined with reference Figure 6-8 As shown in 10, Figure 8 A timing control diagram of an application example of an image sensor driving method provided by the present invention; Figure 10 This is a flow chart of another method for driving an image sensor provided by the present invention. The gate transmission control signal states and corresponding transmission transistor switch states in pixel rows in different states are described in detail as follows.

[0061] S100: For pixel rows in an idle state in the image sensor pixel array, outputting a gate transfer control signal as a turn-on voltage to turn on a transfer transistor.

[0062] It can be understood that the start-up voltage can be the analog power supply voltage AVDD.

[0063] Optionally, the method of outputting the gate transmission control signal tx as the turn-on voltage AVDD includes: the latch address analog signal (a_lat_addb) is a first latch level, that is, the latch address analog signal (a_lat_addb) is a low level, the sampling row address positive signal (a_rp_add) is a third level, that is, the sampling row address positive signal (a_rp_add) is also a low level, and the transmission transistor TX is turned on to output the gate transmission control signal tx as the turn-on voltage AVDD in an idle state.

[0064] In the prior art, pixel rows in an idle state can be overexposed due to strong light exposure, which in turn affects adjacent pixel rows in other states, resulting in a halo phenomenon. However, in the embodiments of the present application, by controlling the conduction of the transfer transistors of the pixel rows in the idle state, the charge accumulated in the photodiodes of the pixel rows in the idle state is conducted away through VDD, thereby eliminating the impact of the pixels in the idle pixel rows on the pixels in the adjacent pixel rows and achieving an anti-halo effect.

[0065] S200: The pixel rows in the image sensor pixel array in a pre-charge state include a first pre-charge state and a second pre-charge state located after the first pre-charge state; in the first pre-charge state, the output gate transfer control signal is an on voltage to turn on the transfer transistor; in the second pre-charge state, the output gate transfer control signal is an off voltage to turn off the transfer transistor.

[0066] Optionally, the turn-on voltage may be an analog power supply voltage AVDD, and the turn-off voltage may be a ground voltage AGND.

[0067] Specifically, in the first pre-charge state, the pre-exposure row transmission reverse signal (a_sp_txb) is a first transmission level, that is, the pre-exposure row transmission reverse signal (a_sp_txb) is a low level, and the pre-exposure row address reverse signal (a_sp_addb) is a first level, that is, the pre-exposure row address reverse signal (a_sp_addb) is also a low level, so that the gate transmission control signal tx is output as the turn-on voltage AVDD in the first pre-charge state, so that the transmission transistor TX is turned on; in the second pre-charge state, the pre-exposure row transmission reverse signal (a_sp_txb) is a second transmission level, the pre-exposure row address forward signal (a_sp_add) is a second level, and the latch address analog signal (a_lat_addb) is a second latch level, that is, the pre-exposure row transmission reverse signal (a_sp_txb), the pre-exposure row address forward signal (a_sp_add) and the latch address analog signal (a_lat_addb) are all high levels, so that the gate transmission control signal tx is output as the turn-off voltage AGND in the second pre-charge state, so that the transmission transistor TX is turned off.

[0068] S300: The pixel rows in the image sensor pixel array in the sampling state include a first sampling state and a second sampling state located after the first sampling state; in the first sampling state, the output gate transfer control signal is an on voltage to turn on the transfer transistor; in the second sampling state, the output gate transfer control signal is an off voltage to turn off the transfer transistor.

[0069] In the first sampling state, the sampling row transmission reverse signal (a_rp_txb) is at the third transmission level, and the sampling row address reverse signal (a_rp_addb) is at the third level, that is, the sampling row transmission reverse signal (a_rp_txb) and the sampling row address reverse signal (a_rp_addb) are both at a low level, so that the gate transmission control signal tx is output at the turn-on voltage AVDD in the first sampling state, so that the transmission transistor TX is turned on;

[0070] In the second sampling state, the sampling row transmission reverse signal (a_rp_txb) is at the fourth transmission level, and the sampling row address forward signal (a_rp_add) is at the fourth level, that is, the sampling row transmission reverse signal (a_rp_txb) and the sampling row address forward signal (a_rp_add) are both at a high level, so that the output gate transmission control signal tx is the off voltage AGND in the first sampling state, so that the transmission transistor TX is turned off.

[0071] Optional, such as Figure 7 As shown, the first level = 0, the second level = 1; the third level = 0, the fourth level = 1; the first transmission level = 0, the second transmission level = 1; the third transmission level = 0, the fourth transmission level = 1; the first latch level = 0, the second latch level.

[0072] In some embodiments, in conjunction with reference Figure 7-8 , outputs a reset control signal rst to the reset transistor RST of the pixel unit in the idle pixel row to continuously turn on the reset transistor RST, so that the pixel unit in the idle pixel row will conduct the charge accumulated in the photodiode through VDD.

[0073] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A method for driving an image sensor, characterized in that: include: Obtaining a pre-exposure row address digital signal, a sampling row address digital signal, a pre-exposure row transmission digital signal, and a sampling row transmission digital signal, and outputting a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal through a voltage level converter; outputting a latch address analog signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, and the sampling row transmission analog signal; and outputting a gate transmission control signal based on the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal, and the latch address analog signal; The gate transfer control signal is used to control the turning on and off of the transfer transistor in the pixel circuit of the image sensor.

2. The method for driving an image sensor according to claim 1, wherein: The method for outputting the gate transmission control signal includes: The pre-exposure row address analog signal includes a pre-exposure row address forward signal and a pre-exposure row address reverse signal, the sampling row address analog signal includes a sampling row address forward signal and a sampling row address reverse signal, the pre-exposure row transmission analog signal includes a pre-exposure row transmission forward signal and a pre-exposure row transmission reverse signal, and the sampling row transmission analog signal includes a sampling row transmission forward signal and a sampling row transmission reverse signal; A gate transmission control signal is output based on the pre-exposure row address forward signal, the pre-exposure row address reverse signal, the sampling row address forward signal, the sampling row address reverse signal, the pre-exposure row transmission forward signal, the pre-exposure row transmission reverse signal, the sampling row transmission forward signal, the sampling row transmission reverse signal and the latch address analog signal.

3. The method for driving an image sensor according to claim 2, wherein: The method for outputting the latch address analog signal comprises: The latch address analog signal is output based on the pre-exposure row address reverse signal, the pre-exposure row transmission reverse signal, the sampling row address forward signal, and the sampling row transmission forward signal.

4. The method for driving an image sensor according to claim 2, wherein: For pixel rows in an idle state in the pixel array of the image sensor, the gate transfer control signal is output as a turn-on voltage to turn on the transfer transistor.

5. The method for driving an image sensor according to claim 4, wherein: The method for determining a pixel row in an image sensor pixel array that is in the idle state comprises: determining a pixel row in the idle state in the image sensor pixel array based on the pre-exposure row address analog signal and the sampling row address analog signal; The pre-exposure row address analog signal is used to indicate a row of pixels in the pixel array that is in a pre-charge state and is ready to start exposure, and the sampling row address analog signal is used to indicate a row of pixels in the pixel array that is in a sampling state.

6. The method for driving an image sensor according to claim 5, wherein: The method for determining a pixel row in the idle state in an image sensor pixel array based on the pre-exposure row address analog signal and the sampling row address analog signal includes: The row addresses between the pre-exposure row address analog signal and the sampling row address analog signal are determined as pixel rows in an exposure state; The pixel rows that are not in the pre-charging state, the exposure state, and the sampling state are determined as the pixel rows in the idle state.

7. The method for driving an image sensor according to claim 4, wherein: The method of outputting the gate transmission control signal as a turn-on voltage includes: The latch address analog signal is at a first latch level, and the sampling row address positive signal is at a third level, so that the gate transmission control signal is output as a start voltage in the idle state.

8. The method for driving an image sensor according to claim 2, wherein: The pixel rows in the image sensor pixel array in the precharge state include a first precharge state and a second precharge state subsequent to the first precharge state; In the first pre-charging state, outputting the gate transmission control signal as a turn-on voltage to turn on the transmission transistor; In the second pre-charging state, the gate transfer control signal is output as a turn-off voltage (GND) to turn off the transfer transistor.

9. The method for driving an image sensor according to claim 8, wherein: In the first pre-charge state, the pre-exposure row transmission reverse signal is at a first transmission level, and the pre-exposure row address reverse signal is at a first level, so that the gate transmission control signal is output as a turn-on voltage in the first pre-charge state; In the second pre-charge state, the pre-exposure row transmission reverse signal is a second transmission level, the pre-exposure row address forward signal is a second level, and the latch address analog signal is a second latch level, so that the gate transmission control signal is output as a shutdown voltage in the second pre-charge state.

10. The method for driving an image sensor according to claim 2, wherein: The pixel row in the image sensor pixel array in the sampling state includes a first sampling state and a second sampling state located subsequent to the first sampling state; In the first sampling state, outputting the gate transmission control signal as a turn-on voltage to turn on the transmission transistor; In the second sampling state, the gate transfer control signal is output as a turn-off voltage to turn off the transfer transistor.

11. The method for driving an image sensor according to claim 10, wherein: In the first sampling state, the sampling row transmission reverse signal is at a third transmission level, and the sampling row address reverse signal is at a third level, so that the gate transmission control signal is output as a turn-on voltage in the first sampling state; In the second sampling state, the sampling row transmission reverse signal is at the fourth transmission level, and the sampling row address forward signal is at the fourth level, so that the gate transmission control signal outputted in the first sampling state is the off voltage.

12. The method for driving an image sensor according to claim 1, wherein: The driving method further includes: outputting a reset control signal to the reset transistors of the pixel units in the pixel row in an idle state, so as to continuously turn on the reset transistors.

13. A driving device for an image sensor, characterized in that: include: A control module and a driving module, wherein the control module is coupled to the driving module, wherein the control module at least includes an inverting regulation module, and the driving module at least includes a gate driving module; The driving device further includes a voltage level converter, the voltage level converter being configured to output a pre-exposure row address analog signal, a sampling row address analog signal, a pre-exposure row transmission analog signal, and a sampling row transmission analog signal according to the pre-exposure row address digital signal, the sampling row address digital signal, the pre-exposure row transmission digital signal, and the sampling row transmission digital signal; The inversion adjustment module is used to output a latch address analog signal according to the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal and the sampling row transmission analog signal; The gate drive module is used to output a gate transmission control signal according to the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, the sampling row transmission analog signal and the latch address analog signal; wherein the gate transmission control signal is used to control the opening and closing of the transmission transistor of the pixel unit.

14. The driving device according to claim 13, wherein: The pre-exposure row address analog signal includes a pre-exposure row address forward signal and a pre-exposure row address reverse signal, the sampling row address analog signal includes a sampling row address forward signal and a sampling row address reverse signal, the pre-exposure row transmission analog signal includes a pre-exposure row transmission forward signal and a pre-exposure row transmission reverse signal, and the sampling row transmission analog signal includes a sampling row transmission forward signal and a sampling row transmission reverse signal; The gate transfer control signal is output based on the pre-exposure row address forward signal, the pre-exposure row address reverse signal, the sampling row address forward signal, the sampling row address reverse signal, the pre-exposure row transmission forward signal, the pre-exposure row transmission reverse signal, the sampling row transmission forward signal, the sampling row transmission reverse signal and the latch address analog signal.

15. The driving device according to claim 14, wherein: The control module further includes a first control path and a second control path; The first control path is used to control the inverting regulation module to output the latch address analog signal as the second latch level; the second control path is used to control the inverting regulation module to output the latch address analog signal as the first latch level.

16. The driving device according to claim 15, wherein: The first control path includes two PMOS transistors, and the gates of the two PMOS transistors are respectively connected to the pre-exposure row address reverse signal and the pre-exposure row transmission reverse signal; the second control path includes two NMOS transistors, and the two NMOS transistors are respectively connected to the sampling row address forward signal and the sampling row transmission forward signal.

17. The driving device according to claim 14, wherein: The states of the pixel rows of the pixel array of the image sensor include an idle state, a pre-charge state, an exposure state and a sampling state; Among them, the row address between the pre-exposure row address analog signal and the sampling row address analog signal is determined as the pixel row in the exposure state, the row address receiving the pre-exposure row address analog signal is determined as the pixel row in the pre-charge state, the row address receiving the sampling row address analog signal is determined as the pixel row in the sampling state, and the pixel row that is not in the pre-charge state, the exposure state and the sampling state is determined as the pixel row in the idle state.

18. The driving device according to claim 17, wherein: The gate driving module includes: A first path for controlling the turning on and off of the transfer transistors of the pixel rows in the precharge state in the pixel array; a second path for controlling the turning on and off of the transfer transistors of the pixel rows in the pixel array that are in the sampling state; The third path is used to control the turning on and off of the transfer transistors of the pixel rows in the idle state in the pixel array.

19. The driving device according to claim 18, wherein The first path, the second path and the third path respectively include two PMOS transistors and three NMOS transistors; The two PMOS transistors in the first path are used to control the output of the gate transmission control signal to be an on voltage, and the gates of the two PMOS transistors in the first path are respectively connected to the pre-exposure row transmission reverse signal and the pre-exposure row address reverse signal. The three NMOS transistors in the first path are used to control the output of the gate transmission control signal to be an off voltage, and the gates of the three NMOS transistors in the first path are respectively connected to the pre-exposure row address positive signal, the latch address analog signal, and the pre-exposure row transmission reverse signal; The two PMOS transistors of the second path are used to control the output of the gate transmission control signal to be an on voltage, and the gates of the two PMOS transistors of the second path are respectively connected to the sampling row transmission reverse signal and the sampling row address reverse signal; the three NMOS transistors of the second path are used to control the output of the gate transmission control signal to be an off voltage, and the gates of the three NMOS transistors of the first path are respectively connected to the sampling row address positive signal, the sampling row address positive signal, and the sampling row transmission reverse signal; The two PMOS transistors of the third path are used to control the output of the gate transmission control signal to be an on voltage, and the gates of the two PMOS transistors of the third path are respectively connected to the latch address analog signal and the sampling row address positive signal. The three NMOS transistors of the third path are used to control the output of the gate transmission control signal to be an off voltage, and the gates of the three NMOS transistors of the third path are respectively connected to the pre-exposure row address reverse signal, the sampling row address reverse signal, and the latch address analog signal.

20. The driving device according to claim 13, wherein: The inverting regulation module includes a first inverter, a second inverter and a third inverter; The input end of the first inverter receives the pre-exposure row address analog signal, the sampling row address analog signal, the pre-exposure row transmission analog signal, and the sampling row transmission analog signal; the output end of the first inverter is coupled to the input end of the second inverter; and the output end of the second inverter outputs the latch address analog signal; the input end of the third inverter is coupled to the output end of the first inverter and the input end of the second inverter; and the output end of the third inverter is coupled to the input end of the first inverter.

21. An image sensor, characterized in that: include: A pixel array, and a driving device according to any one of claims 13 to 20, wherein the pixel array comprises a plurality of pixel units arranged in rows and columns, and each pixel unit comprises: a photodiode and a transfer transistor, the photodiode being configured to accumulate image charge in response to incident light, the transfer transistor being coupled between the photodiode and a floating diffusion node to selectively transfer the image charge accumulated in the photodiode to the floating diffusion node; The control module is used to determine the status of the pixel rows of the pixel array.

Images