Junction temperature detection method, apparatus, device, and computer readable medium

Abstract

This invention provides a junction temperature detection method, apparatus, device, and computer-readable medium. The method obtains the current actual reference point temperature of a semiconductor device and the actual losses of each chip in the semiconductor device. For each chip in the semiconductor device, a first thermal impedance of the chip is corrected using the actual losses of all chips to obtain a second thermal impedance of the chip. The first thermal impedance of the chip is calculated using a simulation model of the semiconductor device. Based on the second thermal impedance of the chip, the actual losses of the chip, and the actual reference point temperature of the semiconductor device, the junction temperature of the chip is determined. Because the first thermal impedance of the chip is corrected using the actual losses of all chips, the accuracy of the finally determined junction temperature of the chip is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a junction temperature detection method, apparatus, device, and computer-readable medium. Background Technology

[0002] Junction temperature is the actual operating temperature of semiconductors in electronic devices. In existing technologies, to improve system reliability, it is typically necessary to monitor the junction temperature of semiconductor devices within the system. Current methods for monitoring the junction temperature of semiconductor devices involve using a simulation model of the semiconductor device, assuming only a single chip generates heat (i.e., only one chip is subjected to losses), to calculate the thermal impedance of each chip to a reference point (hereinafter referred to as chip thermal impedance). Then, for each chip in the semiconductor device, based on the chip's actual operating losses (i.e., the chip's heat generation power), the chip's thermal impedance, and the reference point temperature, the junction temperature of that chip is determined.

[0003] However, the thermal impedance of the chip calculated by the existing junction temperature detection method does not take into account the impact of heat loss generated by other chips on the thermal impedance of the chip. As a result, the thermal impedance of each chip calculated by the existing method is inaccurate, and ultimately the junction temperature of each chip is also inaccurate. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a junction temperature detection method, apparatus, device, and computer-readable medium to improve the accuracy of junction temperature detection of chips by correcting the thermal impedance of chips through the actual losses of each chip.

[0005] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:

[0006] Firstly, this application discloses a method for detecting junction temperature, including:

[0007] Obtain the current actual reference point temperature of the semiconductor device and the actual loss of each chip in the semiconductor device;

[0008] For each chip of the semiconductor device, the first thermal impedance of the chip is corrected using the actual losses of all the chips to obtain the second thermal impedance of the chip; wherein, the first thermal impedance of the chip is calculated through a simulation model of the semiconductor device;

[0009] The junction temperature of the chip is determined based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device.

[0010] Optionally, in the above junction temperature detection method, the second thermal impedance of the chip is positively correlated with the actual loss of the chip and negatively correlated with the actual loss of each other chip; wherein, the other chips are chips other than the chip mentioned above.

[0011] Optionally, in the above junction temperature detection method, the first thermal impedance of the chip includes: the self-thermal impedance of the chip and the first coupling thermal impedance between the chip and each other chip; the second thermal impedance of the chip includes: the self-thermal impedance of the chip and the second coupling thermal impedance between the chip and each other chip; the step of correcting the first thermal impedance of the chip for each chip of the semiconductor device using the actual losses of all the chips to obtain the second thermal impedance of the chip includes:

[0012] For each chip in the semiconductor device, a loss ratio coefficient between the chip and each of the other chips is calculated using the actual losses of the other chips and the actual losses of the chip itself; wherein, the other chips are chips other than the chip itself; the loss ratio coefficient between the chip and the other chips is used to indicate the degree of correction to the first coupling thermal impedance between the chip and the other chips; the loss ratio coefficient between the chip and the other chips is negatively correlated with the actual losses of the other chips and positively correlated with the actual losses of the chip itself;

[0013] The first coupling thermal impedance between the chip and each of the other chips is corrected by using the loss ratio coefficient between the chip and each of the other chips respectively, so as to obtain the second coupling thermal impedance between the chip and each of the other chips.

[0014] Optionally, in the above junction temperature detection method, determining the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual loss, and the actual reference point temperature of the semiconductor device includes:

[0015] The actual temperature difference between the chip and the reference point is calculated using the chip's second thermal impedance and the chip's actual losses.

[0016] The junction temperature of the chip is obtained by summing the actual temperature difference between the chip and the reference point and the actual reference point temperature of the semiconductor device.

[0017] Optionally, in the above junction temperature detection method, the method for determining the first thermal impedance of the chip includes:

[0018] Construct a simulation model of a semiconductor device; wherein the self-thermal impedance of each chip in the simulation model of the semiconductor device is the same as the self-thermal impedance of each chip in the semiconductor device.

[0019] For each chip in the simulation model, the simulation loss of the chip is set to a specific value, and the simulation loss of each other chip in the simulation model is set to zero. The simulation temperature of each chip and the simulation reference point temperature are obtained under the condition that only the chip generates heat. The specific value is not zero. The other chips in the simulation model are chips other than the chip in the simulation model.

[0020] The first thermal impedance of the chip is calculated based on the simulation temperature of each chip in the simulation model, the simulation reference point temperature, and the simulation loss of the chip in the simulation model.

[0021] Optionally, in the above junction temperature detection method, the construction of a simulation model of the semiconductor device includes:

[0022] Based on the 3D model of the semiconductor device and its attribute information, an initial model of the semiconductor device is obtained through simulation.

[0023] Obtain the self-thermal resistance of each chip in the initial model of the semiconductor device;

[0024] If the self-thermal impedance of each chip in the initial model is the same as the self-thermal impedance of each chip in the semiconductor device, then the initial model of the semiconductor device is determined as the simulation model of the semiconductor device.

[0025] If the self-thermal impedance of the chip in the initial model is different from that of the chip in the semiconductor device, the initial model of the semiconductor device is modified, and the modified initial model is used as the new initial model of the semiconductor device. Then, the process returns to the step of obtaining the self-thermal impedance of each chip in the initial model of the semiconductor device.

[0026] Optionally, in the above junction temperature detection method, after determining the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual loss, and the actual reference point temperature of the semiconductor device, the method further includes:

[0027] Determine whether the maximum value of the junction temperatures of all the chips is greater than a temperature threshold;

[0028] If the maximum junction temperature of all the chips exceeds the temperature threshold, an alarm message will be issued.

[0029] Secondly, this application discloses a junction temperature detection device, comprising:

[0030] The acquisition unit is used to acquire the current actual reference point temperature of the semiconductor device and the actual loss of each chip of the semiconductor device;

[0031] The correction unit is used to correct the first thermal impedance of each chip of the semiconductor device using the actual losses of all the chips, so as to obtain the second thermal impedance of the chip; wherein the first thermal impedance of the chip is calculated by simulation model of the semiconductor device.

[0032] The determining unit is used to determine the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device.

[0033] Thirdly, this application discloses a computer-readable medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the method described in any of the first aspects above.

[0034] Fourthly, this application discloses a junction temperature detection device, comprising:

[0035] One or more processors;

[0036] A storage device on which one or more programs are stored;

[0037] When the one or more programs are executed by the one or more processors, the one or more processors cause the one or more processors to implement the method as described in any of the first aspects above.

[0038] Based on the junction temperature detection method provided in the above embodiments of the present invention, the current actual reference point temperature of the semiconductor device and the actual losses of each chip in the semiconductor device are obtained. Then, for each chip of the semiconductor device, the first thermal impedance of the chip is corrected using the actual losses of all chips to obtain the second thermal impedance of the chip. The first thermal impedance of the chip is calculated using a simulation model of the semiconductor device. Since the embodiments of this application use the actual losses of all chips to correct the first thermal impedance of the chip, the impact of the actual losses of all chips on the thermal impedance of a single chip is taken into account. Therefore, the corrected second thermal impedance of the chip is more accurate than the first thermal impedance. Furthermore, based on the second thermal impedance of the chip, the actual losses of the chip, and the actual reference point temperature of the semiconductor device, a highly accurate junction temperature of the chip can be determined, which is beneficial to improving the reliability of system operation. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0040] Figure 1 This is a schematic flowchart of a junction temperature detection method disclosed in an embodiment of this application;

[0041] Figure 2 This is a schematic flowchart of a method for correcting the first thermal resistance of a chip disclosed in an embodiment of this application;

[0042] Figure 3 This is a schematic flowchart of a method for determining a first thermal impedance disclosed in an embodiment of this application;

[0043] Figure 4 This is a flowchart illustrating a method for constructing a simulation model of a semiconductor device disclosed in an embodiment of this application.

[0044] Figure 5 This is a schematic diagram of the structure of a junction temperature detection device disclosed in an embodiment of this application. Detailed Implementation

[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] In this application, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0047] See Figure 1 This application discloses a junction temperature detection method, which can be applied to components with logic processing functions such as central processing units (CPUs) and controllers. The method involves executing... Figure 1 The components of the illustrated method can be installed in electronic devices such as computers and junction temperature testing equipment, enabling junction temperature detection to be performed via electronic devices. Specifically, Figure 1 The method shown includes the following steps:

[0048] S101. Obtain the current actual reference point temperature of the semiconductor device and the actual losses of each chip in the semiconductor device.

[0049] The actual reference point temperature refers to the temperature of the reference point currently read by the semiconductor device operating within the system. A semiconductor device can be understood as an electronic device whose conductivity lies between that of a good conductor and an insulator, utilizing the unique electrical properties of semiconductor materials to perform specific functions. For example, semiconductor devices can be power devices such as insulated-gate bipolar transistors (IGBTs), diodes, and power field-effect transistors, as well as LEDs and integrated circuits or chips containing semiconductor transistors. Power devices are high-power devices that perform power conversion and control, and can be directly used in the main circuits that process electrical energy to realize power conversion or control.

[0050] The individual chips in a semiconductor device refer to the individual semiconductor chips. A semiconductor device can contain multiple chips, as well as negative temperature coefficient sensors, heat sinks, etc. The reference point of a semiconductor device can be understood as its temperature reference point. By obtaining the actual reference point temperature, the junction temperature of the semiconductor device can be estimated. The reference point of a semiconductor device can be arbitrarily chosen. For example, some manufacturers typically mount a negative temperature coefficient (NTC) temperature sensor on the substrate of a power device, and then select the NTC temperature sensor as the reference point for the power device, and then obtain the temperature detected by the NTC temperature sensor during actual system operation (i.e., the actual reference point temperature). Alternatively, the reference point can also be a heat sink of the semiconductor device. This application does not limit the selection of the reference point for the semiconductor device.

[0051] The actual loss of each chip in a semiconductor device refers to the actual heat generation power of each chip during actual operation (i.e., power loss during operation).

[0052] Optionally, in one specific embodiment of this application, one implementation of step S101 is as follows: reading the actual reference point temperature of the semiconductor device and the actual wear of each chip in the semiconductor device according to a preset cycle. Specifically, this can be performed by a CPU or other execution... Figure 1 The components shown in the process actively read the actual reference point temperature of the semiconductor device and the actual wear of each chip in the semiconductor device according to a preset cycle. Alternatively, the module equipped with the semiconductor device can actively report the actual reference point temperature of the semiconductor device and the actual wear of each chip in the semiconductor device to the CPU in real time or according to a preset cycle.

[0053] It should be noted that the methods for determining the actual reference point temperature of a semiconductor device and the actual losses of each chip in the semiconductor device are not limited in the embodiments of this application. For example, if the reference point of the semiconductor device is an NTC temperature sensor, the temperature of the NTC temperature sensor can be determined based on its resistance value. An NTC temperature sensor is a thermistor or probe, and its principle is that the resistance value decreases rapidly as the temperature rises. Continuing with the example, the actual losses of each chip in the semiconductor device can be calculated by engineers using monitored parameters such as voltage and current of each chip, and then provided to the central processing unit.

[0054] S102. For each chip in the semiconductor device, the first thermal impedance of the chip is corrected using the actual losses of all chips to obtain the second thermal impedance of the chip. The first thermal impedance of the chip is calculated through a simulation model of the semiconductor device.

[0055] The first thermal impedance of a chip can be understood as the thermal impedance from the chip to a reference point calculated using a semiconductor device simulation model, assuming only the chip generates heat (i.e., only losses are applied to the chip). This first thermal impedance can be understood as the thermal impedance of the chip calculated using a semiconductor device simulation model. The chip's thermal impedance can be understood as being composed of its self-thermal impedance and the first coupling thermal impedance between the chip and each other chip. Thermal impedance refers to the resistance encountered by heat in a heat flow path, reflecting the magnitude of the heat transfer capacity of a medium or between media. "Other chips" refers to chips other than the first chip. The first coupling thermal impedance between the chip and other chips can be understood as the coupling thermal impedance between the chip and other chips calculated using a semiconductor device simulation model. Coupling thermal impedance is the thermal impedance formed by the thermal coupling effect between the chip and other chips; the unit of coupling thermal impedance can be ℃ / W or K / W. The chip's self-thermal impedance is the thermal impedance formed by the chip's own heat generation; the unit can be ℃ / W or K / W.

[0056] It should be noted that, using a semiconductor device simulation model, under the assumption that only the chip generates heat (i.e., only losses are applied to the chip), the calculated first thermal impedance of the chip is unaffected by the chip's losses. In other words, regardless of the amount of loss applied to the chip in the semiconductor device simulation model, the first thermal impedance of the chip calculated by the simulation model will remain the same.

[0057] The simulation model of this semiconductor device can simulate the heat generation of the semiconductor device during operation and output some parameters of the semiconductor device during operation. For example, the junction temperature and thermal resistance of each chip in the simulation model of the semiconductor device. Then, the first thermal impedance of each chip can be calculated using the output parameters. There are many specific implementation methods for calculating the first thermal impedance of the chip through the simulation model of the semiconductor device, including but not limited to the content proposed in the embodiments of this application.

[0058] Although the first thermal impedance of a chip calculated using a semiconductor device simulation model, assuming only that chip generates heat (i.e., only losses are applied to that chip), is unaffected by chip losses, in actual operation, the first coupling thermal impedance of the chip is affected by the actual losses of each chip. Specifically, the inventors discovered that after calculating the first thermal impedance of each chip using the semiconductor device simulation model, directly using the chip's first thermal impedance to determine the chip's junction temperature is inaccurate. Specifically, when different losses are applied to all chips in the semiconductor simulation model to simulate the actual heat generation of the semiconductor device in operation, the junction temperature simulated by the simulation model is not equal to the junction temperature determined by directly using the chip's first thermal impedance. This indicates that the chip's first thermal impedance has an error, and this error arises because the influence of the actual losses of each chip on its thermal impedance is not considered, leading to an error in the junction temperature determined by the first thermal impedance.

[0059] Therefore, in this embodiment of the application, in order to improve the accuracy of calculating the thermal impedance of the chip, for each chip of the semiconductor device, after calculating the first thermal impedance of the chip, the actual losses of each chip are used to correct the first thermal impedance of the chip, resulting in the second thermal impedance of the chip. Compared with the first thermal impedance, the second thermal impedance of the chip is calculated using the actual losses of each chip, taking into account the impact of the heat generation (i.e., the losses generated) of each chip in actual operation on the thermal impedance of the chip, thus making the accuracy of the second thermal impedance better than that of the first thermal impedance, that is, closer to the actual thermal impedance of the chip.

[0060] Optionally, in one specific embodiment of this application, the second thermal impedance of the chip is positively correlated with the actual loss of the chip and negatively correlated with the actual loss of each of the other chips. Here, "other chips" refers to chips other than the chip itself. Specifically, during step S102, the higher the actual loss of the chip, the higher the second thermal impedance obtained after correcting the first thermal impedance of that chip will be. Conversely, the higher the actual loss of other chips, the lower the second thermal impedance obtained after correcting the first thermal impedance of that chip will be.

[0061] Optionally, in a specific embodiment of this application, the first thermal impedance of the chip may include: the chip's self-thermal impedance and the first coupling thermal impedance between the chip and each other chip. The second thermal impedance of the chip may include: the chip's self-thermal impedance and the second coupling thermal impedance between the chip and each other chip. The first and second thermal impedances of each chip in the semiconductor device can be represented in the form of a matrix, array, etc. For example, the first thermal impedance of each chip can be expressed as: .in This is the first thermal impedance matrix of a semiconductor device. The first thermal impedance matrix of a semiconductor device is used to represent the first thermal impedance of the semiconductor device. The first thermal impedance of a semiconductor device includes the first thermal impedance of each individual chip in the semiconductor device. This represents the first coupling thermal resistance between chip i and chip j when the i-th chip in a semiconductor device is heated (i.e., a loss is applied), while the other chips are not heated. For example... This represents the first coupling thermal impedance between the first chip and the nth chip, calculated when the first chip generates heat and the other chips do not. This represents the self-thermal resistance of the i-th chip. For example... This represents the thermal impedance of the first chip. Representing the first and second thermal impedances of each chip in a semiconductor device using matrices, arrays, or other similar formats makes subsequent calculations more efficient, allowing for the joint calculation of the junction temperature of each chip. There are many ways to represent the thermal impedance of a semiconductor device, including but not limited to those proposed in the embodiments of this application.

[0062] Optionally, see Figure 2 When the chip's first thermal impedance includes the chip's self-thermal impedance and the first coupling thermal impedance between the chip and each other chip, and the chip's second thermal impedance includes the chip's self-thermal impedance and the second coupling thermal impedance between the chip and each other chip, one embodiment of step S102 includes:

[0063] S201. For each chip of a semiconductor device, the loss ratio coefficient between the chip and each other chip is calculated using the actual loss of each other chip and the actual loss of the chip. The other chips are chips other than the chip. The loss ratio coefficient between the chip and other chips is used to describe the degree of correction to the first coupling thermal impedance between the chip and other chips. The loss ratio coefficient between the chip and other chips is negatively correlated with the actual loss of the other chips and positively correlated with the actual loss of the chip.

[0064] Specifically, the chip's first thermal resistance includes the chip's self-thermal resistance and the first coupling thermal resistance between the chip and each other chip. As described above, the chip's self-thermal resistance is an inherent property of the chip and is unaffected by actual losses; therefore, it does not require correction. While the self-thermal resistance is unaffected by actual losses, the coupling thermal resistance is affected by thermal coupling with neighboring chips and is thus influenced by the actual losses of those chips. Therefore, it is necessary to correct the aforementioned first coupling thermal resistance between the chip and each other chip, taking into account the impact of the actual losses of other chips on the coupling thermal resistance.

[0065] Specifically, in this embodiment, the actual losses of each other chip and the chip itself are used to calculate the loss ratio coefficient between the chip and each other chip. That is, when calculating the loss ratio coefficient between chip i and another chip j, the actual losses of chip i and other chip j are used. This loss ratio coefficient reflects the degree of correction needed for the first coupling thermal impedance between chip i and other chips j. Specifically, the loss ratio coefficient between chip i and other chips k is negatively correlated with the actual losses of other chips j and positively correlated with the actual losses of chip i. That is, the greater the actual loss of chip i, the greater the loss ratio coefficient between chip i and other chips j. Conversely, the greater the actual loss of chip j, the smaller the loss ratio coefficient between chip i and other chips j. The second coupling thermal impedance between chip i and other chips j is positively correlated with the loss ratio coefficient between chip i and other chips j. That is, the greater the loss ratio coefficient between chip i and other chips j, the greater the second coupling thermal impedance obtained after correcting the first coupling thermal impedance between chip i and other chips j.

[0066] For example, the loss ratio between chip i and other chips j can be calculated using the first formula. The first formula is: . This represents the loss ratio coefficient between chip i and other chips j. It is the actual loss of chip i (i.e., the i-th chip). This is the actual loss of chip j (i.e., the j-th chip). When and If they are equal, it means that the first coupling thermal impedance does not need to be corrected, or it can be considered that the second thermal coupling impedance obtained after correction is equal to the first coupling thermal impedance. It should be noted that there are many ways to calculate the loss ratio factor, including but not limited to the method of using the first formula.

[0067] S202. Using the loss ratio coefficient between the chip and each other chip respectively, the first coupling thermal impedance between the chip and each other chip is corrected to obtain the second coupling thermal impedance between the chip and each other chip.

[0068] Specifically, when correcting the first thermal impedance of each chip, only the first coupling thermal impedance between the chip and each other chip can be corrected. Using the loss ratio coefficient between the chip and other chips, the first coupling thermal impedance between the chip and other chips can be corrected to obtain the second coupling thermal impedance between the chip and other chips.

[0069] There are many ways to correct the first coupling thermal impedance between chips using a loss scaling factor between the chip and other chips. For example, the loss scaling factor can be multiplied by the first coupling thermal impedance, and the product is the second coupling thermal impedance between the chip and other chips. Specifically, the second coupling thermal impedance between the chip and other chips can be calculated using the second formula. The second formula is: . This represents the second coupling thermal impedance between chip i and other chips j. This represents the loss ratio coefficient between chip i and other chips j. The process for determining the loss ratio coefficient can be found in the relevant content mentioned in step S201 above, and will not be repeated here. This represents the first coupling thermal impedance between chip i and chip j when the i-th chip of a semiconductor device is heated (i.e., losses are applied) while the other chips are not heated.

[0070] After the second thermal impedance of each chip in the semiconductor device is finally calculated using the first and second formulas, the second thermal impedance of each chip can be represented by a matrix, array, or other means so that the junction temperature of each chip can be calculated simultaneously in the subsequent step S103, thereby accelerating the processing efficiency.

[0071] For example, the second thermal impedance of each chip can be represented by the second thermal impedance matrix of the semiconductor device. The second thermal impedance matrix of the semiconductor device is as follows: .in, This is the second thermal impedance matrix of a semiconductor device. The second thermal impedance matrix of a semiconductor device is used to represent the second thermal impedance of the semiconductor device. The second thermal impedance of a semiconductor device includes the second thermal impedance of each individual chip in the semiconductor device. This represents the second coupling thermal impedance between chip i and chip j. For example... This represents the second coupling thermal impedance between the first chip and the second chip. This represents the self-thermal resistance of the i-th chip. For example... This represents the self-thermal resistance of the first chip.

[0072] It should be noted that the first and second thermal impedances of each chip can also be obtained by modifying the first thermal impedance of each chip separately, rather than representing them as matrices or arrays.

[0073] It should also be noted that, This represents the loss ratio of chip i itself. Figure 2 In the illustrated embodiment, the self-heating resistance may not need to be corrected, therefore You can simply set it to 1 by default. Then the method mentioned in step S201 above can be used for calculation. This represents the loss ratio coefficient between chip i and other chips j.

[0074] In this embodiment, step S201 calculates the loss ratio coefficient based on the actual loss of the chip and the actual loss of other chips. Since the loss ratio coefficient between the chip and other chips is used to illustrate the degree of correction to the first coupling thermal impedance between the chip and other chips, it can be considered that the actual loss of the chip and the actual loss of other chips affect the degree of correction during the correction process. This ensures that the corrected second coupling thermal impedance between the chip and each other chip is closer to the actual coupling thermal impedance between the chip and each other chip.

[0075] Optionally, see Figure 3 In a specific embodiment of this application, the method for determining the first thermal resistance of the chip includes:

[0076] S301. Construct a simulation model of a semiconductor device, wherein the self-thermal impedance of each chip in the simulation model of the semiconductor device is the same as the self-thermal impedance of each chip in the semiconductor device.

[0077] Specifically, thermal simulation software such as Icepak and ANSYS can be used to construct simulation models of semiconductor devices. The number of chips in the actual semiconductor device matches the number of chips in the simulation model. The self-thermal impedance of each chip in the simulation model is the same as that of each chip in the actual semiconductor device. Because the self-thermal impedance of each chip in the simulation model is the same as that of each chip in the actual semiconductor device, the parameters obtained from simulating the chip heating process using the simulation model will be nearly equal to the parameters detected during the actual heating process of the semiconductor device, facilitating the subsequent determination of the first thermal impedance of each chip.

[0078] It should be noted that the self-thermal impedance of each chip in the simulation model of the semiconductor device mentioned in this application is the same as the self-thermal impedance of each chip in the actual semiconductor device. This can be understood as the self-thermal impedance of each chip in the simulation model of the semiconductor device being almost equal to the self-thermal impedance (i.e., the actual self-thermal impedance) of each chip in the actual semiconductor device. In other words, if the error between the self-thermal impedance of each chip in the simulation model of the semiconductor device and the actual self-thermal impedance is less than an error threshold, it can be considered that the self-thermal impedance of each chip in the simulation model of the semiconductor device is the same as the self-thermal impedance of each chip in the actual semiconductor device.

[0079] To improve the accuracy of the simulation model in simulating the heating process, the constructed simulation model of the semiconductor device can not only have the same self-thermal impedance as the individual chips of the semiconductor device, but also have the same shape and various properties as the semiconductor device.

[0080] For example, see Figure 4 One implementation of step S301 includes:

[0081] S401. Based on the 3D model of the semiconductor device and its attribute information, the initial model of the semiconductor device is obtained through simulation.

[0082] The attribute information of a semiconductor device can include its internal material (or material properties), model number, and other semiconductor-specific information. Based on the 3D model and attribute information of the semiconductor device, the simulated initial model of the semiconductor device closely resembles the actual semiconductor device, effectively representing it as an equivalent device.

[0083] S402. Obtain the initial model of the semiconductor device and the self-thermal impedance of each chip.

[0084] After constructing the initial model of the semiconductor device using simulation software, to further confirm whether the initial model can be used to equivalently represent the semiconductor device, it is necessary to obtain the self-thermal impedance of each chip in the initial model of the semiconductor device. Specifically, after completing the construction of the initial model of the semiconductor device in step S401, the initial model will output the self-thermal impedance of each chip after simulation (i.e., the self-thermal impedance of the initial model of the semiconductor device). Generally speaking, if the 3D model and attribute information of the constructed initial model are nearly equal to the actual 3D model and attribute information of the semiconductor device, then the self-thermal impedance of the chips in the initial model should also be close to the actual self-thermal impedance of the corresponding chips in the semiconductor device. To ensure that the self-thermal impedance of the chips in the initial model is close to the actual self-thermal impedance of the corresponding chips in the semiconductor device, the self-thermal impedance of each chip in the initial model is obtained in step S402 to further verify whether the self-thermal impedance of each chip in the constructed initial model can be equivalent to the actual self-thermal impedance of each chip in the semiconductor device. The specific verification process can be referred to the steps after step S402, which will not be repeated here.

[0085] The actual self-thermal impedance (i.e., the self-thermal impedance of the chip) of each chip in the semiconductor device can be obtained by referring to the description of the self-thermal impedance of the semiconductor device in the datasheet, or it can be provided by the engineer. This application embodiment does not limit this.

[0086] S403. Determine whether the self-thermal resistance of each chip in the initial model is the same as that of each chip in the semiconductor device.

[0087] The execution process of step S403 can be understood as determining whether the self-thermal impedance of each chip in the initial model is the same as the self-thermal impedance of its corresponding chip in the semiconductor device. If the self-thermal impedance of a chip is equal to the self-thermal impedance of its corresponding chip in the semiconductor device, or if the error between the self-thermal impedance of a chip and its corresponding chip in the semiconductor device is less than an error threshold, then the self-thermal impedance of the chip can be considered the same as the self-thermal impedance of its corresponding chip in the semiconductor device. If the self-thermal impedance of all chips is the same as the self-thermal impedance of their corresponding chips in the semiconductor device, then the currently constructed initial model is considered equivalent to the actual semiconductor device, and step S404 is executed. If the self-thermal impedance of a chip in the initial model is different from the self-thermal impedance of the chip in the semiconductor device, then the currently constructed initial model is considered not equivalent to the actual semiconductor device, and step S405 needs to be executed for adjustment.

[0088] S404. Determine the initial model of the semiconductor device as the simulation model of the semiconductor device.

[0089] S405. Modify the initial model of the semiconductor device and use the modified initial model as the new initial model of the semiconductor device, then return to step S402.

[0090] Because the self-thermal resistance of the chip in the initial model is different from that of the chip in the semiconductor device, the initial model of the semiconductor device cannot be directly equivalent to the actual semiconductor device. Some parameters of the initial model of the semiconductor device need to be modified, such as changing the material properties and dimensions, before returning to step S402. For example, only the parameters of the chips with different self-thermal resistances in the initial model can be modified.

[0091] S302. For each chip in the simulation model, set the simulation loss of the chip to a specific value and set the simulation loss of each other chip in the simulation model to zero. Simulate the simulation temperature of each chip and the simulation reference point temperature under the condition that only the chip heats up. The specific value is not zero. The other chips in the simulation model are the chips in the simulation model other than the chip.

[0092] When the simulation loss of the chip is set to a specific value and the simulation losses of all other chips in the simulation model are set to zero, it is possible to simulate a situation where only a single chip heats up, while the other chips do not. In this case, the simulation model can output the temperature of each chip (i.e., the simulation temperature) and the temperature of the reference point in the simulation model (i.e., the simulation reference point temperature) when only a single chip is heating up. For example, if the semiconductor device contains an NTC package and the NTC is selected as the reference point, then...

[0093] It should be noted that the specific value can be arbitrary; that is, the loss applied to the chip in the simulation model can be arbitrary, and the applied loss is relative to... Figure 3 The final calculated value of the first thermal impedance will not be affected. For example, during step S302, for ease of setup, the specific value of the simulation loss can be the same when applying simulation loss to each chip. For instance, when the semiconductor device simulation model has n chips, simulating the heating of different individual chips in the simulation model can be represented by a simulation loss matrix. This simulation loss matrix... .in, for The simulation loss matrix. The simulation loss is the applied loss. The i-th row of the simulation loss matrix represents the simulated loss of each chip when only the i-th chip generates heat. Specifically, the simulation loss matrix shows that the first row indicates that only the first chip has simulated loss applied. This is the case where the simulation loss of other chips is 0. The representation of other rows in the simulation loss matrix is ​​similar and will not be repeated here.

[0094] In some embodiments, in order to obtain the first thermal impedance of all chips synchronously in step S303, the simulated temperature and simulated reference point temperature of each chip obtained in step S302 under the condition that each chip is heating up can be represented by a temperature matrix, temperature array, or other means.

[0095] For example, the temperatures of all chips under different heating conditions can be expressed as:

[0096] .in This represents the temperature matrix, which indicates the simulated temperature of each chip under different heating conditions. The simulation model contains n chips, and the temperature matrix... There are n rows in total. The i-th row of the matrix represents the simulated temperature of each chip when only the i-th chip generates heat. This represents the simulated temperature of the j-th chip under the condition that only the i-th chip generates heat. This represents the simulated temperature of the i-th chip under the condition that only the i-th chip generates heat. For example, This represents the simulated temperature of the first chip when only the first chip generates heat. This represents the simulated temperature of the nth chip when only the i-th chip generates heat.

[0097] Representing the simulated temperature of each chip under various heating conditions in matrix form can improve the computational efficiency of subsequent steps in S303.

[0098] It should be noted that, instead of representing the simulated temperatures of each chip under various heating conditions as a matrix, it is also possible to directly record the simulated temperatures of each chip under each heating condition.

[0099] S303. Based on the simulation temperature of each chip in the simulation model, the simulation reference point temperature, and the simulation loss of the chips in the simulation model, the first thermal impedance of the chip is calculated.

[0100] Specifically, after step S302 is completed, the simulation temperature and simulation reference point temperature of each chip will be obtained from the simulation model under different chip heating conditions. Then, for each chip, the first thermal impedance of the chip can be calculated by using the simulation temperature, simulation reference point temperature, and simulation loss of the chip obtained under the condition that only the chip is heating.

[0101] For example, the first thermal resistance of the chip includes the chip's self-thermal resistance and the first coupling thermal resistance between the chip and each other chip. The chip's self-thermal resistance is calculated using the simulated temperature of the chip, the simulated reference point temperature, and the simulated losses of the chip, obtained under conditions where only the chip generates heat. Optionally, the chip's self-thermal resistance can be calculated using a third formula. The third formula is: .in, This represents the self-thermal resistance of the i-th chip. This represents the simulated temperature of the i-th chip when only the i-th chip generates heat. This represents the simulated temperature of the reference point NTC when only the i-th chip generates heat. This represents the simulation loss of the i-th chip.

[0102] The first coupling thermal impedance between this chip and other chips is calculated as follows: Using the simulated temperatures of the other chips, the simulated reference point temperature, and the simulated losses of this chip obtained under conditions where only this chip generates heat, the first coupling thermal impedance between this chip and other chips can be calculated. Optionally, the first coupling thermal impedance between this chip and other chips can be calculated using the fourth formula. The fourth formula is: .in, This represents the first coupling thermal impedance between the i-th chip and the j-th chip when only the i-th chip is heating up. This represents the simulated temperature of the j-th chip when only the i-th chip generates heat. This represents the simulated temperature of the reference point NTC when only the i-th chip generates heat. This represents the simulation loss of the i-th chip.

[0103] After calculating the first thermal impedance of the chip using the above method, the first thermal impedance of the chip can be expressed in the form of the first thermal impedance matrix of the semiconductor device mentioned above. For the specific representation, please refer to the relevant content mentioned above, which will not be repeated here.

[0104] S103. Determine the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device.

[0105] By analyzing the chip's second thermal impedance, its actual power loss, and the chip's actual power loss, the actual temperature difference between the chip and a reference point in the semiconductor device can be calculated. Furthermore, by combining the actual temperature difference between the chip and the reference point, and the actual temperature of the reference point in the semiconductor device, the junction temperature of the chip can be determined.

[0106] For example, if the second thermal impedance of the chip is the sum of the chip's self-thermal impedance and the second coupling thermal impedance between the chip and each other chip, then the process of executing step S103 can be as follows: For each chip, multiply the chip's second thermal impedance by the chip's actual loss to obtain the actual temperature difference between the chip and the reference point. Then add the actual temperature difference between the chip and the reference point to the actual reference point temperature of the semiconductor device to obtain the junction temperature of the chip.

[0107] For example, if the second thermal impedance of the chip includes the self-thermal impedance of the chip and the second coupling thermal impedance between the chip and each other chip, the second thermal impedance of all chips during the semiconductor process can be expressed in matrix form, the actual loss of each chip can be expressed in matrix form, and the junction temperature of all chips can be calculated in matrix form.

[0108] For example, the junction temperature of all chips can be calculated using the fifth formula, which is: .in, It is a junction temperature matrix used to represent the junction temperature of each chip. This indicates the junction temperature of the first chip. ... The meanings are similar, so they will not be repeated here. This represents the second thermal impedance matrix of a semiconductor device. For details, please refer to the aforementioned description of the second thermal impedance matrix of a semiconductor device, which will not be repeated here. This represents the actual loss matrix, where... This indicates the actual loss of the first chip. ... The meanings are similar, so they will not be repeated here. This represents the actual reference point temperature.

[0109] In the fifth formula, the junction temperature matrix can be obtained by adding the product of the second thermal impedance matrix and the actual loss matrix to the actual reference temperature matrix. The junction temperature matrix provides the junction temperature of all chips, which is more efficient than calculating the junction temperature of each chip separately.

[0110] It should be noted that there are various ways to determine the junction temperature of each chip based on its second thermal impedance, the actual loss of each chip, and the actual reference point temperature of the semiconductor device, including but not limited to the methods proposed in the embodiments of this application.

[0111] Optionally, in a specific embodiment of this application, after executing step S103, the method further includes: determining whether the maximum value of the junction temperature of all chips is greater than a temperature threshold; if the maximum value of the junction temperature of all chips is greater than the temperature threshold, then issuing an alarm message. Optionally, if the maximum value of the junction temperature of all chips is less than or equal to the temperature threshold, then no processing is required.

[0112] The alarm message is used to remind users that the junction temperature of a chip in a semiconductor device exceeds a certain temperature threshold. When the junction temperature of a chip in a semiconductor device exceeds the temperature threshold, it indicates a safety hazard in the current system. The semiconductor device may experience reduced lifespan or even failure due to excessive temperature, affecting the normal operation of the system containing the semiconductor device. Therefore, the user needs to perform appropriate maintenance.

[0113] It should be noted that, through Figure 1 The method shown, after detecting the junction temperature of each chip, can be applied not only to the scenario of timely alarm issuance but also to other scenarios, such as semiconductor device testing. By monitoring the junction temperature of each chip during semiconductor device operation, the reliability of the semiconductor device can be ensured, and its suitability for use in a real-world system can be evaluated. This application does not limit the application scenarios for the junction temperature of each chip, but includes, but is not limited to, the content proposed in the embodiments of this application.

[0114] The junction temperature detection method provided in this invention obtains the current actual reference point temperature of the semiconductor device and the actual losses of each chip in the semiconductor device. Then, for each chip of the semiconductor device, the first thermal impedance of the chip is corrected using the actual losses of all chips to obtain the second thermal impedance of the chip. The first thermal impedance of the chip is calculated using a simulation model of the semiconductor device. Because this embodiment uses the actual losses of all chips to correct the first thermal impedance of the chip, it takes into account the impact of the actual losses of all chips on the thermal impedance of a single chip. Therefore, the corrected second thermal impedance of the chip is more accurate than the first thermal impedance. Thus, based on the second thermal impedance of the chip, the actual losses of the chip, and the actual reference point temperature of the semiconductor device, a highly accurate junction temperature of the chip can be determined, which is beneficial to improving the reliability of system operation.

[0115] See Figure 5 Based on the junction temperature detection method proposed in the above embodiments of this application, this application also discloses a junction temperature detection device, including: an acquisition unit 501, a correction unit 502, and a determination unit 503.

[0116] The acquisition unit 501 is used to acquire the current actual reference point temperature of the semiconductor device and the actual loss of each chip in the semiconductor device.

[0117] The correction unit 502 is used to correct the first thermal impedance of each chip of the semiconductor device using the actual losses of all chips, so as to obtain the second thermal impedance of the chip, wherein the first thermal impedance of the chip is calculated by the simulation model of the semiconductor device.

[0118] The determining unit 503 is used to determine the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device.

[0119] Optionally, in one specific embodiment of this application, the second thermal impedance of the chip is positively correlated with the actual loss of the chip and negatively correlated with the actual loss of each other chip, wherein the other chips are chips other than the chip itself.

[0120] Optionally, in one specific embodiment of this application, the first thermal impedance of the chip includes: the chip's self-thermal impedance and the first coupling thermal impedance between the chip and each other chip. The second thermal impedance of the chip includes: the chip's self-thermal impedance and the second coupling thermal impedance between the chip and each other chip. The correction unit 502 includes: a first calculation subunit and a correction subunit.

[0121] The first calculation subunit is used to calculate, for each chip in the semiconductor device, a loss ratio coefficient between the chip and each of the other chips, using the actual losses of each other chip and the chip itself. Here, "other chips" refers to chips other than the chip itself. The loss ratio coefficient between the chip and other chips is used to indicate the degree of correction to the first coupling thermal impedance between the chip and other chips. The loss ratio coefficient between the chip and other chips is negatively correlated with the actual losses of the other chips and positively correlated with the actual losses of the chip itself.

[0122] The correction subunit is used to correct the first coupling thermal impedance between the chip and each other chip by using the loss ratio coefficient between the chip and each other chip respectively, so as to obtain the second coupling thermal impedance between the chip and each other chip.

[0123] Optionally, in a specific embodiment of this application, the determining unit 503 includes: a second calculation subunit and a third calculation subunit.

[0124] The second calculation subunit is used to calculate the actual temperature difference between the chip and the reference point using the chip's second thermal impedance and the chip's actual losses.

[0125] The third calculation subunit is used to sum the actual temperature difference between the chip and the reference point and the actual reference point temperature of the semiconductor device to obtain the junction temperature of the chip.

[0126] Optionally, in a specific embodiment of this application, it further includes: a construction unit, a setting unit, and a calculation unit.

[0127] The building block is used to construct simulation models of semiconductor devices. The self-thermal impedance of each chip in the simulation model of the semiconductor device is the same as that of each chip in the actual semiconductor device.

[0128] The setting unit is used to set the simulation loss of each chip in the simulation model to a specific value, and set the simulation loss of all other chips in the simulation model to zero. This allows for the simulation to obtain the simulation temperature of each chip and the simulation reference point temperature under conditions where only the chip generates heat. The specific value is not zero. The other chips in the simulation model are all chips other than the chip itself.

[0129] The calculation unit is used to calculate the first thermal impedance of the chip based on the simulation temperature of each chip in the simulation model, the simulation reference point temperature, and the simulation loss of the chip in the simulation model.

[0130] Optionally, in a specific embodiment of this application, the construction unit includes: a simulation subunit, an acquisition subunit, a determination subunit, and a modification subunit.

[0131] The simulation subunit is used to simulate and obtain the initial model of the semiconductor device based on the 3D model and attribute information of the semiconductor device.

[0132] The acquisition sub-unit is used to obtain the self-thermal impedance of each chip in the initial model of the semiconductor device.

[0133] A sub-unit is defined to determine the initial model of the semiconductor device as the simulation model of the semiconductor device if the self-thermal impedance of each chip in the initial model is the same as that of each chip in the semiconductor device.

[0134] The modification sub-unit is used to modify the initial model of the semiconductor device if the self-thermal impedance of the chip in the initial model is different from that of the semiconductor device chip. The modified initial model is then used as the new initial model of the semiconductor device and returned to the acquisition sub-unit.

[0135] Optionally, in a specific embodiment of this application, it further includes: a judgment unit and an alarm unit.

[0136] The judgment unit is used to determine whether the maximum junction temperature of all chips is greater than the temperature threshold.

[0137] An alarm unit is used to issue an alarm message if the maximum junction temperature of all chips exceeds a temperature threshold.

[0138] The execution process and principle of each unit and subunit in the junction temperature detection device proposed in this application embodiment can be referred to the junction temperature detection method proposed in the aforementioned embodiment of this application, and will not be repeated here.

[0139] The junction temperature detection device provided in this embodiment of the invention acquires the current actual reference point temperature of the semiconductor device and the actual losses of each chip in the semiconductor device through the acquisition unit 501. Then, the correction unit 502 corrects the first thermal impedance of each chip in the semiconductor device using the actual losses of all chips to obtain the second thermal impedance of the chip. The first thermal impedance of the chip is calculated through a simulation model of the semiconductor device. Since the actual losses of all chips are used to correct the first thermal impedance of the chip in this embodiment, the influence of the actual losses of all chips on the thermal impedance of a single chip is taken into account. Therefore, the corrected second thermal impedance of the chip is more accurate than the first thermal impedance. Thus, the determination unit 503 can determine the junction temperature of the chip with high accuracy based on the second thermal impedance of the chip, the actual losses of the chip, and the actual reference point temperature of the semiconductor device, which is beneficial to improving the reliability of system operation.

[0140] This application also discloses a computer-readable medium storing a computer program thereon, wherein the program, when executed by a processor, implements any of the junction temperature detection methods described above.

[0141] This application also discloses a junction temperature detection device, including: one or more processors; and a storage device storing one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement any of the junction temperature detection methods described above.

[0142] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0143] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0144] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method of detecting a junction temperature, characterized by, include: Obtain the current actual reference point temperature of the semiconductor device and the actual loss of each chip in the semiconductor device; For each chip of the semiconductor device, the first thermal impedance of the chip is corrected using the actual losses of all the chips to obtain the second thermal impedance of the chip; wherein, the first thermal impedance of the chip is calculated through a simulation model of the semiconductor device; The junction temperature of the chip is determined based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device. The first thermal impedance of the chip includes: the self-thermal impedance of the chip, and the first coupling thermal impedance between the chip and each other chip; the second thermal impedance of the chip includes: the self-thermal impedance of the chip, and the second coupling thermal impedance between the chip and each other chip; the second thermal impedance of the chip is obtained by correcting the first thermal impedance of the chip for each chip of the semiconductor device using the actual losses of all the chips, including: For each chip in the semiconductor device, a loss ratio coefficient between the chip and each of the other chips is calculated using the actual losses of the other chips and the actual losses of the chip itself; wherein, the other chips are chips other than the chip itself; the loss ratio coefficient between the chip and the other chips is used to indicate the degree of correction to the first coupling thermal impedance between the chip and the other chips; the loss ratio coefficient between the chip and the other chips is negatively correlated with the actual losses of the other chips and positively correlated with the actual losses of the chip itself; The first coupling thermal impedance between the chip and each of the other chips is corrected using the loss ratio coefficient between the chip and each of the other chips respectively, to obtain the second coupling thermal impedance between the chip and each of the other chips; Determining the junction temperature of the chip based on its second thermal impedance, actual chip losses, and actual reference point temperature of the semiconductor device includes: The actual temperature difference between the chip and the reference point is calculated using the chip's second thermal impedance and the chip's actual losses. The junction temperature of the chip is obtained by summing the actual temperature difference between the chip and the reference point and the actual reference point temperature of the semiconductor device.

2. The method of claim 1, wherein, The second thermal impedance of the chip is positively correlated with the actual loss of the chip and negatively correlated with the actual loss of each other chip; wherein, the other chips are chips other than the chip.

3. The method of claim 1, wherein, The method for determining the first thermal impedance of the chip includes: Construct a simulation model of a semiconductor device; wherein the self-thermal impedance of each chip in the simulation model of the semiconductor device is the same as the self-thermal impedance of each chip in the semiconductor device. For each chip in the simulation model, the simulation loss of the chip is set to a specific value, and the simulation loss of each other chip in the simulation model is set to zero. The simulation temperature of each chip and the simulation reference point temperature are obtained under the condition that only the chip generates heat. The specific value is not zero. The other chips in the simulation model are chips other than the chip in the simulation model. The first thermal impedance of the chip is calculated based on the simulation temperature of each chip in the simulation model, the simulation reference point temperature, and the simulation loss of the chip in the simulation model.

4. The method of claim 3, wherein, The simulation model for constructing the semiconductor device includes: Based on the 3D model of the semiconductor device and its attribute information, an initial model of the semiconductor device is obtained through simulation. Obtain the self-thermal resistance of each chip in the initial model of the semiconductor device; If the self-thermal impedance of each chip in the initial model is the same as the self-thermal impedance of each chip in the semiconductor device, then the initial model of the semiconductor device is determined as the simulation model of the semiconductor device. If the self-thermal impedance of the chip in the initial model is different from that of the chip in the semiconductor device, the initial model of the semiconductor device is modified, and the modified initial model is used as the new initial model of the semiconductor device. Then, the process returns to the step of obtaining the self-thermal impedance of each chip in the initial model of the semiconductor device.

5. The method according to any one of claims 1 to 4, characterized in that, After determining the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device, the method further includes: Determine whether the maximum value of the junction temperatures of all the chips is greater than a temperature threshold; If the maximum junction temperature of all the chips exceeds the temperature threshold, an alarm message will be issued.

6. A junction temperature detection device, characterized by, include: The acquisition unit is used to acquire the current actual reference point temperature of the semiconductor device and the actual loss of each chip of the semiconductor device; The correction unit is used to correct the first thermal impedance of each chip of the semiconductor device using the actual losses of all the chips, so as to obtain the second thermal impedance of the chip; wherein the first thermal impedance of the chip is calculated by simulation model of the semiconductor device. The determining unit is used to determine the junction temperature of the chip based on the chip's second thermal impedance, the chip's actual losses, and the actual reference point temperature of the semiconductor device. The first thermal impedance of the chip includes: the chip's self-thermal impedance and the first coupling thermal impedance between the chip and each other chip; the second thermal impedance of the chip includes: the chip's self-thermal impedance and the second coupling thermal impedance between the chip and each other chip; the correction unit includes: a first calculation subunit and a correction subunit; The first calculation subunit is used to calculate the loss ratio coefficient between the chip and each other chip for each chip of the semiconductor device, using the actual loss of each other chip and the actual loss of the chip; wherein, other chips are chips other than the chip; the loss ratio coefficient between the chip and other chips is used to indicate the degree of correction to the first coupling thermal impedance between the chip and other chips; the loss ratio coefficient between the chip and other chips is negatively correlated with the actual loss of the other chips and positively correlated with the actual loss of the chip. The correction subunit is used to correct the first coupling thermal impedance between the chip and each other chip using the loss ratio coefficient between the chip and each other chip respectively, so as to obtain the second coupling thermal impedance between the chip and each other chip. The determining unit includes: a second calculation subunit and a third calculation subunit; The second calculation subunit is used to calculate the actual temperature difference between the chip and the reference point using the chip's second thermal impedance and the chip's actual losses. The third calculation subunit is used to sum the actual temperature difference between the chip and the reference point and the actual reference point temperature of the semiconductor device to obtain the junction temperature of the chip.

7. A computer-readable medium, characterized in that, It stores a computer program, wherein the program, when executed by a processor, implements the junction temperature detection method as described in any one of claims 1 to 5.

8. A junction temperature detection device, characterized in that, include: One or more processors; A storage device on which one or more programs are stored; When the one or more programs are executed by the one or more processors, the one or more processors implement the junction temperature detection method as described in any one of claims 1 to 5.

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