A VCO amplitude calibration circuit

Abstract

The application discloses a VCO amplitude calibration circuit and belongs to the field of integrated circuit chips, which comprises a selector, an amplitude detection module, an amplitude comparator, a digital state machine, a digital current source and an amplitude control module; the selector, the amplitude detection module, the amplitude comparator, the digital state machine, the digital current source and the amplitude control module are sequentially connected to constitute the amplitude calibration circuit; the input of the selector is connected to the output end of a VCO, and the output of the amplitude control module is connected to the base of a cross-coupled tube of the voltage-controlled oscillator to constitute the whole loop. The application replaces the traditional tail current tube current control strategy, controls the resonant cavity current in the mode of current replication, eliminates the restriction of the tail current tube on the output amplitude, resonates the tail inductance and the tail capacitance at the second harmonic frequency, avoids the Q value degradation and phase noise deterioration caused by the second harmonic energy loss, and therefore the application can realize the fast and stable calibration under the condition of the better phase noise level and the larger output swing.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit chip technology, and in particular to a VCO amplitude calibration circuit. Background Technology

[0002] The VCO (Voltage Controlled Oscillator) is located at the output of the phase-locked loop (PLL) system. It is the module with the highest operating frequency in the PLL loop. Its input signal is the voltage-controlled voltage signal generated by the loop filter, and its output signal is a frequency f. OUT The periodic oscillation signal. The output signal frequency of the VCO is regulated by the input voltage control voltage, and it is essentially a nonlinear circuit that converts the input DC signal into the output AC signal.

[0003] For amplitude calibration circuits, increasing the oscillation amplitude of the VCO's output signal can reduce phase noise. Therefore, in the current-limited region, increasing the current and thus the amplitude can effectively reduce phase noise. However, when the VCO enters the voltage-limited region, since the amplitude does not change much with increasing current, the decrease in current efficiency will cause the Q value of the resonant cavity to decrease, which will lead to a deterioration in phase noise. Therefore, when the circuit is biased at the critical point Vopt between the current-limited and voltage-limited regions, the circuit can ensure the highest current efficiency and optimal phase noise performance. In low-phase-noise VCO designs, an Automatic Amplitude Calibration (AAC) circuit is usually designed to keep the VCO's oscillation amplitude near its optimal value under PVT, thereby optimizing phase noise performance.

[0004] Traditional VCO amplitude calibration circuits typically control the current in the resonant cavity by manipulating the current in the VCO's tail current transistor to better determine the oscillation signal swing. The tail current transistor has a simple structure and is suitable for both NMOS and CMOS negative-resistance VCOs. Furthermore, in AC equivalent analysis, the tail current source is equivalent to a high-resistance transistor, considered an open circuit, which avoids energy loss caused by the cross-coupled transistor entering the linear region during VCO oscillation. However, this high-resistance equivalence of the tail current source only holds true when the current transistor operates in the saturation region. When the oscillation swing is large, causing one cross-coupled transistor to operate in the linear region (equivalent to a low-resistance transistor), and the other to operate in the cutoff region, the lower source voltage of the linear region cross-coupled transistor forces the tail current transistor into the linear region. This forms a low-resistance path from the resonant cavity through the two linear transistors (the linear region cross-coupled transistor and the tail current transistor) to ground, effectively adding a low-resistance transistor to the LC resonant cavity in parallel. This reduces the equivalent parallel impedance of the resonant cavity, thus lowering its Q value and worsening phase noise. However, the tail current transistor introduces phase noise into the resonant cavity, and its overdrive voltage reduces the VCO's output swing. Summary of the Invention

[0005] The purpose of this invention is to provide a VCO amplitude calibration circuit to solve the problems in the background art.

[0006] To solve the above-mentioned technical problems, the present invention provides a VCO amplitude calibration circuit, including a selector, an amplitude detection module, an amplitude comparator, a digital state machine, a digitally controlled current source, and an amplitude control module;

[0007] The selector, amplitude detection module, amplitude comparator, digital state machine, digitally controlled current source, and amplitude control module are connected in sequence to form an amplitude calibration circuit; the input of the selector is connected to the output of the VCO, and the output of the amplitude control module is connected to the base of the cross-coupled transistor of the voltage-controlled oscillator to form the entire loop.

[0008] The selector selects and outputs the oscillation signal that enables the VCO in the broadband multi-core VCO;

[0009] The amplitude detection module converts the high-frequency oscillation signal output by the VCO into a DC amplitude detection signal that is proportional to the amplitude.

[0010] The amplitude comparator is used to compare the magnitude of the DC amplitude detection signal with the reference voltage and outputs a high or low level as the comparison result.

[0011] The digital state machine detects the high and low level comparison results of the output and adjusts the output current control word.

[0012] The numerically controlled current source generates an adjustable output current controlled by an input current control word;

[0013] The amplitude control module replicates the current ratio output by the digitally controlled current source into the VCO resonant cavity, controlling the current of the VCO and thus controlling its oscillation amplitude.

[0014] In one embodiment, the amplitude detection module includes a pair of coupling capacitors C21 and C22, an amplitude modulation capacitor C23, a pair of bias resistors R21 and R22, a pair of detector transistors Q21 and Q22, a tail current transistor M21, and a filter capacitor Cout.

[0015] The upper plates of coupling capacitors C1 and C2 are connected to the output terminals VOUTN and VOUTP of the VCO, respectively. The lower plates are connected to the bases of detector transistors Q21 and Q22. The bias voltage Vb1 is connected to the bases of detector transistors Q21 and Q22 through bias resistors R21 and R22 to provide DC bias voltage. The amplitude modulation capacitor C23 is connected between the bases of detector transistors Q21 and Q22. The emitters of detector transistors Q21 and Q22 are connected to the drain of tail current transistor M21 and the upper plate of filter capacitor Cout. The collectors of detector transistors Q1 and Q2 are both connected to the power supply VCC. The source of tail current transistor M21 is grounded, and the gate is connected to a fixed bias voltage Vb2.

[0016] In one embodiment, the coupling capacitors C21 and C22 couple the differential large signal output by the VCO into the amplitude detection module; the amplitude of the base oscillation signal of the detector transistors Q21 and Q22 is adjusted by adjusting the ratio of the coupling capacitors and the amplitude modulation capacitor C23; the bias resistors R21 and R22 are used to determine the DC bias voltage of the base of the detector transistors; the tail current transistor M21 is used to determine the bias current of the detector transistors; the filter capacitor Cout filters out the AC component in the DC signal output by the amplitude detection module; wherein the capacitance values ​​of the coupling capacitors C1 and C2 are equal.

[0017] In one embodiment, the digitally controlled current source includes a bias transistor M. BIAS Bias resistor R BIAS Current transistor M0, nine adjustable current mirrors M1-M9, and nine current mirror adjustable switching transistors M A1 -M A9 Nine pull-up tubes M B1 -M B9 Nine bias resistors R0-R9;

[0018] Bias transistor M BIAS The drain is connected to its own gate to form a voltage bias structure, and the source is connected to a bias resistor R. BIAS Bias current I BIAS From bias transistor M BIAS Drain input;

[0019] The gate of current transistor M0 and the bias transistor M BIAS The gate of the adjustable current mirrors M1-M9 is connected to the bias resistor R1-R9, the drain of each is connected to the output node, and the gate of each is connected to the current mirror adjustment switch M. A1 -M A9 The source and pull-up transistor M B1 -M B9 The drain electrode;

[0020] Current mirror adjustment switch M A1 -M A9 The drains of all are connected to bias transistor M. BIAS The gate, pull-up transistor M B1 -M B9 The sources of all transistors are connected to the power supply, and the control signals ADJ1-ADJ9 are respectively connected to the current mirror regulating switch M. A1 -M A9 The gate of the control signals ADJ1-ADJ9 are inverted by an inverter and then connected to the pull-up transistor M. B1 -M B9 The gate.

[0021] In one embodiment, the size of the adjustable current mirrors M1-M9 is proportional to the weight of the output current, and the corresponding bias resistors R1-R9 are also proportional to ensure that the source voltage of each adjustable current mirror M1-M9 is the same.

[0022] Current transistor M0 and bias transistor M BIAS As part of the fixed current supply to form a fixed current bias, nine current mirrors adjust the switching transistor M. A1 -M A9 and nine pull-up tubes M B1 -M B9 The control module, which comprises nine adjustable current mirrors M1-M9, controls whether the adjustable current mirrors are connected to the bias transistor M. BIAS It provides adjustable current, and the total output current is the sum of the fixed current and the digitally controlled adjustable current.

[0023] In one embodiment, the amplitude control module includes cross-coupled transistors Q41 and Q42, gate DC blocking capacitors C41 and C42, current replicating transistor Q43, and two tail inductors L. TAIL Two tail capacitors C TAIL , negative feedback transistor Q44, bias resistor Rb, a pair of bias resistors R41 and R42;

[0024] One end of bias resistors R41 and R42 is connected to the base of cross-coupled transistors Q41 and Q42, respectively, and the other end is connected to the base of current-replicating transistor Q43 and one end of bias resistor Rb; the collector of current-replicating transistor Q43 is connected to the output of the digitally controlled current source and the base of negative feedback transistor Q44; the emitter of current-replicating transistor Q43 is connected to a tail inductor L. TAIL and a tail capacitor C TAIL One end is connected, and the collector of the negative feedback transistor Q44 is connected to the power supply VCC;

[0025] One end of gate blocking capacitors C41 and C42 is connected to the base of cross-coupled transistors Q42 and Q41, respectively, and the other end is connected to the collector of cross-coupled transistors Q41 and Q42, respectively; the emitter of cross-coupled transistors Q41 and Q42 is connected to another tail inductor L. TAIL And another tail capacitor C TAIL One end is connected;

[0026] Two tail inductors L TAIL and two tail capacitors C TAIL The other end of each is grounded.

[0027] In one embodiment, the current-replicating transistor Q43 replicates the proportional current of the digitally controlled current source into the VCO resonant cavity via bias resistors R41 and R42, and the tail resistor L at the emitter of the current-replicating transistor Q43... TAIL Tail capacitor C TAIL The operating voltage of the current replica transistor Q43 is matched to that of the VCO cross-coupled transistor. The negative feedback transistor Q44 forms a negative feedback path from the collector to the base of the current replica transistor Q43. When the output current of the digitally controlled current source increases, the base voltage of the negative feedback transistor Q44 increases and the output current increases, thereby changing the magnitude of the base current and collector current of the current replica transistor Q43, so that the circuit can reach a balanced state again.

[0028] The VCO amplitude calibration circuit provided by this invention includes a selector, an amplitude detection module, an amplitude comparator, a digital state machine, a digitally controlled current source, and an amplitude control module. The selector, amplitude detection module, amplitude comparator, digital state machine, digitally controlled current source, and amplitude control module are sequentially connected to form the amplitude calibration circuit. The input of the selector is connected to the output terminal of the VCO, and the output of the amplitude control module is connected to the base of the cross-coupled transistor of the voltage-controlled oscillator, forming the entire loop. This invention replaces the traditional tail current transistor current control strategy, using current replication to control the resonant cavity current, eliminating the limitation of the tail current transistor on the output amplitude. The tail inductor and tail capacitor resonate at the second harmonic frequency, avoiding Q-value degradation and phase noise deterioration caused by second harmonic energy loss. Therefore, this invention can achieve fast and stable calibration with good phase noise levels and large output swing. Attached Figure Description

[0029] Figure 1 This is an overall architecture diagram of a VCO amplitude calibration circuit proposed in this invention;

[0030] Figure 2 This is a schematic diagram of the amplitude detection module;

[0031] Figure 3 This is a schematic diagram of the structure of a numerically controlled current source;

[0032] Figure 4 This is a schematic diagram of the amplitude control module. Detailed Implementation

[0033] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the VCO amplitude calibration circuit proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0034] This invention provides a novel amplitude-controlled VCO amplitude calibration circuit, the principle block diagram of which is shown below. Figure 1 As shown, it includes a selector, an amplitude detection module, an amplitude comparator, a digital state machine, a digitally controlled current source, and an amplitude control module; wherein, the selector, amplitude detection module, amplitude comparator, digital state machine, digitally controlled current source, and amplitude control module are connected in sequence to form an amplitude calibration circuit. The input of the selector is connected to the output of the VCO, and the output of the amplitude control module is connected to the base of the VCO cross-coupled transistor to form the entire loop. The selector first selects and outputs the oscillation signal that enables the VCO in the broadband multi-core VCO. The amplitude detection module converts the high-frequency oscillation signal output by the VCO into a DC level proportional to the amplitude and inputs it to one end of the amplitude comparator for comparison with the reference voltage Vref. The amplitude comparator is a classic differential-to-single-ended operational amplifier structure, and outputs the comparison result according to the relationship between the amplitude and the reference voltage. The digital state machine searches down / up to change the size of the 9-bit current control word IDAC<8:0> according to the high / low of the comparison result, thereby changing the current magnitude of the digitally controlled current source. In a stable state, the amplitude control module copies the current ratio of the digitally controlled current source into the VCO resonant cavity to achieve control and calibration of the VCO's current and amplitude.

[0035] The structure of the amplitude detection module is as follows: Figure 2As shown, the output of the voltage-controlled oscillator (VCO) is a high-frequency oscillation signal. To sample and compare the amplitude, the amplitude detection module rectifies and filters the high-frequency signal output by the VCO to generate a stable DC level. The output oscillation signal of the VCO resonant cavity is coupled to the bases of detector transistors Q21 and Q22 through capacitors C21 and C22. Simultaneously, resistors R21 and R22 provide appropriate DC bias voltages Vb1 to the bases of transistors Q21 and Q22, respectively. Capacitor C23, along with capacitors C21 and C22, determines the AC amplitude of the input signal to the base of the detector transistors. A capacitor Cout is added at the output to filter out some higher harmonic components. Since the VCO output signal has a high DC bias level, direct coupling is not conducive to setting the static operating point of the detector transistors. Therefore, AC coupling capacitors C21 and C22 are used to couple the high-frequency signal to the detector input, while a bias potential is provided to the gate of the transistors through R21 and R22. If the peak-to-peak value of the oscillation amplitude is expressed as Vpp, transistors Q21 and Q22 conduct during half a cycle of the oscillation signal. When VOUTN is in the positive half-cycle, the base potential of transistor Q21 is Vb1 + (Vpp / 2), while the base potential of transistor Q22 is Vb1 - (Vpp / 2). With transistor Q21 conducting and transistor Q22 cut off, the output voltage is approximately Vb1 + (Vpp / 2) - VBE, where VBE is the voltage difference between the base and emitter of the transistors, approximately 0.7V. Simultaneously, adding a filter capacitor Cout at the output to filter out higher harmonic components further reduces the output voltage to approximately Vb1 + (Vpp / 2) - VBE; Vout is proportional to the oscillation amplitude, increasing as the oscillation amplitude increases.

[0036] The structure of the numerically controlled current source is as follows: Figure 3 As shown. Reference current I BIAS Through MOSFET M BIAS The current mirrors are replicated to 10 groups of MOSFETs M0-M9. MOSFET M0 provides one constant output current, while MOSFETs M1-M9 are adjustable. MOSFETs M1-M9 are each controlled by 8 groups of switches. Taking MOSFET M1 as an example, when the ADJ1 signal is low, the pull-up transistor M... B1 Cut-off, switching transistor M A1 When the gate of MOSFET M1 is low, it is turned on. The gate of MOSFET M1 is connected to the gate of MOSFET M... BIAS The gate is connected, and the proportionally replicated current I BIAS The summation is performed at the output. Conversely, when ADJ1 is low, the pull-up transistor M... B1 When the transistor is turned on, the gate voltage of MOSFET M1 is pulled up to approximately VDD; when MOSFET M1 is turned off, it outputs almost no current. To realize the influence of different weighted control signal bits on the current magnitude, the dimensions of MOSFETs M1-M9 should conform to the following proportional relationship.

[0037]

[0038] Simultaneously, the corresponding bias resistors of the current mirrors should also maintain a proportional relationship to ensure that the source terminal voltages of the current mirror tubes are the same, thereby improving the matching performance of the current mirrors and increasing the linearity of the digitally controlled current source. Let Mn and Mn be the current mirror tubes in each branch. BIAS The aspect ratio is kn:

[0039]

[0040] The output current of the current mirror is:

[0041] I out =I con +k1·ADJ1+k2·ADJ2+…+k9·ADJ9

[0042] The structure of the amplitude control module is as follows: Figure 4 As shown, to eliminate the adverse effects of the tail current transistor on noise and swing amplitude, the tail current transistor is replaced with a tail inductor. The resonant points of the tail inductor and tail capacitor are set at the second harmonic frequency to avoid Q-value degradation and phase noise deterioration caused by the second harmonic. The transistor Q43 and the cross-coupled transistors Q41 and Q42 are proportionally replicated, and the current of the digitally controlled current source is proportionally replicated into the resonant cavity to achieve control of the resonant cavity current. As mentioned earlier, the calibration process is mainly achieved by adjusting the output current of the digitally controlled current source through ADJ signals (i.e., ADJ1 to ADJ9 signals). In the equilibrium state, the current Iref is approximately equal to the collector current of transistor Q43, and is then proportionally replicated to the cross-coupled transistors, making the resonant cavity current N*Iref, where N is the ratio of the area of ​​transistor Q43 to the area of ​​cross-coupled transistors Q41 and Q42. The actual value is determined by the magnitude of the current Iref and the oscillation amplitude of the resonant cavity. Transistor Q44 forms a negative feedback loop from the collector to the base of transistor Q43. When the current Iref increases slightly due to a disturbance, the capacitor at node Vc charges, causing the voltage to rise. This increases the output current of transistor Q44, which in turn increases the base current and collector current of transistor Q43 until a stable state is reached.

[0043] In summary, this invention achieves control over the current and amplitude of the VCO resonant cavity through a current replication structure, eliminating the adverse effects of traditional tail current tubes on noise and amplitude, and enabling rapid and stable calibration, which is beneficial for the design of broadband low-noise voltage-controlled oscillators.

[0044] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A VCO amplitude calibration circuit, characterized in that, It includes a selector, an amplitude detection module, an amplitude comparator, a digital state machine, a digitally controlled current source, and an amplitude control module; The selector, amplitude detection module, amplitude comparator, digital state machine, digitally controlled current source, and amplitude control module are connected in sequence to form an amplitude calibration circuit; the input of the selector is connected to the output of the VCO, and the output of the amplitude control module is connected to the base of the cross-coupled transistor of the voltage-controlled oscillator to form the entire loop. The selector selects and outputs the oscillation signal that enables the VCO in the broadband multi-core VCO; The amplitude detection module converts the high-frequency oscillation signal output by the VCO into a DC amplitude detection signal that is proportional to the amplitude. The amplitude comparator is used to compare the magnitude of the DC amplitude detection signal with the reference voltage and outputs a high or low level as the comparison result. The digital state machine detects the high and low level comparison results of the output and adjusts the output current control word. The numerically controlled current source generates an adjustable output current controlled by an input current control word; The amplitude control module replicates the current ratio output by the digitally controlled current source into the VCO resonant cavity, controls the current of the VCO, and thus controls its oscillation amplitude. The amplitude control module includes cross-coupled transistors Q41 and Q42, base DC blocking capacitors C41 and C42, current replication transistor Q43, and two tail inductors L. TAIL Two tail capacitors C TAIL , negative feedback transistor Q44, bias resistor Rb, a pair of bias resistors R41 and R42; One end of bias resistors R41 and R42 is connected to the base of cross-coupled transistors Q41 and Q42, respectively, and the other end is connected to the base of current-replicating transistor Q43 and one end of bias resistor Rb; the collector of current-replicating transistor Q43 is connected to the output of the digitally controlled current source and the base of negative feedback transistor Q44; the emitter of current-replicating transistor Q43 is connected to a tail inductor L. TAIL and a tail capacitor C TAIL One end is connected, and the collector of the negative feedback transistor Q44 is connected to the power supply VCC; One end of the base blocking capacitors C41 and C42 is connected to the base of the cross-coupled transistors Q42 and Q41, respectively, and the other end is connected to the collector of the cross-coupled transistors Q41 and Q42, respectively; the emitter of the cross-coupled transistors Q41 and Q42 is connected to another tail inductor L. TAIL And another tail capacitor C TAIL One end is connected; Two tail inductors L TAIL and two tail capacitors C TAIL The other end of each is grounded; The current-replicating transistor Q43, through bias resistors R41 and R42, replicates the proportional current of the digitally controlled current source into the VCO resonant cavity. The tail inductance L at the emitter of the current-replicating transistor Q43... TAIL Tail capacitor C TAIL The operating voltage of the current replica transistor Q43 is matched to that of the VCO cross-coupled transistor. The negative feedback transistor Q44 forms a negative feedback path from the collector to the base of the current replica transistor Q43. When the output current of the digitally controlled current source increases, the base voltage of the negative feedback transistor Q44 increases and the output current increases, thereby changing the magnitude of the base current and collector current of the current replica transistor Q43, so that the circuit can reach a balanced state again.

2. The VCO amplitude calibration circuit as described in claim 1, characterized in that, The amplitude detection module includes a pair of coupling capacitors C21 and C22, an amplitude modulation capacitor C23, a pair of bias resistors R21 and R22, a pair of detector transistors Q21 and Q22, a tail current transistor M21, and a filter capacitor Cout. The upper plates of coupling capacitors C21 and C22 are connected to the output terminals VOUTN and VOUTP of the VCO, respectively, and the lower plates are connected to the bases of detector transistors Q21 and Q22, respectively. The bias voltage Vb1 is connected to the bases of detector transistors Q21 and Q22 through bias resistors R21 and R22 to provide DC bias voltage. The amplitude modulation capacitor C23 is connected between the bases of detector transistors Q21 and Q22. The emitters of detector transistors Q21 and Q22 are connected together and connected to the drain of tail current transistor M21 and the upper plate of filter capacitor Cout. The collectors of detector transistors Q21 and Q22 are both connected to the power supply VCC. The source of tail current transistor M21 is grounded and the gate is connected to a fixed bias voltage Vb2.

3. The VCO amplitude calibration circuit as described in claim 2, characterized in that, The coupling capacitors C21 and C22 couple the differential large signal output from the VCO into the amplitude detection module; the amplitude of the base oscillation signal of the detector transistors Q21 and Q22 is adjusted by adjusting the ratio of the coupling capacitors and the amplitude modulation capacitor C23; the bias resistors R21 and R22 are used to determine the DC bias voltage of the base of the detector transistors; the tail current transistor M21 is used to determine the bias current of the detector transistors; the filter capacitor Cout filters out the AC component in the DC signal output by the amplitude detection module; wherein the capacitance values ​​of the coupling capacitors C21 and C22 are equal.

4. The VCO amplitude calibration circuit as described in claim 1, characterized in that, The numerically controlled current source includes a bias transistor M. BIAS Bias resistor R BIAS Current transistor M0, nine adjustable current mirrors M1-M9, and nine current mirror adjustable switching transistors M A1 -M A9 Nine pull-up tubes M B1 -M B9 Nine bias resistors R0-R9; Bias transistor M BIAS The drain is connected to its own gate to form a voltage bias structure, and the source is connected to a bias resistor R. BIAS Bias current I BIAS From bias transistor M BIAS Drain input; The gate of current transistor M0 and the bias transistor M BIAS The gate of the adjustable current mirrors M1-M9 is connected to the bias resistor R1-R9, the drain of each is connected to the output node, and the gate of each is connected to the current mirror adjustment switch M. A1 -M A9 The source and pull-up transistor M B1 -M B9 The drain electrode; Current mirror adjustment switch M A1 -M A9 The drains of all are connected to bias transistor M. BIAS The gate, pull-up transistor M B1 -M B9 The sources of all transistors are connected to the power supply, and the control signals ADJ1-ADJ9 are respectively connected to the current mirror regulating switch M. A1 -M A9 The gate of the control signals ADJ1-ADJ9 are inverted by an inverter and then connected to the pull-up transistor M. B1 -M B9 The gate.

5. The VCO amplitude calibration circuit as described in claim 4, characterized in that, The dimensions of the adjustable current mirrors M1-M9 are proportional to the weight of the output current, and the corresponding bias resistors R1-R9 are also proportional to ensure that the source voltage of each adjustable current mirror M1-M9 is the same. Current transistor M0 and bias transistor M BIAS As part of the fixed current supply to form a fixed current bias, nine current mirrors adjust the switching transistor M. A1 -M A9 and nine pull-up tubes M B1 -M B9 The control module, which comprises nine adjustable current mirrors M1-M9, controls whether the adjustable current mirrors are connected to the bias transistor M. BIAS It provides adjustable current, and the total output current is the sum of the fixed current and the digitally controlled adjustable current.

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