Quantum computing devices

Abstract

This disclosure relates to a quantum computing device including multiple optical circuits, multiple photon number-resolved detectors (PNRs), a multiplexer, and an integrated circuit (IC). During operation, the optical circuits generate output states via Gaussian boson sampling (GBS), and the PNRs generate qubit clusters based on the output states. The multiplexer multiplexes the qubit clusters and replaces empty modes with squeezed vacuum states to generate multiple mixed resource states. The IC splices the mixed resource states into higher-dimensional cluster states, including states for fault-tolerant quantum computing.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 63 / 084,994, filed on September 29, 2020, entitled “Scalable Photonic Quantum Computing with Hybrid Resource States,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to the field of photonic quantum computing, and more specifically to the generation of three-dimensional resource states, such as boson qubits and squeezed states. Background Technology

[0004] The ability to store and coherently manipulate quantum optical pulses is highly desirable for the development of long-distance quantum communication and quantum computing. Integrating these capabilities with other quantum technologies, such as entangled photon sources, into photonic chips is an important practical step towards realizing such applications. Summary of the Invention

[0005] One or more embodiments described herein relate to the generation of three-dimensional resource states, including boson qubits and squeezed states. In some embodiments, a system for scalable, fault-tolerant photonic quantum computing includes multiple optical circuits, multiple photon number-resolved detectors (PNRs), multiplexers, and integrated circuits (ICs). During operation, the optical circuits generate output states via Gaussian boson sampling (GBS), and the PNRs generate qubit clusters based on the output states. The multiplexer multiplexes the qubit clusters and replaces empty modes with squeezed vacuum states to generate multiple mixed resource states. The IC transforms the mixed resource states (e.g., by splicing the mixed resource states together) into higher-dimensional cluster states, which include states suitable for fault-tolerant quantum computing. Attached Figure Description

[0006] The accompanying drawings are primarily for illustrative purposes and are not intended to limit the scope of the subject matter described herein. The drawings are not necessarily drawn to scale; in some cases, various aspects of the disclosed subject matter may be exaggerated or enlarged in the drawings to facilitate understanding of different features. In the drawings, the same reference numerals generally denote the same features (e.g., functionally similar and / or structurally similar elements).

[0007] Figure 1 This is a system diagram of a system for generating mixed cluster states according to an embodiment.

[0008] Figure 2AThis is a schematic diagram illustrating an integrated photonic device that enables the preparation of non-Gaussian states based on Gaussian boson sampling (“GBS”).

[0009] Figure 2B This is a diagram showing a simplified representation of a single GBS device.

[0010] Figure 2C This is a diagram illustrating a state preparation device according to an embodiment, comprising a GBS device multiplexed in the spatial and / or temporal domains.

[0011] Figures 3A-3B This is a diagram illustrating the generation of 1D qubit clusters in the time domain according to an embodiment.

[0012] Figure 3C yes Figure 3A A simplified representation of a 1D qubit cluster generator.

[0013] Figure 4 yes Figure 3A The time-domain equivalent circuit of the 1D qubit cluster generator is shown, with the output being a 1D cluster state.

[0014] Figure 5A This is a diagram illustrating the generation of (1+1)D cluster states using multiple 1D cluster generators according to an embodiment.

[0015] Figure 5B This is an example 2D chip layout for a (2+1)D cluster generator according to an embodiment.

[0016] Figure 5C The use of the embodiment is shown. Figure 5B The layout of the 2D chip generates a 3D cubic lattice.

[0017] Figure 6A An example representation of two layers of the Raussendorf lattice is shown separately.

[0018] Figure 6B yes Figure 6A The combination of two layers of the Raussendorf lattice is represented.

[0019] Figure 6C It shows the method for generating Figure 6A An example chip layout of the Raussendorf lattice, including multiple controlled Z (“CZ”) gates.

[0020] Figure 7 The node type used in the embodiment to implement the state generator is shown, which employs a beam splitter instead of a CZ gate.

[0021] Figure 8This is a schematic diagram of a passive system configuration chip layout for generating states according to an embodiment, including, as... Figure 7 The nodes shown in the image.

[0022] Figure 9 An example graph transformation for a passive construction of a general graph state according to an embodiment is shown.

[0023] Figures 10A-10B An illustration of an embodiment for use Figure 8 The equivalent circuit of the state depicted in the figure.

[0024] Figure 11A-11C An illustration of an embodiment for use Figure 8 The equivalent circuits of the different types of entangled states depicted in the figure.

[0025] Figure 12 The original unit cell of the 3D blending pair macro node cluster state according to some embodiments is shown, along with the steps for generating it.

[0026] Figure 13 An identity is shown that supports the equivalence between a dual-mode entangled state and a dual-mode clustered state according to an embodiment.

[0027] Figure 14 It is by Figure 13 The identity generates equivalence between the bimodal cluster states generated with and without CZ gates.

[0028] Figure 15 The circuit representation of a beam splitter network associated with a single macronode according to an embodiment is shown, along with its relationship to adjacent macronodes and its equivalent circuit representation.

[0029] Figure 16 This is a diagram illustrating the arrangement of patterns and edge disambiguation of the hybrid macro node 3D cluster state according to an embodiment.

[0030] Figure 17 The illustration shows a modular system configuration for the GBS generation chip according to some embodiments.

[0031] Figure 18 This is a flowchart illustrating a first method for generating a mixed cluster state according to some embodiments.

[0032] Figure 19 This is a flowchart illustrating a second method for generating a mixed cluster state according to some embodiments. Detailed Implementation

[0033] Fault-tolerant photonic quantum computing is an active research area; however, known systems have proven impractical due to cost, size, and / or complexity. For example, some known quantum computing systems perform near-deterministic generation of non-Gaussian states, but doing so incurs very high experimental costs and would require an impractical number of devices to achieve the desired level of reliability. Other known quantum computing systems perform direct generation of encoded qubit clusters, but these are difficult to multiplex and costly to implement.

[0034] The embodiments described herein include system configurations for photonic quantum computing that overcome the challenges of known systems discussed above by generating and manipulating three-dimensional resource states, including boson qubits and squeezed vacuum states. In some embodiments, known methods for generating the uncertainty of boson qubits are fully utilized while providing the advantages of continuously variable quantum computing, for example via implementations using Clifford gates with squeezed states. Some system configurations described herein are implemented using two-dimensional circuitry of an integrated photonic chip that generates qubit cluster states in one time dimension and two spatial dimensions. Two-dimensional circuitry facilitates a modular approach to quantum computing because different photonic chips can be optimized for different aspects of the desired computational protocol. In some such implementations, a primary computing chip can be used to operate under environmental conditions, enabling scalable fabrication and operation of quantum computers.

[0035] introduce

[0036] In the path to building scalable, fault-tolerant quantum computers, photonics promises advantages over competing platforms. These advantages can include: (i) the possibility of room-temperature computation, which allows scaling to large numbers of qubits using known silicon electronics and photonics techniques (with minimal modifications); (ii) inherent compatibility with communication technologies, enabling high-fidelity connections to be established between multiple modules (i.e., multiple quantum computing circuits, whether photonic or otherwise) without the noisy transduction steps of other platforms; and (iii) inherent flexibility in choosing error-correcting codes (including high-dimensional codes using time degrees of freedom) on the path to fault tolerance. These advantages have spurred serious consideration of the configuration of photonic quantum computing systems.

[0037] Known configurations of photonic quantum computing systems can be viewed as comprising two main classes. The first class is based on the use of continuously variable (CV) cluster states and encoded qubits, leveraging the relative ease (compared to known techniques) of generating CV cluster states from squeezed light. In this class, quantum information is encoded in boson qubits, such as the type of boson qubit introduced by Gottesman, Kitaev, and Preskill (hereinafter referred to as “GKP” qubits), while Clifford and non-Clifford operations are implemented using CV clusters and non-Gaussian resources, respectively. Additional details on GKP encoding can be found in D. Gottesman et al., “Encoding a Qubit in an Oscillator,” Physical Review Letters A (64), 012310 (2001), the entire contents of which are incorporated herein by reference. This class also encompasses the design and generation of CV cluster states in different lattices, such as bilayer square lattices (BSL), double BSL, and modified BSL. Known implementations of system configurations in the first category often rely on the near-deterministic generation of non-Gaussian states to encode information, act as non-Clifford gates, and correct CV errors. This dependence on the near-deterministic generation of non-Gaussian states can lead to prohibitively high experimental costs. Multiplexing uncertain state generation processes aim to generate states with near-uniform probabilities 1- p The state means that the number of state-generating devices is scaled up to 1 / p ,when p →At 0, it becomes too large to bear.

[0038] The second class of system configurations is based on clusters of directly generated encoded qubits. This class includes schemes developed for dual-track encoding, cat-based encoding, and GKP encoding. These schemes differ from those in the first class in that they are well-suited for generating uncertain states of encoded qubits and for constructing uncertain gates for cluster states. However, the challenge with these schemes is that each gate is ultimately implemented by consuming encoded qubits, which, due to their uncertain nature, presents difficult-to-handle multiplexing requirements, thus consuming significantly more experimental resources than nodes with deterministically generated CV cluster states.

[0039] In view of the above, it is desirable to design a hybrid scheme that fully leverages the advantages of both types of photonic quantum computing system configurations, for example, implementing Clifford operations using CV resources, while still remaining compatible with the uncertainty generation of encoded qubits. One or more embodiments described herein precisely illustrate such a scheme.

[0040] In addition to the advantages mentioned above, the photonic quantum computing system configuration of this disclosure exhibits several characteristics desired for scalability. One such desired characteristic is that the system configuration can be adapted for a fully on-chip implementation, in contrast to known systems for CV photonic quantum computing, which are typically optimized for free-space implementations. The planar nature of one or more photonic quantum computing system configurations of this disclosure facilitates a fully on-chip implementation, for example, where each qubit is connected to a small and constant number of neighboring qubits, resulting in a constant number of cross channels per qubit. Another desired characteristic is that the system configuration is modular, with the size and number of integrated photonic chips independent of the desired circuit depth. Furthermore, compared to known photonic quantum computing system configurations involving combinations of seemingly incompatible technologies (e.g., dual-track qubit system configurations), one or more individual modules of this disclosure can be specialized to ensure compatibility with other technologies. As an example, consider the challenges of achieving low-loss and rapidly reconfigurable optical switches at cryogenic conditions. According to one or more embodiments of the photonic quantum computing system configuration, the state generation module can be low-loss but not reconfigurable; the multiplexing module can impose less severe loss limitations and therefore can be reconfigured; and the computing module can accommodate relatively lossy (e.g., loss between 0.1 dB and 10 dB) reconfigurable switches at room temperature. Moreover, the computing module allows operation at ambient temperature and pressure, enabling fabrication scalability (e.g., via complementary metal-oxide-semiconductor (CMOS) processes).

[0041] From a theoretical perspective, one or more embodiments of this disclosure encompass at least two novel features. First, a planar system configuration for measurement-based quantum computing using CV-encoded qubits is described (see the "Modular System Configuration" section below). Second, a method for fault-tolerant quantum computing with mixed resource states is described, where some sites (i.e., light pulses at a given location on a quantum system chip at a given time) are boson qubits, while others are squeezed vacuum. Such resources can be generated using relatively modest experimental resources. The "Quantum Error Correction" section below details an example model of fault-tolerant quantum computing, and the associated technical advantages are discussed in the subsequent "Technical Advantages" section.

[0042] System Configuration Overview

[0043] In some embodiments, the photonic quantum computing system configuration includes three modules collectively configured to generate computational resource states in two spatial dimensions and one temporal dimension using a two-dimensional circuit with an integrated photonic chip. Each resource state comprises encoded qubits (e.g., GKP qubits), magic states, and one or more clusters of CV nodes, which are spliced ​​together to form a hybrid “cluster state.” As used herein, “splicing” refers to creating / applying entanglement between different states. For example, during operation of the two-dimensional circuit, the uncertainly generated encoded qubits and magic states can be spliced ​​into a random but known subset of sites (since they are generated at a random subset of sites, not at other sites), while the remaining sites are filled with deterministically generated squeezed vacuum states. An indication of whether a site is within the subset of sites is stored in a multiplexer. The encoded qubits carry quantum information and are used for CV error correction. The magic states are used to implement non-Clifford operations as desired, and Clifford operations are performed using CV nodes with cluster states if nearby CV nodes are available. As used in this paper, a "magic state" refers to a state that facilitates universal quantum computing when used with operations from the Clifford group, whose elements implement permutations of the Pauli operator. For example, the eigenstate of a π / 4 gate is a magic state.

[0044] In some embodiments, the generation of hybrid cluster states is performed using three modules: a state preparation module, a multiplexing module, and a main computation module. The state preparation module is configured (e.g., programmed or hardwired) to generate boson qubits and magic states. The multiplexing module is configured (e.g., programmed or hardwired) to perform multiplexing of boson qubits to boost the qubit generation rate and replace empty modes with squeezed vacuum states (e.g., where multiplexed qubit generation fails). As used herein, “multiplexing” refers to the parallel use of multiple uncertain qubit generation devices and the routing of qubits generated in any of these devices to the output. The probability of success for at least one qubit generation device among multiple qubit generation devices is higher (i.e., “boost”) than the probability of success for a single (non-multiplexed) device. The main computation module is configured (e.g., programmed or hardwired) to stitch (or “entangle”) the hybrid resource states of universal fault-tolerant quantum computing together and perform reconfigurable measurements on the generated resource states to complete the computation. These steps are described in more detail below.

[0045] like Figure 1As shown, according to an embodiment, an example system 100 for generating hybrid cluster states includes a state factory 102, a temporal stitching 104, a spatial stitching 106, a photonic quantum processing unit (QPU) 108, and a QPU controller 112. Each of the state factory 102, temporal stitching 104, spatial stitching 106, photonic QPU 108, and QPU controller 112 represents a logical functionality that can be implemented using hardware, software, or a combination thereof. As used herein, an "active" system implementation (e.g., an implementation of system 100) refers to an implementation that includes an inline squeezer / performs inline squeezing and thus uses additional squeeze states and zero-difference measurements, while a "passive" system implementation (e.g., an implementation of system 100) refers to an implementation that does not include an inline squeezer / does not perform inline squeezing and / or performs stitching with a beam splitter.

[0046] State factory 102 is operatively coupled to time stitching 104, which in turn is operatively coupled to spatial stitching 106, which in turn is operatively coupled to photonic QPU 108. The state factory 102 component generates GKP states and outputs them to time stitching 104, which implements delay line loops and links them together upon receiving qubits. The spatial stitching 106 component multiplexes the output from time stitching 104 in the spatial domain to produce multidimensional hybrid resource states. Photonic QPU 108 is then controlled by QPU controller 112 to entangle hybrid resource states from multiple hybrid resource states into higher-dimensional cluster states, including states for fault-tolerant quantum computing, as discussed herein. QPU controller 112 can receive orthogonal readouts 111 from photonic QPU 108 and can send lo phase updates 109 to photonic QPU 108. The QPU controller 112 can also receive instructions 115 associated with program 116 and can output results 114.

[0047] Modular system configuration

[0048] Boson qubits are generated using a multiplexed Gaussian boson sampling ("GBS") device.

[0049] Researchers have proposed, analyzed, and developed methods for generating non-Gaussian optical states, including states of single boson qubits. While generating high-fidelity states from a single GBS device is uncertain, GBS devices can be multiplexed to achieve high rates and fidelities in state generation, and increasing hardware resources can be used to further improve the rate and fidelity of the generated states. Multiplexing of GBS devices can be used to leverage the non-Gaussian resources of photon number-resolved detectors (PNRs) and can generate arbitrary logical single-qubit states for boson encoding, such as those based on GKP and cat. Figure 2A-2CAn example of this multiplexing state generation is depicted.

[0050] Figure 2A This is a diagram illustrating a single integrated photonic device that enables the preparation of non-Gaussian states based on Gaussian boson sampling (“GBS”). Figure 2A In this process, light emitted from one output port is in a selected non-Gaussian state, and is in the PNR detector connected to the remaining output ports. Figure 2A-2B Get the correct click pattern at the "D" shaped object in the image. During the process, the double lines represent classical (i.e., non-quantum) logic, which is used to trigger the switch on the transmit port. Figure 2B This is a diagram showing a simplified representation of a single GBS device, and Figure 2C This is a diagram illustrating a state preparation device according to an embodiment, the state preparation device including a GBS device multiplexed in the spatial and / or temporal domains using classical logic.

[0051] Temporal generation of 1D clusters

[0052] According to some embodiments of this disclosure, one or more optical delay lines are used and a source that generates or squeezes a vacuum state is used to generate a cluster state in a time dimension (“1D”). Figure 3A (The following discussion) describes an example of a setup for generating 1D cluster states. Alternatively, or further, other boson qubits can be used to generate cluster states (e.g., involving photon-controlled Z (“CZ”) gates). CZ gates are two-qubit gates that perform two-qubit operations. The truth table for CZ gates is as follows:

[0053]

[0054] In some embodiments, the integrated photonic chip circuitry receives signals from a source (e.g., Figure 2A-2C The integrated photonic device emits light and uses the generated light prepared in GBS state as input. More specifically, the emitted mode can be either... (If the multiplexer is successful), or in a state of momentum compression (if the multiplexer does not generate) Injection under certain conditions). Use an interferometer (its operation is referenced below). Figure 3B (Shown and described) The first mode is swapped into an optical delay line whose length is set equal to the distance between subsequent optical pulses. This first mode then returns to the interferometer and interacts with subsequent modes at the CZ gate implemented by the interferometer (see...). Figure 3B This interaction is repeated for each incoming mode. Effective optical circuitry can be more easily visualized as an equivalent spatial representation, such as... Figure 4As shown in the diagram. During the final step of the operation, a swap is achieved using an interferometer, kicking the cyclic light out of the delay line. This generates a one-dimensional GKP cluster state. Figure 3C The image shows a complete example device for generating one-dimensional clusters.

[0055] Figures 3A-3B This is a diagram illustrating the generation of 1D qubit clusters in the time domain according to an embodiment. Figure 3A On the left side, the source 300 of the multiplexed GBS devices 302A-302D is used to generate a pulse sequence, where each pulse is located at a selected plurality of selected qubits. Status. For example, U.S. Patent Application Serial No. 16 / 997,601, filed on August 19, 2020, entitled "Apparatus and Methods for Generating Non-Gaussian States from Gaussian States," and "Conversion of Gaussian States to Non-Gaussian States Using Photon-Number-Resolving Detectors," Phys. Rev. A, More details about GBS devices can be found in 100 (2019), and the entire contents of each article are incorporated herein by reference.

[0056] The first qubit is sent into the loop using a swap operation. Figure 3B (Top right corner). The second qubit follows the first qubit and interacts with the first qubit at the CZ gate ( Figure 3B (Lower right). The output pulse is in a 1D qubit cluster state in the time domain. Figure 3A The interferometer 310 in the middle can act as either a swap gate or a CZ gate, depending on the setup used. If the squeezer ( Figures 3A-3B The part marked "Sq" is turned off and the phase shifter ( Figures 3A-3B If the value marked "PS" is set to π, then a Mach-Zehnder interferometer with perfect reflectivity ( Figure 3B The top right corner is enabled. If the phase shifter is off and the extruder is on, then the CZ gate ( Figure 3B (Bottom right corner) is enabled. Figure 3A The generation of the N-site 1D clusters described herein includes performing a swap during the first clock cycle and performing a CZ during the remaining clock cycles except for the last clock cycle, with the last clock cycle performing a swap to kick the light out of the loop as in the first clock cycle. Figure 3C yes Figure 3AA simplified representation of a 1D qubit cluster generator.

[0057] GKP clusters in 2+1 dimensions

[0058] In some embodiments, the aforementioned one-dimensional hybrid temporal cluster states can be spliced ​​together to form higher-dimensional cluster states, including states that can be used to perform fault-tolerant quantum computing. For example, higher-dimensional hybrid lattices can be generated through the interaction of pulses from multiple one-dimensional hybrid cluster generators with CZ gates. In one embodiment, higher-dimensional hybrid lattices are generated using one or more CZ gates acting on the spatial lattice of 1D clusters and qubit sources.

[0059] In some embodiments, a 1D chain of multiple cluster generators is used to generate (1+1)D (i.e., 2D) cubic cluster states in one spatial dimension and one temporal dimension, such as Figure 5A As shown in the diagram, the generated 2D cubic cluster state can be stored in one or more delay lines, for example, to allow time for feedforward-based measurements, especially if a back-selection gate is used.

[0060] In other embodiments, a two-dimensional chip can be used to generate 3D cubic cluster states in two spatial dimensions and one temporal dimension, such as... Figure 5B and 5C As described in [the text]. More specifically, Figure 5A This demonstrates the generation using multiple 1D cluster generators. Cluster state. Quantum bits are generated in a cubic lattice through CZ interactions with other simultaneously arriving qubits. Cluster state. Figure 5B This is an example 2D chip layout of the (2+1)D cluster generator according to the embodiment. Figure 5B The 2D chip layout is similar to that of the 1D chip, except that the light source is arranged in a 2D lattice on the chip. Figure 5C The use of the embodiment is shown. Figure 5B The layout of the 2D chip generates a 3D cubic lattice. For example... Figure 5C As can be seen, there are two types of points, reflecting GKP. The states are either solid or momentum-compressed (hollow). In some implementations, other nodes may also be in a magical state, depending on the exact cluster used.

[0061] Generation of mixed Raussendorf-Harrington-Goyal ("RHG") lattices

[0062] The generation of example clusters (i.e., Raussendorf lattices (as an example)) will be discussed below in accordance with embodiments. Alternatively, or in addition to Raussendorf lattices, one or more other lattices (e.g., non-foliated lattices) that are useful for fault-tolerant quantum computing can be generated by choosing (depending on the choice of quantum error-correcting codes) and using the schemes described herein.

[0063] Figure 6A Example representations of two Raussendorf lattices according to embodiments are shown respectively. More specifically, Figure 6A Alternating even and odd layers of the Raussendorf lattice are depicted. Points represent individual computational qubits, and connections between points represent entanglement. Figure 6A The left sub-figure represents the even-numbered layers of the Raussendorf lattice. Figure 6A The right sub-figure represents the odd-numbered layers of the Raussendorf lattice. Figure 6B It has two layers. Figure 6A The Raussendorf lattice is represented by a combination of these. A point labeled "A" represents a qubit present in each layer and connected to the corresponding qubit in the next and previous layers. Points labeled "B" (qubits) and bonds labeled "b" exist only in odd-numbered layers. Points labeled "C" (qubits) and bonds labeled "c" exist only in even-odd layers.

[0064] Figure 6C An example chip layout is shown, including multiple controlled Z (“CZ”) gates (straight lines connecting filled point / node pairs) for generating Figure 6A Raussendorf lattice. Figure 6C The chip may include, for example Figure 1 The photonic QPU 108. Figure 6C The layout includes two types of sources: qubit sources (such as...) Figure 2C (as depicted in) and 1D cluster sources (such as Figure 3C (As depicted in the text). Figure 6C During the operation of the chip, qubits emitted from a qubit source are entangled only with their spatial neighbors, i.e., with those emitted simultaneously. Qubits emitted from a cluster source are entangled not only with their two spatial neighbors but also with the patterns emitted before and after them. By turning half of the qubit sources on and off in alternating time steps, a Raussendorfer lattice can be generated. This lattice can be used as a resource for performing fault-tolerant quantum computing, as discussed further below.

[0065] like Figure 6CAs shown, the three sources are placed together on the chip. The box labeled "D" is a source that mixes 1D cluster states, where a series of entangled qubits are emitted with a time delay of τ. The box labeled "H" is a mixed qubit source. The points labeled "B" and "C" are qubit sources that are fired only with a time delay of 2τ, with source "B" firing only with a time delay of (2τ). n –1) τ time excitation, and the “C” source is only excited at (2 n τ time excitation. Figure 6C The lines on the chip represent CZ gates. CZ gates marked "b" open only at odd times, and CZ gates marked "c" open only at even times. These qubits and CZ gates together generate different layers of the Raussendorf lattice and the connections between them.

[0066] Passive version of system configuration

[0067] In hybrid continuous-variable (CV) and discrete-variable (DV) architectures, robust and stable optical quantum information can be generated by combining GKP qubits with qubit quantum error-correcting codes implemented through measurement-based quantum computing (MBQC). However, this most prominent architecture of its kind still faces significant challenges because inline squeezing in circuit-based or measurement-based implementations of CZ gates introduces noise. Furthermore, the use of deterministic GKP sources leads to high computational costs associated with multiplexing, and the need for rapid reconfiguration within a network of linear optics places a heavy burden on the integrated circuit (IC). Each of these elements further increases the number of optical components each photon encounters as it traverses the system, thus increasing losses—the most detrimental drawback of photonic quantum computers.

[0068] According to some embodiments described herein, the output of the probabilistic source of a GKP qubit can be entangled into a fault-tolerant resource state for MBQC without using inline squeezing and / or without using reconfigurable linear optics. The architecture of this disclosure can generate a three-dimensional macro-node lattice structure in one time dimension and two spatial dimensions, wherein each site within the lattice structure comprises four modes (or, in some embodiments, consists of them). In some embodiments, the generation circuit can consist only of a single-mode source, a depth-4 static circuit of a balanced beamsplitter, a single time-step delay line, and a homodyne detector. The generated resource states can be used in a manner similar to CV / DV hybrid RHG cluster states, but this processing can be generalized to other qubit codes. Furthermore, due to the symmetry of the generation circuit, the finite squeezing noise and uniform photon loss throughout the beamsplitter network can be equivalent to local Gaussian noise before each detector.

[0069] Within the failure probability range of GKP state generation, the logic error rate of the external (qubit) code was calculated for different levels of finite squeezing and photon loss. In cases where the source fails to generate a GKP state, it is assumed that a squeezed vacuum state has been generated. It has been found, for example, that the architecture of this disclosure can tolerate a GKP failure rate exceeding 50% under 15 dB squeezing and no loss conditions, significantly reducing the size of the per-node state preparation module and multiplexer in known systems. Furthermore, under deterministic GKP state generation conditions, a squeezing threshold of approximately 10 dB was found (below the threshold of known systems), although known systems ignore noise from inline squeezing within CZ gates. The tradeoff between tolerable finite squeezing noise and uniform photon loss rate for a given GKP failure rate will be discussed below.

[0070] Quantum bits can be encoded into optical boson modes using GKP coding. An ideal logic 0 and 1 codeword is defined as follows:

[0071] (1)

[0072] in It is a placeholder with a value of 0 or 1; Indicates the logical GKP state; It is an index that spans all integers; These are positional eigenstates. As presented in this paper, single-mode states within the GKP code space are indicated by an overline. Given a single-mode extruder... ,in It has extrusion parameters The mathematical representation of the squeeze gate, and It is an orthogonal operator (position / momentum) of the quantum harmonic oscillator, and the additional states used can include momentum eigenstates. Sensor status and magical states (such as) ),in The last one is used to implement non-Clifford operations.

[0073] The effect of limited compression can be achieved through ideal and The state is modeled using additive Gaussian boson channels.

[0074] (2)

[0075] in The density matrix represents the quantum states of a single boson mode, where and These are displacements along the spatial directions of position and momentum phase, respectively.

[0076] A beam splitter is defined as... and from pattern arrive Arrow depiction (see) Figure 13 Equation (3) in the equation). The phase shifter is defined as... ,in Corresponding to the Fourier transform in phase space, this implements the GKP Hadamard gate. A homodyne detector measures a linear combination of orthogonal operators, where... and Measurements were performed using GKP Pauli. and Measurement. Single-mold extrusion vacuum state is determined by... Given, among which for The CV CZ gate is defined as... And the CV CX gate is defined as They respectively implement GKP CZ and CX gates. In this paper, and The difference lies in the control modes. Use solid and hollow circles (for example, see...) Figure 13 Finally, the GKPPauli X and Z operators are respectively... q and p Orthogonal It can be achieved by any odd integer multiple of the displacement.

[0077] 3D Hybrid Macro Node Architecture

[0078] A constant-depth generation circuit is proposed for RHG lattice states compatible with probabilistic GKP state sources. However, this proposal remains experimentally challenging because it involves the use of inline squeezing (present in CZ gates) and time-varying circuits (i.e., different gate arrangements between even and odd time steps). Each of these problems can be avoided by replacing the RHG lattice target state with computationally equivalent macro-node cluster states, where each node has several modes for multi-mode measurements.

[0079] Figure 12 Illustration (A) shows the original unit cell of the 3D hybrid pair cluster state according to some embodiments, and illustrations (B)-(C) show the steps to generate it. Figure 12 Illustrations (B)-(D) are presented as cross-sections of waveguide layers stacked in the Z direction, consistent with the direction of light propagation through the waveguide. The 3D lattice exists in two spatial (X, Y) dimensions and one time dimension. The latter is divided into sections of width Δ. TDiscrete-time bins. Colors (labeled "G" for green, "B" for blue, "Y" for yellow, "R" for red, and "K" for black) are included in Figure 12 The diagram illustrates the relationship between the source and the final state. Yellow and blue indicate even or odd time signatures. The macro nodes at the top of the blue shapes correspond to the blue macro nodes in illustration (A). The macro nodes at the top of the yellow shapes correspond to the yellow macro nodes in (A). The macro nodes at the top of the green shapes correspond to the green areas in illustration (A) (i.e., partly corresponding to blue and partly to yellow). Red arrows (labeled "R") indicate spatial connections, and black arrows (labeled "K") indicate temporal connections. Figure 12 Illustration (B) shows the waveguide arrangement at the first layer, with each node at each Δ T Input is received from the source over a wide time interval. The time interval used for solid nodes is offset by Δ relative to hollow nodes. T / 2 As indicated by the arrows, 50:50 beam splitters are applied between mode pairs, and these generate entangled pairs (see equation (7) below). The beam splitter indicated by the black arrow creates entangled pairs that will be connected in the Z direction. Figure 12 In illustration (C), Xs indicates Δ T / 2 The application of time delay lines, while diagonal lines indicate... Applications of phase delay. In... Figure 12 In illustration (D), the state is connected to the macronode cluster state by applying four additional beam splitters between the four modes that constitute each macronode. The beam splitter shown by the dashed line is applied after the beam splitter shown by the solid line. Note that the time signature of some nodes may change due to the time delay line.

[0080] In some embodiments, the basic building blocks of the 3D hybrid pair cluster state are a type of two-mode entangled state, which can be generated by first generating either a GKP or a momentum squeeze vacuum pair of modes, and then sending this pair of modes through a 50:50 beam splitter. Although the constituent modes are coupled only through the beam splitter, the resulting pair is equivalent to a two-mode cluster state, as can be achieved through... Figure 13 The identities shown (equations 3 to 6) are self-evident, in which It can be any state. From these identities, we can obtain Figure 14 The state diagram shown is based on the premise that and All , or state At least one of them is in Even if access is only random or or It also always obtains the entangled state of the unit used as a hybrid CV-GKP qubit cluster. The magical state can be achieved by allowing... or Become a magical state (such as) ), while letting another become This is used to insert into this architecture. More details on creating (bimodal) GKPEPR states and GKP / CV entangled states can be found, for example, in B. Walshe et al.'s "Continuous-Variable Gate Teleportation and Bosonic-Code Error Correction". Physical Review A (102) It can be found in mid-December 2020, and for all purposes, its entire contents are incorporated into this article by reference.

[0081] In some implementations, entangled pairs are arranged in a 3D configuration, such as Figure 12 As shown in illustration (A). To achieve this, from a fixed interval with probability 1 – p swap emission Sum of probabilities p swap Start with a 2D source array in the momentum compression state. Assume the expected probability. p swap It can come from multiple GBS sources multiplexed for each valid source. Each source can be specified for each length Δ. T The time step generates the input pattern, although the timing of half the source can be based on its time step. Figure 12 Position offset Δ in the 2D layout of the middle illustration (B) T / 2 . Figure 12 The beam splitter, delay line, and phase delay at the insets (B) and (C) produce the desired state arrangement in the (2+1) dimension.

[0082] To create a fully connected 3D resource state, four 50:50 bundlers can be applied within each macro node, such as... Figure 12 As shown in the illustration (D), it resembles a four-orbit lattice structure. Detailed graphical representations of the resulting states are given in the "Entangled Structures" section below. Each mode is then sequentially sent to a homodyne detector.

[0083] Equivalent to the standard mixed cluster state

[0084] In some embodiments, the mixed RHG cluster state is used as the canonical RHG lattice state because each node has a mode and its generation involves CZ gates. Figure 12The state generated by the circuit in the diagram is the macro-node version of that state. The case of always measuring three modes (called satellite modes) is... The substrate is considered to be within the macronodes. The remaining modes (called central modes) then form the canonical RHG lattice states. This can be proven using circuit identities, as referenced below. Figure 15 The subject of discussion.

[0085] Figure 15 Illustration (A) shows a circuit representation of a beam splitter network associated with a single macronode 0, with the center mode being the top conductor. Connectivity to adjacent macronodes via the beam splitter is also shown. Figure 15 The circuit conventions are provided in the diagram. The last four beam splitters and... Figure 12 The corresponding illustration (D) in the book. Figure 15 Illustration (B) shows the equivalent circuit of illustration (A), which follows the application Figure 14 The identity. X0 represents the displacement. X((m 2 + m 3 / 2) . S It is a squeeze door, the effect of which is to rescale the zero difference result. Figure 12 Illustration (C) shows the equivalent circuit of illustration (B), which follows the circuit identity that shifts the CZ gate toward the measurement. (Interchangeable) The gates are depicted with dashed lines because they simply act on the circuit inputs. The displacements Z1;…,4 depend on the measurements of the satellite modes in the adjacent macronodes.

[0086] To save on describing the post-measurement state, the central mode in each macronode can be selected from the wires prepared in the GKP state for its input, whenever possible. Representing state generation and measurement via quantum circuits could potentially be further simplified to central mode selection. Figure 15 The case of the top conductor shown in the middle illustration (A) is equivalent to this case because other cases can be replaced by substituting the measurement base at the end. Using equations (3) and (7), the beam splitter can be replaced by a CX(†) gate and a squeezer. At the measurement end, the gate is applied. X(a), S( ) and CX jk The interchangeability between them, and the identity used for zero-difference measurement. and ,produce Figure 15 The equivalent circuit is shown in illustration (B). Next, using the relation... All CZ gates are interchanged across CX gates towards the measurement. This generates additional CZ gates, but those gates that support satellite mode can be obtained through the identity. Replace with displacement. These changes are in Figure 15 Illustration (C) shows this.

[0087] Since the central pattern is assumed to be the encoded GKP state It can be either a positive state or a magic state—if the macronode contains at least one GKP state, then, by using equation (5) and:

[0088] , (8)

[0089] Can be removed from Figure 15 The circuit at the beginning of the illustration (C) is active. The satellite mode is thus decoupled from the entangled structure, and only the state of the central mode of each macronode is exactly the same as that of the hybrid RHG lattice—until squeeze ( S (2) and displacement operator ( X 0 and Z 1– Z 4) Its effects can be eliminated in post-processing. So far, the effects of finite squeezing and photon loss have not been considered, but they will be addressed in the next section.

[0090] noise model

[0091] Any single-mode Gaussian boson channel that maintains a vacuum state and has a spatially averaged phase satisfy:

[0092] (9)

[0093] In addition, if Since phase spaces are orthogonal and isotropic, then:

[0094] (10)

[0095] These identities show that exactly at Figure 12 The uniform photon loss occurring before the beam splitter layer in the illustration (BD) can be combined and interchanged to achieve the desired effect. Figure 15 The zero-difference detector layer in illustration (A) functions immediately before the changeover. This represents the total transmission coefficient, indicating the cumulative loss acting before each detector. (This is achieved by...) Rescaling the zero-difference result, the cumulative loss channel can be replaced with a variance of A Gaussian random displacement channel. Finite compression noise, modeled as having The Gaussian random shift, as shown in equation (2) acting on the original output of the source, can be similarly interchanged among all optical elements so that finite squeeze noise takes effect before the null-difference detector. The combined effect of loss and finite squeeze noise results in a null-difference outcome, the uncertainty of which arises from the variance of It follows a normal distribution.

[0096] Once photon loss and finite squeezing noise are treated as Gaussian random noise in the measurement data, the reduction can be freely applied to the RHG lattice states specified above. However, reinterpreting such noisy measurement data to revert to the previous approach is necessary. Figure 15 Conditional displacement of the central mode at the inset (C) (also known as Byproduct Operator This will further distort the zero-difference result of the central pattern.

[0097] Threshold calculation

[0098] The correctable region of macronode resource state can be found through Monte Carlo simulation, where each experiment includes three steps: simulation Figure 12 The complete macronode RHG lattice prepared in the process is reduced to a canonical lattice, and error correction is performed on the reduced lattice.

[0099] The noise zero-difference result of macro-node lattices is obtained by first sampling (ideal) orthogonality, applying entanglement gates, and then using them as a covariance matrix. The model is generated using the mean of a normal distribution. This model corresponds to uniform Gaussian pre-detection noise. Following the reduction process described above, the noise on the central mode originates from both the generating circuit and the byproduct operator. The conditional qubit-level error probability can then be estimated and used for decoding higher-level codes, such as using minimum-weight perfect matching.

[0100] With all modes in GKP state, a 10.1dB changeout probability was observed. p swap Threshold. With the additional constraint of only one GKP state per macronode, the threshold becomes 13.6 dB. The swap tolerance of the passive architecture is significantly improved: approximately 71%, compared to approximately 24% for some known active architectures.

[0101] Unwilling to be bound by theory, the inventors proposed two main reasons for the observed improvements. First, exchanging GKP modes with momentum squeeze states introduces correlated noise among their neighbors. Analysis shows that the reduced lattice only has effective momentum squeeze states when all four modes in the pre-reduced macronode are swapped out. Therefore, redundancy in the macronode mesh leads to greater tolerance for swapping out. Second, byproduct operators conditioned on measurements of adjacent GKP states are binned, thus preventing the propagation of Gaussian noise. In fact, each additional GKP state appearing in a given macronode provides an additional degree of local GKP error correction.

[0102] Previous studies have demonstrated how quantum error correction (in the form of topologically protected cluster states) can be used for photonic quantum computing with probabilistic sources having GKP qubits, provided that the available squeezing is sufficiently high. However, such studies assume that the system has both inline squeezing and time-varying beam splitters, both of which are difficult to achieve at the desired noise level. By using static linear optical circuitry to generate macronode lattices, the architecture described in this paper, according to some embodiments, circumvents such obstacles, thereby enabling topological error correction at the desired (i.e., optimally low) noise level.

[0103] In some embodiments, the system used to generate the mixed cluster states described herein does not use the experimentally required CZ gates, which were previously considered ideal among researchers and have been shown to significantly degrade the quality of the states. The culprit for this degradation is believed to be inline squeezing. The embodiments described herein avoid this degradation by migrating all squeezing using circuit identities (either to the circuit input, where it can be absorbed into state preparation, or to the output, where it manifests as a classical treatment of the homodyne measurement result). Furthermore, by doubling the number of modes with connectivity points in the Z direction, the need for reconfigurability of the optical elements in the cluster state generation circuitry is eliminated. The only remaining reconfigurable components reside in the multiplexed sources of the individual GKP states (where switches are used) and the local oscillator phase of each homodyne detector.

[0104] By leveraging the symmetry of the resource generation circuit, uniform loss and finite squeezing effects can be combined into a combined Gaussian noise associated with each detector. This model shows that finite squeezing noise and photon loss can be treated in equal terms, thus facilitating unprecedented noise reduction.

[0105] The circuit identities reveal the built-in redundancy provided by the satellite patterns of the resource states described herein, resulting from the permutation symmetry of the generating circuit. Having multiple GKP states per macronode is equivalent to additional rounds of GKP error correction, which keeps the threshold around 10 dB in the full GKP case. However, even assigning a macronode only one GKP state implies that the encoded state at each site still behaves like a GKP state, leading to a significantly improved tolerance to swapping. At 15 dB—the highest level of observed optical squeezing reported so far (vacuum squeezing in bulk optics)—the embodiments described herein can accommodate replacing more than half of its GKP states with momentum squeezing states. This means that the increase in the number of cluster patterns is balanced by a corresponding decrease in the number of probabilistic state sources in each node, significantly relaxing multiplexing requirements. In conclusion, the system achievable results of this disclosure greatly facilitate the realization of fault-tolerant and scalable photonic quantum computers.

[0106] Entangled structure

[0107] The relationship between the entangled structure of the generating circuit and the resulting state is described below. Figure 12 Following the state generation phase shown in illustrations (C) and (D), the array of patterns is as follows: Figure 16 As shown in illustration (A). Figure 16 A graph showing the state of the hybrid macronode 3D cluster is presented. Figure 16 Illustration (A) shows a 2D pattern layout, where Δ T / 2 Offset mode and Figure 12 The illustrations (C) and (D) in the figure are consistent – ​​that is, the pattern at the solid node is shifted in time by Δ relative to the pattern at the hollow node. T / 2 Each macro node consists of four modes, labeled 1-4. Figure 16 Illustration (B) shows the 3D arrangement of the four-mode macronodes. For clarity, patches with letters A through F are colored according to the given letter, with darker layers becoming lighter (green for the X and Y directions, red for the Z direction; light green is labeled "LG", dark green "DG", light red "LR", and dark red "DR"). Five modes are omitted in the unit cell, corresponding to the back face of the cube. Connectivity in the XY plane is exactly the same as on the front face. Figure 16 Illustration (C) shows the macronode graph edges for each key in illustration (B). The six configurations above correspond to weight-1 CZ gates, as shown below. Figure 12 The illustration (A) shows the connection pattern pairs. The bottom six configurations correspond to weighted + / -¼CZ gates (deeper edges are positive and shallower edges are negative), illustrating... Figure 12 The connectivity of the pattern after the stage is shown in the illustration (D).

[0108] Think back, Figure 12 Solid nodes in the diagram indicate that these lattice sites exist in a time-mode, offset by Δ relative to the sites in hollow nodes. T / 2 Pattern groupings to macro nodes are indicated by yellow (blue) squares and rectangles, which also indicate which macro nodes are offset (or not offset) by Δ. T / 2 When resources are constructed to Figure 12 At the point between stages C and D, it is equivalent to the entangled pair state (PEPS) projected from the CV / DVRHG cluster state, such as... Figure 12 As shown in illustration (A) in the book. Figure 16 The paper presents the accurate identification of waveguide modes with graph nodes.

[0109] As described in this paper, the four-to-one reduction of the mode at each macronode corresponds to an application equivalent to a projector performing four beam splitters and three homodyne measurements. Other measurements can also be performed after the beam splitters (making the operation more general than that achievable on a canonical lattice). Figure 16 The illustration (C) shows a four-layer diagram of the state after the beam splitter but before any zero-difference measurement. With all modes initially in squeezed states, the dark / light edge coloring corresponds to the plus / minus signs on the real-valued adjacency matrix of the states, which is generated by the graphical calculation of Gaussian pure states.

[0110] In some implementations of the passive system configuration described above, it can be dimension 2. N The passive lattice is defined by lattices of (e.g., 2, 4, 8, 16). Further details regarding passive implementations can be found, for example, in “Fault-Tolerant Quantum Computations with Static Linear Optics” by I. Tzitrin et al., accessible at https: / / arxiv.org / abs / 2104.03241, the entire contents of which are incorporated herein by reference for all purposes.

[0111] As discussed above, Figures 6A-6C The document describes how Raussendorf lattices can be generated according to embodiments. Each node represents the output of a single-mode source (emitting a GKP plus state or momentum extrusion state at each time step), and each link / edge represents the application of a CZ gate (e.g., implemented using a pair of extruders sandwiched between two beam splitters). However, in some cases, using CZ gates during the generation process can be architecturally challenging, for example, when implementing active extrusion elements using measurement-based extrusion and feedforward gates. Therefore, in some embodiments, Figures 6A-6CAll CZ gates represented by links / edges in the image are replaced with 50:50 beam splitters (this is easier to achieve experimentally, for example, since measurement-based squeezing and feedforward gates can require additional fast electronics on the photonic chip and may introduce unwanted noise into the light), and Figure 6B Each node in the code is modified as follows: Nodes "B" and "C" are modified to include four separate extrusion light sources / GKP plus states, transmitted through four additional beam splitters; and node "A" is modified to include six separate extrusion light sources / GKP plus states, transmitted through six additional beam splitters. Figure 7 An example of such a modification is shown in the document, and Figure 8 The image presents an example of the entire associated passive system configuration chip layout.

[0112] exist Figure 7 In this context, each link / edge represents a 50:50 beam splitter (instead of a CZ gate). Figure 7 The document describes four different types of nodes, each configured to either emit or have four or six modes. Figure 7 The representation of and in Figure 6B The same elements are implemented in each layer of the state generator: node “A” (and link / edge “a”) is implemented in every layer of the state generator; node “B” and link / edge “b” are implemented in odd layers of the state generator; and node “C” and link / edge “c” are implemented in even layers of the state generator. Figure 7 The arrows in each panel indicate the rightmost beam splitter interaction, which is then implemented. Figure 7 The double-line indicator beamsplitter in the rightmost diagram cannot be implemented simultaneously with the solid-line indicator beamsplitter, although the order of the solid / double-line beamsplitters can be interchanged in the rightmost diagram. In other words, any given macronode (i.e., Figure 7 The set of four “B” and / or “C” modes is filled with only four states. Although the generated states involve more modes and have more complex entangled structures, they can be reduced to a Raussendorf-Harrington-Goyal (“RHG”) lattice based on local homodyne measurements.

[0113] As mentioned above, Figure 8 This is a schematic diagram of a passive system configuration chip layout for generating states according to an embodiment, including the nodes shown in FIG6. Figure 8 In the diagram, each mode is delayed in time by Δ for one of the modes in "P". t To connect layers with different time steps (also as Figure 10B (As depicted in the text). Figure 8 In each pattern pair, Corresponding to the links / edges to the previous layer, and Corresponding to links / edges to the next layer. Links / edges marked "e" indicate links / edges that appear simultaneously at a single time step, and for each even time step, links / edges marked "o" indicate odd time steps (note that the choice of even or odd is arbitrary and has been chosen here to illustrate the alternation of unit time steps). At any given time step, all arrows corresponding to a particular time step (whether odd or even) are implemented along with the links / edges of the connection pattern pair P. The links / edges of the connection pattern pair P are implemented across all time steps, where arrows from... point to Pattern. In Figure 8 There are four types of bimodal entangled states, each linked / connected by a beam splitter (further discussed below with reference to Figure 11): (1) an entangled state marked "e" (dumbbell shape) realized at even time steps, (2) an entangled state marked "o" (dumbbell shape) realized at odd time steps, and (3) an entangled state corresponding to another mode entering the previous time step. , and (4) the entangled state with the second mode entering the next time step. Note that, with or Each corresponding entangled state is triggered once for every two consecutive time steps, and these triggers are staggered relative to each other, such as... Figure 10B As explained in [the document], at any time step, each macronode (or junction) is filled with exactly four states. By applying appropriate zero-difference measurements at each macronode, the entire structure can be reduced to the structure of the Raussendorf lattice mentioned earlier.

[0114] refer to Figures 10A-10B Shown and described Figure 8 A diagram of the circuit components. Figure 10A Depicting Figure 8 The dumbbell-shaped entangled states include two modes of interaction at the beam splitter. Depending on the choice of the two modes used (small circles terminate the entanglement of each dumbbell-shaped state), various different entangled states can be achieved, examples of which are shown in Figure 11. Figure 10B It is used for and A diagram illustrating an entangled state. Similar to Figure 10A The entangled states correspond, but differ in that there is a time delay. For example, if the second mode is measured at time step "t", then the first mode will be measured at time step "t-1", as indicated by the cross symbol. However, if the first mode is measured at time "t", then the delayed mode will be measured at time step "t+1". This also corresponds to entangled states with time delays, but the first mode is measured at time step "t" and the second mode is measured at time step "t+1". The interweaving of these time-delayed nodes with alternating odd and even entangled states leads to... Figure 8 The operation shown is illustrated. Figure 10A and 10B The beam splitter may include additional phase shifters, as needed for a given application.

[0115] Figure 8 Each entangled state described in the text can be one of at least three types: (a) both modes are suitable squeeze states; (b) one mode is a squeeze state and one mode is a selected GKP state; or (c) both modes are selected GKP states. Figure 11A-11C The equivalent circuits for each of these different types of entanglement states according to the embodiments are shown respectively.

[0116] Passive Architecture Generalization – Passive Construction of General Graph States

[0117] In some embodiments, a general algorithm is defined for obtaining N A set of Bell pairs, and through an interferometer followed by destructive measurements, this... N Half of the Bell pairs are combined to form a single vertex, where N Each edge leads to the other half of each pair. A single unit of the problem can be written as... Figure 9 The diagram transformation shown here, where the circle "C" indicates the mode of interaction with the interferometer.

[0118] Some known beamsplitter networks use quad beamsplitters to construct clustered states. This approach can be extended to 8-mode macronodes by repeating the process with four additional modes and adding another series of beamsplitters to connect mode 1 to mode 1, mode 2 to mode 2, and so on. This pattern can be further extended to those with a size of 2... NA generalized bundle splitter network in which macronodes are entangled together. To accommodate code of different sizes, the size of macronodes can be artificially increased using additional subsidiary states, which can then be removed via position measurements. For example, more details on constructing cluster states using quadsplitters can be found in Bourassa, EJ et al., Quantum (5), “Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer”, February 2021, and in Tzitrin, I. et al., “Fault-Tolerant Quantum Computation with Static LinearOptics”, accessible at https: / / arxiv.org / abs / 2104.03241. All public information from each article is incorporated herein by reference in its entirety.

[0119] In some embodiments, the algorithm constructs macronodes from a base graph of any shape and size. For example, in one embodiment, the algorithm may be configured to implement hypercube states, while in another embodiment, the algorithm may be configured to implement non-hypercube states.

[0120] Known interferometers based on the Discrete Fourier Transform ("DFT") can... Figure 9 Complex weighted edges are introduced into the graph between the external modes, so that the output graph state is no longer a true clustered state. Known general N-mode multiport interferometer methods may not be ideal because they include a large amount of redundancy. Losses and noise in the network can be reduced by minimizing the number of optical elements used in the optical network.

[0121] In some implementations, execution Figure 9 The minimum criterion for the unitary matrix of the transformation shown in the figure (covering the desired output and minimizing the necessary optical elements) is to make the entries in a row or column equal to ,in N It represents the number of interaction modes. N x N A unitary matrix can be written as:

[0122] , (11)

[0123] The other elements of the matrix can be any real constant.

[0124] A unitary matrix with the structure in equation (11) can be constructed using a bundle splitter network:

[0125]

[0126] in It is a Fourier transform (π / 2 rotation in phase space), affected by the phase shifter, and:

[0127] (13)

[0128] (14)

[0129] The subscript indicates the pattern on which the operator operates, and the product follows the left-to-right order of the operators. i = 1 to i = N - 1). This network only uses N - 1 beam splitter.

[0130] In some implementations of the configurations described in this section, passive lattices can be determined for lattices of dimensions 6, 10, 12, 14, 18, etc.

[0131] Quantum error correction

[0132] Below, examples of applying an error correction process to computation in the presence of errors are presented, according to some embodiments. In a first example, finite squash errors are addressed, and probabilistic code state generation is considered. According to some embodiments, steps for performing fault-tolerant computation are presented in Method 1 below. Method 1 takes a specific computational task to be executed on a quantum computer and specified by the user as input. Subroutines of the computational task include implementations of multi-round quantum error correction interwoven with implementations of logical operations. The quantum error correction process is described in more detail in Method 2. The quantum error correction process takes already implemented measurement results as input to perform logical operations and outputs reliable correction sub-data. As used herein, "correction sub-data" refers to measurement results performed to determine whether an error has occurred, and if so, which site is faulty. "Reliable" means a result obtained by performing such measurements multiple times and polling the results to reduce the sensitivity of the results to measurement defects. The error correction process includes using a decoder to process the measurement data. Examples of dual decoders, including an internal (boson) decoder and an external (qubit) decoder, are explained in Methods 3 and 4 below.

[0133] Method 1 The process of performing fault-tolerant quantum computing

[0134] enter : The computational task and the input to the problem.

[0135] 1. CompilationBased on the computational task and the input to the problem, determine the appropriate logic circuitry, including the operational layer, and select the appropriate quantum error correction code(s) and decoder(s).

[0136] 2. State initialization Cluster states are generated based on the selected quantum error correction code(s) and logic circuits. Examples of generated states may include GKP qubits on a known subset of modes and squeezed vacuum states on the remaining modes.

[0137] 3. Implementing logic circuits The logic operation / measurement layer is applied iteratively using logic circuits, and error correction is performed:

[0138] a) Perform a layer of logic operations by measuring a subset of sites on an appropriate (e.g., predetermined) basis (such as suitability for quantum computing, the selected quantum error correction code, and the measurement results of the previous round of error correction and logic operations). Measurements may include, for example, zero-difference measurements of optical modes.

[0139] b) Use method 2 to perform error correction on the measurement results obtained in the previous step.

[0140] 4. Processing measurement results Process the logical measurement results to obtain the output of the computation task.

[0141] Output : The output of a computational task given input.

[0142] Method 2 The process of performing quantum error correction

[0143] enter (1) Measurement results of performing logical operations, such as real-valued zero-difference measurements, and (2) information about which sites include GKP qubits and squeezed vacuum.

[0144] 1. Run decoder The example decoder implements a two-step process, as shown below:

[0145] a) Internal decoder The real-valued zero-difference measurement results are processed using the local and global information obtained via method 3 to obtain binary results representing bit values. Information about which bits include which states is used.

[0146] b) External decoder and error correction Use method 4 and the additional information provided in the previous steps to apply external code for error correction.

[0147] Output : Reliable calibrator results.

[0148] Method 3 Example internal decoder

[0149] enter : Vector of zero-difference measurement results , , and noise model.

[0150] 1. Identify the direction of noise and the direction without noise.

[0151] 2. Perform appropriate basis transformations.

[0152] 3. Apply binning along the new direction to round the results to the nearest ideal peak position, while taking into account the consistency of the results (e.g., parity).

[0153] 4. Cancel the basis transformation to return to the candidate lattice point. .

[0154] 5. By taking Mod 2 yields a binary string.

[0155] Output : Explanation of the quantum bit measurement results.

[0156] Method 4 Example external decoder: Minimum Weight Perfect Match (“MWPM”)

[0157] enter Method 3 (one or more) qubit measurement results

[0158] 1. Corrector Identifier Constructing correlated stabilizer measurements from input qubit measurements

[0159] 2. Matching graph construction Use the following to construct the complete graph:

[0160] Vertices, including pairs of unsatisfied compensators (with additional vertices if specific boundary conditions are desired). "Unsatisfied" compensators refer to those measurements that detected errors.

[0161] An edge connects each pair of vertices.

[0162] The weight assigned to an edge reflects the probability of the most likely error leading to an unsatisfied calibrator pair.

[0163] 3. Matching methods Find the minimum weight perfect match by running an algorithm such as Edmonds on the matching graph from the previous step.

[0164] 4. recovery operation Infer one or more recovery operations from the matching graph.

[0165] 5. Correction Interpret the correction results based on the recovery operation.

[0166] Output : Reliable calibrator results.

[0167] Example Analysis

[0168] noise model

[0169] In some embodiments, the generated cluster states are filled with two types of states discussed earlier in this paper: GKP-encoded |+> states and momentum-compression states. The position wavefunction of the ideal GKP state is:

[0170] (15)

[0171] Among them | > q Corresponding to the position eigenstates. To model the state initialization error, the Gaussian white noise channel can be given by the following equation:

[0172] (16)

[0173] in Y It is a noise matrix, and the Weyl-Heisenberg shift operator is defined as... = exp[ i Ω ],in = ( q , p ) T 2 For single-mode applications, Ω is an antisymmetric symmetric metric, and = ( , ) T For the GKP state and momentum state, the corresponding noise matrix is ​​given by the following equation:

[0174] (17)

[0175] Alternatively, in order to model the state initialization error and give an ideal The states have probabilities of 1- p 0 and p 0 noise channel N Ygkp or N YpIt can be applied to ideal State. The latter method approximates the actual momentum state well on the basis of position, but has a periodic structure in momentum space (discussed again below).

[0176] There are several reasons for modeling state preparation errors using Gaussian white noise channels of equations (16) and (17). For example, many CV gates use measurement-based squeezing operations, which naturally leads to defects modeled as Gaussian white noise channels. Furthermore, this type of noise is closely related to the pure loss and, by following the pure loss channel with an amplifier of inverse intensity, results in a Gaussian white noise channel. This relationship can play an important role in settings where losses can be handled in this way, such as in measurement defects.

[0177] The Gaussian white noise channel is easily described using the Heisenberg picture. Consider... N Orthogonal operators of patterns, where The noise channel in each mode can be described as follows:

[0178] (18),

[0179] in It is a random variable, drawn entirely from the corresponding normal distribution associated with the state initialization error. Assume the initial mean is all set to zero, i.e., This graph is useful because often only displacement error is simulated, not the actual wave function. Therefore, tracking displacement error can provide a direct and efficient way to simulate the system.

[0180] Cluster state initialization

[0181] As described in the previous subsection, we can first initialize the length to 2. N vectors (where) N (This refers to the number of patterns), used to store the data for each pattern. q and p The mean of the orthogonal pairs. Initially, the mean of each orthogonal pair is 0. For each pattern, the mean is expressed with probability. Prepare for a momentum compression state, and with probability ( Prepare the GKP|+> state. Next, apply a CZ gate (e.g., a "perfect" or "ideal" CZ gate) based on the structure of the cluster state (i.e., anywhere an edge exists between two nodes in the lattice). Some of these CZ gates can be inverted to match the CV complex surface code convention.

[0182] think back The symplectic transform of the CZ gate in the basic sorting is given by the following equation:

[0183] (19)

[0184] Notice, A 2 There are two modes. Adjacency matrix .in other words, It is a symmetric binary matrix. If two patterns are connected by an edge, then its 6th... The entry is 1 if it is not 0 otherwise. For CZ † Application, assuming (Note: For a given gate, the symbol † refers to its Hermitan conjugate.) Therefore, the symplectic matrix corresponding to connecting all optical modes to the cluster state is given by:

[0185] (20)

[0186] Among them now A It corresponds to the image. N×N The adjacency matrix differs in that it uses CZ. † -1s. The initial noise matrix for all modes is:

[0187] (twenty one)

[0188] in It has elements or The diagonal matrix depends on the mode. p Is it in a squeezed state or a GKP state? Therefore, the complete noise matrix evolves as follows:

[0189] (twenty two)

[0190] Finally, the momentum value is measured. In this case, only the momentum component of the noise matrix is ​​considered, which is given by the following equation:

[0191] (twenty three)

[0192] Internal decoder

[0193] In some embodiments, the standard mapping from the zero-difference measurement result to the position value is derived from the translational symmetry of the original GKP state (i.e., q and p The binning function is derived from the perfect periodicity in the direction. The subscript "gkp" is discarded when the context is clear. The states |+> and |-> are both in momentum. Periodic, but shifted relative to each other. Therefore, the zero-difference result can be placed into a space with a width of Within the interval, results falling into even intervals are associated with |+>, while all other values ​​are associated with |->. While this binning process utilizes the original symmetry of the GKP states, it does not account for the correlations in the noise matrix introduced by the CZ gate and the presence of P-squeezed states. Although some of this information can be incorporated into the RHG decoder, identifying an improved CV decoder or translator to confirm the noise matrix in equation (9) can be valuable. Note that the translator... It's a function that takes CV data and outputs binary data, as if CV modes were qubits, that is,

[0194] (twenty four)

[0195] To illustrate the importance of this translator, consider the example of the momentum compression state at the center of the original surface, surrounded by four GKP states. A large amount of CV noise of the order of magnitude from the momentum state q Orthogonally symmetric distribution to connected GKP states p Orthogonal. However, due to the periodicity of the GKP states, the net effect is that the identity gate or Z gate is applied to all surrounding GKP states, which are interchanged with the stabilizers in the RHG lattice.

[0196] Consider the hybrid system configuration expected translator during the encoding phase of computation, since this is the same regardless of subsequent computational logic operations. In other words, it is known which patterns are GKP and... p The state is compressed, and it is known where to apply the CZ gate to form a clustered state. As a numerical example will show, if you want to examine this stage... p -The distribution of zero-difference results, then p - The zero-difference results will be sampled from a periodic arrangement of Gaussian distributions, each with a covariance. And each Gaussian is represented by a point. Centered on, among which n It is a vector of integer values ​​derived from the set corresponding to the ideal state of a qubit.

[0197] Assumed value p It was obtained after a zero-difference measurement. Based on the above argument, it is assumed that it can produce… p The candidate distribution has covariance and with lattice points The Gaussian distribution function centered at the lattice point pair. The result is given by... p of responsibility It is given by the following formula:

[0198] (25)

[0199] Therefore, the most likely point to be generatedp The lattice points are given by the following equation:

[0200] (26)

[0201] The subscript IQP is chosen to indicate that this is an integer quadratic programming problem, i.e., minimizing a quadratic function over the integer domain. For simplicity, a standard approximation is used, i.e., all peaks in the GKP state have equal weights. It can also include envelopes with different weights for the peaks; in this case, this information can also be included in the calculation of responsibility. In general, IQP is NP-hard, so the heuristic strategy should be computationally tractable. A summary of this strategy is presented in Method 3, and a complete example of a single swap is presented in Method 5.

[0202] External decoder

[0203] After obtaining and binning the results of the zero-difference measurement, error correction can be performed on the qubit-based code. Details of the error correction problem are summarized in Method 4 for the selection of a specific (e.g., common) decoding algorithm: Minimum Weighted Perfect Match (MWPM). However, it is worth noting that a wide variety of other decoders can be used.

[0204] The weight assignment step may include simulated CV information (full zero-difference measurement results) and information from the lattice. p The position under compression.

[0205] Numerical Examples

[0206] The heuristic translator disclosed herein can identify directions in p-space where noise is significantly greater than in other directions, because it uses... p The squeezed states replace some GKP states, and then CZ gate encoding is applied to the cluster states corresponding to the selected codes. A small amount of noise exists in the space orthogonal to these noise directions. A basis transformation can be performed to determine CV data with different noise levels along these directions. These directions represent linear combinations of the original modes, which, ideally, still produce integer-valued results. The results can be determined on this basis by appropriate binning, taking into account the self-consistency of the integer linear combinations. Undoing the basis transformation causes the code lattice to revert to an integer-valued vector, which, after modulo 2, returns a bit string representing the qubit-level results.

[0207] Based on some embodiments, the following describes how a heuristic translator can handle four GKP states. p An example of operating in a squeezed state, including assigning bit strings to five zero-difference results:

[0208] Method 5 A state surrounded by GKP.p - An example internal decoder in a squeezed state.

[0209] enter : Vector of zero-difference measurement results ,in .

[0210] 1. Apply the following basis transformation ,in

[0211] (27)

[0212] 2. The first component is divided into boxes Return the nearest integer multiple of .

[0213] 3. In Among the last three components, find the closest one. multiples of The amount .Will Rounding .

[0214] 4. If If it is an even number (odd number), then for each component, divide by and The other three components are rounded to 1. The nearest even (odd) integer multiple. This produces .

[0215] 5. Cancel the operation on the integer value vector The basis transformation.

[0216] 6. v The last four components are either integer or half-integer values. If they are half-integer values, then add 1 / 2 to each component. This produces a five-component vector of integer values. .

[0217] 7. Take mod Output a five-component binary string.

[0218] Output : A string with a five-digit value s .

[0219] Figure 17The illustration shows a modular system configuration of a GBS generation chip according to some embodiments. In some embodiments, the GBS generation chip is reconfigurable. In other embodiments, the GBS generation chip is reconfigurable but includes an integrated PNR to reduce losses. The GBS generation chip of this disclosure can be partially or completely stored in and / or operated in a cryogenic environment. For example, in some embodiments, state generation is performed within a cryostat, while subsequent calculations are performed at room temperature. Each GBS generation chip includes an active switching system with fast switching that cannot be arbitrarily reconfigured. Depending on the application, some delay between the generation phase and the switching phase can be beneficial.

[0220] Technological advantages

[0221] Modular

[0222] The various aspects of computation described in this paper—state preparation, multiplexing, cluster generation, and measurement—have different associated hardware specifications. These hardware specifications facilitate modular design, where different tasks can be performed on different chips. For example, the generation of boson-encoded states can be performed using non-reconfigurable circuitry with on-chip PNRs. Cluster splicing can also be performed on a non-reconfigurable chip. Measurements of the generated clusters can be performed using reconfigurable homodyne detection fed forward from other homodyne detectors.

[0223] Minimum low temperature requirement

[0224] The state generation chip described herein may include low-loss, non-reconfigurable circuitry in a statically integrated platform, enabling the use of an on-chip PNR. The entire chip may optionally be placed in a cryostat, and the rest of the system (e.g., a switching network for state generation) may operate at room temperature.

[0225] Keeping the switching network at room temperature can be used to utilize any delay introduced when extracting light from a cryostat. Cluster manipulation can be performed using reconfigurable homodyne detection and delay lines to enable feedforward. Therefore, cluster generation and manipulation can be performed on-chip. On-chip homodyne detection can be faster than detection using superconducting detectors, thus reducing the losses associated with delay lines during the cluster manipulation phase.

[0226] Zero-difference detection time scale settings

[0227] In some embodiments, the timescales for cluster generation and cluster manipulation are set by the timescale of zero-difference detection (or by any other slower processing that may exist in the final generation process). This can be advantageous because zero-difference detection can be much faster than PNR detection during multiplexing, and / or much faster than threshold detectors during dual-track coding. A faster timescale can mean a shorter cluster generation delay line, resulting in lower loss. Figure 2A , 2C These advantages have been observed in 4C, for example, compared to known photonic systems. Figure 2A and 2C The delay line marked τ is shorter in the system design described in this paper.

[0228] Figure 18 This is a flowchart illustrating a first method for generating a mixed cluster state according to some embodiments. Figure 18 As shown, method 1800 includes receiving an input vector of a zero-difference measurement and a noise model at 1802. At 1804, based on the input vector of the zero-difference measurement and the noise model, at least one direction with a noise level above a predetermined threshold is identified. At 1806, a basis transformation (e.g., using a transformation matrix) is performed on the input vector of the zero-difference measurement based on the identified at least one direction to generate a first modified vector, and at 1808, a transformation is applied to the first modified vector to generate a second modified vector. The binning operation may be based, for example, on a mapping from the zero-difference measurement result to a bit value. Alternatively or additionally, the rounding operation may include rounding to... The transformation can include binning and rounding operations. Method 1800 also includes a second modified vector reversal basis transformation at 1810 to return candidate lattice points. At 1812, a binary string representing the interpreted qubit measurement results is generated based on the candidate lattice points.

[0229] Figure 19 This is a flowchart illustrating a second method for generating a mixed cluster state according to some embodiments. For example... Figure 19 As shown, method 1900 includes receiving an input vector of a zero-difference measurement at 1902, and performing a basis transformation on the input vector of the zero-difference measurement at 1904 to generate a first modified vector. At 1906, a transformation is applied to the first modified vector to generate a second modified vector. This transformation may include binning and rounding operations. The binning operation may be based on, for example, a mapping from the zero-difference measurement result to a bit value. Alternatively or additionally, the rounding operation may include rounding to... The vector is an integer multiple of the first vector. At 1908, the basis transformation is revoked based on the second modified vector to return the third modified vector. At 1910, the half-integer value components of the third modified vector are modified to produce the fourth modified vector.n And by taking n mod 2 = s To generate bit value strings s .

[0230] While various embodiments have been described and illustrated herein, various other means and / or structures for performing functions and / or obtaining results and / or one or more advantages described herein, as well as each of such variations and / or modifications, are possible. More generally, all parameters, dimensions, materials, and configurations described herein are intended as examples, and actual parameters, dimensions, materials, and / or configurations will depend on one or more specific applications using this disclosure. It should be understood that the foregoing embodiments are presented by way of example only, and other embodiments may be practiced in ways different from those specifically described and claimed. Embodiments of this disclosure relate to each individual feature, system, article, material, kit, and / or method described herein. Furthermore, any combination of two or more such features, systems, articles, materials, kits, and / or methods is included within the inventive scope of this disclosure if such features, systems, articles, materials, kits, and / or methods do not contradict each other.

[0231] Furthermore, various ideas can be implemented as one or more methods, examples of which have been provided. Actions performed as part of a method can be ordered in any suitable manner. Thus, embodiments can be constructed in which actions are performed in an order different from that shown, which may include performing some actions simultaneously, even if they are shown as sequential actions in the illustrative embodiments.

[0232] All definitions used herein should be understood to be superior to dictionary definitions, definitions in referenced literature, and / or the general meaning of the defined terms.

[0233] As used herein, a “module” can be, for example, any component and / or a group of operatively coupled electrical parts associated with performing a particular function, and can include, for example, memory, processor, electrical traces, optical connectors, software (stored and executed in hardware), etc.

[0234] As used herein in the specification and claims, unless clearly stated to the contrary, the indefinite articles “a” and “an” shall be understood to mean “at least one”.

[0235] As used herein in the specification and claims, the phrase “and / or” should be understood to mean “any one or two” of the elements so connected (i.e., elements that are connected in some cases and separate in others). Multiple elements listed with “and / or” should be interpreted in the same way, i.e., “one or more” of the elements so connected. In addition to the elements specifically identified by the “and / or” clause, other elements may optionally be present, whether related to or unrelated to those specifically identified. Thus, as a non-limiting example, when used in conjunction with open-ended language (such as “comprising”), a reference to “A and / or B” may in one embodiment refer only to A (optionally including elements other than B); in another embodiment refer only to B (optionally including elements other than A); in yet another embodiment refer to both A and B (optionally including other elements); and so on.

[0236] As used herein in the specification and claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating items in a list, “or” or “and / or” should be interpreted as inclusive, i.e., including multiple elements or at least one of the elements in the list, but also including more than one, and optionally additional unlisted items. Only when the opposite terms are clearly indicated, such as “only one” or “exactly one”, or when used in the claims, “consisting of…”, will it refer to including multiple elements or exactly one element in the list. In general, the term “or” as used herein should be interpreted as indicating an exclusive substitution (i.e., “one or the other but not both”) only when preceded by an exclusive term (such as “any,” “one of,” “only one of,” or “exactly one of”). When used in the claims, “consisting substantially of…” should have its ordinary meaning as used in the field of patent law.

[0237] As used herein in the specification and claims, the phrase "at least one" relating to a list of one or more elements should be understood to mean at least one element selected from any one or more elements in the list, but not necessarily at least one of each element specifically listed in the list, and does not exclude any combination of elements in the list. This definition also allows for the optional presence of elements other than those specifically identified in the list referred to by the phrase "at least one," whether related to or not related to those specifically identified elements. Thus, as a non-limiting example, "at least one of A and B" (or equivalently, "at least one of A or B" or equivalently "at least one of A and / or B") in one embodiment may mean at least one (optionally including more than one) A, where B is absent (and optionally includes elements other than B); in another embodiment, at least one (optionally including more than one) B, where A is absent (and optionally includes elements other than A); in yet another embodiment, at least one (optionally including more than one) A, and at least one (optionally including more than one) B (and optionally includes elements other than A); and so on.

[0238] In the claims and in the foregoing description, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “constituting,” etc., shall be understood as open-ended, that is, meaning including but not limited to. Only the transitional phrases “constituting of” and “constituting substantially of” shall be closed or semi-closed transitional phrases, respectively, as set forth in Section 2111.03 of the U.S. Patent Examination Procedure Manual.

Claims

1. A quantum computing device, comprising: Multiple qubit sources are configured to generate light with multiple output states via Gaussian boson sampling (GBS). Multiple photon number-resolved detectors (PNRs) are operatively coupled to the multiple qubit sources, and the multiple PNRs are configured to generate qubit clusters based on the multiple output states; A multiplexer, operably coupled to the plurality of PNRs, is configured to perform multiplexing of qubit clusters and generate multiple resource states; as well as An integrated circuit, operatively coupled to the multiplexer, the integrated circuit comprising: Multiple controlled Z-gates, each of the multiple controlled Z-gates being connected to at least two of the multiple qubit sources. The integrated circuit is configured to sequentially excite a subset of the plurality of qubit sources during operation and to generate a Raussendorf lattice based on the interactions between the plurality of qubit sources by entanglement of the plurality of resource states into a higher-dimensional cluster state that includes states for fault-tolerant quantum computing.

2. The quantum computing device of claim 1, wherein each of the plurality of controlled Z-gates is a two-qubit gate.

3. The quantum computing device as claimed in claim 1, wherein the cluster source is a 1D cluster source.

4. The quantum computing device as claimed in claim 1, wherein, During operation of the integrated circuit, a qubit emitted from a qubit source becomes entangled with a qubit emitted from at least one spatial neighbor of the qubit source.

5. The quantum computing device of claim 1, wherein the integrated circuit is further configured to entangle the resource states of the plurality of resource states into higher-dimensional cluster states without using reconfigurable linear optics.

6. The quantum computing device of claim 1, wherein the higher-dimensional cluster state comprises a three-dimensional macro-node lattice structure in one time dimension and two spatial dimensions.

7. The quantum computing device of claim 1, wherein the higher-dimensional cluster state comprises a three-dimensional lattice structure, and each of the plurality of sites in the lattice structure comprises at least four modes.

8. The quantum computing device as claimed in claim 1, wherein: The multiple quantum bit sources are multiple multimode sources; as well as The plurality of controlled Z-gates are plurality of beam splitters, which are operatively coupled to the plurality of multimode sources, and each of the plurality of beam splitters is connected to at least two of the plurality of multimode sources.

9. The quantum computing device of claim 1, wherein the Raussendorf lattice comprises a first layer containing a first type of qubit set and a second layer containing a second type of qubit set different from the first type.

10. The quantum computing device of claim 8, wherein, During operation of the integrated circuit, qubits emitted from the plurality of multimode sources become entangled with qubits emitted from at least one spatial neighbor of the plurality of multimode sources.

11. The quantum computing device of claim 10, wherein the qubits emitted from the plurality of multimode sources further become entangled with the previously emitted modes and the subsequently emitted modes.

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