A DMA channel scheduling method, device and host

Abstract

The embodiment of the application discloses a DMA channel scheduling method, device and host, the method comprises the following steps: an application program calls an SDK to open a session; the SDK judges whether target record information exists in a configuration file; if the target record information exists in the configuration file, PCIE device numbers corresponding to DMA channel numbers and DMA channel independent numbers in the target record information are allocated to the session; otherwise, a channel record information with a process identifier and a thread identifier being empty is selected, the process identifier and the thread identifier in the selected channel record information are modified into a current process identifier and a current thread identifier, and PCIE device numbers corresponding to DMA channel numbers and DMA channel independent numbers in the selected channel record information are allocated to the session. The technical scheme of the embodiment of the application realizes automatic scheduling among multiple PCIE devices and multiple DMA channels, has high scheduling efficiency, and has good user experience.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a DMA channel scheduling method, apparatus and host. Background Technology

[0002] With the development of science and technology and the socio-economic landscape, servers, personal computers, and other mainframes with communication and data processing capabilities are widely used in people's lives. At the same time, the processing speed of mainframes is increasing, and the bandwidth requirements for communication between mainframes and peripherals are also rising. Against this backdrop, the PCIe (Peripheral Component Interconnect Express) bus, with its high-speed data transmission capabilities, emerged and was widely adopted.

[0003] Furthermore, in some scenarios, to ensure that the host's computing power is fully utilized and to meet the needs of host sharing, the same host can support multiple identical PCIe devices to run together. To improve the communication speed between the host and the PCIe devices, each PCIe device is equipped with multiple DMA (Direct Memory Access) channels to achieve high-speed data transfer between the PCIe devices and the host.

[0004] However, for hosts that support multiple identical PCIe devices, although the host's computing power is improved, the existing technology requires users to manually implement the scheduling between multiple PCIe devices and multiple DMA channels, which results in low scheduling efficiency and a poor user experience. Summary of the Invention

[0005] The embodiments of the present invention are intended to at least partially solve one of the technical problems in the related art.

[0006] To address this, this invention discloses a DMA channel scheduling method, apparatus, and host. The method utilizes channel record information in a configuration file to record the usage of DMA channels. The SDK can automatically assign PCIe device numbers and independent DMA channel numbers to sessions based on the channel record information in the configuration file, thereby achieving automatic scheduling between multiple PCIe devices and multiple DMA channels. This results in high scheduling efficiency and a good user experience.

[0007] In a first aspect, embodiments of the present invention provide a DMA channel scheduling method applied to a host, the host being communicatively connected to N PCIe devices, each PCIe device having T DMA channels, the method comprising:

[0008] The application calls the SDK to open a session;

[0009] The SDK performs DMA channel scheduling operations, which include:

[0010] Obtain the current process identifier and current thread identifier corresponding to the session;

[0011] Obtain the configuration file; wherein the configuration file is generated by the PCIe device driver, and the configuration file includes: N*T channel record information, each channel record information including: DMA channel number, process identifier and thread identifier;

[0012] Determine whether target record information exists in the configuration file; wherein, the target record information is channel record information containing the current process identifier and the current thread identifier;

[0013] If the target record information exists in the configuration file, assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the target record information to the session;

[0014] If the target record information does not exist in the configuration file, select a channel record information with a process identifier and an empty process identifier, modify the process identifier and thread identifier in the selected channel record information to the current process identifier and the current thread identifier, and assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information to the session.

[0015] In a specific embodiment of the first aspect, the channel record information is arranged sequentially in the configuration file according to the size of the DMA channel number. The correspondence between the DMA channel number and the PCIe device number and the DMA channel independent number is as follows:

[0016] DevNo = (gChannel-1) % N;

[0017] DevChanle = (gChannel-1) / N;

[0018] Where gChannel represents the DMA channel number, DevNo represents the PCIe device number, and DevChanle represents the independent DMA channel number.

[0019] In a specific embodiment of the first aspect, determining whether target record information exists in the configuration file includes:

[0020] Read the i-th channel record information from the configuration file, and parse it to obtain the process identifier and thread identifier from the i-th channel record information. The initial value of i is 1.

[0021] Determine whether the process identifier in the i-th channel record is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier;

[0022] If the process identifier in the i-th channel record information is equal to the current process identifier and the thread identifier is equal to the current thread identifier, it is determined that the target record information exists in the configuration file;

[0023] If the process identifier in the i-th channel record information is not equal to the current process identifier, or the thread identifier is not equal to the current thread identifier, set i=i+1, and return to the steps of reading the i-th channel record information in the configuration file and parsing to obtain the process identifier and thread identifier in the i-th channel record information;

[0024] If, from i=1 to i=N*T, the process identifier in any channel record is not equal to the current process identifier, or the thread identifier is not equal to the current thread identifier, then it is determined that the target record information does not exist in the configuration file.

[0025] In one specific embodiment of the first aspect, the DMA channel scheduling operation further includes:

[0026] Determine whether the process identifier and thread identifier in the i-th channel record are both empty;

[0027] If the process identifier and thread identifier in the i-th channel record are both empty, determine whether the i-th channel record is the first channel record with empty process identifier and thread identifier;

[0028] If the i-th channel record information is a channel record information where the first process identifier and thread identifier are empty, mark the DMA channel number of the i-th channel record information as the first channel number;

[0029] Correspondingly, if the target record information does not exist in the configuration file, a channel record information with a process identifier and an empty process identifier is selected. The process identifier and thread identifier in the selected channel record information are modified to the current process identifier and the current thread identifier. The PCIe device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information are assigned to the session, including:

[0030] If the target record information is not present in the configuration file, the process identifier and thread identifier corresponding to the first channel number are modified to the current process identifier and the current thread identifier, and the PCIE device number and DMA channel independent number corresponding to the first channel number are assigned to the session.

[0031] In one specific embodiment of the first aspect, the DMA channel scheduling operation further includes:

[0032] Determine whether the process identifier and thread identifier in the i-th channel record are both empty;

[0033] If both the process identifier and the thread identifier in the i-th channel record are non-empty, determine whether the process identifier and the thread identifier in the i-th channel record are currently running;

[0034] If the process identifier and thread identifier in the i-th channel record information are currently running, then the step of determining whether the process identifier in the i-th channel record information is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier is executed.

[0035] If the process identifier and thread identifier in the i-th channel record information are not running, then the process identifier and thread identifier in the i-th channel record information are set to zero, and the i-th channel record information after being set to zero is written back to the configuration file.

[0036] If i≠N*T, take i=i+1, return to the SDK to read the i-th channel record information in the configuration file, and parse to obtain the process identifier and thread identifier in the i-th channel record information.

[0037] In one specific embodiment of the first aspect, the DMA channel scheduling operation further includes:

[0038] If the target record information does not exist in the configuration file, and there is no process identifier or channel record information with an empty process identifier, the PCIE device number and DMA channel independent number corresponding to the preset DMA channel number are assigned to the session; wherein, the DMA channel independent number corresponding to the preset DMA channel number is subject to locking operation.

[0039] In one specific embodiment of the first aspect, the DMA channel scheduling operation further includes:

[0040] Determine if the device handle in the global array corresponding to the allocated PCIe device number is null;

[0041] If the device handle corresponding to the allocated PCIe device number is empty, traverse the global array and take the first non-empty device handle in the global array as the device handle corresponding to the allocated PCIe device number.

[0042] Set the DMA channel number to zero.

[0043] In one specific embodiment of the first aspect, the method further includes:

[0044] The SDK also performs the following operations:

[0045] Find the device handle corresponding to the assigned PCIe device number in the global array;

[0046] Save the found device handle and DMA channel number separately to the session object;

[0047] The application calls the SDK to interact with the PCIe device through the device handle and DMA channel unique number in the session object;

[0048] When a data interaction failure occurs, determine whether the corresponding PCIe device hardware is damaged based on the cause of the failure. If so, set the device handle corresponding to the session to null and clear the session.

[0049] In a specific embodiment of the first aspect, the configuration file further includes: device recording information, the device recording information including: the number of PCIe devices N and the number of channels T for each PCIe device, and the method further includes:

[0050] The application calls the SDK to perform the following operations:

[0051] Open all PCIe devices by device node name;

[0052] For a successfully opened PCIe device, its device handle is saved to a global array;

[0053] If the number of successfully opened PCIe devices is not equal to N, update the value of N in the configuration file.

[0054] In one specific embodiment of the first aspect, the PCIE device is: a PCIE password card.

[0055] In a second aspect, embodiments of the present invention also disclose a DMA channel scheduling device applied to a host, the host being communicatively connected to N PCIe devices, each PCIe device being provided with T DMA channels, the device comprising:

[0056] The application module is used to call the SDK module to open a session;

[0057] The SDK module is used to perform DMA channel scheduling operations, which include:

[0058] Obtain the current process identifier and current thread identifier corresponding to the session;

[0059] Obtain the configuration file; wherein the configuration file includes: N*T channel record information, and each channel record information includes: DMA channel number, process identifier and thread identifier;

[0060] Determine whether target record information exists in the configuration file; wherein, the target record information is channel record information containing the current process identifier and the current thread identifier;

[0061] If the target record information exists in the configuration file, assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the target record information to the session;

[0062] If the target record information does not exist in the configuration file, select a channel record information with a process identifier and an empty process identifier, modify the process identifier and thread identifier in the selected channel record information to the current process identifier and the current thread identifier, and assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information to the session.

[0063] In a third aspect, embodiments of the present invention also disclose a host computer that is communicatively connected to N PCIe devices, each PCIe device having T DMA channels, and the host computer being used to execute the DMA channel scheduling method described in any embodiment of the first aspect.

[0064] Beneficial effects of the embodiments of the present invention:

[0065] This invention provides a DMA channel scheduling method, apparatus, and host. An application calls an SDK to open a session. The SDK determines whether target record information exists in the configuration file. If target record information exists in the configuration file, the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the target record information are assigned to the session. If target record information does not exist in the configuration file, a channel record information with a process identifier and an empty process identifier is selected. The process identifier and thread identifier in the selected channel record information are modified to the current process identifier and current thread identifier, and the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information are assigned to the session.

[0066] The technical solution of this invention utilizes the channel record information in the configuration file to record the usage of the DMA channel. The SDK can automatically assign PCIe device numbers and independent DMA channel numbers to the session based on the channel record information in the configuration file, realizing automatic scheduling between multiple PCIe devices and multiple DMA channels, with high scheduling efficiency and a good user experience. Attached Figure Description

[0067] Figure 1 A schematic diagram of the structure of a computer system provided in an embodiment of the present invention;

[0068] Figure 2 This is a flowchart illustrating a DMA channel scheduling method provided in an embodiment of the present invention;

[0069] Figure 3 This is a flowchart illustrating an SDK performing DMA channel scheduling operations, provided as an embodiment of the present invention.

[0070] Figure 4A A schematic diagram of a configuration file format provided for an embodiment of the present invention;

[0071] Figure 4B This is a schematic diagram of a device recording information format provided in an embodiment of the present invention;

[0072] Figure 4C This is a schematic diagram of a channel recording information format provided in an embodiment of the present invention;

[0073] Figure 5 A schematic diagram of a configuration file initialization process provided in an embodiment of the present invention;

[0074] Figure 6 This is a schematic diagram illustrating the correspondence between DMA channel numbers and PCIe devices and DMA channels, provided as an embodiment of the present invention.

[0075] Figure 7 A flowchart illustrating another DMA channel scheduling method provided in an embodiment of the present invention;

[0076] Figure 8 This is a schematic diagram of a DMA channel scheduling device provided in an embodiment of the present invention. Detailed Implementation

[0077] To better understand the above-mentioned objects, features, and advantages of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments of the present invention and the features thereof can be combined with each other.

[0078] For ease of understanding, the hardware environment of this embodiment of the invention will be described first. See [link to relevant documentation]. Figure 1 The diagram shown illustrates the structure of a computer system according to an embodiment of the present invention. This computer system constitutes the hardware environment of the embodiment of the present invention. Figure 1As shown, the computer system includes a host 10 and N0 PCIe devices 20, each PCIe device 20 having T DMA channels internally. Each PCIe device 20 is connected to the host via a PCIe bus. In practical applications, the host 10 can be a personal computer, server, or other electronic device with communication and data processing capabilities. The PCIe devices 20 can be PCIe encryption cards, PCIe network cards, or other electronic devices with PCIe interfaces. Each PCIe device 20 can be plugged into the host via a PCIe interface.

[0079] After introducing the hardware environment of this embodiment of the invention, the technical concept of this embodiment will be briefly described below: Specifically, firstly, the PCIe device driver located in the host establishes a configuration file and enumerates and identifies the total number N of PCIe devices connected to the host through a probe function. Based on the enumerated total number N of PCIe devices and the number T of DMA channels on each PCIe device, the total number of DMA channels N*T is calculated. Then, the N*T DMA channels are uniformly numbered to obtain N*T DMA channel numbers. For each DMA channel number, the corresponding channel record information is stored in the configuration file to complete the initialization of the configuration file. Each channel record includes: DMA channel number, process identifier, and thread identifier. The initial values ​​of the process identifier and thread identifier in each channel record are set to zero, that is, the process identifier and thread identifier are empty. Generally, the DMA channel number in the channel record starts from 1 and increments sequentially. Each channel record is written to the configuration file in the order of the DMA channel number. However, this embodiment of the invention is not limited to this, as long as a definite correspondence is established between the channel record information and the actual DMA channels.

[0080] Furthermore, an SDK (Software Development Kit) is created within the host machine. Applications can call the SDK to open sessions. Each time a session is opened, the SDK assigns a channel record with an empty process identifier and thread identifier from the configuration file to that session. The process identifier and thread identifier generated during the session opening are written into the assigned channel record to indicate that the corresponding DMA channel is occupied. Subsequent applications use the assigned channel record to interact with the corresponding DMA channel and PCIe device. In this way, the SDK can record the DMA channel occupancy status through the configuration file and allocate idle DMA channels (with empty process identifiers and thread identifiers) to new sessions, achieving automatic DMA channel allocation.

[0081] After introducing the technical concept of the embodiments of the present invention, the following will provide a detailed description of the DMA channel scheduling method and host operation process, system composition and / or functional modules provided by the embodiments of the present invention through specific examples.

[0082] See Figure 2 The diagram shown is a flowchart illustrating a DMA channel scheduling method provided in an embodiment of the present invention. Figure 2 The DMA channel scheduling method shown is applied to a host computer. The host computer communicates with N PCIe devices, and each PCIe device has T DMA channels. It should be noted that all PCIe devices are of the same model, and the N PCIe devices are those successfully opened by the SDK, generally those enumerated by the PCIe device drivers. Typically, N = N0, but in cases of poor contact between the PCIe devices and the host computer, N < N0.

[0083] Specifically, Figure 2 The DMA channel scheduling method shown includes:

[0084] In step S210, the application calls the SDK to open a session.

[0085] Specifically, the application can be any application that requires the functionality of a PCIe device; that is, any application that requires the functionality of a PCIe device can be executed. Figure 2 The DMA channel scheduling method is shown. Generally, applications call the SDK through the API (Application Programming Interface) to open a session. It should be noted that... Figure 2 The examples shown correspond to the same session.

[0086] In step S220, the SDK performs a DMA channel scheduling operation.

[0087] Specifically, after the SDK opens a session, it performs a DMA channel scheduling operation to allocate a DMA channel for the opened session.

[0088] Further, see here. Figure 3 A more detailed explanation of the DMA channel scheduling operations performed by the SDK is provided.

[0089] See Figure 3 The diagram shown is a flowchart illustrating an SDK performing a DMA channel scheduling operation according to an embodiment of the present invention. The DMA channel scheduling operation includes:

[0090] In step S2201, the current process identifier and the current thread identifier corresponding to the session are obtained.

[0091] Specifically, the current process identifier and the current thread identifier are the process identifier and thread identifier generated by the operating system after the session is first opened.

[0092] In step S2202, the configuration file is obtained.

[0093] The configuration file is generated by the PCIe device driver. In this embodiment of the invention, the configuration file includes N*T channel record information, each channel record information including: DMA channel number, process identifier, and thread identifier. Since each channel record information includes a process identifier and a thread identifier, the usage of the DMA channel can be determined based on the values ​​of the process identifier and thread identifier, therefore the configuration file records the usage of the DMA channel.

[0094] It should be noted that in practical applications, the configuration file may also include other information. For example, in one specific embodiment of this invention, the configuration file may also include device record information. This device record information includes the number of PCIe devices N and the number of channels T for each PCIe device. Furthermore, in some embodiments, the channel record information may also include channel status and other information, and the device record information may also include device parameters and other information. In particular, in some embodiments, this other information may be empty, allowing users to configure it flexibly according to actual conditions, such as whether channels are available or not, and which applications are available.

[0095] To provide a more intuitive understanding of the configuration file, a specific example is provided here to illustrate the content and initialization process of the configuration file.

[0096] See Figure 4A As shown, the configuration file contains N*T+1 entries. The first entry is the device record information, which records the number of PCIe devices N and the number of DMA channels T for each PCIe device. The second to N*T+1 entries are channel record information, which record the DMA channel number, process identifier, and thread identifier for each channel record.

[0097] It should be noted that: Figure 4A In the first message, "0" indicates other information and can be empty. In messages 2 through N*T+1, the first column is the DMA channel number, the second is the process identifier, and the third is the thread identifier. In practical applications, 4 bytes can be allocated for each DMA channel number, each thread identifier, and each process identifier, and 4 bytes can be allocated for N and T. If there is other information in the configuration file, the number of bytes allocated for this other information can be flexibly determined according to actual needs.

[0098] Furthermore, in practical applications, the formats of device-recorded information and channel-recorded information can be different. See also Figure 4B and Figure 4C As shown, a specific format for device recording information and channel recording information is given respectively.

[0099] Furthermore, the process of initializing the configuration file is described. See [link / reference]. Figure 5 The diagram shown is a schematic diagram of the configuration file initialization process provided in an embodiment of the present invention.

[0100] Specifically, first, write the first device record information into the configuration file, with the information format (N,T,0); then, set i=1, and if i>N*T is not true, write a channel record information (DID=i,PID=0,TID=0) into the configuration file; set i=i+1, and again check if i>N*T is true. If not, continue to execute the step of writing a channel record information (DID=i,PID=0,TID=0) into the configuration file until i>N*T is true, then exit and complete the initialization of the configuration file.

[0101] It should also be noted that the device record information in the configuration file is for the SDK to obtain information such as the total number of DMA channels N*T and the number of PCIe devices N as needed. In some other embodiments, the configuration file may not contain device record information. For example, the device record information may be stored separately, or the value of N*T may be obtained by traversing and calculating the channel record information in the configuration file. Furthermore, even if the configuration file contains device record information, the device record information may not be the first entry; for example, it may be the last entry.

[0102] In step S2203, it is determined whether the target record information exists in the configuration file.

[0103] The target record information is channel record information containing the current process identifier and the current thread identifier. The reason why the configuration file may contain target record information is that some sessions need to be executed multiple times periodically. When a session is executed periodically, its corresponding process identifier and thread identifier are not destroyed, but are stored in the configuration file until the session is completely ended.

[0104] Specifically, if the target record information exists in the configuration file, step S2204 is executed; if the target record information does not exist in the configuration file, step S2205 is executed.

[0105] In step S2204, the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the target record information are given to the session.

[0106] Each PCIe device connected to the host has a unique PCIe device number, and each PCIe device has T unique DMA channel numbers. There is a unique correspondence between the DMA channel number, the PCIe device number, and the unique DMA channel number. Based on this correspondence, the PCIe device number and the unique DMA channel number corresponding to the DMA channel number in the target record information can be determined, thus identifying the PCIe device and DMA channel used in this session.

[0107] The correspondence between DMA channel numbers, PCIe device numbers, and DMA channel independent numbers is further explained here. In a specific embodiment of the present invention, the record information of each channel is arranged sequentially in the configuration file according to the size of the DMA channel number. The correspondence between DMA channel numbers, PCIe device numbers, and DMA channel independent numbers is as follows:

[0108] DevNo = (gChannel-1) % N;

[0109] DevChanle = (gChannel-1) / N;

[0110] Where gChannel represents the DMA channel number, DevNo represents the PCIe device number, and DevChannel represents the independent DMA channel number. In this specific implementation, the PCIe device number starts from 0, and the independent DMA channel number corresponding to each PCIe device also starts from 0. % represents the modulo operation, and / represents the division operation.

[0111] This example illustrates the concept of having 3 PCIe devices, each with 6 DMA channels. The correspondence between DMA channel numbers and PCIe devices and DMA channels is as follows: Figure 6 As shown.

[0112] With this specific implementation, as the configuration file is read sequentially, the DMA channel numbers increase sequentially. When allocating DMA channels, the same DMA channel of different PCIe devices can be used sequentially. After the DMA channels corresponding to the independent numbers of the same DMA channel are used up, the next set of DMA channels corresponding to the independent numbers of the same DMA channel will be used. This ensures the load balance of PCIe devices to a certain extent, while maximizing the performance of each PCIe device.

[0113] It should be noted that there may be other correspondences between the DMA channel number, the PCIe device number, and the independent DMA channel number. For example, after the DMA channel of one PCIe device is fully utilized, the DMA channel of the next PCIe device can be used for communication.

[0114] In step S2205, a process identifier and a channel record with an empty process identifier are selected. The process identifier and thread identifier in the selected channel record are modified to the current process identifier and current thread identifier. The PCIE device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record are assigned to the session.

[0115] Specifically, if the process identifier and process identifier of the channel record information are empty, it indicates that the DMA channel corresponding to that channel record information is not in use and can therefore be directly allocated to the session. Furthermore, when selecting channel record information, one can choose randomly from channel record information with empty process identifiers or select according to the order of the DMA channel numbers corresponding to the channel record information.

[0116] Furthermore, after assigning a PCIe device number and a DMA channel unique number to the session, the application can call the SDK to interact with the corresponding PCIe device through the DMA channel corresponding to the DMA channel unique number. The content of the data interaction is specific to the PCIe device. Taking a PCIe cryptographic card as an example, the data interaction between the PCIe device and the host can provide services such as encryption / decryption, digital signature, and signature verification. The specific technology of the data interaction between the host and the PCIe device is not related to the technical concept of this embodiment and can be found in existing technologies, which will not be elaborated here.

[0117] It should be noted that the DMA channel scheduling method provided in this embodiment of the invention can be executed for each session opened. That is, this embodiment of the invention does not limit the number of sessions, i.e., it does not limit the number of users online at the same time.

[0118] The DMA channel scheduling method provided in this embodiment of the invention involves an application calling an SDK to open a session. The SDK determines whether target record information exists in the configuration file. If target record information exists, the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the target record information are assigned to the session. If target record information does not exist in the configuration file, a channel record information with a process identifier and an empty process identifier is selected. The process identifier and thread identifier in the selected channel record information are modified to the current process identifier and current thread identifier, and the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information are assigned to the session. This technical solution utilizes the channel record information in the configuration file to record the usage of DMA channels. The SDK can automatically assign PCIe device numbers and DMA channel independent numbers to sessions based on the channel record information in the configuration file, achieving automatic scheduling between multiple PCIe devices and multiple DMA channels, resulting in high scheduling efficiency and a good user experience.

[0119] Furthermore, in a specific embodiment E1 of the present invention, step S2203 may include:

[0120] Read the i-th channel record information from the configuration file and parse it to obtain the process identifier and thread identifier from the i-th channel record information, with the initial value of i set to 1; determine whether the process identifier and thread identifier in the i-th channel record information are equal to the current process identifier and the current thread identifier; if the process identifier and thread identifier in the i-th channel record information are equal to the current process identifier and the current thread identifier, it is determined that the target record information exists in the configuration file; if the process identifier and thread identifier in the i-th channel record information are not equal to the current process identifier or the current thread identifier, set i=i+1, and return to the steps of reading the i-th channel record information from the configuration file and parsing it to obtain the process identifier and thread identifier; if from i=1 to i=N*T, the process identifier or thread identifier in any channel record information is not equal to the current process identifier or the current thread identifier, it is determined that the target record information does not exist in the configuration file.

[0121] It should be noted that the case where the process identifier in the i-th channel record is not equal to the current process identifier, and the thread identifier is not equal to the current thread identifier, also includes the case where the process identifier in the i-th channel record is not equal to the current process identifier, or the thread identifier is not equal to the current thread identifier. Furthermore, in some other embodiments, the search for the target channel record can begin from the last channel record.

[0122] Furthermore, in a specific embodiment E2 of the present invention, step S220 may further include:

[0123] Determine whether the process identifier and thread identifier in the i-th channel record are both empty; if the process identifier and thread identifier in the i-th channel record are both empty, determine whether the i-th channel record is the first channel record with an empty process identifier and thread identifier; if the i-th channel record is the first channel record with an empty process identifier and thread identifier, mark the DMA channel number of the i-th channel record as the first channel number; if the i-th channel record is not the first channel record with an empty process identifier and thread identifier, and i≠N*T, set i=i+1, and return to the steps of reading the i-th channel record from the configuration file in the SDK and parsing to obtain the process identifier and thread identifier in the i-th channel record.

[0124] Accordingly, step S2205 may include:

[0125] If the target record information is not found in the configuration file, modify the process identifier and thread identifier corresponding to the first channel number to the current process identifier and current thread identifier, and assign the PCIe device number and DMA channel independent number corresponding to the first channel number to the session.

[0126] Using this specific implementation method E2, the PCIe device number corresponding to the first channel number and the independent DMA channel number can be assigned to a session. In this way, idle DMA channels can be allocated to sessions in a set order, ensuring that the final allocation of DMA channels according to the user-defined order better meets user needs. Figure 6 For example, if the DMA channel numbers corresponding to the first 6 sessions are 1 to 6, when the 7th session arrives, if the DMA channel of the 3rd session has been released, the 7th session will be assigned to the DMA channel numbered 3, which can ensure dynamic load balancing of each PCIe device.

[0127] It is understood that this specific implementation method E2 occurs after reading the i-th channel record information in the configuration file and parsing and obtaining the process identifier and thread identifier in the i-th channel record information in specific implementation method E1. As for its order with other steps in specific implementation method E1, it can be determined according to specific design requirements, and there is no fixed order.

[0128] Specifically, when this specific implementation E2 is located before the specific implementation E1 in determining whether the process identifier in the i-th channel record information is equal to the current process identifier or whether the thread identifier is equal to the current thread identifier, the situation where the process identifier in the i-th channel record information is not equal to the current process identifier or the thread identifier is not equal to the current thread identifier due to the DMA channel being idle can be eliminated in advance.

[0129] When this specific implementation E2 is located after the specific implementation E1 determines that the process identifier in the i-th channel record information is not equal to the current process identifier or the thread identifier is not equal to the current thread identifier, it can be further determined whether the situation that the process identifier in the i-th channel record information is not equal to the current process identifier or the thread identifier is not equal to the current thread identifier is caused by the DMA channel being idle.

[0130] Furthermore, in a specific implementation E3 of this invention, step S220 may further include: determining whether the process identifier and thread identifier in the i-th channel record information are both empty;

[0131] If both the process identifier and thread identifier in the i-th channel record are non-empty, determine whether the process identifier and thread identifier in the i-th channel record are currently running; if the process identifier and thread identifier in the i-th channel record are currently running, then perform the step of determining whether the process identifier in the i-th channel record is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier; if the process identifier and thread identifier in the i-th channel record are not running, then set the process identifier and thread identifier in the i-th channel record to zero, and write the i-th channel record after setting it to zero back to the configuration file.

[0132] If i≠N*T, take i=i+1, return the steps of reading the i-th channel record information in the SDK configuration file, and parse to obtain the process identifier and thread identifier in the i-th channel record information.

[0133] In this specific implementation method E3, the process identifiers and thread identifiers in the channel record information that are not running are set to zero through polling. This ensures that the channel record information corresponding to the abnormal thread is released in a timely manner, which is beneficial for the full utilization of resources. Furthermore, in practical use, after setting the process identifier and thread identifier in the i-th channel record information to zero, it can be determined whether the i-th channel record information is the first channel record information with an empty process identifier and thread identifier. If so, the DMA channel number of the i-th channel record information is marked. Of course, in some other implementations, the step of determining whether the i-th channel record information is the first channel record information with an empty process identifier and thread identifier may not be performed.

[0134] Furthermore, in specific implementation E3, after reading the i-th channel record information in the configuration file and parsing to obtain the process identifier and thread identifier in the i-th channel record information in specific implementation E1, and before determining whether the process identifier in the i-th channel record information is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier, in actual use, if at least one of the process identifier and thread identifier in the i-th channel record information is empty, and i ≠ N*T, then i = i + 1 is taken, and the step of reading the i-th channel record information in the configuration file and parsing to obtain the process identifier and thread identifier in the i-th channel record information is returned to SDK, without needing to continue to determine whether the process identifier in the i-th channel record information is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier, thereby saving steps and speeding up the judgment process.

[0135] Furthermore, in a specific embodiment E4 of the present invention, step S220 may further include:

[0136] If the target record information is not present in the configuration file, and there is no process identifier or channel record information with an empty process identifier, the PCIe device number and DMA channel independent number corresponding to the preset DMA channel number will be assigned to the session, and the corresponding DMA channel will be used for data interaction thereafter; among them, the DMA channel independent number corresponding to the preset DMA channel number will be used for locking operations.

[0137] This section explains the preset DMA channel number. In practical applications, a specific DMA channel number can be set as the preset DMA channel number. Figure 6For example, the DMA channel number 1 is set to the default DMA channel number. When many sessions are open and all DMA channels are occupied, the DMA channel number 1 is shared, meaning that DMA channel 0 of PCIe device 0 is shared. In this case, DMA channel 0 of PCIe device 0 needs to undergo locking operations to ensure that sessions allocated to this DMA channel use it sequentially. Conversely, other DMA channels do not require locking operations, which can improve the operational efficiency of other DMA channels to some extent.

[0138] It should be noted that multiple preset DMA channel numbers can be configured, and each preset DMA channel number can have a priority. Furthermore, higher-priority preset DMA channel numbers can be assigned first, and in cases where the PCIe device corresponding to a higher-priority preset DMA channel number fails, a second-highest-priority preset DMA channel number can be used as a replacement.

[0139] It should be noted that there are two ways to assign the PCIe device number and DMA channel independent number corresponding to the preset DMA channel number to the session. One method is to modify the thread identifier and process identifier corresponding to the preset DMA channel number to the current process identifier and current thread identifier when the thread identifier and process identifier corresponding to the preset DMA channel number are released, and then assign the PCIe device number and DMA channel independent number corresponding to the preset DMA channel number to the session. The other method is that after the thread identifier and process identifier corresponding to the preset DMA channel number are written once, their process identifier and thread identifier no longer change. As long as there is no target record information in the configuration file, and no channel record information with an empty process identifier, the PCIe device number and DMA channel independent number corresponding to the preset DMA channel number are directly assigned to the session. Obviously, in the second scenario, if specific implementation methods E3 and E4 are executed together, the step in specific implementation method E3, "If the process identifier and thread identifier in the i-th channel record information are not running, then set the process identifier and thread identifier in the i-th channel record information to zero, and write the zeroed i-th channel record information back to the configuration file," starts executing from i=2.

[0140] By adopting this specific implementation method E4, it can be guaranteed that for the first N*T sessions, the SDK automatically allocates a DMA channel for each session, ensuring that one session uses one DMA channel. Subsequent sessions share the DMA channel corresponding to the preset DMA channel number, ensuring the operation efficiency of other DMA channels besides the DMA channel corresponding to the preset DMA channel number, and also ensuring the overall operation efficiency of N PCIe devices.

[0141] Furthermore, in a specific embodiment E5 of the present invention, after assigning a PCIE device number and a DMA channel independent number to the session in step S220, it may further include:

[0142] Check if the device handle corresponding to the allocated PCIe device number in the global array is empty; if the device handle corresponding to the allocated PCIe device number is empty, traverse the global array and take the first non-empty device handle in the global array as the device handle corresponding to the allocated PCIe device number; set the DMA channel independent number to zero.

[0143] Specifically, when an application is launched, a process is allocated for the application, and a corresponding global array is created. The global array is created as follows: the application calls the SDK to perform the following operation: open all PCIe devices by device node name; for each successfully opened PCIe device, its device handle is saved to the global array. Here, there is a one-to-one correspondence between the device node name and the PCIe device number, and also a one-to-one correspondence between the device node name and the device handle; therefore, there is also a one-to-one correspondence between the PCIe device number and the device handle.

[0144] Since the device handle is null when there is a hardware problem with the PCIe device corresponding to it, the corresponding device handle can be found in the global array based on the PCIe device number, and it can be checked whether the device handle is null to detect whether there is a hardware problem with the PCIe device.

[0145] Furthermore, in this specific implementation E5, the DMA channels with independent DMA channel numbers of zero in each PCIe device can be used as shared DMA channels. If a PCIe device with an empty device handle appears, the first non-empty device handle in the global array can be used as the device handle corresponding to the assigned PCIe device number; the independent DMA channel number is then set to zero. In addition, shared DMA channels require locking operations.

[0146] By adopting this specific implementation method E5, after assigning a PCIe device number and a DMA channel independent number to a session, it can automatically detect PCIe devices with hardware problems. When a PCIe device assigned to a session has a hardware problem, it can promptly assign a new device handle (equivalent to reassigning the PCIe device number) and a DMA channel independent number to the session to ensure the normal operation of the session. As a result, the PCIe device with a hardware problem is imperceptible to the user and does not affect the user's use, thus improving the user experience.

[0147] Furthermore, in a specific embodiment E6 of the present invention, the DMA channel scheduling method of the present invention may further include: after the SDK performs the DMA channel scheduling operation, it also performs the following operations:

[0148] The process involves: 1) Locating the device handle corresponding to the assigned PCIe device number in the global array; 2) Saving the found device handle and DMA channel unique identifier to the session object; 3) Calling the SDK to interact with the PCIe device using the device handle and DMA channel unique identifier in the session object. In practical applications, the content of the data interaction varies depending on the PCIe device. Taking a PCIe cryptographic card as an example, the interacted data can be symmetric computation data, asymmetric computation data, digest data, etc. The SDK determines the DMA channel used for data interaction based on the device handle and DMA channel unique identifier in the session object.

[0149] Furthermore, when data interaction fails, the system determines whether the failure is due to hardware damage to the corresponding PCIe device. If so, the device handle corresponding to the session is set to null, and the session is cleared. The SDK can determine the cause of the data interaction failure and whether the PCIe device has a hardware problem based on error codes and other information returned by the PCIe device. For example, if the error code returned by the PCIe device indicates insufficient permissions, it suggests a configuration problem; if the PCIe device is unresponsive, it indicates a hardware problem.

[0150] By adopting this specific implementation method E6, the device handle of the PCIe device that has suffered hardware damage is promptly cleared to ensure that the next time the session is opened, the device handle of the PCIe device with hardware damage will not be assigned.

[0151] Furthermore, based on the specific implementation E6, if the cause of failure is determined to be a configuration problem rather than a hardware failure of the corresponding PCIe device, the device handle corresponding to the session will be set to null and the session will be cleared. At the same time, the user will be reminded to modify the configuration.

[0152] Furthermore, in a specific embodiment E7 of the present invention, the configuration file may further include: device record information, which includes: the number of PCIe devices N and the number of channels T for each PCIe device. The DMA channel scheduling method of the present invention may further include: the application calling the SDK to perform the following operations:

[0153] Open all PCIe devices by device node name; for each successfully opened PCIe device, save its device handle to a global array; if the number of successfully opened PCIe devices is not equal to N, update the value of N in the configuration file.

[0154] Specifically, the TotalDevNum variable represents the number of successfully opened PCIe devices, and gDeviceHandle[] represents the global array. The SDK opens all devices by device node name. If a device is opened successfully, it obtains the device handle and stores it in the global array gDeviceHandle[], and increments the TotalDevNum variable by 1. The SDK checks whether the number of successfully opened PCIe devices TotalDevNum matches the enumerated number of PCIe devices N. If they do not match, it assigns TotalDevNum to N and modifies the value of N in the configuration file.

[0155] In this specific implementation E7, during the process of opening an application and establishing a global array of device handles, the total number of successfully opened PCIE devices is compared with the total number of PCIE devices enumerated by the driver. If the total number of successfully opened PCIE devices is inconsistent with the total number of PCIE devices enumerated by the driver, the N value in the configuration file is modified in a timely manner to prevent unavailable PCIE devices from being subsequently assigned to the session.

[0156] Furthermore, to more intuitively illustrate the DMA channel scheduling method obtained by combining the aforementioned embodiments, a preferred specific embodiment is described here. See [link to documentation]. Figure 7 The diagram shown is a flowchart of another DMA channel scheduling method provided in an embodiment of the present invention. Figure 7 In the illustrated embodiment, DID represents the DMA channel number, PID represents the process identifier, TID represents the thread identifier, CPID represents the current process identifier, and CTID represents the current thread identifier. The configuration file includes N*T channel record information entries and 1 device record information entry, with the device record information being the first entry. The DMA channel number in the first channel record information entry is the preset DMA channel number. The channel record information and the device record information are collectively referred to as record information. Figure 7 The DMA channel scheduling method shown includes:

[0157] In step S701, the CPID and CTID corresponding to the session are obtained.

[0158] In step S702, the first record information is read from the configuration file, and the number of PCIe devices N, the number of DMA channels T for each PCIe device, and the total number of DMA channels N*T are parsed and obtained.

[0159] In step S703, the j-th record information is read from the configuration file, and the PID, TID, and DID of this record information are parsed and obtained. The initial value of j is 2.

[0160] In step S704, it is determined whether PID and TID are 0. If they are 0, step S707 is executed; otherwise, step S705 is executed.

[0161] In step S705, it is determined whether PID and TID are running. If they are, step S709 is executed; otherwise, step S706 is executed.

[0162] In step S706, the PID and TID are set to 0 and written back to the corresponding location in the configuration file.

[0163] In step S707, it is determined whether the position of this record information is the position where the first PID and TID are 0. If so, step S708 is executed; otherwise, step S711 is executed.

[0164] In step S708, the DID of this record information is recorded and denoted as FDID, and then step S711 is executed.

[0165] In step S709, it is determined whether CPID is equal to PID and whether CTID is equal to TID. If they are both equal, step S710 is executed; otherwise, step S711 is executed.

[0166] In step S710, the DID of this record information is recorded and denoted as CDID, and then step S711 is executed.

[0167] In step S711, it is determined whether the current record is the last record. If it is the last record, step S712 is executed; otherwise, j = j + 1 is set, and the process returns to step S703.

[0168] In step S712, it is determined whether CDID has been assigned a value. If so, CDID is marked as the record information corresponding to the session; otherwise, step S713 is executed. Step S710 is the process of assigning a value to CDID.

[0169] In step S713, it is determined whether the FDID has been assigned a value. If so, the FDID is marked as the record information corresponding to the session, and then step S714 is executed; otherwise, step S715 is executed. Step S708 is the process of assigning a value to the FDID.

[0170] In step S714, the PID in the record information corresponding to the session in the configuration file is modified to CPID, and the TID is modified to CTID.

[0171] In step S715, the PID in the second record information is modified to CPID, and the TID is modified to CTID. The second record information is also the first channel record information.

[0172] This completes the DMA channel allocation for the session.

[0173] Corresponding to the foregoing method embodiments, this invention also discloses a DMA channel scheduling device, applied to a host computer, which is communicatively connected to N PCIe devices, each PCIe device having T DMA channels. See also... Figure 8 As shown, the DMA channel scheduling device of this embodiment may include: an application module 810 and an SDK module 820.

[0174] Application module 810 is used to call SDK module 810 to open a session;

[0175] SDK module 820 is used to perform DMA channel scheduling operations, which include:

[0176] Obtain the current process identifier and current thread identifier corresponding to the session; obtain the configuration file; wherein the configuration file includes: N*T channel record information, each channel record information including: DMA channel number, process identifier, and thread identifier; the DMA channel number has a unique and definite correspondence with the PCIe device number and the DMA channel independent number; determine whether the configuration file contains target record information; wherein the target record information is channel record information containing the current process identifier and the current thread identifier; if the configuration file contains the target record information, assign the PCIe device number and the DMA channel independent number corresponding to the DMA channel number in the target record information to the session; if the configuration file does not contain the target record information, select a channel record information with a process identifier and an empty process identifier, modify the process identifier and thread identifier in the selected channel record information to the current process identifier and the current thread identifier, and assign the PCIe device number and the DMA channel independent number corresponding to the DMA channel number in the selected channel record information to the session.

[0177] The DMA channel scheduling device provided in this embodiment of the invention involves an application calling an SDK to open a session. The SDK determines whether target record information exists in the configuration file. If target record information exists, the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the target record information are assigned to the session. If target record information does not exist in the configuration file, a channel record information with a process identifier and an empty process identifier is selected. The process identifier and thread identifier in the selected channel record information are modified to the current process identifier and current thread identifier, and the PCIe device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information are assigned to the session. This technical solution utilizes the channel record information in the configuration file to record the usage of DMA channels. The SDK can automatically assign PCIe device numbers and DMA channel independent numbers to sessions based on the channel record information in the configuration file, achieving automatic scheduling between multiple PCIe devices and multiple DMA channels, resulting in high scheduling efficiency and a good user experience.

[0178] Corresponding to the foregoing method embodiments, this invention also discloses a host, which is communicatively connected to N PCIe devices, each PCIe device being provided with T DMA channels, and the host is used to execute the DMA channel scheduling method described in any of the foregoing method embodiments.

[0179] Those skilled in the art will clearly understand that the techniques in the embodiments of the present invention can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or certain parts of the embodiments of the present invention.

[0180] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Where there is no conflict, the embodiments and features of the present invention can be combined with each other. Each embodiment focuses on describing the differences from other embodiments. In particular, the system and device embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the description of the method embodiments.

[0181] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0182] The embodiments of the present invention described above do not constitute a limitation on the scope of protection of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A DMA channel scheduling method, characterized in that, Applied to a host computer that is communicatively connected to N PCIe devices, each PCIe device having T DMA channels, the method includes: The application calls the SDK to open a session; The SDK performs DMA channel scheduling operations, which include: Obtain the current process identifier and current thread identifier corresponding to the session; Obtain the configuration file; wherein the configuration file is generated by the PCIe device driver, and the configuration file includes: N*T channel record information, each channel record information including: DMA channel number, process identifier and thread identifier; wherein the number of DMA channel numbers is N*T, and starts from 1 and increments sequentially; Determine whether target record information exists in the configuration file; wherein, the target record information is channel record information containing the current process identifier and the current thread identifier; If the target record information exists in the configuration file, the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the target record information are given to the session; wherein, each PCIE device is configured with T DMA channel independent numbers, and the DMA channel independent numbers start from 0; If the target record information does not exist in the configuration file, select a process identifier and a channel record information with an empty process identifier, modify the process identifier and thread identifier in the selected channel record information to the current process identifier and the current thread identifier, and assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information to the session.

2. The DMA channel scheduling method as described in claim 1, characterized in that, The record information for each channel is arranged sequentially in the configuration file according to the size of the DMA channel number. The correspondence between the DMA channel number and the PCIe device number and the independent DMA channel number is as follows: DevNo = (gChannel-1) % N; DevChanle = (gChannel-1) / N; Where gChannel represents the DMA channel number, DevNo represents the PCIe device number, and DevChanle represents the independent DMA channel number.

3. The DMA channel scheduling method as described in claim 1 or 2, characterized in that, Determining whether the target record information exists in the configuration file includes: Read the i-th channel record information from the configuration file, and parse it to obtain the process identifier and thread identifier from the i-th channel record information. The initial value of i is 1. Determine whether the process identifier in the i-th channel record information is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier; If the process identifier in the i-th channel record information is equal to the current process identifier and the thread identifier is equal to the current thread identifier, it is determined that the target record information exists in the configuration file; If the process identifier in the i-th channel record information is not equal to the current process identifier, or the thread identifier is not equal to the current thread identifier, set i=i+1, and return to the steps of reading the i-th channel record information in the configuration file and parsing to obtain the process identifier and thread identifier in the i-th channel record information; If, from i=1 to i=N*T, the process identifier in any channel record is not equal to the current process identifier, or the thread identifier is not equal to the current thread identifier, then it is determined that the target record information does not exist in the configuration file.

4. The DMA channel scheduling method as described in claim 3, characterized in that, The DMA channel scheduling operation also includes: Determine whether the process identifier and thread identifier in the i-th channel record are both empty; If the process identifier and thread identifier in the i-th channel record are both empty, determine whether the i-th channel record is the first channel record with empty process identifier and thread identifier; If the i-th channel record information is a channel record information where the first process identifier and thread identifier are empty, mark the DMA channel number of the i-th channel record information as the first channel number; Correspondingly, if the target record information does not exist in the configuration file, a channel record information with a process identifier and an empty process identifier is selected. The process identifier and thread identifier in the selected channel record information are modified to the current process identifier and the current thread identifier. The PCIe device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information are assigned to the session, including: If the target record information is not present in the configuration file, the process identifier and thread identifier corresponding to the first channel number are modified to the current process identifier and the current thread identifier, and the PCIE device number and DMA channel independent number corresponding to the first channel number are assigned to the session.

5. The DMA channel scheduling method as described in claim 3, characterized in that, The DMA channel scheduling operation also includes: Determine whether the process identifier and thread identifier in the i-th channel record are both empty; If both the process identifier and the thread identifier in the i-th channel record are non-empty, determine whether the process identifier and the thread identifier in the i-th channel record are currently running; If the process identifier and thread identifier in the i-th channel record information are currently running, then the step of determining whether the process identifier in the i-th channel record information is equal to the current process identifier and whether the thread identifier is equal to the current thread identifier is executed. If the process identifier and thread identifier in the i-th channel record information are not running, then the process identifier and thread identifier in the i-th channel record information are set to zero, and the i-th channel record information after being set to zero is written back to the configuration file. If i≠N*T, take i=i+1, return to the SDK to read the i-th channel record information in the configuration file, and parse to obtain the process identifier and thread identifier in the i-th channel record information.

6. The DMA channel scheduling method as described in claim 1 or 2, characterized in that, The DMA channel scheduling operation also includes: If the target record information does not exist in the configuration file, and there is no process identifier or channel record information with an empty process identifier, the PCIE device number and DMA channel independent number corresponding to the preset DMA channel number are assigned to the session; wherein, the DMA channel independent number corresponding to the preset DMA channel number is subject to locking operation.

7. The DMA channel scheduling method as described in claim 1 or 2, characterized in that, The DMA channel scheduling operation also includes: Determine if the device handle in the global array corresponding to the allocated PCIe device number is null; If the device handle corresponding to the allocated PCIe device number is empty, traverse the global array and take the first non-empty device handle in the global array as the device handle corresponding to the allocated PCIe device number. Set the DMA channel number to zero.

8. The DMA channel scheduling method as described in claim 1 or 2, characterized in that, The method further includes: The SDK also performs the following operations: Find the device handle corresponding to the assigned PCIe device number in the global array; Save the found device handle and DMA channel number separately to the session object; The application calls the SDK to interact with the PCIe device through the device handle and DMA channel unique number in the session object; When a data interaction failure occurs, determine whether the corresponding PCIe device hardware is damaged based on the cause of the failure. If so, set the device handle corresponding to the session to null and clear the session.

9. The DMA channel scheduling method as described in claim 1 or 2, characterized in that, The configuration file also includes: device record information, which includes: the number of PCIe devices N and the number of channels T for each PCIe device. The method also includes: The application calls the SDK to perform the following operations: Open all PCIe devices by device node name; For a successfully opened PCIe device, its device handle is saved to a global array; If the number of successfully opened PCIe devices is not equal to N, update the value of N in the configuration file.

10. A DMA channel scheduling device, characterized in that, Applied to a host computer that communicates with N PCIe devices, each PCIe device having T DMA channels, the device includes: The application module is used to call the SDK module to open a session; The SDK module is used to perform DMA channel scheduling operations, which include: Obtain the current process identifier and current thread identifier corresponding to the session; Obtain the configuration file; wherein the configuration file includes: N*T channel record information, each channel record information includes: DMA channel number, process identifier and thread identifier; wherein the number of DMA channel numbers is N*T, and starts from 1 and increments sequentially; Determine whether target record information exists in the configuration file; wherein, the target record information is channel record information containing the current process identifier and the current thread identifier; If the target record information exists in the configuration file, the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the target record information are given to the session; wherein, each PCIE device is configured with T DMA channel independent numbers, and the DMA channel independent numbers start from 0; If the target record information does not exist in the configuration file, select a process identifier and a channel record information with an empty process identifier, modify the process identifier and thread identifier in the selected channel record information to the current process identifier and the current thread identifier, and assign the PCIE device number and DMA channel independent number corresponding to the DMA channel number in the selected channel record information to the session.

11. A host computer, characterized in that, The host is communicatively connected to N PCIe devices, each PCIe device having T DMA channels, and the host is used to execute the DMA channel scheduling method as described in any one of claims 1 to 9.

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