A method for testing a chip start function

Abstract

The application discloses a kind of test methods of chip starting function.The method of the present application is realized by PC, development board, Boot program and relay.PC is set configuration generation module, flash programming module, relay control module, receiving module and verification module.Configuration file is written into flash by flash programming module, and the switch of power supply is controlled by relay control module through relay.Development board uses ordinary development board, and is set power supply, flash, sending module and the chip to be tested;power supply is powered on, and the chip to be tested starts Boot program, and sends test result to receiving module through sending module.Boot program is controlled jointly by corresponding bit of flash and corresponding bit of OTP.The method of the present application does not need to replace chip in test process, solves the problem of waste chip, and improves the stability of test;PC is controlled by relay to switch power supply, and test time is reduced.

Description

Technical Field

[0001] This invention belongs to the field of chip testing technology, specifically relating to a test method for chip startup function. Background Technology

[0002] With the continuous development of emerging industries, fields such as artificial intelligence, smart cars, 5G communications, and big data all require the use of various chips, making the chip industry's position increasingly prominent. After chip design and production are completed, how to effectively shorten the testing cycle, reduce testing costs, and get the chip to market as quickly as possible is a problem that chip design companies need to solve.

[0003] Chip testing includes chip boot function testing. The current chip boot function testing steps are as follows: 1. Use PC tools and a programming board to program the chip's OTP (one-time programmable) configuration; 2. Place the chip into the test development board; 3. Power on the test development board and start testing the chip boot function; 4. Manually check the test results.

[0004] The chip's boot function is handled by the boot program embedded in the chip's ROM, which cannot be modified once the chip is manufactured. The boot program has 10 functions, each controlled by a 1-bit OTP switch. Setting the corresponding bit of the OTP to 1 enables the function. Testing various combinations requires writing the chip's OTP 1024 times. Since OTP writing is irreversible, this method is extremely wasteful of chip resources. Changing the configuration requires manually repeating the above four steps, which is very time-consuming and may also cause problems such as poor contact and electrostatic discharge, further wasting testing time. Summary of the Invention

[0005] The purpose of this invention is to provide a method for testing the chip startup function, thereby solving the problems of wasting chips and time during the testing process.

[0006] The method of this invention is implemented using a PC, a development board, a boot program, and a relay.

[0007] The PC is the operating environment for the chip under test. It includes a configuration generation module, a Flash programming module, a relay control module, a receiving module, and a verification module. The configuration generation module generates a set of Flash configuration files for the chip's startup function. The Flash programming module connects to the development board's Flash memory and writes the configuration files into the Flash. The relay control module controls the power switch via relays. The receiving module waits for the test results from the development board, and the verification module reads the test results, verifies the results, and outputs a verification report.

[0008] The development board is the operating environment for the chip under test. A common development board is used, and the power supply, Flash, transmitting module, and chip under test are set up. After the power is turned on, the chip under test starts the boot program and sends the test results to the receiving module through the transmitting module.

[0009] The boot program of the chip under test is controlled by the corresponding bit of Flash and the corresponding bit of OTP. First, it checks whether the corresponding bit of OTP is 1. If the corresponding bit of OTP is 1, the test function is enabled. If the corresponding bit of OTP is 0, it checks whether the corresponding bit of Flash is 1. If the corresponding bit of Flash is 1, the test function is enabled. If it is 0, the test function is not enabled.

[0010] The power supply provides power to the chip under test, and the relay controls the switching of the power supply.

[0011] The specific testing process is as follows:

[0012] Step (1) Solder the chip under test to the development board;

[0013] Step (2) Based on the chip startup function, the configuration generation module generates a configuration file for the function and stores it on the PC;

[0014] Step (3) The PC reads the configuration file and writes it to the Flash of the development board through the Flash programming module;

[0015] Step (4) The PC reads the status of the Flash programming module. If programming is complete, the PC controls the relay to turn on the power and power on the development board. If programming is incomplete, the PC waits.

[0016] Step (5) The chip boot program on the development board runs;

[0017] Step (6) The Boot program reads the initial configuration file of the chip OTP. The content of the initial configuration file is 0.

[0018] Step (7) The Boot program reads the configuration file stored in Flash;

[0019] Step (8): If the configuration file of Flash read by the Boot program is 1, then perform the functional test; if it is 0, then end the test.

[0020] Step (9) The Boot program sends the test results to the receiving module of the PC through the sending module;

[0021] Step (10) The PC receiving module receives the test results, and the PC controls the relay to turn off the power through the relay control module;

[0022] Step (11) The PC's verification module reads the test results, verifies the results, outputs a verification report, and completes the functional test of this configuration file;

[0023] Step (12) returns to step (2), the configuration generation module generates a configuration file for a new function, and the above steps are repeated until all function configuration files are executed and a complete verification report is generated.

[0024] This invention replaces the existing OTP programming module with a Flash programming module, writing the configuration file into the development board's Flash memory. After a functional test of the chip under test is completed, the chip does not need to be replaced, effectively solving the problem of chip waste and improving test stability, avoiding issues such as poor contact and electrostatic discharge. Furthermore, this invention uses a PC to control a relay via a relay control module to switch the power on and off, replacing the manual control method in existing methods, saving manpower and reducing test time. Attached Figure Description

[0025] Figure 1 A flowchart illustrating the existing chip startup function testing method;

[0026] Figure 2 This is a flowchart illustrating the method of the present invention. Detailed Implementation

[0027] Existing chip startup function testing methods, such as Figure 1 As shown:

[0028] Step (1) Place the chip under test into the removable development board;

[0029] Step (2) Based on the chip startup function, the configuration generation module generates a configuration file for the function and stores it on the PC;

[0030] Step (3) The PC reads the configuration file and writes the configuration file to the OTP of the chip under test through the OTP programming module;

[0031] Step (4) Manually turn on the power switch to power on the development board;

[0032] Step (5) The chip boot program on the development board runs;

[0033] Step (6) The Boot program reads the chip's OTP configuration file;

[0034] If the configuration read by the Boot program in step (7) is 1, the functional test will be started; if the configuration read is 0, the functional test will not be started and the test will end.

[0035] Step (8) The test results are sent to the receiving module of the PC via the sending module;

[0036] Step (9) The PC receiving module receives the test results;

[0037] Step (10) The PC's verification module reads the test results, verifies the results, outputs a verification report, and completes the functional test of this configuration file;

[0038] Step (11) Remove the chip under test from the detachable development board, replace the chip under test, and generate a configuration file for a new function using the configuration generation module;

[0039] Step (12) Repeat steps (1) to (11) until all function configuration files are executed.

[0040] like Figure 2 As shown, the test method for the chip's boot function involves setting up a Flash programming module on the PC to replace the existing OTP programming module, and setting up a relay control module. The relay control module controls the power switch via a relay. The PC controls the relay switch through the relay control module based on the status of the Flash programming module. A standard development board is used instead of the existing removable development board, with Flash memory added to the board. The Flash memory is erasable and reprogrammable. The boot program for the chip under test is jointly controlled by corresponding bits in the Flash and OTP. First, it checks if the corresponding bit in the OTP is 1. If the corresponding bit in the OTP is 1, the test function is enabled; if the corresponding bit in the OTP is 0, it checks if the corresponding bit in the Flash is 1. If the corresponding bit in the Flash is 1, the test function is enabled; if it is 0, the test function is disabled.

[0041] The PC serves as the operating environment for the chip under test, and includes a configuration generation module, a Flash programming module, a relay control module, a receiving module, and a verification module. The configuration generation module generates a set of Flash configuration files for the chip's boot functions. The Flash programming module connects to the development board's Flash memory and writes the configuration files into the Flash. The relay control module controls the power switch via relays. The receiving module waits for the test results from the development board, and the verification module reads the test results, verifies the results, and outputs a verification report.

[0042] The development board serves as the operating environment for the chip under test (DUT). It sets up the power supply, Flash memory, transmitting module, and the DUT. After power-on, the DUT starts its boot program and sends the test results to the receiving module via the transmitting module.

[0043] The specific process is as follows:

[0044] Step (1) Solder the chip under test to the development board;

[0045] Step (2) Based on the chip startup function, the configuration generation module generates a configuration file for the function and stores it on the PC;

[0046] Step (3) The PC reads the configuration file and writes it to the Flash of the development board through the Flash programming module;

[0047] Step (4) The PC reads the status of the Flash programming module. If programming is complete, the PC controls the relay to turn on the power and power on the development board. If programming is incomplete, the PC waits.

[0048] Step (5) The chip boot program on the development board runs;

[0049] Step (6) The Boot program reads the initial configuration file of the chip OTP. The content of the initial configuration file is 0.

[0050] Step (7) The Boot program reads the configuration file stored in Flash;

[0051] Step (8): If the configuration file of Flash read by the Boot program is 1, then perform the functional test; if it is 0, then end the test.

[0052] Step (9) The Boot program sends the test results to the receiving module of the PC through the sending module;

[0053] Step (10) The PC receiving module receives the test results, and the PC controls the relay to turn off the power through the relay control module;

[0054] Step (11) The PC's verification module reads the test results, verifies the results, outputs a verification report, and completes the functional test of this configuration file;

[0055] Step (12) returns to step (2), the configuration generation module generates a configuration file for a new function, and the above steps are repeated until all function configuration files are executed and a complete verification report is generated.

Claims

1. A method for testing the startup function of a chip, characterized in that: This method is implemented using a PC, development board, boot program, and relays; The PC is the operating environment for the chip under test. It includes a configuration generation module, a Flash programming module, a relay control module, a receiving module, and a verification module. The configuration generation module generates a set of Flash configuration files for the chip's startup function. The Flash programming module connects to the development board's Flash memory and writes the configuration files into the Flash memory. The relay control module controls the power supply switch via relays; The receiving module waits for the test results from the development board, the verification module reads the test results, verifies the results, and outputs a verification report; The development board is the operating environment for the chip under test (DUT). It sets up the power supply, Flash memory, transmitting module, and the DUT. After the power is turned on, the DUT starts the boot program and sends the test results to the receiving module through the transmitting module. The boot program of the chip under test is controlled by the corresponding bit of Flash and the corresponding bit of OTP. First, it checks whether the corresponding bit of OTP is 1. If the corresponding bit of OTP is 1, the test function is enabled. If the corresponding bit of OTP is 0, it checks whether the corresponding bit of Flash is 1. If the corresponding bit of Flash is 1, the test function is enabled. If it is 0, the test function is not enabled. The power supply provides power to the chip under test, and the relay controls the switching of the power supply. The specific testing process is as follows: Step (1) Solder the chip under test to the development board; Step (2) Based on the chip startup function, the configuration generation module generates a configuration file for the function and stores it on the PC; Step (3) The PC reads the configuration file and writes it to the Flash of the development board through the Flash programming module; Step (4) The PC reads the status of the Flash programming module. If programming is complete, the PC controls the relay to turn on the power and power on the development board. If programming is incomplete, the PC waits. Step (5) The chip boot program on the development board runs; Step (6) The Boot program reads the initial configuration file of the chip OTP. The content of the initial configuration file is 0. Step (7) The Boot program reads the configuration file stored in Flash; Step (8): If the configuration file of Flash read by the Boot program is 1, then perform the functional test; if it is 0, then end the test. Step (9) The Boot program sends the test results to the receiving module of the PC through the sending module; Step (10) The PC receiving module receives the test results, and the PC controls the relay to turn off the power through the relay control module; Step (11) The PC's verification module reads the test results, verifies the results, outputs a verification report, and completes the functional test of this configuration file; Step (12) returns to step (2), the configuration generation module generates a configuration file for a new function, and the above steps are repeated until all function configuration files are executed and a complete verification report is generated.

2. The chip startup function testing method as described in claim 1, characterized in that: The development board used is a standard development board.

3. The chip startup function testing method as described in claim 1, characterized in that: The Flash memory is an erasable and rewritable memory.

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