Optical proximity correction method and system, mask, apparatus, and storage medium

Abstract

An optical proximity correction method and system, a mask, a device and a storage medium, the correction method comprising: providing an original layout layer, the original layout layer comprising parallelly arranged design patterns, along the arrangement direction of the design patterns, the opposite edges of adjacent design patterns being forbidden edges, the opposite edges of adjacent design patterns being non-forbidden edges, and the interval between adjacent design patterns having a minimum design rule value; adding a first compensation pattern adjacent to the non-forbidden edge on one side of the non-forbidden edge of adjacent design patterns; after adding the first compensation pattern, adding a second compensation pattern adjacent to the forbidden edge on one side of the forbidden edge of the design patterns, the adjacent design patterns, the first compensation pattern and the second compensation pattern forming corrected patterns, and along the arrangement direction of the design patterns, the interval between adjacent corrected patterns is greater than the minimum design rule value. The probability of the interval between adjacent corrected patterns being less than the minimum design rule value is reduced.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of semiconductor manufacturing, and in particular to an optical proximity correction method and system, mask, device and storage medium. BACKGROUND

[0002] In order to transfer the pattern from the mask to the surface of the silicon wafer, it is usually necessary to go through the exposure step, the developing step after the exposure step and the etching step after the developing step.

[0003] However, as the size of the device is becoming smaller and smaller, the difference between the pattern on the surface of the chip and the original mask pattern after the photolithography process is also increasing. In order to avoid the optical proximity effect causing the pattern on the chip to be inconsistent with the mask pattern, the current solution is usually to perform optical proximity correction (OPC) on the mask pattern, and then perform pattern transfer according to the corrected mask pattern.

[0004] However, the current optical proximity correction still has some defects and needs to be improved. SUMMARY

[0005] The problem solved by embodiments of the present application is to provide an optical proximity correction method and system, mask, device and storage medium, to improve the effect of optical proximity correction.

[0006] To solve the above problems, an optical proximity correction method is provided, comprising: providing an original layout layer, the original layout layer comprising parallelly arranged design patterns, along the arrangement direction of the design patterns, the opposite edges of adjacent design patterns being forbidden edges, the opposite edges of adjacent design patterns being non-forbidden edges, and the interval between adjacent design patterns having a minimum design rule value; adding a first compensation pattern adjacent to the non-forbidden edge on one side of the non-forbidden edge of adjacent design patterns; after adding the first compensation pattern, adding a second compensation pattern adjacent to the forbidden edge on one side of the forbidden edge of the design patterns, the adjacent design patterns, the first compensation pattern and the second compensation pattern forming a corrected pattern, and along the arrangement direction of the design patterns, the interval between adjacent corrected patterns being greater than the minimum design rule value.

[0007] Correspondingly, the embodiment of the present application further provides an optical proximity correction system, comprising: a raw layout layer providing module, providing a raw layout layer, the raw layout layer comprising design patterns arranged in parallel, along the arrangement direction of the design patterns, opposite edges of adjacent design patterns being forbidden edges, non-forbidden edges of adjacent design patterns being edges facing away from each other, and the interval between adjacent design patterns having a minimum design rule value; a first compensation pattern adding module, adding a first compensation pattern adjacent to the non-forbidden edge of the design pattern on one side of the non-forbidden edge; a second compensation pattern adding module, adding a second compensation pattern adjacent to the forbidden edge of the design pattern on one side of the forbidden edge, the design pattern, the first compensation pattern and the second compensation pattern adjacent to each other forming a corrected pattern, and along the arrangement direction of the design patterns, the interval between adjacent corrected patterns being greater than the minimum design rule value.

[0008] Correspondingly, the embodiment of the present application further provides a mask, comprising a pattern obtained by the optical proximity correction method provided by the embodiment of the present application.

[0009] Correspondingly, the embodiment of the present application further provides a device, comprising at least one memory and at least one processor, the memory storing one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the optical proximity correction method provided by the embodiment of the present application.

[0010] Correspondingly, the embodiment of the present application further provides a storage medium, the storage medium storing one or more computer instructions, the one or more computer instructions being used to implement the optical proximity correction method provided by the embodiment of the present application.

[0011] Compared with the prior art, the technical scheme of the embodiment of the present application has the following advantages:

[0012] The optical proximity correction method provided by the embodiment of the present application comprises the following steps: adding a first compensation pattern adjacent to a non-prohibited edge of a design pattern on the side of the non-prohibited edge of the design pattern; and adding a second compensation pattern adjacent to a prohibited edge of the design pattern on the side of the prohibited edge of the design pattern. The design pattern, the first compensation pattern and the second compensation pattern adjacent to each other form a modified pattern, and the interval between adjacent modified patterns along the arrangement direction of the design pattern is greater than the minimum design rule value. Compared with the prior art of forming compensation patterns on the side of the prohibited edge and the side of the non-prohibited edge of the design pattern, the embodiment of the present application adds the first compensation pattern adjacent to the non-prohibited edge of the design pattern on the side of the non-prohibited edge of the design pattern first, so that the first compensation pattern added on the non-prohibited edge of the design pattern meets the process requirement, then the second compensation pattern adjacent to the prohibited edge of the design pattern is added on the side of the prohibited edge of the design pattern, that is, the first compensation pattern is added on the side of the non-prohibited edge first, so that the overall size of the design pattern and the first compensation pattern can meet the pattern size requirement to the maximum extent, then the second compensation pattern is added on the side of the prohibited edge, that is, the pattern compensation on the side of the prohibited edge is adjusted locally, so that the modified pattern formed by the design pattern, the first compensation pattern and the second compensation pattern can meet the pattern size requirement, and meanwhile, the probability that the interval between adjacent modified patterns is less than the minimum design rule value is reduced, which is beneficial to reducing the probability of defects (for example, patterns exposed outside the lithography window) in the subsequent photolithography process. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a flowchart of an optical proximity correction method;

[0014] Figure 2 is a schematic diagram corresponding to an optical proximity correction method;

[0015] Figure 3 is a flowchart of an embodiment of the optical proximity correction method of the present application;

[0016] Figures 4 to 7 is a schematic diagram corresponding to each step in an embodiment of the optical proximity correction method of the present application;

[0017] Figure 8 is a functional block diagram of an embodiment of the optical proximity correction system of the present application;

[0018] Figure 9 is a hardware structure diagram of an embodiment of the device provided by the present application. DETAILED DESCRIPTION

[0019] The effect of optical proximity correction needs to be improved. The reasons why the effect of optical proximity correction needs to be improved are analyzed in combination with an optical proximity correction method.

[0020] Figure 1is a flowchart of an optical proximity correction method. Reference is made to Figure 2 , a schematic diagram corresponding to the optical proximity correction method is shown, the optical proximity correction method comprises:

[0021] Step s1: providing an original layout layer, the original layout layer comprises design patterns 10 arranged in parallel, along the arrangement direction of the design patterns 10, opposite edges of adjacent design patterns 10 are taken as forbidden edges 11, and edges of the adjacent design patterns 10 away from each other are taken as non-forbidden edges 15, and the interval between the adjacent design patterns 10 has a minimum design rule value d;

[0022] Step s2: simultaneously adding a first compensation pattern 13 adjacent to the non-forbidden edge 15 on one side of the non-forbidden edge 15 of the design pattern 10, and adding a second compensation pattern 12 adjacent to the forbidden edge 11 on one side of the forbidden edge 11 of the design pattern, and the adjacent design pattern 10, the first compensation pattern 13 and the second compensation pattern 12 constitute a modified pattern.

[0023] The pattern modified according to the optical proximity correction method usually has defects, such as Figure 2 As shown, the adjacent design patterns 10 have a forbidden space region (i.e. the minimum design rule value d), the forbidden space region is a design pattern in other layout layers, since the first compensation pattern 13 and the second compensation pattern 12 are formed at the same time, it is not easy to flexibly control the compensation amount corresponding to the second compensation pattern 12, accordingly, the probability that the interval between the adjacent design pattern 10, the first compensation pattern 13 and the second compensation pattern 12 constituting the modified pattern is less than the minimum design rule value d is increased, and the other design pattern structure in the forbidden space region is easily exposed from the lithography window formed by the modified pattern in the subsequent lithography process, and the probability of damage to the other design pattern structure is increased.

[0024] In order to solve the technical problem, an optical proximity correction method is provided in the embodiment of the present application. Reference is made to Figure 3 , a flowchart of an embodiment of the optical proximity correction method of the present application is shown.

[0025] In the embodiment, the optical proximity correction method comprises the following basic steps:

[0026] Step S1: providing an original layout layer, the original layout layer comprises design patterns arranged in parallel, along the arrangement direction of the design patterns, opposite edges of adjacent design patterns are taken as forbidden edges, and edges of the adjacent design patterns away from each other are taken as non-forbidden edges, and the interval between the adjacent design patterns has a minimum design rule value;

[0027] Step S2: adding a first compensation pattern adjacent to the non-prohibited edge on the side of the design pattern of the non-prohibited edge;

[0028] Step S3: after adding the first compensation pattern, adding a second compensation pattern adjacent to the prohibited edge on the side of the design pattern of the prohibited edge, the design pattern, the first compensation pattern and the second compensation pattern adjacent to each other constitute a modified pattern, and the interval between adjacent modified patterns along the arrangement direction of the design pattern is greater than the minimum design rule value.

[0029] In this embodiment, the first compensation pattern adjacent to the non-prohibited edge is added on the side of the non-prohibited edge first, so that the first compensation pattern added on the non-prohibited edge of the design pattern meets the process requirement, and then the second compensation pattern adjacent to the prohibited edge is added on the side of the prohibited edge, that is, the first compensation operation is performed on the side of the non-prohibited edge, so that the overall size of the design pattern and the first compensation pattern can meet the pattern size requirement to the maximum extent, and then the second compensation operation is performed on the side of the prohibited edge, that is, the compensation on the side of the prohibited edge is adjusted locally, so that the modified pattern composed of the design pattern, the first compensation pattern and the second compensation pattern can meet the pattern size requirement, and at the same time, the probability that the interval between adjacent modified patterns is less than the minimum design rule value is reduced, which is beneficial to reduce the probability of defects (such as patterns exposed outside the lithography window) in the subsequent photolithography process.

[0030] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0031] Figures 4 to 7 is a schematic diagram corresponding to each step in an embodiment of the optical proximity correction method of the present application.

[0032] Reference Figure 4 , step S1 is performed: providing an original layout layer 100, the original layout layer 100 includes design patterns 101 arranged in parallel, along the arrangement direction of the design patterns 101 (such as the X direction shown in Figure 4 , the opposite edges of adjacent design patterns 101 are regarded as prohibited edges 102, and the opposite edges of adjacent design patterns 101 are regarded as non-prohibited edges 103, and the interval between adjacent design patterns 101 has a minimum design rule value S2.

[0033] After the optical proximity correction of the design pattern 101, the modified pattern obtained is used to manufacture a mask, and then the photolithography process is performed by using the mask to form a corresponding target pattern on a wafer.

[0034] In this embodiment, the original image layer 100 includes a first direction (e.g., ... Figure 4 Extending along the Y direction (as shown) and along the second direction (as shown) Figure 4 Design graphic 101, arranged in parallel (as shown in the X direction).

[0035] In this embodiment, the design pattern 101 includes an etched opening pattern.

[0036] Specifically, etching opening patterns are used in the semiconductor device fabrication process to form etching windows. The etching windows expose the area in the semiconductor device where the patterned structure that needs to be etched away is located. In other words, etching opening patterns are used to define the area to be etched.

[0037] In this embodiment, a forbidden space region 105 is provided between adjacent design graphics 101. The forbidden space region 105 corresponds to the region where design graphics in other layers are located. To reduce the probability that a second compensation graphic, which is subsequently added to one side of the forbidden edge 102 of the design graphics 101 and is adjacent to the forbidden edge 102, will appear in the forbidden space region 105, the interval between adjacent design graphics 101 has a minimum design rule value S2. Accordingly, the width of the forbidden space region 105 is equal to the minimum design rule value S2.

[0038] In this embodiment, the non-prohibited edge 103 side of the design pattern 101 has a pre-designed first compensation value. In the subsequent process of adding the first compensation pattern to the non-prohibited edge 103 side of the design pattern 101, the compensation can be directly performed according to the pre-designed first compensation value.

[0039] In this embodiment, the forbidden edge 102 side of the design graphic 101 has a pre-designed second compensation value. The second compensation value is the maximum value of graphic compensation on the forbidden edge 102 side of the design graphic 101. In the subsequent process of adding the second compensation graphic on the forbidden edge 102 side of the design graphic 101, the second compensation value can be compared with the second compensation margin to obtain the actual compensation value of the second compensation graphic, thereby reducing the probability that the interval between adjacent corrected graphics is less than the minimum design rule value S2.

[0040] It should be noted that in this embodiment, there is a prohibited space region 105 between adjacent design patterns 101, and the prohibited space region 105 itself has a limited area range, such as... Figure 4 As shown, the size range of the prohibited space region 105 is S1 to S2.

[0041] Specifically, in the subsequent step of adding a first compensation graphic adjacent to the non-prohibited edge 103 on the side opposite to the design graphic 101, the minimum design rule value S2 is used as the main reference data for adding the first compensation graphic.

[0042] refer to Figure 5 Step S2: Add a first compensation graphic 106 adjacent to the non-prohibited edge 103 on the side of the non-prohibited edge 103 that is opposite to the adjacent design graphic 101.

[0043] Specifically, by adding a first compensation graphic 106 to the side of the non-prohibited edge 103 that is opposite to the adjacent design graphic 101, the initial corrected graphic formed by the first compensation graphic 106 and the design graphic 101 is aligned along the second direction (e.g., Figure 5 As the overall size in the X direction increases, the etching window of the initial corrected pattern formed by the first compensation pattern 106 and the design pattern 101 in the semiconductor device formation process becomes larger, reducing the difficulty of the etching process.

[0044] In this embodiment, the step of adding a first compensation graphic 106 on the side of the non-prohibited edge 103 that is opposite to the design graphic 101 includes: adding a first compensation graphic 106 adjacent to the non-prohibited edge 103 on the side of the design graphic 101 according to the first compensation value.

[0045] It should be noted that, in this embodiment, in the step of adding a first compensation graphic 106 adjacent to the non-prohibited edge 103 on the side opposite to the design graphic 101, the adjacent design graphic 101 and the first compensation graphic 106 constitute the initial corrected graphic.

[0046] In this embodiment, adjacent initially corrected graphics include adjacent first initially corrected graphics 108 and second initially corrected graphics 109.

[0047] In the subsequent step of obtaining the second compensation margin corresponding to each of the adjacent design graphics 101, the proportion of the second compensation margin in the first compensation margin needs to be determined based on the width of the initial corrected graphics. Therefore, the second compensation margin is affected by the width of the initial corrected graphics. By first forming the first compensation graphics 106, the width of the initial corrected graphics is fixed, so that the second compensation margin corresponding to the initial corrected graphics can be flexibly set later, which increases the accuracy of the second compensation margin and reduces the probability that the interval between adjacent corrected graphics is less than the minimum design rule value S2.

[0048] refer to Figure 6After executing step S3 and adding the first compensation graphic 106, a second compensation graphic 107 is added on one side of the prohibited edge 102 of the design graphic 101, which is adjacent to the prohibited edge 102. The adjacent design graphic 101, the first compensation graphic 106 and the second compensation graphic 107 constitute the corrected graphic, and the interval between adjacent corrected graphics along the arrangement direction of the design graphic 101 is greater than the minimum design rule value S2.

[0049] It should be noted that in this embodiment, by first adding a first compensation graphic 106 adjacent to the non-forbidden edge 103 on one side, the first compensation graphic 106 added to the non-forbidden edge 103 of the design graphic 101 meets the process requirements. Then, a second compensation graphic 107 adjacent to the forbidden edge 102 is added on one side. That is, by first performing graphic compensation on the non-forbidden edge 103 side, the overall size of the design graphic 101 and the first compensation graphic 106 can meet the graphic size requirements to the maximum extent. Then, another graphic compensation operation is performed on the forbidden edge 102 side, that is, the graphic compensation on the forbidden edge 102 side is locally adjusted so that the corrected graphic composed of the design graphic 101, the first compensation graphic 106 and the second compensation graphic 107 can meet the graphic size requirements. At the same time, it also reduces the probability that the interval between adjacent corrected graphics is less than the minimum design rule value S2, which is beneficial to reduce the probability of defects (e.g., graphics exposed outside the photolithography window) in the subsequent photolithography process.

[0050] Continue to refer to Figure 6 and in conjunction with references Figure 7 , Figure 7 yes Figure 3 The flowchart of each step in step S3 provides a detailed explanation of the step of adding a second compensation graphic 107 adjacent to the prohibited edge 102 on one side of the prohibited edge 102 of the design graphic 101.

[0051] Execute step S31 to obtain the difference between the actual interval S between adjacent design patterns 101 and the minimum design rule value S2, as the first compensation margin.

[0052] The first compensation margin is the maximum total compensation amount for graphic compensation on one side of the prohibited edge 102 of the adjacent design graphic 101. By first obtaining the first compensation margin, in the subsequent step of adding the second compensation graphic 107 on one side of the prohibited edge 102 of the adjacent design graphic 101, the probability that the size of the second compensation graphic 107 exceeds the first compensation margin can be reduced. Correspondingly, the probability that the interval between adjacent second compensation graphics 107 is less than the minimum design rule value S2 is also reduced.

[0053] Perform step S32 to obtain the width of the initially corrected graphic.

[0054] Specifically, the proportion of the size of the second compensation graphic 107 corresponding to each of the adjacent design graphics 101 in the first compensation margin needs to be determined based on the width of the initially corrected graphics. In order to obtain an accurate second compensation margin in the future, it is necessary to first obtain the width of the initially corrected graphics to improve the accuracy of the second compensation margin.

[0055] Understandably, the order of steps S31 and S32 can be reversed.

[0056] In step S33, the width of the first compensation graphic 106 corresponding to the adjacent design graphic 101 and the first compensation margin are used to obtain the second compensation margin corresponding to each of the adjacent design graphics 101.

[0057] When determining the second compensation margin, the width of the first compensation graphic 106 and the first compensation margin are taken into account. This allows the second compensation margin to be set reasonably according to the actual situation, thereby making it easier to reduce the probability that the interval between adjacent corrected graphics is less than the minimum design rule value S2 while ensuring that the width of the corrected graphic meets the requirements.

[0058] In this embodiment, the step of obtaining the second compensation margin corresponding to each of the adjacent design graphics 101 using the width of the first compensation graphics 106 corresponding to the adjacent design graphics 101 and the first compensation margin includes: allocating the second compensation margin to the adjacent design graphics 101 using the first compensation margin, and the proportion of the second compensation margin is determined according to the width of the corresponding initially corrected graphics.

[0059] The width of the initial corrected graphic will affect the width of the corrected graphic. Therefore, the proportion of the second compensation margin is determined according to the width of the corresponding initial corrected graphic, so that the second compensation margin corresponding to each initial corrected graphic can be reasonably set based on the width of the initial corrected graphic.

[0060] In step S34, according to the corresponding second compensation margin, a second compensation pattern 107 adjacent to the prohibited edge 102 is added to one side of the prohibited edge 102 of the design pattern 101.

[0061] In this embodiment, the step of adding a second compensation graphic 107 adjacent to the prohibited edge 102 on one side of the prohibited edge 102 of the design graphic 101 according to the corresponding second compensation margin includes: comparing the second compensation margin of each of the initial corrected graphics with the corresponding second compensation value; when the second compensation margin is greater than the second compensation value, adding a second compensation graphic adjacent to the prohibited edge on one side of the prohibited edge of the design graphic according to the second compensation value; when the second compensation margin is less than the second compensation value, adding a second compensation graphic adjacent to the prohibited edge on one side of the prohibited edge of the design graphic according to the second compensation margin.

[0062] Since the second compensation value is the maximum value of the graphic compensation operation performed on the prohibited edge 102 side of the design graphic 101, and the second compensation margin is the optimal value of the second compensation graphic 107 added on the prohibited edge 102 side of the design graphic 101 (this optimal value is to reduce the interval between adjacent modified graphics to be less than the minimum design rule value), when the second compensation value is greater than the optimal value, the optimal value is directly used as the compensation amount of the second compensation graphic, and when the second compensation value is less than the optimal value, the second compensation value is directly used as the compensation amount of the second compensation graphic.

[0063] In this embodiment, the second compensation margin of the first initially corrected graphic 108 is: The second compensation margin of the second initially corrected figure 109 is Wherein, W1 represents the width of the first initially corrected graphic 108; W2 represents the width of the second initially corrected graphic 109; S represents the actual interval between adjacent design graphics; and S2 represents the minimum design rule value.

[0064] It should be noted that the second compensation margin of the first initially corrected pattern 108 is affected by the width of the second initially corrected pattern 109. The larger the proportion of the width of the second initially corrected pattern 109 in the total width of the adjacent initially corrected patterns, the smaller the compensation amount required for pattern compensation on the corresponding forbidden edge 102 side of the second initially corrected pattern 109. Consequently, the second compensation margin of the first initially corrected pattern 108 is larger, and the second compensation margin of the second initially corrected pattern 109 is smaller. This helps to improve the width consistency of adjacent corrected patterns, and thus ensures that the etching process windows formed by the corrected patterns are consistent in the semiconductor device fabrication process, thereby improving etching accuracy.

[0065] For similar reasons, the larger the proportion of the width of the first initially corrected graphic 108 in the total width of the adjacent initially corrected graphics, the larger the second compensation margin of the second initially corrected graphic 109, and correspondingly, the smaller the second compensation margin of the first initially corrected graphic.

[0066] Accordingly, the present invention also provides an optical proximity correction system. Figure 8 This is a functional block diagram of an embodiment of the optical proximity correction system of the present invention.

[0067] In this embodiment, the optical proximity correction system 500 includes: an original pattern layer providing module 501, which provides an original pattern layer, the original pattern layer including parallel design graphics, wherein along the arrangement direction of the design graphics, the opposite edges of adjacent design graphics are designated as prohibited edges, and the opposite edges of adjacent design graphics are designated as non-prohibited edges, and the interval between adjacent design graphics has a minimum design rule value; a first compensation graphic adding module 502, which adds a first compensation graphic adjacent to the non-prohibited edge on the opposite side of the adjacent design graphics; and a second compensation graphic adding module 503, which adds a second compensation graphic adjacent to the prohibited edge on the prohibited edge side of the design graphics, the adjacent design graphics, the first compensation graphic and the second compensation graphic constitute the corrected graphics, and along the arrangement direction of the design graphics, the interval between adjacent corrected graphics is greater than the minimum design rule value.

[0068] The original layer provides the design graphic provided by module 501, which is the graphic that needs to be transferred to the wafer. After optical proximity correction is performed on the design graphic, the obtained graphic is used to make a mask, and then the photolithography process is performed on the mask to form the corresponding target graphic on the wafer.

[0069] In this embodiment, the original layout layer includes design graphics that extend along a first direction and are arranged in parallel along a second direction.

[0070] In this embodiment, the design pattern includes an etched opening pattern.

[0071] Specifically, the process window pattern is used in the semiconductor device fabrication process to form an etching process window, exposing the pattern structure in the semiconductor device that needs to be etched away.

[0072] In this embodiment, there is a forbidden space region between adjacent design graphics. The forbidden space region is a design graphic in other layout layers. In order to reduce the probability that a second compensation graphic, which is added to one side of the forbidden edge of the design graphic and is adjacent to the forbidden edge, will appear in the forbidden space region, the interval between adjacent design graphics has a minimum design rule value.

[0073] In this embodiment, the non-prohibited side of the design graphic has a pre-designed first compensation value. During the process of adding the first compensation graphic to the non-prohibited side of the design graphic, compensation can be performed directly according to the pre-designed first compensation value.

[0074] In this embodiment, the prohibited side of the design graphic has a pre-designed second compensation value. The second compensation value is the maximum value of graphic compensation on the prohibited side of the design graphic. In the subsequent process of adding the second compensation graphic on the prohibited side of the design graphic, the second compensation value can be compared with the second compensation margin to obtain the actual compensation value of the second compensation graphic, thereby reducing the probability that the interval between adjacent corrected graphics is less than the minimum design rule value.

[0075] The first compensation pattern adding module 502 is used to increase the overall size of the corrected pattern formed by the first compensation pattern and the design pattern along the second direction. Correspondingly, the etching process window of the initial corrected pattern formed by the first compensation pattern and the design pattern in the semiconductor device forming process is increased, reducing the difficulty of the etching process.

[0076] In this embodiment, according to the first compensation value, a first compensation graphic adjacent to the non-prohibited edge is added to one side of the design graphic.

[0077] It should be noted that, in this embodiment, in the step of adding a first compensation graphic adjacent to the non-prohibited edge on one side of the design graphic, the adjacent design graphic and the first compensation graphic constitute the initial corrected graphic.

[0078] In this embodiment, adjacent initially corrected graphics include a first initially corrected graphic and a second initially corrected graphic.

[0079] In the subsequent process of obtaining the second compensation margin corresponding to each of the adjacent design graphics, the proportion of the second compensation margin in the first compensation margin needs to be determined based on the width of the initial corrected graphics. Therefore, the second compensation margin is affected by the width of the initial corrected graphics. By first forming the first compensation graphics, the width of the initial corrected graphics is fixed, so that the second compensation margin corresponding to the initial corrected graphics can be flexibly set later, which increases the accuracy of the second compensation margin and reduces the probability that the interval between adjacent corrected graphics is less than the minimum design rule value.

[0080] The second compensation graphic addition module 503 is used to make the second compensation graphic, the design graphic and the first compensation graphic constitute a corrected graphic, and along the arrangement direction of the design graphic, the interval between adjacent corrected graphics is greater than the minimum design rule value.

[0081] It should be noted that in this embodiment, by first adding a first compensation graphic adjacent to the non-prohibited edge on the non-prohibited edge side, the first compensation graphic added to the non-prohibited edge of the design graphic meets the process requirements. Then, a second compensation graphic adjacent to the prohibited edge is added on the prohibited edge side. That is, by first performing graphic compensation on the non-prohibited edge side, the overall size of the corrected graphic formed by the design graphic and the first compensation graphic can meet the graphic size requirements to the greatest extent. Then, a graphic compensation operation is performed again on the prohibited edge side, that is, the graphic compensation on the prohibited edge side is locally adjusted, so that the corrected graphic formed by the design graphic, the first compensation graphic and the second compensation graphic can meet the graphic size requirements. At the same time, it also reduces the probability that the interval between adjacent corrected graphics is less than the minimum design rule value, which helps to reduce the probability of defects (e.g., the graphic exposed outside the photolithography process window) in subsequent photolithography processes.

[0082] A detailed explanation is provided regarding the addition of a second compensation graphic adjacent to the prohibited edge on one side of the design graphic.

[0083] The second compensation graphic addition module 503 includes: a first compensation margin acquisition unit (not shown), used to acquire the difference between the actual interval between adjacent design graphics and the minimum design rule value, as the first compensation margin.

[0084] The first compensation margin is the maximum total compensation amount for graphic compensation on one side of the prohibited edge of the adjacent design graphic. By first obtaining the first compensation margin, and then adding a second compensation graphic on one side of the prohibited edge of the adjacent design graphic, the probability that the size of the second compensation graphic exceeds the first compensation margin can be reduced. Correspondingly, the probability that the interval between adjacent second compensation graphics is less than the minimum design rule value is also reduced.

[0085] The second compensation graphic addition module 503 further includes a width acquisition unit (not shown), used to acquire the width of the initially corrected graphic.

[0086] Specifically, the proportion of the size of the second compensation graphic corresponding to each of the adjacent design graphics in the first compensation margin needs to be determined based on the width of the initially corrected graphic. In order to obtain an accurate second compensation margin later, it is necessary to first obtain the width of the initially corrected graphic to improve the accuracy of the second compensation margin.

[0087] The second compensation graphic addition module 503 further includes: a second compensation margin acquisition unit (not shown), used to acquire the second compensation margin corresponding to each of the adjacent design graphics by using the width of the first compensation graphic corresponding to the adjacent design graphics and the first compensation margin.

[0088] When determining the second compensation margin, the width of the first compensation graphic and the first compensation margin are taken into account. This allows for a reasonable setting of the second compensation margin based on the actual situation. Consequently, it is easier to ensure that the width of the subsequently corrected graphic meets the requirements while reducing the probability that the interval between adjacent corrected graphics is less than the minimum design rule value.

[0089] Specifically, the second compensation margin acquisition unit uses the first compensation margin to allocate the second compensation margin to adjacent design patterns, and the proportion of the second compensation margin is determined according to the width of the corresponding initially corrected pattern.

[0090] The second compensation graphic addition module 503 further includes: a graphic addition unit (not shown), used to add a second compensation graphic adjacent to the prohibited edge on one side of the design graphic according to the corresponding second compensation margin.

[0091] In this embodiment, the graphic addition unit includes: a comparison subunit, used to compare the second compensation margin of each of the initial corrected graphics with the corresponding second compensation value; and a graphic addition subunit, used to add a second compensation graphic adjacent to the prohibited edge on one side of the design graphic according to the second compensation value when the second compensation margin is greater than the second compensation value, and used to add a second compensation graphic adjacent to the prohibited edge on one side of the design graphic according to the second compensation margin when the second compensation margin is less than the second compensation value.

[0092] Since the second compensation value is the maximum value of the graphic compensation operation performed on the prohibited side of the design graphic, and the second compensation margin is the optimal value of the second compensation graphic added to the prohibited side of the design graphic (this optimal value is to reduce the interval between adjacent modified graphics to be less than the minimum design rule value), therefore, when the second compensation value is greater than the optimal value, the optimal value is directly used as the compensation amount of the second compensation graphic, and when the second compensation value is less than the optimal value, the second compensation value is directly used as the compensation amount of the second compensation graphic.

[0093] The second compensation margin of the first initially corrected graphic is The second compensation margin of the second initially corrected graphic is Wherein, W1 represents the width of the first initially corrected graphic; W2 represents the width of the second initially corrected graphic; S represents the actual interval between adjacent design graphics; and S2 represents the minimum design rule value.

[0094] It should be noted that the second compensation margin of the first initially corrected pattern is affected by the width of the second initially corrected pattern. The larger the proportion of the width of the second initially corrected pattern in the total width of the adjacent initially corrected patterns, the smaller the compensation requirement for pattern compensation on the corresponding forbidden edge side of the second initially corrected pattern. Consequently, the second compensation margin of the first initially corrected pattern is larger, and the second compensation margin of the second initially corrected pattern is smaller. This helps to improve the width consistency of adjacent corrected patterns, and thus ensures that the etching process windows formed by the corrected patterns are consistent in the semiconductor device fabrication process, thereby improving etching accuracy.

[0095] For similar reasons, the larger the proportion of the width of the first initially corrected graphic in the total width of the adjacent initially corrected graphics, the larger the second compensation margin of the second initially corrected graphic, and correspondingly, the smaller the second compensation margin of the first initially corrected graphic.

[0096] Accordingly, the present invention also provides a photomask, comprising: a pattern obtained using the optical proximity correction method provided in the embodiments of the present invention.

[0097] As can be seen from the foregoing embodiments, the embodiments of the present invention first add a first compensation graphic adjacent to the non-forbidden edge on the non-forbidden edge side, so that the first compensation graphic added to the non-forbidden edge of the design graphic meets the process requirements. Then, a second compensation graphic adjacent to the forbidden edge is added on the forbidden edge side. That is, by first performing graphic compensation on the non-forbidden edge side, the size of the corrected graphic formed by the design graphic and the first compensation graphic can meet the graphic size requirements to the greatest extent. Then, a graphic compensation operation is performed again on the forbidden edge side, that is, the graphic compensation on the forbidden edge side is locally adjusted, so that the corrected graphic formed by the design graphic, the first compensation graphic and the second compensation graphic can meet the graphic size requirements. At the same time, it also reduces the probability that the interval between adjacent corrected graphics is less than the minimum design rule value, which is beneficial to reduce the probability of defects (e.g., the graphic exposed outside the photolithography process window) in subsequent photolithography processes.

[0098] This invention also provides a device that can implement the optical proximity correction method provided in this invention by loading a program, as described above. An optional hardware structure of the terminal device provided in this invention can be as follows: Figure 9 As shown, it includes: at least one processor 01, at least one communication interface 02, at least one memory 03, and at least one communication bus 04.

[0099] In this embodiment, the number of processor 01, communication interface 02, memory 03, and communication bus 04 is at least one, and the processor 01, communication interface 02, and memory 03 communicate with each other through communication bus 04. Communication interface 02 can be an interface of a communication module for network communication, such as the interface of a GSM module. Processor 01 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention. Memory 03 may include high-speed RAM and may also include non-volatile memory (NVM), such as at least one disk storage device. Memory 03 stores one or more computer instructions, which are executed by processor 01 to implement the optical proximity correction method provided in this embodiment of the present invention.

[0100] It should be noted that the aforementioned terminal device may also include other devices (not shown) that may not be essential to understanding the content disclosed in the embodiments of the present invention; given that these other devices may not be essential for understanding the content disclosed in the embodiments of the present invention, the embodiments of the present invention will not describe them one by one.

[0101] This invention also provides a storage medium storing one or more computer instructions for implementing the optical proximity correction method provided in this invention.

[0102] Embodiments of the present invention can be implemented by various means, such as hardware, firmware, software, or combinations thereof. In a hardware configuration, the method according to an exemplary embodiment of the present invention can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, etc. In a firmware or software configuration, embodiments of the present invention can be implemented in the form of modules, processes, functions, etc. Software code can be stored in memory units and executed by a processor. The memory units are located inside or outside the processor and can send data to and receive data from the processor via various known means.

[0103] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. An optical proximity correction method, characterized in that, include: An original layout layer is provided, which includes parallel design graphics. Along the layout direction of the design graphics, the opposite edges of adjacent design graphics are designated as prohibited edges, and the opposite edges of adjacent design graphics are designated as non-prohibited edges. The interval between adjacent design graphics has a minimum design rule value. Add a first compensation graphic adjacent to the non-prohibited edge on the side of the adjacent design graphic that is opposite to it; After adding the first compensation graphic, a second compensation graphic adjacent to the prohibited edge is added to one side of the prohibited edge of the design graphic. The adjacent design graphic, the first compensation graphic and the second compensation graphic constitute the corrected graphic, and the interval between adjacent corrected graphics is greater than the minimum design rule value along the arrangement direction of the design graphic.

2. The optical proximity correction method as described in claim 1, characterized in that, The non-prohibited side of the design graphic has a pre-designed first compensation value; The step of adding a first compensation graphic to the non-prohibited side of the design graphic includes: adding a first compensation graphic adjacent to the non-prohibited side of the design graphic according to the first compensation value.

3. The optical proximity correction method as described in claim 1, characterized in that, The step of adding a second compensation graphic adjacent to the prohibited edge on one side of the design graphic includes: The difference between the actual interval between adjacent design graphics and the minimum design rule value is obtained as the first compensation margin. Using the width of the first compensation graphic corresponding to the adjacent design graphic and the first compensation margin, the second compensation margin corresponding to each of the adjacent design graphics is obtained; Based on the corresponding second compensation margin, a second compensation graphic adjacent to the prohibited edge is added to one side of the prohibited edge of the design graphic.

4. The optical proximity correction method as described in claim 3, characterized in that, In the step of adding a first compensation graphic adjacent to the non-prohibited edge on one side of the design graphic, the adjacent design graphic and the first compensation graphic constitute the initial corrected graphic; The step of adding a second compensation graphic adjacent to the prohibited edge on one side of the design graphic further includes: obtaining the width of the initial corrected graphic before obtaining the second compensation margin corresponding to the adjacent design graphics; The step of obtaining the second compensation margin corresponding to each of the adjacent design graphics using the width of the first compensation graphic corresponding to the adjacent design graphics and the first compensation margin includes: allocating the second compensation margin to the adjacent design graphics using the first compensation margin, and the proportion of the second compensation margin is determined according to the width of the corresponding initially corrected graphic.

5. The optical proximity correction method as described in claim 3 or 4, characterized in that, The prohibited side of the design graphic has a pre-designed second compensation value; The step of adding a second compensation graphic adjacent to the prohibited edge on one side of the prohibited edge of the design graphic according to the corresponding second compensation margin includes: comparing the second compensation margin of each of the initial corrected graphics with the corresponding second compensation value; When the second compensation margin is greater than the second compensation value, a second compensation graphic adjacent to the prohibited edge is added to one side of the prohibited edge of the design graphic according to the second compensation value. When the second compensation margin is less than the second compensation value, a second compensation graphic adjacent to the prohibited edge is added to one side of the prohibited edge of the design graphic according to the second compensation margin.

6. The optical proximity correction method as described in claim 5, characterized in that, In the step of adding a first compensation graphic adjacent to the non-prohibited edge of the design graphic, the adjacent design graphic and the first compensation graphic constitute an initial corrected graphic, and the adjacent initial corrected graphics include a first initial corrected graphic and a second initial corrected graphic. The second compensation margin of the first initial corrected graphic is... The second compensation margin of the second initially corrected graphic is Wherein, W1 represents the width of the first initially corrected graphic; W2 represents the width of the second initially corrected graphic; S represents the actual interval between adjacent design graphics; and S2 represents the minimum design rule value.

7. The optical proximity correction method as described in claim 1, characterized in that, The design pattern includes an etched opening pattern.

8. An optical proximity correction system, characterized in that, include: The original layout layer provides an original layout layer, which includes parallel design graphics. Along the layout direction of the design graphics, the opposite edges of adjacent design graphics are designated as prohibited edges, and the opposite edges of adjacent design graphics are designated as non-prohibited edges. The spacing between adjacent design graphics has a minimum design rule value. The first compensation graphic addition module is used to add a first compensation graphic adjacent to the non-prohibited edge on one side of the design graphic. The second compensation graphic addition module adds a second compensation graphic adjacent to the prohibited edge on one side of the design graphic. The adjacent design graphic, the first compensation graphic, and the second compensation graphic constitute the corrected graphic. Along the arrangement direction of the design graphic, the interval between adjacent corrected graphics is greater than the minimum design rule value.

9. A photomask, characterized in that, include: The image obtained using the optical proximity correction method as described in any one of claims 1-7.

10. A device, characterized in that, It includes at least one memory and at least one processor, the memory storing one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the optical proximity correction method as described in any one of claims 1-7.

11. A storage medium, characterized in that, The storage medium stores one or more computer instructions for implementing the optical proximity correction method as described in any one of claims 1-7.

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