Deterministic Analysis Method for Data Conversion Scheduling in Remote Data Interface Unit

By building an RDIU data transformation model and combining network calculation and code analysis, the gap in deterministic analysis of RDIU data transformation scheduling is solved, and the deterministic analysis of ARINC825 and ARINC429 buses is realized, which improves the accuracy and flexibility of network performance evaluation.

CN116567101BActive Publication Date: 2025-08-19CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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Patent Information

Application Number
CN202310386357.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-12
Publication Date
2025-08-19
Estimated Expiration
2043-04-12

AI Technical Summary

Technical Problem

The prior art lacks effective methods to analyze the certainty of data conversion scheduling in remote data interface units (RDIUs) in avionics systems, and cannot accurately calculate communication delays and network performance.

Method used

By constructing an RDIU data conversion model, combining network calculation and code analysis and evaluation methods, the maximum delay, jitter and backlog of message conversion is calculated, and the modeling and analysis of ARINC825 and ARINC429 buses are established to realize deterministic analysis of data frames.

Benefits of technology

Fill in the gap in RDIU data conversion scheduling deterministic analysis, provide the worst-case delay and backlog of data frames, reduce hardware simulation costs, and improve network configuration and design flexibility and accuracy.

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Abstract

This invention discloses a deterministic analysis method for data conversion scheduling in a remote data interface unit (RDIU). The method includes: 1) parsing the RDIU configuration file to obtain RDIU configuration parameters; 2) establishing an RDIU data conversion model based on the RDIU configuration parameters; and 3) superimposing network calculations and code analysis and evaluation on the constructed RDIU data conversion model to determine the maximum message conversion delay, maximum message conversion jitter, and maximum data backlog at the RDIU output port. This method can model, analyze, and calculate different data conversion types under different configuration tables, determining the worst-case delay and backlog after RDIU data conversion, thus filling a gap in deterministic analysis.
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Description

Technical Field

[0001] The present invention belongs to the field of network analysis, relates to a performance study of an aviation network, and in particular to a data conversion scheduling deterministic analysis method of a remote data interface unit. Background Art

[0002] Currently, network communication technology is rapidly developing in fields such as avionics systems and manufacturing. Integrated avionics systems utilize remote data interface units (RDIUs) to convert data frames between secondary bus protocols such as ARINC 825 and ARINC 429, as well as to convert data frames from these secondary buses to the ARINC 664 backbone network, forming the basis of avionics systems. Analyzing the RDIU's data forwarding strategy can determine the latency of inter-network data communication within the airborne network, enabling deterministic analysis and supporting end-to-end latency assessment. Summary of the Invention

[0003] The present invention aims to provide a deterministic analysis method for data conversion scheduling in a remote data interface unit (RDIU). By studying the RDIU data forwarding strategy and constructing a forwarding model, the method calculates parameters such as communication delay and bandwidth to provide an upper bound on the data conversion delay for data frames. Furthermore, the ARINC825 and ARINC429 secondary buses are modeled to analyze the performance of data frames converted by the RDIU after passing through the secondary buses. Using network calculation analysis and code analysis and evaluation methods, the present invention implements deterministic analysis of data frame conversion from the ARINC825 bus to the ARINC429 bus via the RDIU, and vice versa, providing a practical and effective method for evaluating inter-network conversions.

[0004] The object of the present invention is achieved through the following technical solutions:

[0005] A method for deterministically analyzing data conversion scheduling of a remote data interface unit (RDIU) includes the following steps:

[0006] 1) Parse the RDIU configuration file to obtain RDIU configuration parameters;

[0007] 2) Establish RDIU data conversion model according to RDIU configuration parameters. The internal conversion scheduling of RDIU data conversion model is as follows: the receiving process is based on the master control polling cycle q cpuPolling DSP, read the message received from the physical link, parse and temporarily store it in the receive buffer; the conversion process is to query the protocol conversion configuration table, take the data from the receive buffer and assemble it into the corresponding target protocol message frame and temporarily store it in the transmit buffer; the transmit process is to periodically send the message frame corresponding to the transmit buffer to the secondary bus or backbone network;

[0008] 3) Based on the constructed RDIU data conversion model, network calculation and code analysis and evaluation are superimposed to obtain:

[0009] The maximum delay of RDIU message conversion is:

[0010] MaxLatency RDIU =q receive +τ route +q send

[0011] Among them, q receive DSP message receiving cycle for reading message data from each port; send is the message sending period for sending messages to each port; τ route The delay caused by protocol conversion software, logic, and hardware;

[0012] The maximum jitter of RDIU message conversion is:

[0013] MaxJitter RDIU =MaxLatency RDIU -τ route

[0014] The maximum data backlog at the RDIU output port is:

[0015] MaxBacklog RDIU =V send ×MaxLatency RDIu

[0016] Among them, V send The message sending rate.

[0017] Preferably, it also includes:

[0018] T825-1) Parse the configuration file of the ARINC825 terminal to obtain the ARINC825 terminal node configuration parameters that need to be converted by RDIU;

[0019] T825-2) Establishing an ARINC825 terminal sending model based on ARINC825 terminal node configuration parameters, reflecting the generation of data frames from messages, high and low priority scheduling of messages, and queuing of data frames at the sending port;

[0020] T825-3) Based on the ARINC825 terminal transmission model, the superimposed network calculation method is obtained:

[0021] Message flow arrival curve:

[0022]

[0023] in, Indicates ARINC825 message M i The maximum frame length, Indicates message M i The sending cycle, t represents the time variable;

[0024] If there are m high-priority messages in the ARINC825 terminal node, and n of them have the same priority as the current message, then r Mi Indicates the maximum rate at which data flows of different priorities are sent, b Mi Indicates the maximum data frame of data streams of different priorities, and the bus rate is C. Then the equivalent service curve of the current message flow is:

[0025]

[0026] Among them, C -M Indicates the remaining service capacity after the sending port is allocated to high-priority traffic, that is:

[0027]

[0028] Indicates the total service capacity occupied by other traffic of the same priority, that is:

[0029]

[0030] B -M Represents the sum of high-priority data frames plus the largest low-priority data frame, that is:

[0031]

[0032] Represents the sum of other data frames with the same priority, that is:

[0033]

[0034] The maximum lateral distance based on the message arrival curve and service curve Get the service delay, that is:

[0035]

[0036] The maximum vertical deviation from the message arrival curve and service curve Get the maximum data backlog of the message in the ARINC825 terminal buffer, that is:

[0037]

[0038] The maximum jitter is:

[0039]

[0040] Among them, b Mi is the current message length, and C is the bus rate.

[0041] Preferably, it also includes:

[0042] R825-1) Parse the configuration file of the ARINC825 terminal to obtain the ARINC825 terminal node configuration parameters that need to be converted by RDIU;

[0043] R825-2) Establish an ARINC825 terminal receiving model based on the ARINC825 terminal node configuration parameters, reflecting the process of data frames being received, stored, and sent to the application layer at the receiving port;

[0044] R825-3) According to the ARINC825 terminal receiving model, the ARINC825 bus receiving delay is obtained by superimposing the network calculation as the data processing technology delay τ A825Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

[0045] Preferably, it also includes:

[0046] T429-1) Parse the configuration file of the ARINC429 terminal to obtain the ARINC429 terminal node configuration parameters that need to be converted by RDIU;

[0047] T429-2) Establishing an ARINC429 terminal sending model based on ARINC429 terminal node configuration parameters, reflecting data frame generation from messages, message scheduling, and data frame queuing at the sending port;

[0048] T429-3) Based on the ARINC429 terminal transmission model and network calculation, the maximum delay is:

[0049]

[0050] Where N is the number of ports on the ARINC429 terminal node that send data to the RDIU, LARINC429Msg is the maximum message length of ARINC429, and Vsend is the message sending rate;

[0051] The maximum backlog is:

[0052] MaxBacklogA429 =V send ×MaxLatency A429

[0053] The maximum jitter is

[0054]

[0055] Preferably, it also includes:

[0056] R429-1) Parse the configuration file of the ARINC429 terminal to obtain the ARINC429 terminal node configuration parameters that need to be converted by RDIU;

[0057] R429-2) Establish an ARINC429 terminal reception model based on the ARINC429 terminal node configuration parameters, reflecting the process of data frame reception and storage at the receiving port, providing a basis for the subsequent deterministic analysis of terminal reception.

[0058] R429-3) According to the ARINC429 terminal receiving model, the receiving delay is obtained by superimposing the network calculation to obtain the data processing technology delay τ A429Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

[0059] The beneficial effects of the present invention are:

[0060] 1. For the first time, a deterministic analysis method based on RDIU data conversion scheduling is proposed. This method can effectively calculate the worst-case delay and backlog of data after passing through the secondary buses ARINC825 and ARINC429 and then through RDIU data conversion, filling the gap in this research.

[0061] 2. Use network calculation methods to analyze and model the ARINC825 and ARINC429 buses. In the ARINC825 bus modeling analysis, the delay, backlog, and jitter of high and low priority data frames passing through the bus are analyzed to obtain the worst-case network performance analysis.

[0062] 3. By extracting and analyzing different configuration parameters, the flexibility and diversity of RDIU data conversion scheduling are increased, and different data conversion types under different configuration tables can be modeled, analyzed and calculated.

[0063] 4. This deterministic analysis method can effectively reduce hardware simulation costs and plays a vital role in the current network configuration results and RDIU product design and verification work. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 Overall functional architecture diagram of the deterministic analysis method for RDIU data conversion scheduling.

[0065] Figure 2 This is the logic diagram of RDIU message conversion.

[0066] Figure 3 Schematic diagram of RDIU internal conversion scheduling.

[0067] Figure 4 Schematic diagram of the conversion logic between ARINC429 messages and ARINC825 messages.

[0068] Figure 5 This is a schematic diagram of the ARINC825 bus logic structure.

[0069] Figure 6 This is a structural diagram of the ARINC825 terminal node.

[0070] Figure 7 This is the UML relationship diagram of the ARINC825 bus.

[0071] Figure 8 Send model schematic for ARINC825 terminal.

[0072] Figure 9 This is a schematic diagram of the ARINC825 terminal receiving model.

[0073] Figure 10 This is a schematic diagram of the ARINC429 bus structure.

[0074] Figure 11 This is a schematic diagram of the ARINC429 terminal node structure.

[0075] Figure 12 This is the UML relationship diagram of the ARINC429 bus.

[0076] Figure 13 Send model schematic for ARINC429 terminal.

[0077] Figure 14 This is a schematic diagram of the ARINC429 terminal receiving model.

[0078] Figure 15 Schematic diagram of the service curve and reach curve of the message.

[0079] Figure 16 Example of network transmission scenario.

[0080] Figure 17 This is an example of RDIU data conversion. DETAILED DESCRIPTION

[0081] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0082] This embodiment uses Figure 2 The RDIU needs to complete the protocol conversion between ARINC825, ARINC429 and other secondary bus data frames, and convert ARINC825, ARINC429 and other secondary bus data frames to ARINC664 backbone network. Figure 1 As shown, the data conversion scheduling deterministic analysis method of the remote data interface unit RDIU shown in this embodiment includes the following three parts:

[0083] 1) Parse the RDIU configuration file to obtain RDIU configuration parameters, which are used for model building and deterministic analysis. RDIU configuration parameters include: port ID, port name, message transmission frequency, message DP and length, port rate, transmission interval, minimum frame length, maximum frame length, virtual link, etc. See Table 1 for details.

[0084] Table 1

[0085]

[0086] 2) Establish an RDIU data conversion model based on RDIU configuration parameters.

[0087] The RDIU implements the ARINC825 and ARINC429 communication interface protocols and signal acquisition and control functions, uploads the collected data results to the core processor, and executes the instructions issued by the core processor.

[0088] The internal conversion scheduling reflected by the RDIU data conversion model is as follows Figure 3 As shown, the receiving process is based on the master polling cycle q cpu The DSP polls the DSP to read messages received from the physical link, parses them, and temporarily stores them in the receive buffer. The conversion process queries the protocol conversion configuration table, extracts data from the receive buffer, assembles it into the target protocol message frame, and temporarily stores it in the transmit buffer. The transmit process periodically sends the message frames in the transmit buffer to the secondary bus or backbone network. If an interface receives no data within its configured refresh period during the receive process, the corresponding offset data bit in the target protocol message frame is set to invalid.

[0089] In this embodiment, the logic of converting ARINC429 message to ARINC825 message is as follows: Figure 4As shown, after receiving an ARINC 429 message, the message parameters are parsed and, based on the conversion configuration, the parameters are concatenated into corresponding ARINC 825 message parameters. A single ARINC 825 message may be composed of multiple ARINC 429 messages. Conversely, after receiving an ARINC 825 message, the message's DataSet and parameters are parsed and, based on the conversion configuration, the parameters are encapsulated into ARINC 429 message objects. A single ARINC 825 message may be split into multiple ARINC 429 messages.

[0090] 3) Based on the constructed RDIU data conversion model, by superimposing network calculation and code analysis and evaluation on the RDIU data conversion model, the time of each link when the data passes through the RDIU is obtained, thereby obtaining deterministic analysis results such as the maximum delay, maximum jitter and maximum backlog of message transmission conversion between various networks within the RDIU.

[0091] According to the RDIU data conversion model, if the CPU master control polling cycle is q cpu , the DSP message receiving cycle is a multiple of the main control polling cycle n, that is, q receive =n*q cpu ; The message sending cycle is also a multiple of the master polling cycle m, that is, q send =m*q cpu , the network calculation process is as follows:

[0092] a) The CPU master queries each DSP according to the polling cycle to determine whether the DSP has been queried within its receiving cycle. If not, it reads the DSP data frame and forwards the data frame to the corresponding receiving buffer. If no data frame is read within the receiving cycle, the corresponding parameter valid flag is set to invalid state;

[0093] b) querying the protocol conversion configuration table, reading the data in the receiving buffer, parsing the parameters therein, and updating the parameter bits corresponding to the offset of the target protocol data frame;

[0094] c) Sending the assembled target protocol data frame at a specified period through the target protocol data interface.

[0095] So the maximum delay of message conversion is:

[0096] MaxLatency RDIU =q receive +τ route +q send

[0097] Among them, q receive The DSP message receiving cycle during which the CPU master reads message data from each port;send The message sending period of the CPU master to send messages to each port; τ route This is the delay caused by protocol conversion software, logic, and hardware.

[0098] Specific analysis route The composition of , including the query protocol conversion configuration table time of all port data and the copy movement time from the receive buffer to the send buffer. Now assume that the RDIU is configured with m1 ARINC429 ports and its message arrival rate is V ARINC429 , m2 ARINC825 ports, whose message arrival rate is V ARINC825 In a CPU master polling cycle q cpu An ARINC429 port can receive up to messages, an ARINC825 port can receive a maximum of In the worst case, all ports receive messages at full load, and the time to query all data in one master polling cycle is:

[0099]

[0100] where τ search.A429 , τ search.A825 They are the technical delays required to query a corresponding protocol message.

[0101] The copy and move time of all data is:

[0102]

[0103] where τ copy.A429 , τ copy.A825 The technical delay required to copy and move a corresponding protocol message.

[0104] Therefore, the maximum protocol conversion delay is: τ route =τ search +τ copy .

[0105] Different RDIU products may have different hardware and software designs. For the compatibility and scalability of data conversion plug-ins, τ route It can be used as an external parameter in the calculation formula and can be customized by the user according to the actual situation. The maximum jitter value of RDIU message conversion MaxJitter is:

[0106] MaxJitter RDIU =MaxLatency RDIU -τ route

[0107] Among them, τ routeThe time required to query the copy transfer for the corresponding message is much less than q cpu .

[0108] The maximum data backlog MaxBacklog value of the RDIU output port is:

[0109] MaxBacklog RDIU =V send ×MaxLatency RDIU

[0110] Among them, V send is the message sending rate, which is the message length divided by the message sending period.

[0111] In order to obtain a more comprehensive deterministic analysis, this embodiment also analyzes the secondary bus on the RDIU receiving port and the sending port, see Figure 1 As shown in the figure, the overall process is the same as the deterministic analysis method of RDIU data conversion scheduling, which consists of three parts:

[0112] 1) Parse the secondary bus configuration file to obtain the terminal node configuration parameters that require RDIU conversion. These terminal node configuration parameters are used for model building and deterministic analysis. These terminal node configuration parameters include port information, port message transmission frequency, port rate, link configuration information, etc. For details, see the ARINC825 key parameters and the ARINC429 key parameters in Table 2.

[0113] Table 2

[0114]

[0115] Table 3

[0116]

[0117]

[0118] 2) Based on the terminal node configuration parameters, a secondary bus message transmission model is established. This includes the ARINC825 terminal transmission model, the ARINC825 terminal reception model, the ARINC429 terminal transmission model, and the ARINC429 terminal reception model. Because data transmission delays and backlogs are concentrated at the ports, the deterministic analysis of the bus primarily focuses on analyzing the terminal ports. Modeling the transmission and reception of port message frames provides a foundation for the implementation of deterministic analysis algorithms.

[0119] ARINC825 bus

[0120] As an example, the ARINC825 bus logic structure is as follows Figure 5 As shown, it can support up to 32 nodes. The ARINC825 node's DFRAM includes a transmit buffer and a receive buffer. The FPGA is designed with 32 message transmit FIFOs, each with a depth of 8. The 32 FIFOs are prioritized from high to low. Thirty-two receive message registers are also designed. When node 1 wants to send a message to node 3, it generates the message and writes it into the transmit buffer. It also writes the destination node number into the transmit FIFO. Priority scheduling traverses the transmit FIFOs and sequentially forwards the data to the CAN bus. Node 3 receives the message and stores it in the receive buffer. The host reads the message from the buffer via an interrupt or query.

[0121] The structure of ARINC825 terminal node is as follows Figure 6 As shown in the figure, the interface management logic (IML) is responsible for parsing CPU instructions, controlling CAN register addressing, and providing interrupts and status information to the host microcontroller. The transmit buffer stores messages to be sent from the CPU to the BSP. The receive buffer stores received messages from the filter to the CPU. The filter compares the received identifier with the contents of the filter register to determine whether to accept the message. The bit stream processor is a sequencer that controls the data flow between the transmit buffer, receive buffer, and CAN bus.

[0122] ARINC825 bus model UML relationship is as follows Figure 7 As shown:

[0123] The ARINC825Port object contains the following parameters: port ID, port name, and transmission frequency.

[0124] A port can send and receive one or more messages. The ARINC825MsgTx or ARINC825MsgRx message contains the following parameters: message ID, message name, sender / receiver identifier, message length, CAN Identifier, DS set, etc.

[0125] A message consists of one or more DataSets. The Data_Set object contains the following parameters: DS_ID, name, size, offset, etc.

[0126] A DataSet consists of one or more parameters. A Parameter object contains the following parameters: parameter ID, parameter name, data size, data type, offset in DS, etc.

[0127] According to the above analysis, the constructed ARINC825 terminal sending model is as follows Figure 8 As shown in Figure 1, it reflects the generation of data frames from messages, the scheduling of high and low priority messages, and the queuing of data frames at the sending port, providing a basis for the deterministic analysis of subsequent terminal transmission. The constructed ARINC825 terminal receiving model is shown in Figure 1. Figure 9 As shown in the figure, it reflects the process of data frames being received, stored, and sent to the application layer at the receiving port, providing a basis for the deterministic analysis of subsequent terminal reception.

[0128] ARINC429 bus

[0129] ARINC429 bus structure is as follows Figure 10 As shown, the ARINC429 bus is a simple point-to-point unidirectional transmission protocol. There is only one sender, which periodically forwards messages in the queue. There can be multiple receivers (up to 20), but this does not affect the message transmission delay.

[0130] ARINC429 terminal node structure is as follows Figure 11 As shown in the figure, the RX module receives input signals, converts serialized clock signals into protocol data words, and stores them in the FIFO buffer queue. Subsequently, the data is read into the RDIU through signals from the CPU interface. The Tx module sends output signals, reads protocol data words from the FIFO buffer queue, converts them into serialized signals, and transmits them over the twisted pair cable.

[0131] The UML diagram of the ARINC429 bus model is as follows Figure 12 shown.

[0132] The ARINC429Port object contains the following parameters: port ID, port name, transmit and receive flags, transmit frequency, and bus parity flag.

[0133] When the transceiver identifier (Tx_Rx) is Rx, it indicates a receiving port, and Tx indicates a transmitting port. A port can send and receive one or more messages. The ARINC429MsgTx message contains the following parameters: message ID, message name, transceiver identifier, message length, LABEL, SDI source, SSM source, DS set, etc. The ARINC429BlkTx message contains the following parameters: message ID, message name, transceiver identifier, message length, DS set, etc. The ARINC429MsgRx message contains the following parameters: message ID, message name, transceiver identifier, message length, LABEL, SDI filtering, SSM checksum, DS set, etc. The ARINC429BlkRx message contains the following parameters: message ID, message name, transceiver identifier, message length, DS set, etc.

[0134] A message consists of one or more DataSets. The Data_Set object contains the following parameters: DS_ID, name, size, offset, etc.

[0135] A DataSet consists of one or more parameters. A Parameter object contains the following parameters: parameter ID, parameter name, data size, data type, offset in DS, etc.

[0136] According to the above analysis, the constructed ARINC429 terminal sending model is as follows Figure 13 As shown in Figure 1, it reflects the data frame generation, message scheduling, and data frame queuing at the sending port, providing a basis for the deterministic analysis of subsequent terminal transmission. The constructed ARINC429 terminal receiving model is as follows: Figure 14 As shown in FIG, it reflects the process of receiving and storing the data frame at the receiving port, providing a basis for the deterministic analysis of subsequent terminal reception.

[0137] 3) Based on the constructed model, by superimposing network calculation and code analysis and evaluation methods on the model, a deterministic analysis of messages passing through the secondary bus is obtained, including sending messages, receiving messages, maximum transmission delay, backlog, jitter, etc.

[0138] Deterministic Analysis of ARINC825 Bus

[0139] ARINC 825 uses time-slice-based bus scheduling, introducing the concepts of primary and secondary time slices. The primary time slice is defined as the period during which all periodic messages in the system are transmitted at least once. The secondary time slice is defined as the period of the most frequently transmitted frame in the system. The bus scheduling mechanism requires that all nodes share the same primary-secondary time slice period, and that the secondary time slice is an even fraction of the primary time slice (e.g., 1 / 2, 1 / 4, 1 / 8, etc.).

[0140] Since ARINC825 uses bus scheduling for bandwidth management, during actual communication between multiple nodes on the bus, each CAN message in the same sub-time slot is sent using multi-master competition, while messages between different sub-time slots are separated in time.

[0141] According to the ARINC825 terminal sending model, the priority-based network calculation method is used to calculate the maximum delay MaxLatency of the message configured internally in the ARINC825 terminal at the terminal output port. A825 .

[0142] Message flow arrival curve:

[0143]

[0144] in, Indicates ARINC825 message M i The maximum frame length, Indicates message M i The sending period, t represents the time variable.

[0145] If there are m high-priority messages in the ARINC825 terminal node, there are n messages with the same priority as the current message. Mi Indicates the maximum rate at which data flows of different priorities are sent, b Mi represents the maximum data frame of data streams of different priorities. The bus rate is C. Then the algorithm formula for the equivalent service curve of the current message flow is as follows:

[0146]

[0147] Among them, C -M Indicates the remaining service capacity after the sending port is allocated to high-priority traffic, that is:

[0148]

[0149] Indicates the total service capacity occupied by other traffic of the same priority, that is:

[0150]

[0151] B -M Represents the sum of high-priority data frames plus the largest low-priority data frame, that is:

[0152]

[0153] Represents the sum of other data frames with the same priority, that is:

[0154]

[0155] The arrival curve and service curve of a message are as follows: Figure 15 As shown, the horizontal axis is the time axis, the vertical axis is the data volume, hmax is the data backlog, and vmax is the maximum delay.

[0156] Maximum lateral distance according to the arrival curve and service curve Get the service delay, that is:

[0157]

[0158] For the maximum backlog of messages, the maximum vertical deviation between the message arrival curve and the service curve is obtained by calculating The maximum data backlog of messages in the terminal buffer can be obtained.

[0159]

[0160] The maximum jitter value is the waiting time from the start of the message request bus to the actual sending of data.

[0161]

[0162] Among them, b Mi is the current message length, and C is the bus rate.

[0163] According to the ARINC825 terminal receiving model, when the terminal node receives a message, it reads the data from the physical link and stores it in a temporary register, and compares it with the configured receive message ID. If it is a message that the ARINC825 terminal needs to receive, it is written into the receive buffer unit, and the host reads the message of the receive buffer unit through interruption or query. Therefore, the ARINC825 bus reception delay is expressed as the data processing technology delay τ A825Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

[0164] Table 4 shows the meaning and source of the parameters in the formulas for calculating the maximum delay, jitter, and backlog of the output and receiving ports of the ARINC825 terminal.

[0165] Table 4

[0166]

[0167]

[0168] According to the ARINC429 terminal transmission model, ARINC429 is a serial bus standard, a simple point-to-point unidirectional transmission protocol, and the basic data unit is a 32-bit data word.

[0169] ARINC429 bus deterministic analysis needs to consider the contention among various applications when sending information. The worst case scenario is that each application sends an ARINC429Word at the same time. In this case, the longest delay is the time of the last ARINC429Word sent, calculated as follows:

[0170]

[0171] Where N is the number of ports on the ARINC 429 end node sending data to the RDIU, LARINC429Msg is the maximum ARINC 429 message length, which is 4 bytes, and Vsend is the message sending rate. As long as MaxLatency is less than the deadline, the ARINC 429 network is considered deterministic.

[0172] The maximum backlog (MaxBacklog) value is the message sending rate multiplied by the delay.

[0173] MaxBacklog A429 =V send ×MaxLatency A429

[0174] The maximum jitter (MaxJitter) is the waiting time from the time a message requests the bus to the time the data is actually sent.

[0175]

[0176] According to the ARINC429 terminal receiving model, the corresponding address in the receiving cache unit is queried based on the combination of Channel and Label, the data in it is updated, and an interrupt is triggered. The CPU reads the new data in the cache. The receiving delay is expressed as the data processing technology delay τ A429Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

[0177] Table 5 shows the meaning and source of the parameters in the formulas for calculating the maximum delay, jitter, and backlog of the output and receiving ports of the ARINC429 terminal.

[0178] Table 5

[0179]

[0180] According to the deterministic analysis method mentioned above, ARINC825 and ARINC429 terminals directly connected to RDIU are used as the scenario example. The above formula is substituted into the specific configuration data to obtain the deterministic analysis results. The network transmission scenario and configuration are as follows: Figure 16 shown.

[0181] The RDIU data conversion example is Figure 17 As shown in the figure. A664MsgRx1 to ARINC825MsgTx1, ARINC429MsgTx1, ARINC825MsgRx1, AnalogMsgRx1, DiscMsgRx1 to A664MsgTx1, ARINC429MsgRx1 to ARINC825MsgTx1.

[0182] ARINC825 bus configuration:

[0183] Transceiver ports Port_1 and Port_2;

[0184] Data reception processing technology delay τ A825Port.receive About 80us;

[0185] The bus transmission rate is 500 kbps = 500,000 bit / s = 0.5 bit / us, and the main time slice is 8 ms.

[0186] Note: To facilitate manual verification, the decimal system is used for the conversion of computer units to bits. In actual situations, binary conversion should be used. The error between the two system results is within the allowable range of 10% when the rate is less than 2Gbps.

[0187] ARINC429 bus configuration:

[0188] Send port OUT_4;

[0189] Receive port IN_5;

[0190] Bus transmission rate 100kbps;

[0191] Data reception processing technology delay τ A429Port.receive About 100us.

[0192] RDIU Configuration:

[0193] ARINC825 transceiver port Port_4;

[0194] ARINC429 receive port IN_4;

[0195] ARINC429 transmit port OUT_5;

[0196] Analog signal receiving port IN_6;

[0197] Digital signal receiving port IN_7;

[0198] RDIU master control polling cycle 2ms, ARINC825 message polling cycle 4ms, ARINC429 message polling cycle 4ms, analog signal polling cycle 4ms, digital signal polling cycle 4ms, A664 message polling cycle 4ms;

[0199] ARINC825 message sending polling cycle 4ms, ARINC429 message sending polling cycle 4ms, analog signal sending polling cycle 4ms, digital signal sending polling cycle 4ms, A664 message sending polling cycle 4ms;

[0200] Intrinsic technical delay τ of protocol conversion route 100us.

[0201] The message configuration is shown in Table 6:

[0202] Table 6

[0203]

[0204] As shown in Table 7, the above-described method is used to process messages M1, M2, M4, M6, M8, and M10 according to Figure 14 The message transmission performance is analyzed and calculated based on the conversion situation. The messages that may affect the message transmission performance are M5, M7, M9, and M11. Other messages such as M3 are similar to M1 and are not calculated.

[0205] Table 7

[0206]

[0207]

[0208] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A method for deterministic analysis of data conversion scheduling of a remote data interface unit (RDIU), characterized in that Here are the steps: 2) Parse the RDIU configuration file to obtain RDIU configuration parameters; 2) Establish RDIU data conversion model according to RDIU configuration parameters. The internal conversion scheduling of RDIU data conversion model is as follows: the receiving process is based on the master control polling cycle q cpu Polling DSP, read the message received from the physical link, parse and temporarily store it in the receive buffer; the conversion process is to query the protocol conversion configuration table, take the data from the receive buffer and assemble it into the corresponding target protocol message frame and temporarily store it in the transmit buffer; the transmit process is to periodically send the message frame corresponding to the transmit buffer to the secondary bus or backbone network; 3) Based on the constructed RDIU data conversion model, network calculation and code analysis and evaluation are superimposed to obtain: The maximum delay of RDIU message conversion is: MaxLatency RDIU =q receive +τ route +q send Among them, q receive DSP message receiving cycle for reading message data from each port; send is the message sending period for sending messages to each port; τ route The delay caused by protocol conversion software, logic, and hardware; The maximum jitter of RDIU message conversion is: MaxJitter RDIU =MaxLatency RDIU -τ route The maximum data backlog at the RDIU output port is: MaxBacklog RDIU =V send ×MaxLatency RDIU Among them, V send The message sending rate.

2. A method for analyzing data conversion scheduling determinism of a remote data interface unit (RDIU) according to claim 1, characterized in that Also includes: T825-1) Parse the configuration file of the ARINC825 terminal to obtain the ARINC825 terminal node configuration parameters that need to be converted by RDIU; T825-2) Establishing an ARINC825 terminal sending model based on ARINC825 terminal node configuration parameters, reflecting the generation of data frames from messages, high and low priority scheduling of messages, and queuing of data frames at the sending port; T825-3) Based on the ARINC825 terminal transmission model, the superimposed network calculation method is obtained: Message flow arrival curve: in, Indicates ARINC825 message M i The maximum frame length, Indicates message M i The sending cycle, t represents the time variable; If there are m high-priority messages in the ARINC825 terminal node, and n of them have the same priority as the current message, then r Mi Indicates the maximum rate at which data flows of different priorities are sent, b Mi Indicates the maximum data frame of data streams of different priorities, and the bus rate is C. Then the equivalent service curve of the current message flow is: Among them, C -M Indicates the remaining service capacity after the sending port is allocated to high-priority traffic, that is: Indicates the total service capacity occupied by other traffic of the same priority, that is: B -M Represents the sum of high-priority data frames plus the largest low-priority data frame b Mi.max ,Right now: Represents the sum of other data frames with the same priority, that is: The maximum lateral distance based on the message arrival curve and service curve Get the service delay, that is: The maximum vertical deviation from the message arrival curve and service curve Get the maximum data backlog of the message in the ARINC825 terminal buffer, that is: The maximum jitter is: Among them, b Mi is the current message length, and C is the bus rate.

3. The method for analyzing data conversion scheduling determinism of a remote data interface unit (RDIU) according to claim 1 is characterized in that Also includes: R825-1) Parse the configuration file of the ARINC825 terminal to obtain the ARINC825 terminal node configuration parameters that need to be converted by RDIU; R825-2) Establish an ARINC825 terminal receiving model based on the ARINC825 terminal node configuration parameters, reflecting the process of data frames being received, stored, and sent to the application layer at the receiving port; R825-3) According to the ARINC825 terminal receiving model, the ARINC825 bus receiving delay is obtained by superimposing the network calculation as the data processing technology delay τ A825Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

4. The method for analyzing data conversion scheduling determinism of a remote data interface unit (RDIU) according to claim 1 is characterized in that Also includes: T429-1) Parse the configuration file of the ARINC429 terminal to obtain the ARINC429 terminal node configuration parameters that need to be converted by RDIU; T429-2) Establishing an ARINC429 terminal sending model based on ARINC429 terminal node configuration parameters, reflecting data frame generation from messages, message scheduling, and data frame queuing at the sending port; T429-3) Based on the ARINC429 terminal transmission model and network calculation, the maximum delay is: Where N is the number of ports on the ARINC429 terminal node that send data to the RDIU, LARINC429Msg is the maximum message length of ARINC429, and Vsend is the message sending rate; The maximum backlog is: MaxBacklog A429 =V send ×MaxLatency A429 The maximum jitter is 5. The method for analyzing data conversion scheduling determinism of a remote data interface unit (RDIU) according to claim 1 is characterized in that Also includes: R429-1) Parse the configuration file of the ARINC429 terminal to obtain the ARINC429 terminal node configuration parameters that need to be converted by RDIU; R429-2) Establish an ARINC429 terminal reception model based on ARINC429 terminal node configuration parameters, reflecting the process of data frame reception and storage at the receiving port, providing a basis for subsequent deterministic analysis of terminal reception; R429-3) According to the ARINC429 terminal receiving model, the receiving delay is obtained by superimposing the network calculation to obtain the data processing technology delay τ A429Port.receive , the maximum message backlog is 1 data frame, and the maximum jitter is 0.

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