Clock Synchronization Processing Method, Device and Electronic Equipment for 5G Millimeter Wave Base Station

Abstract

The present invention discloses a clock synchronization processing method, device and electronic device for a 5G millimeter wave base station. The method is applied to a synchronization processing device and includes receiving a clock signal sent by a clock source device and converting the clock signal into a clock synchronization message, where the clock synchronization message includes target clock information; sending the clock synchronization message to a first base station, where the first base station is a base station acting as a clock synchronization master device; receiving a clock synchronization message sent by a second base station when the first base station sends the clock synchronization message to the second base station, where the second base station is a base station acting as a clock synchronization slave device; parsing and processing the clock synchronization message to obtain the target clock information, and updating the clock information corresponding to the second base station based on the target clock information. By using the disclosed embodiments of the present invention, clock synchronization between base stations can be achieved through the synchronization processing device, and the base stations do not need to perform complex processing, thereby reducing the resource consumption of the base station processors and saving processor resources.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a clock synchronization processing method, apparatus, and electronic device for a 5G millimeter-wave base station. Background Art

[0002] In a communication system, in order to avoid interference between base stations, the frequencies and times between multiple base stations need to be synchronized to meet certain accuracy requirements. In the prior art, base station synchronization mostly adopts satellite time synchronization methods, such as the GPS (Global Positioning System) synchronization method. During the clock synchronization process, operations such as parsing clock synchronization messages, stamping message times, and controlling clock alignment are usually performed by the processor of the base station to achieve the purpose of clock synchronization. However, this method has many limitations, such as low clock synchronization accuracy and consumption of more processor resources. Summary of the Invention

[0003] In view of the above problems in the prior art, the present invention discloses a clock synchronization processing method, apparatus, electronic device, and storage medium for a 5G millimeter-wave base station. Clock synchronization between base stations is achieved through a synchronization processing device. The base station only needs to forward information without complex processing, reducing the resource consumption of the base station processor during the clock synchronization process and saving processor resources. The technical solutions disclosed by the present invention are as follows:

[0004] According to one aspect of the disclosed embodiments of the present invention, there is provided a clock synchronization processing method for a 5G millimeter-wave base station, characterized in that the method is applied to a synchronization processing device and includes:

[0005] Receiving a clock signal sent by a clock source device;

[0006] Converting the clock signal into a clock synchronization message, where the clock synchronization message includes target clock information;

[0007] Sending the clock synchronization message to a first base station, where the first base station is a base station acting as a clock synchronization master device;

[0008] When the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by the second base station, where the second base station is a base station acting as a clock synchronization slave device;

[0009] Parsing and processing the clock synchronization message to obtain the target clock information;

[0010] Updating the clock information corresponding to the second base station based on the target clock information.

[0011] Optionally, sending the clock synchronization message to the first base station includes:

[0012] Sending the clock synchronization message to the first central processor in the first base station.

[0013] Optionally, sending the clock synchronization message to the first base station includes:

[0014] Sending the clock synchronization message to the first switching device in the first base station.

[0015] Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station includes:

[0016] When the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second central processor in the second base station.

[0017] Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station includes:

[0018] When the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second switching device in the second base station.

[0019] Optionally, parsing and processing the clock synchronization message to obtain the target clock information includes:

[0020] Parsing and processing the clock synchronization message to obtain initial clock offset information and initial transmission delay information;

[0021] Adjusting the initial clock offset information and the initial transmission delay information to obtain target clock offset information and target transmission delay information;

[0022] Generating the target clock information based on the target clock offset information and the target transmission delay information.

[0023] Optionally, adjusting the initial clock offset information and the initial transmission delay information to obtain target clock offset information and target transmission delay information includes:

[0024] Adjusting the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information;

[0025] Adjust the updated clock offset information and the updated transmission delay information based on the servo algorithm to obtain the target clock offset information and the target transmission delay information.

[0026] According to another aspect of the disclosed embodiments of the present invention, there is provided a clock synchronization processing device for a 5G millimeter wave base station, including:

[0027] A first receiving module, configured to receive a clock signal sent by a clock source device;

[0028] A conversion module, configured to convert the clock signal into a clock synchronization message, where the clock synchronization message includes target clock information;

[0029] A sending module, configured to send the clock synchronization message to a first base station, where the first base station is a base station serving as a clock synchronization master device;

[0030] A second receiving module, configured to receive the clock synchronization message sent by the second base station when the first base station sends the clock synchronization message to the second base station, where the second base station is a base station serving as a clock synchronization slave device;

[0031] An analysis module, configured to perform analysis processing on the clock synchronization message to obtain the target clock information;

[0032] An update module, configured to update the clock information corresponding to the second base station based on the target clock information.

[0033] According to another aspect of the disclosed embodiments of the present invention, there is provided an electronic device, including: a processor; a memory for storing instructions executable by the processor; wherein, the processor is configured to execute the instructions to implement the clock synchronization processing method for a 5G millimeter wave base station in the above-mentioned one aspect.

[0034] According to another aspect of the disclosed embodiments of the present invention, there is provided a computer-readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device, enabling the electronic device to execute the clock synchronization processing method for a 5G millimeter wave base station in the above-mentioned one aspect of the disclosed embodiments of the present invention.

[0035] According to another aspect of the disclosed embodiments of the present invention, there is provided a computer program product including instructions, when it runs on a computer, enabling the computer to execute the clock synchronization processing method for a 5G millimeter wave base station in the above-mentioned one aspect of the disclosed embodiments of the present invention.

[0036] The data processing method provided by the present invention has the following technical effects:

[0037] The clock synchronization processing method for 5G millimeter-wave base stations provided by the present invention is such that the synchronization processing device receives the clock signal sent by the clock source device and converts the clock signal into a clock synchronization message, where the clock synchronization message includes target clock information; and then sends the clock synchronization message to the base station serving as the clock synchronization master device. In the case where the base station sends the clock synchronization message to the base station serving as the clock synchronization slave device, the synchronization processing device receives the clock synchronization message sent by the base station serving as the clock synchronization slave device, parses and processes the clock synchronization message to obtain the target clock information, and updates the clock information corresponding to the base station serving as the clock synchronization slave device based on the target clock information. It can achieve clock synchronization between base stations through the synchronization processing device, and the base station only needs to forward information without complex processing, thereby reducing the resource consumption of the base station processor during the clock synchronization process and saving processor resources.

[0038] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the disclosure of the present invention, and are used together with the specification to explain the principles of the present disclosure, and do not constitute an improper limitation to the disclosure of the present invention.

[0040] Figure 1 is a schematic diagram of a clock synchronization processing system for 5G millimeter-wave base stations shown according to an exemplary embodiment;

[0041] Figure 2 is a flowchart of a clock synchronization processing method for 5G millimeter-wave base stations shown according to an exemplary embodiment;

[0042] Figure 3 is a schematic diagram of a clock synchronization message parsing and processing method shown according to an exemplary embodiment;

[0043] Figure 4 is a flowchart of a clock synchronization processing method for 5G millimeter-wave base stations shown according to an exemplary embodiment;

[0044] Figure 5 is a block diagram of a clock synchronization processing device for 5G millimeter-wave base stations shown according to an exemplary embodiment;

[0045] Figure 6 is a block diagram of a terminal electronic device for clock synchronization processing for 5G millimeter-wave base stations shown according to an exemplary embodiment;

[0046] Figure 7It is a block diagram of a server electronic device for clock synchronization processing for a 5G millimeter wave base station shown according to an exemplary embodiment. Detailed implementation manners

[0047] In order to enable those of ordinary skill in the art to better understand the technical solutions disclosed in the present invention, the technical solutions in the disclosed embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0048] It should be noted that the terms "first", "second", etc. in the specification, claims and the above drawings of the present invention disclosure are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention disclosure described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or server including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0049] Currently, most base station clock synchronization adopts satellite time synchronization, but there are many limitations. For example, the radio frequency cable wiring is difficult and the failure rate is high, which has certain limitations in actual construction; it cannot meet the low latency requirements. Due to the inconsistent cable lengths, there are differences in time synchronization accuracy, and it is costly to meet the accuracy within 50 ns; at large event sites, GNSS (Global Navigation Satellite System) is easily interfered, and radio interference and air traffic control of drones are likely to cause GPS / Beidou signal loss; some special application scenarios are restricted, such as it is difficult to install many mushroom antennas in places such as mines, tunnels, subways and basements.

[0050] In practical applications, clock synchronization processing can be performed based on the IEEE 1588 (Precision Time Synchronization Protocol Standard for Network Measurement and Control Systems) clock synchronization mechanism. The basic principle of the IEEE 1588 protocol is to calculate the clock offset information (Offset) through the time information interaction between the master clock and the slave clock. In the IEEE 1588 protocol, the true transmission time is the time interval from when the sender records the timestamp until the receiver records the timestamp. This includes not only the transmission time in the network, but also the processing time from when the sender stamps the timestamp until the signal actually enters the network, and the processing time from when the receiver receives the signal until it stamps the timestamp.

[0051] Specifically, the clock synchronization master device (i.e., the master clock) sends a synchronization message (Sync) and records the timestamp t1 at the sending moment. After the clock synchronization slave device (i.e., the slave clock) receives the synchronization message (Sync), it records the timestamp t2 at the receiving moment. Subsequently, the clock synchronization master device sends a follow-up message (Follow_Up) to bring the t1 timestamp to the clock synchronization slave device. Then, the clock synchronization slave device sends a delay request message (Delay_Req) and records the timestamp t3 at the sending moment. After the clock synchronization master device receives this message, it records the timestamp t4 at the receiving moment. Subsequently, the clock synchronization master device sends a delay response message (Delay_Resp) to bring the t4 timestamp to the slave clock. The clock synchronization slave device can calculate the message transmission delay and the time offset of the clock synchronization slave device relative to the clock synchronization master device based on the four recorded timestamps, and then perform clock synchronization.

[0052] Please refer to Figure 1 , Figure 1 FIG. is a schematic diagram of a clock synchronization processing system for a 5G millimeter-wave base station shown according to an exemplary embodiment. The clock synchronization processing system may include a base station cluster 100 and a synchronization processing device 200.

[0053] Specifically, the above base station cluster 100 may include multiple base stations 110, and each base station 110 can be used to provide communication functions. Each of the above base stations 110 can include various forms of base stations, such as: macro base stations, micro base stations, relay stations, access points, etc. Specifically, it can be: an access point (AP) in a wireless local area network (WLAN), a base transceiver station (BTS) in a global system for mobile communications (GSM) or code division multiple access (CDMA), or a base station (NodeB, NB) in wideband code division multiple access (WCDMA), or an evolved base station (Evolved Node B, eNB or eNodeB) in LTE, or a relay station or an access point, or a vehicle-mounted device, a wearable device, and a next-generation Node B (gNB) in a 5G (5th Generation Mobile Communication Technology) system, or a base station in a future evolved public land mobile network (PLMN) network, etc. The clock synchronization processing method provided in the embodiments of the present application specification is particularly applicable to the clock synchronization process between 5G millimeter-wave base stations.

[0054] Specifically, the above synchronization processing device 200 can be a device for performing clock synchronization processing between 5G millimeter-wave base stations. The synchronization processing device 200 may include multiple synchronization processing modules 210, and each base station 110 corresponds to a synchronization processing module 210. The synchronization processing module 210 can be a module with a clock synchronization integrated chip, and this clock synchronization integrated chip can integrate a hardware precise timestamp, a processor, and a PTP (Precision Timing Protocol) clock recovery algorithm, and has a multi-channel clock output function.

[0055] The network architecture and service scenarios described in the embodiments of the present application are for more clearly illustrating the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those of ordinary skill in the art know that with the evolution of the network architecture and the emergence of new service scenarios, the technical solutions provided in the embodiments of the present application are equally applicable to similar technical problems.

[0056] Figure 2 It is a schematic flowchart of a clock synchronization processing method for a 5G millimeter-wave base station shown according to an exemplary embodiment. This specification provides the method operation steps as described in the embodiment or flowchart, but based on routine or non-creative labor, it may include more or fewer operation steps. The step order listed in the embodiment is only one of the ways of the execution order of numerous steps and does not represent the only execution order. When the actual system or server product executes, it can be executed in the order of the method shown in the embodiment or the drawings or executed in parallel (for example, in an environment of parallel processors or multi-threaded processing). Specifically, as Figure 2 shown, the clock synchronization processing method for the 5G millimeter-wave base station includes the following steps.

[0057] S201: The first synchronization processing module corresponding to the first base station receives the clock signal sent by the clock source device.

[0058] In a specific embodiment, the first base station may be a 5G millimeter-wave base station serving as a clock synchronization master device. After power-on, the first base station may configure the mode of its corresponding first synchronization processing module through SPI (Serial Peripheral Interface). Specifically, the mode of the first synchronization processing module may be configured as the clock synchronization master (Master) mode so that the first synchronization processing module can perform subsequent operations. The clock source device may be a satellite device, such as a GNSS clock source, a Beidou clock source, etc. The clock signal may be a 1pps (1 Pulse Per Second) signal or a TOD (Time of data) signal. Among them, the 1pps signal can be used to indicate the moment of the whole second, and this moment is usually marked by the rising edge of the second pulse. The TOD signal usually includes the moment information corresponding to the rising edge of the above-mentioned second pulse.

[0059] S203: The first synchronization processing module converts the clock signal into a clock synchronization message.

[0060] In a specific embodiment, the above-mentioned clock synchronization message may be an IEEE1588 message. The clock synchronization message may include target clock information. Specifically, the target clock information may be timestamp information generated by the first synchronization processing module according to the time information indicated by the clock signal. The target clock information may be used as reference clock information, and the clock information to be calibrated can be updated based on the target clock information.

[0061] In the above embodiments, the synchronization processing module corresponding to the base station serving as the clock synchronization master device can automatically generate a clock synchronization message with timestamp information by acquiring the clock signal of the clock source device, without the base station serving as the clock synchronization master device adding a timestamp, thereby saving processor resources.

[0062] S205: The first synchronization processing module sends the clock synchronization message to the first base station.

[0063] In an optional embodiment, the first synchronization processing module sending the clock synchronization message to the first base station may include:

[0064] The first synchronization processing module sends the clock synchronization message to the first central processor in the first base station.

[0065] In a specific embodiment, the first synchronization processing module may send the clock synchronization message to the first central processor in the first base station through SGMII (Serial Gigabit Media Independent Interface); the model of the first central processor can be set according to actual application requirements.

[0066] In an optional embodiment, the first synchronization processing module sending the clock synchronization message to the first base station may include:

[0067] The first synchronization processing module sends the clock synchronization message to the first switching device in the first base station.

[0068] In a specific embodiment, the first switching device may be a device with a switching chip. Specifically, the switching chip may be a 10 Gigabit switching chip; the first switching device can directly receive the clock synchronization message sent by the first synchronization processing module and then directly merge it into the fronthaul port to send to the clock synchronization controlled device, without going through the central processor in the base station for the above processing.

[0069] S207: The first base station sends the clock synchronization message to the second base station.

[0070] In a specific embodiment, the second base station may be a 5G millimeter wave base station serving as the clock synchronization controlled device, and the first base station may send the clock synchronization message to the second base station through the fronthaul port.

[0071] S209: The second base station receives the clock synchronization message and forwards it to the second synchronization processing module corresponding to the second base station.

[0072] In a specific embodiment, the second base station can receive clock synchronization messages through the backhaul port; after power-on, the second base station can configure the mode of its corresponding second synchronization processing module through SPI. Specifically, the mode of the second synchronization processing module can be configured as the clock synchronization controlled (Slave) mode, so that the second synchronization processing module can perform subsequent operations.

[0073] In an alternative embodiment, the above-mentioned second base station receiving the clock synchronization message and forwarding it to the second synchronization processing module corresponding to the second base station may include:

[0074] The second central processor of the second base station receives the clock synchronization message and forwards it to the second synchronization processing module corresponding to the second base station.

[0075] In a specific embodiment, the second central processor of the second base station can forward the clock synchronization message to the second synchronization processing module through SGMII; the model of the second central processor can be set according to actual application requirements. Specifically, the model of the second central processor can be the same as that of the above-mentioned first central processor.

[0076] In an alternative embodiment, the above-mentioned second base station receiving the clock synchronization message and forwarding it to the second synchronization processing module corresponding to the second base station may include:

[0077] The second switching device of the second base station receives the clock synchronization message and forwards it to the second synchronization processing module corresponding to the second base station.

[0078] In a specific embodiment, the second switching device can be a device with a switching chip. Specifically, the switching chip can be a 10 Gigabit switching chip; the second switching device can directly receive and separate the clock synchronization message from the backhaul port and forward it to the second synchronization processing module without passing through the central processor in the base station.

[0079] S211: The second synchronization processing module receives the clock synchronization message.

[0080] S213: The second synchronization processing module parses and processes the clock synchronization message to obtain the target clock information.

[0081] In an alternative embodiment, as Figure 3 shown, Figure 3 is a schematic diagram of a clock synchronization message parsing and processing method shown according to an exemplary embodiment. The above-mentioned second synchronization processing module parsing and processing the clock synchronization message to obtain the target clock information may include:

[0082] S301: The second synchronization processing module parses and processes the clock synchronization message to obtain the initial clock offset information and the initial transmission delay information.

[0083] In a specific embodiment, the initial clock offset information may be the time difference between the clock information corresponding to the second base station and the target clock information, and the initial transmission delay information may be the transmission delay information generated during the transmission of the clock synchronization message; specifically, taking IEEE 1588 clock synchronization as an example, the above clock offset information may be the time difference information (offset) calculated according to the above timestamp information (t1, t2, t3, and t4) during the transmission process, and the transmission delay information of the clock synchronization message may include the one-way delay of the synchronization message (Sync) from the master device to the slave device and the one-way delay of the delay request message (Delay_Req) from the slave device to the master device.

[0084] S303: The second synchronization processing module adjusts the initial clock offset information and the initial transmission delay information to obtain the target clock offset information and the target transmission delay information.

[0085] In an alternative embodiment, the second synchronization processing module adjusts the initial clock offset information and the initial transmission delay information to obtain the target clock offset information and the target transmission delay information, which may include:

[0086] The second synchronization processing module adjusts the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information;

[0087] The second synchronization processing module adjusts the updated clock offset information and the updated transmission delay information based on a servo algorithm to obtain the target clock offset information and the target transmission delay information.

[0088] In a specific embodiment, the filtering algorithm can be used to optimize the estimation of information such as clock offset, transmission delay, and frequency drift obtained by parsing the clock synchronization message, so as to eliminate problems such as delay and frequency drift existing in the clock synchronization process, and then the servo algorithm is used to achieve high-precision tracking of the clock corresponding to the slave device to the clock corresponding to the master device; specifically, the filtering algorithm may include the Kalman filtering algorithm and the particle filtering algorithm, etc.

[0089] S305: The second synchronization processing module generates target clock information based on the target clock offset information and the target transmission delay information.

[0090] In the above embodiment, the filtering algorithm integrated in the synchronization processing module corresponding to the slave device through clock synchronization optimizes the estimation of information such as clock offset, transmission delay, and frequency drift obtained by parsing the clock synchronization message, and then the servo algorithm is used to achieve high-precision tracking of the clock corresponding to the slave device to the clock corresponding to the master device, improving the stability of the clock deviation, so as to achieve a relatively high clock synchronization accuracy.

[0091] S215: The second synchronization processing module updates the clock information corresponding to the second base station based on the target clock information.

[0092] In a specific embodiment, the second synchronization processing module may align the clock information corresponding to the second base station with the target clock information based on the target clock information to achieve clock synchronization between base stations. Specifically, the second synchronization processing module may adjust the phase and frequency of the clock corresponding to the controlled device based on the target clock information, where the clock corresponding to the controlled device may include an OCXO (Oven-Controlled Crystal Oscillator) clock and a TCXO (Temperature-Controlled Crystal Oscillator) clock.

[0093] As can be seen from the technical solutions provided in the embodiments of this specification above, the synchronization processing device in this specification receives the clock signal sent by the clock source device and converts the clock signal into a clock synchronization message, where the clock synchronization message includes the target clock information. Furthermore, the clock synchronization message is sent to the base station that serves as the clock synchronization master device. When the base station sends the clock synchronization message to the base station that serves as the clock synchronization controlled device, the synchronization processing device receives the clock synchronization message sent by the base station that serves as the clock synchronization controlled device, parses and processes the clock synchronization message to obtain the target clock information, and updates the clock information corresponding to the base station that serves as the clock synchronization controlled device based on the target clock information. It can perform processing such as message parsing, timestamping, and clock adjustment based on a preset algorithm through the synchronization processing device to achieve clock synchronization between 5G millimeter-wave base stations, separate the clock synchronization function of the base station, and the base station only needs to forward information without complex processing, thereby reducing the resource consumption of the base station processor during the clock synchronization process and saving system resources. In addition, the filtering algorithm and servo algorithm integrated in the synchronization processing module corresponding to the clock synchronization controlled device optimize information such as clock offset, transmission delay, and frequency drift, and then adjust the phase and frequency of the clock corresponding to the controlled device according to the optimized information, thereby achieving a high clock synchronization accuracy. At the same time, there is no need to develop additional filtering algorithms and servo algorithms in the base station processor, reducing the program development difficulty and human resource investment. Moreover, by obtaining the clock signal of the clock source device through the synchronization processing module, automatically generating a clock synchronization message with timestamp information, and parsing the clock synchronization message, there is no need for the processor in the base station to perform related operations, thereby saving processor resources.

[0094] The following takes the synchronization processing device as the execution subject to introduce a specific embodiment of a clock synchronization processing method for 5G millimeter-wave base stations in this specification. Figure 4It is a schematic flow diagram of a clock synchronization processing method for a 5G millimeter-wave base station shown according to an exemplary embodiment. Specifically, in combination with Figure 4 As shown, the above method may include:

[0095] S401: Receive the clock signal sent by the clock source device.

[0096] S403: Convert the clock signal into a clock synchronization message.

[0097] S405: Send the clock synchronization message to the first base station.

[0098] S407: When the first base station sends the clock synchronization message to the second base station, receive the clock synchronization message sent by the second base station.

[0099] S409: Parse and process the clock synchronization message to obtain the target clock information.

[0100] S411: Update the clock information corresponding to the second base station based on the target clock information.

[0101] Optionally, sending the clock synchronization message to the first base station may include:

[0102] Send the clock synchronization message to the first central processing unit in the first base station.

[0103] Optionally, sending the clock synchronization message to the first base station may include:

[0104] Send the clock synchronization message to the first switching device in the first base station.

[0105] Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station may include:

[0106] When the first base station sends the clock synchronization message to the second base station, receive the clock synchronization message sent by the second central processing unit in the second base station.

[0107] Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station may include:

[0108] When the first base station sends the clock synchronization message to the second base station, receive the clock synchronization message sent by the second switching device in the second base station.

[0109] Optionally, the above parsing and processing the clock synchronization message to obtain the target clock information may include:

[0110] Parse and process the clock synchronization message to obtain the initial clock offset information and the initial transmission delay information;

[0111] Adjust the initial clock offset information and the initial transmission delay information to obtain target clock offset information and target transmission delay information;

[0112] Generate target clock information based on the target clock offset information and the target transmission delay information.

[0113] Optionally, the above adjustment of the initial clock offset information and the initial transmission delay information to obtain the target clock offset information and the target transmission delay information may include:

[0114] Adjust the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information;

[0115] Adjust the updated clock offset information and the updated transmission delay information based on a servo algorithm to obtain the target clock offset information and the target transmission delay information.

[0116] An embodiment of the present invention also provides a clock synchronization processing device for a 5G millimeter-wave base station, as Figure 5 shown, the device includes:

[0117] A first receiving module 510, configured to receive a clock signal sent by a clock source device;

[0118] A conversion module 520, configured to convert the clock signal into a clock synchronization message, where the clock synchronization message includes target clock information;

[0119] A sending module 530, configured to send the clock synchronization message to a first base station, where the first base station is a base station serving as a clock synchronization master device;

[0120] A second receiving module 540, configured to receive the clock synchronization message sent by the second base station when the first base station sends the clock synchronization message to the second base station, where the second base station is a base station serving as a clock synchronization slave device;

[0121] An analysis module 550, configured to perform analysis processing on the clock synchronization message to obtain the target clock information;

[0122] An update module 560, configured to update the clock information corresponding to the second base station based on the target clock information.

[0123] Optionally, the sending module 530 may include:

[0124] A first sending unit, configured to send the clock synchronization message to a first central processor in the first base station.

[0125] Optionally, the sending module 530 may include:

[0126] A second sending unit, configured to send the clock synchronization message to a first switching device in the first base station.

[0127] Optionally, the second receiving module 540 may include:

[0128] A first receiving unit, configured to receive the clock synchronization message sent by a second central processing unit in the second base station when the first base station sends the clock synchronization message to the second base station.

[0129] Optionally, the second receiving module 540 may include:

[0130] A second receiving unit, configured to receive the clock synchronization message sent by a second switching device in the second base station when the first base station sends the clock synchronization message to the second base station.

[0131] Optionally, the parsing module 550 may include:

[0132] A parsing unit, configured to perform parsing processing on the clock synchronization message to obtain initial clock offset information and initial transmission delay information;

[0133] A clock adjustment unit, configured to adjust the initial clock offset information and the initial transmission delay information to obtain target clock offset information and target transmission delay information;

[0134] A target clock information generation unit, configured to generate the target clock information based on the target clock offset information and the target transmission delay information.

[0135] Optionally, the clock adjustment unit may include:

[0136] A first adjustment unit, configured to adjust the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information;

[0137] A second adjustment unit, configured to adjust the updated clock offset information and the updated transmission delay information based on a servo algorithm to obtain the target clock offset information and the target transmission delay information.

[0138] Regarding the device in the above embodiments, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated herein.

[0139] Figure 6The block diagram of an electronic device for clock synchronization processing of a 5G millimeter-wave base station shown according to an exemplary embodiment. The electronic device may be a terminal, and its internal structure diagram may be as shown in Figure 6 shown. The electronic device includes a processor, a memory, a network interface, a display screen, and an input device connected through a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a clock synchronization processing method for a 5G millimeter-wave base station. The display screen of the electronic device may be a liquid crystal display screen or an electronic ink display screen. The input device of the electronic device may be a touch layer covered on the display screen, or a button, a trackball, or a touchpad provided on the housing of the electronic device, or an external keyboard, a touchpad, or a mouse, etc.

[0140] Figure 7 The block diagram of an electronic device for clock synchronization processing of a 5G millimeter-wave base station shown according to an exemplary embodiment. The electronic device may be a server, and its internal structure diagram may be as shown in Figure 7 shown. The electronic device includes a processor, a memory, and a network interface connected through a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a clock synchronization processing method for a 5G millimeter-wave base station.

[0141] Those skilled in the art can understand that Figure 6 or Figure 7 the structure shown in does not constitute a limitation on the electronic device to which the disclosed solution of the present invention is applied. The specific electronic device may include more or fewer components than those shown in the figure, or combine certain components, or have a different component arrangement.

[0142] In an exemplary embodiment, an electronic device is further provided, including: a processor; a memory for storing executable instructions of the processor; wherein, the processor is configured to execute the instructions to implement the clock synchronization processing method for a 5G millimeter-wave base station as in the disclosed embodiment of the present invention.

[0143] In an exemplary embodiment, a computer-readable storage medium is further provided. When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute the clock synchronization processing method for a 5G millimeter-wave base station in the disclosed embodiments of the present invention.

[0144] In an exemplary embodiment, a computer program product containing instructions is further provided. When it runs on a computer, the computer is enabled to execute the clock synchronization processing method for a 5G millimeter-wave base station in the disclosed embodiments of the present invention.

[0145] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it may include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the embodiments provided by the present invention may include non-volatile and / or volatile memories. Non-volatile memories may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate

[0146] SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0147] After considering the specification and practicing the invention disclosed herein, those skilled in the art will readily conceive of other embodiments of the present invention. The present invention is intended to cover any variations, uses, or adaptations of the present invention, which follow the general principles of the present invention and include known common knowledge or conventional technical means in the technical field not disclosed by the present invention. The specification and embodiments are only regarded as exemplary, and the true scope and spirit of the present invention are pointed out by the following claims.

[0148] It should be understood that the disclosure of the present invention is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the disclosure of the present invention is only limited by the appended claims.

Claims

1. A clock synchronization processing method for 5G millimeter-wave base stations, characterized in that, the method is applied to a synchronization processing device, and the synchronization processing device is used for clock synchronization processing between the 5G millimeter-wave base stations. The method includes: Receiving a clock signal sent by a clock source device; Converting the clock signal into a clock synchronization message, and the clock synchronization message includes target clock information; Sending the clock synchronization message to a first base station, including: sending the clock synchronization message to a first switching device in the first base station, and the first base station is a base station serving as a clock synchronization master device; When the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by the second base station, including: when the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by a second switching device in the second base station, and the second base station is a base station serving as a clock synchronization slave device; Parsing and processing the clock synchronization message to obtain the target clock information, including: parsing and processing the clock synchronization message to obtain initial clock offset information and initial transmission delay information; adjusting the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information; adjusting the updated clock offset information and the updated transmission delay information based on a servo algorithm to obtain target clock offset information and target transmission delay information; generating the target clock information based on the target clock offset information and the target transmission delay information; Updating the clock information corresponding to the second base station based on the target clock information.

2. The method according to claim 1, characterized in that, the sending the clock synchronization message to the first base station includes: Sending the clock synchronization message to a first central processing unit in the first base station.

3. The method according to claim 1, characterized in that, when the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by the second base station includes: When the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by a second central processing unit in the second base station.

4. A clock synchronization processing device for 5G millimeter-wave base stations, characterized in that, the device is deployed in a synchronization processing device, and the synchronization processing device is used for clock synchronization processing between the 5G millimeter-wave base stations. The device includes: A first receiving module, configured to receive a clock signal sent by a clock source device; A conversion module, configured to convert the clock signal into a clock synchronization message, and the clock synchronization message includes target clock information; A sending module, configured to send the clock synchronization message to a first base station, and the first base station is a base station serving as a clock synchronization master device; A second receiving module, configured to receive the clock synchronization message sent by the second base station when the first base station sends the clock synchronization message to the second base station, where the second base station is a base station serving as a clock synchronization controlled device; A parsing module, configured to parse and process the clock synchronization message to obtain the target clock information; An updating module, configured to update the clock information corresponding to the second base station based on the target clock information; Wherein, the sending module includes a second sending unit, configured to send the clock synchronization message to a first switching device in the first base station; The second receiving module includes a second receiving unit, configured to receive the clock synchronization message sent by a second switching device in the second base station when the first base station sends the clock synchronization message to the second base station; The parsing module includes: A parsing unit, configured to parse and process the clock synchronization message to obtain initial clock offset information and initial transmission delay information; A first adjustment unit, configured to adjust the initial clock offset information and the initial transmission delay information based on a filtering algorithm to obtain updated clock offset information and updated transmission delay information; A second adjustment unit, configured to adjust the updated clock offset information and the updated transmission delay information based on a servo algorithm to obtain target clock offset information and target transmission delay information; A target clock information generating unit, configured to generate the target clock information based on the target clock offset information and the target transmission delay information.

5. An electronic device, Characterized in that, It includes: A processor; A memory for storing instructions executable by the processor; Wherein, the processor is configured to execute the instructions to implement the clock synchronization processing method for a 5G millimeter wave base station according to any one of claims 1 to 3.

6. A computer-readable storage medium, Characterized in that, When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the clock synchronization processing method for a 5G millimeter wave base station according to any one of claims 1 to 3.

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