Impedance matching network model based on square planar spiral inductor

Abstract

Based on the impedance matching network model of a square planar spiral inductor, each straight conductor segment in the planar spiral inductor is equivalent to a series inductance and a parasitic capacitance to ground. Considering the mutual inductance in each straight conductor segment, the two-port capacitance to ground at both ends of the planar spiral inductor is calculated. Y Parametric Model. The planar spiral inductor model obtained by this method takes into account the parasitic capacitance and mutual inductance effects in the inductor, which can help designers design RF microwave circuits more accurately, and based on this, an impedance matching network that can effectively filter out second harmonics was designed.

Description

Technical Field

[0001] This invention belongs to the technical field of radio frequency power amplifiers, specifically an impedance matching network model based on a square planar spiral inductor. Background Technology

[0002] Class E inverters are widely used in RF power supplies due to their simple structure and high efficiency. The efficiency and output waveform quality of power-stage Class E inverters depend on the precise design of the impedance matching network. Impedance matching networks are commonly implemented using high-precision series and parallel connections of inductors, capacitors, and transformers. In high-frequency circuits, magnetic components are very small. To further reduce size, minimize interference between components, and achieve high-power transmission, inductors are generally used in the form of planar spiral inductors. The relatively large width of these planar spiral inductors leads to a large parasitic capacitance to ground. The simulation and modeling of planar spiral inductors are complex due to the mutual coupling between the conductors and the parasitic capacitance between the conductors and the ground plane. Many researchers have proposed methods for calculating the self-inductance of planar spiral inductors, but these often neglect the influence of parasitic capacitance, resulting in inaccurate modeling of the inductance and consequently, significant deviations between the designed impedance matching network and the expected value. Summary of the Invention

[0003] To address the shortcomings of modeling planar spiral inductors in power stage impedance matching, this invention proposes an impedance matching network model based on a square planar spiral inductor. This model considers the mutual inductance between the inductor's straight conductors and its capacitance to ground, improving the modeling accuracy of the planar spiral inductor. It is also equivalent to a two-port network, making it easier to apply to impedance matching networks. This invention utilizes a parallel circuit of a planar spiral inductor and a capacitor to filter out second harmonics and constructs an impedance matching network based on this, effectively improving the output waveform quality.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0005] Based on the impedance matching network model of a square planar spiral inductor, each straight conductor in the square planar spiral inductor is equivalent to an LC circuit, where L is the self-inductance of the straight conductor and C is the parasitic capacitance of the straight conductor to ground. The entire square planar spiral inductor is a structure of at least two cascaded LC circuits, where the inductance on each straight conductor has mutual inductance with other parallel inductors. Counting from the outside of the inductor, the first straight conductor is the second straight conductor, and so on up to the Nth straight conductor. The inductance and capacitance of the first straight conductor are called L1 and C1, the inductance and capacitance of the second straight conductor are called L2 and C2, and so on, with the equivalent inductance and capacitance of the Nth straight conductor being called L1, C2, C2, and so on. N and C NOne end of L1 is connected to C1 and L2, and the other end of C1 is connected to ground. The other end of L2 is connected to C2 and L3, and the other end of C2 is grounded, and so on. N-1 One end is connected to C N-1 and L N C N-1 The other end is connected to the ground, L N The other end connects to C N C N The other end is grounded;

[0006] List L2 to L N The KVL equation of the mesh circuit, I i L represents i Current in the mesh:

[0007] (A+B)I+CI O =0 (1)

[0008] Where I = [I²...I] S-1 I S I S+1 ...I N ] T ,I O =[I1 I N+1 ] T ;

[0009]

[0010] in Let be the reactance of the parasitic capacitance of the i-th straight conductor;

[0011] B is a mutual inductance matrix of (N-1)×(N-1). When the straight conductors S and T are parallel and the current directions are the same, the corresponding position of the matrix (S-1, T-1) is jωM. S,T When straight conductors S and T are parallel and the current directions are opposite, the corresponding position of the matrix (S-1, T-1) is -jωM. S,T When the straight conductors S and T are perpendicular, the corresponding position (S-1, T-1) of the matrix is ​​0; when S = T, the value at the corresponding position (S, S) of the matrix is ​​jωL. S ;

[0012]

[0013] Therefore, we can deduce:

[0014] I = -(A + B) -1 CI O (2)

[0015] Next, write down I1 and I. N+1 The KVL equation for the mesh:

[0016] U0=(jωL1+jX C1 )I1-jX C1 I² + ∑(-1) P jωM 1,2P+1 I 2P+1 (3)

[0017] U N =jX CN (I N -I N+1 (4)

[0018] in

[0019] Substituting (2) into equations (3) and (4), we obtain the following form:

[0020]

[0021] Therefore, the square planar spiral inductor is equivalent to a standard Y-parameter two-port network.

[0022] As a further improvement of the present invention, the standard Y-parameter two-port network equivalent to the planar spiral inductor is designed with a second harmonic notch filter to filter the capacitor C. p The capacitor is connected in parallel with a planar square spiral inductor, and its impedance is jX. Cp This forms a new two-port network, whose Y parameter is expressed as:

[0023]

[0024] If Y′ 11 (2ω)=0, where ω is the angular frequency of the circuit's fundamental wave, and the impedance matching network suppresses the second harmonic.

[0025] As a further improvement of the present invention, the impedance matching network realizes the optimal drain-source impedance Z of the switching transistor from 50Ω in the Class E inverter. Dsopt ;

[0026] The impedance matching network has the following matching circuit: a square spiral inductor L1 is connected in series with a capacitor C1, one end of a capacitor C2 is connected to a capacitor C1, and the other end is grounded; inductor L2 and capacitor C3 form a parallel resonant circuit, one end of which is connected to C1 and C2, and the other end is connected to a 50Ω load and a capacitor C4, and the other end of the 50Ω load and the capacitor C4 is grounded.

[0027] Using the equivalent model of the inductor described above, when the impedance to ground of the end of inductor L1 connected to the switching transistor in this circuit is at the fundamental angular frequency ω, DSoptAt the same time, it can achieve soft switching of the main power switching transistor of Class E inverter and output rated power, and the waveform quality on 50Ω load is high.

[0028] Technical features and beneficial effects of the present invention:

[0029] This invention equates the straight conductors in a square planar spiral inductor to an LC circuit, and the planar spiral inductor to a cascade of multiple LC circuits. Through calculation, the equivalent circuit can be further modeled as a two-port model, and a second harmonic trap filter and an impedance matching network suitable for Class E inverters can be designed based on this two-port model. This invention fully considers the parasitic capacitance and mutual inductance effects of the planar spiral inductor, establishing a model of the square planar spiral inductor. This model helps designers accurately analyze the frequency characteristics of the square planar spiral inductor, and further, based on this two-port model, an impedance matching network for Class E inverters is designed, enabling soft switching of the main power switches and good output waveform quality in Class E inverters. Attached Figure Description

[0030] Figure 1 This is a planar view of a single-turn planar spiral inductor in an embodiment of the present invention;

[0031] Figure 2 This is the equivalent model of the single-turn planar spiral inductor in the embodiments of the present invention;

[0032] Figure 3 This is a schematic diagram of GMD calculation in an embodiment of the present invention;

[0033] Figure 4 This is a simulation model of a single-turn planar spiral inductor in an embodiment of the present invention;

[0034] Figure 5 The Y-axis represents the simulation data of the single-turn planar spiral inductor in this embodiment of the invention and the Y-axis represents the modeled and calculated data. 11 Amplitude comparison;

[0035] Figure 6 The structure of the impedance matching network proposed in this embodiment of the invention;

[0036] Figure 7 The circuit board of the impedance matching network proposed in the embodiments of the present invention;

[0037] Figure 8 The output waveform of the Class E inverter built using the proposed impedance matching network in this embodiment of the invention is shown. Detailed Implementation

[0038] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0039] To address the shortcomings of planar spiral inductor modeling in power stage impedance matching, a modeling method for square planar spiral inductors is proposed. This method considers the mutual inductance between the straight conductors and the capacitance of each conductor to ground, improving the modeling accuracy of the planar spiral inductor and equating it to a two-port network. Furthermore, this invention utilizes a circuit combining the planar spiral inductor and capacitor in parallel to filter out second harmonics and constructs an impedance matching network based on this, effectively improving the output waveform quality.

[0040] A method for modeling a square planar spiral inductor for Class E inverters includes the following: each straight conductor in the square planar spiral inductor is equivalent to an LC circuit, and the entire square planar spiral inductor can be regarded as multiple cascaded LC circuits.

[0041] Analyze the above circuit: First, list L2 to L... N The KVL equations for the mesh circuit in which it is located.

[0042] (A+B)I+CI O =0 (1)

[0043] Where I = [I²...I] S-1 I S I S+1 ...I N ] T ,I O =[I1 I N+1 ] T ;

[0044]

[0045] B is a mutual inductance matrix of (N-1)×(N-1). When two straight conductors S and T are parallel and the current directions are the same, the corresponding position of the matrix (S-1, T-1) is jωM. S,T When two straight conductors S and T are parallel and the current directions are opposite, the corresponding position of the matrix (S-1, T-1) is -jωM. S,T When the two straight conductors S and T are perpendicular, the value at position (S-1, T-1) of the matrix is ​​0; when S = T, the value at position (S, S) of the matrix is ​​jωL. S ;

[0046]

[0047] From this, we can deduce:

[0048] I = -(A + B) -1 CI O (2)

[0049] Write down I1 and I N+1The KVL equation for the mesh:

[0050] U0=(jωL1+jX C1 )I1-jX C1 I² + ∑(-1) P jωM 1,2P+1 I 2P+1 (3)

[0051] U N =jX CN (I N -I N+1 (4)

[0052] in

[0053] Substituting into the above equation, we obtain the following form:

[0054]

[0055] This transforms the square planar spiral inductor into a standard two-port network. Then, I1 and I... N+1 The KVL equation of the mesh is given, and the I = [I2 I3...I] obtained in step 1) is used. N ] T with I O =[I1 I N+1 ] T Substituting the relational formula, we can obtain the two-port model of the square planar spiral inductor.

[0056] Based on the two-port model described above, a second harmonic notch filter can be constructed to block the transmission of second harmonic energy. The capacitor C... p Connected in parallel with a square planar spiral inductor, a new two-port network is formed. The corresponding parameter model can be obtained through calculation. When the Y-parameter Y′ of the new two-port network... 11 When the value is 0, the network can effectively filter out the second harmonic.

[0057] Using the aforementioned square planar spiral inductor and second harmonic notch filter, an impedance matching network for a Class E inverter can be designed. The network structure is as follows: the square spiral inductor L1 is connected in series with capacitor C1; one end of capacitor C2 is connected to capacitor C1, and the other end is grounded; inductor L2 and capacitor C3 form a parallel resonant circuit, one end of which is connected to C1 and C2, and the other end is connected to a 50Ω load and capacitor C4. The other end of the 50Ω load and capacitor C4 is grounded. Using the equivalent model of the inductor, when the impedance of the end of inductor L1 connected to the switching transistor in this circuit to ground is at the fundamental angular frequency ω = Z... DSopt At the same time, it can realize the function of a Class E inverter, and the waveform quality on a 50Ω load is high.

[0058] The following case illustrates this point.

[0059] To verify the proposed impedance matching network design method based on a square planar spiral inductor model, simulations were performed using a single-turn square planar spiral inductor. The shape and size of the single-turn square planar spiral inductor are as follows: Figure 1 As shown, the lengths of the first to third straight conductors are 15mm, the length of the fourth straight conductor is 10mm, and the width of each conductor is 3mm. The distance d between the straight conductor and the ground plane is 2mm, and the dielectric is an alumina ceramic plate. This planar spiral inductor can be equivalently represented as follows: Figure 2 The equivalent circuit is as follows:

[0060] Firstly, according to Calculate the parasitic capacitance of a straight conductor and use it to calculate the corresponding capacitance. Among them, C i S is the length of the i-th straight conductor. i ω is the area of ​​the i-th straight conductor relative to the ground plane, d is the distance of the planar helical inductor to the ground, ε0 and ε are the vacuum permittivity and the relative permeability of the medium between the planar helical inductor and the ground plane, respectively, and ω is the angular frequency of the circuit operation.

[0061] Then calculate the self-inductance and mutual inductance of each straight conductor. For a thin-film inductor with a rectangular cross-section, its self-inductance is:

[0062]

[0063] Where l is the length of the straight conductor, w and t are the width and thickness of the straight conductor, respectively, in cm; μ is the relative permeability of the conductor material, T is a correction coefficient related to the conductor thickness and frequency, which is 1 at high frequencies and small thicknesses, and less than 1 at low frequencies and large thicknesses; L is in nH.

[0064] The mutual inductance between two parallel conductors is a function of the conductor lengths and their geometric mean distance GMD, typically:

[0065] M = 2lQ (7)

[0066] Where M is the mutual inductance nH;

[0067] l is the conductor length in cm;

[0068] Q is the mutual inductance parameter, calculated as follows:

[0069]

[0070] Where l is the length of the subscript corresponding to Q, and GMD is the geometric mean distance between the two conductors. It is approximately equal to the distance d between the centerlines of the two conductors. The exact value of GMD can be calculated as:

[0071]

[0072] Consider as Figure 3 The diagram shows two wires with lengths j and m respectively. In this case:

[0073] 2M jm =+(M m+p +M m+q )-(M p +M q (10)

[0074] M m+p =2l m+p Q m+p =2(m+p)Q m+p (11)

[0075] Q m+p It is the mutual inductance parameter for GMD / (m+p);

[0076] This allows us to write out matrices A, B, C, and equations, and calculate the form of the Y matrix of equation. Figure 4 It is an electromagnetic simulation model that has been built, and ultimately Y 11 The error between the simulated and calculated amplitude values ​​is as follows: Figure 5 As shown, the errors between the calculated and simulated values ​​are both less than 15%, and the errors gradually decrease with increasing frequency. The errors of other parameters in the Y parameter are similar to those of the simulated value. 11 similar.

[0077] To verify the feasibility of the proposed impedance matching network, a network was constructed as follows: Figure 6 The impedance matching network shown is in which L1 and L2 are both square planar spiral inductors. Figure 7 This is the corresponding 3D diagram of the circuit board. This impedance matching network can achieve a 2500W sinusoidal RF output at 13.56MHz, and the output waveform is as follows. Figure 8 As shown, calculations show that the second harmonic suppression ratio is less than -55dBc, meeting general industrial requirements.

[0078] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any other way. Any modifications or equivalent changes made based on the technical essence of the present invention shall still fall within the scope of protection claimed by the present invention.

Claims

1. Impedance matching network model based on square planar spiral inductance, characterized in that, Each straight wire in the square planar spiral inductor is equivalent to an LC circuit, L is the self-inductance of the straight wire, and C is the parasitic capacitance of the straight wire to the reference ground; the entire square planar spiral inductor is a structure in which at least two LC circuits are cascaded, wherein the inductance on each straight wire has mutual inductance with other parallel inductances; the first straight wire is the first straight wire from the outside of the inductor, and the second straight wire is the second straight wire, and so on until the Nth straight wire; The inductance and capacitance of the first straight wire are called L1 and C1, respectively; the inductance and capacitance of the second straight wire are called L2 and C2, respectively; and so on. The equivalent inductance and capacitance of the Nth straight wire are called L... N and C N One end of L1 is connected to C1 and L2, and the other end of C1 is connected to ground. The other end of L2 is connected to C2 and L3, and the other end of C2 is grounded, and so on. N-1 One end is connected to C N-1 and L N C N-1 The other end is connected to the ground, L N The other end connects to C N C N The other end is grounded; Column write L2 to L N The KVL equation for the mesh containing L i represents L i The current in the mesh containing L (A + B)I + CI O = 0 (1); where I = [I2... I S-1 I S I S+1 ... I N ] Τ ,I O = [I1 I N+1 ] Τ ; wherein is the reactance of the parasitic capacitance of the i-th straight wire; B is a mutual inductance matrix of (N-1) x (N-1), when the straight conductors S, V are parallel and the current directions are the same, the position (S-1, V-1) corresponding to the matrix is jωM S,V , when the straight conductors S, V are parallel and the current directions are opposite, the position (S-1, V-1) corresponding to the matrix is -jωM S,V , when the straight conductors S, V are perpendicular, the position (S-1, V-1) corresponding to the matrix is 0; when S=V, the value at the position (S, S) corresponding to the matrix is jωL S ; Thus, the following is obtained: I = -(A + B) -1 CI O (2); Then write down I1 and I N+1 KVL equation for the mesh in which it resides: U0= (jωL1+ jX C1 )I1- jX C1 I2+∑(-1) P jωM 1,2P+1 I 2P+1 (3) U N = jX CN (I N -I N+1 ) (4); wherein Substituting equation (2) into equations (3) and (4) obtains the following equation: Thus, the square planar spiral inductor is equivalent to a standard Y-parameter two-port network; The impedance matching network realizes 50Ω to switch tube drain-source optimal impedance Z of class E inverter Dsopt ; The matching circuit of the impedance matching network is as follows: the square spiral inductor L1 is connected in series with the capacitor C1, one end of the capacitor C2 is connected with the capacitor C1, and the other end is grounded; the inductor L2 and the capacitor C3 constitute a parallel resonance circuit, one end of the circuit is connected with C1 and C2, the other end is connected with a 50Ω load and a capacitor C4, and the other end of the 50Ω load and the capacitor C4 is grounded.

2. The model of impedance matching network based on square planar spiral inductance according to claim 1, characterized in that, The planar spiral inductor equivalent standard Y parameter two-port network is designed with a second harmonic wave trap, and a capacitor C p is connected in parallel with the planar square spiral inductor, and the impedance of the capacitor is jX Cp , to form a new two-port network, and the Y parameter of the new two-port network is represented as: If Y' = 0 11 (2ω) = 0, where ω is the angular frequency of the fundamental of the circuit, then the impedance matching network suppresses the second harmonic.

Images