Display substrate and display device

Abstract

This application provides a display substrate and a display device. The display substrate includes a display area and a border area, the border area including a first border area and a second border area. The display substrate includes a substrate, a light-emitting structure layer located on one side of the substrate, a driving circuit layer located between the substrate and the light-emitting structure layer, and connecting lines. The light-emitting structure layer includes a plurality of sub-pixels located in the display area and a plurality of sub-pixels located in the second border area. The driving circuit layer includes a plurality of gate driving circuits and a plurality of pixel circuits, the gate driving circuits being located in the first border area. The plurality of gate driving circuits includes a start row gate driving circuit. The connecting lines are located in the first border area, one end of the connecting lines being electrically connected to the start row gate driving circuit, and the other end being used for electrical connection to a driving chip, the driving chip providing driving signals to the gate driving circuits. The orthographic projection of at least one pixel circuit on the substrate is located on the side of the orthographic projection of the connecting lines on the substrate opposite to the display area.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display substrate and a display device. Background Technology

[0002] In the mass production process of display panels, multiple display panel structures are typically fabricated on a large-size substrate, and then cut to obtain multiple display panels. Each display panel includes connection traces for connecting the starting row gate driving circuit to the driving chip. At least a portion of these connection traces are located within the cutting area of ​​the display panel. During the cutting process, at least a portion of these connection traces may be cut off, causing the starting row gate driving circuit to malfunction and affecting the normal display of the display panel. Summary of the Invention

[0003] This application provides a display substrate and a display device.

[0004] According to a first aspect of the present application, a display substrate is provided. The display substrate includes a display area and a border area, the border area including a first border area and a second border area adjacent to and located on the side of the first border area; the display substrate includes:

[0005] Substrate;

[0006] A light-emitting structure layer located on one side of the substrate, the light-emitting structure layer including a plurality of sub-pixels located in the display area and a plurality of sub-pixels located in the second border area;

[0007] A driving circuit layer is located between the substrate and the light-emitting structure layer. The driving circuit layer includes a plurality of gate driving circuits and a plurality of pixel circuits. The gate driving circuits are located in the first border area, and the pixel circuits are electrically connected to the sub-pixels. The plurality of gate driving circuits includes a start row gate driving circuit.

[0008] A connecting line is located in the first border area. One end of the connecting line is electrically connected to the starting row gate driving circuit, and the other end is used to electrically connect to the driving chip. The driving chip provides a driving signal to the starting row gate driving circuit. The orthogonal projection of at least one pixel circuit on the substrate is located on the side of the orthogonal projection of the connecting line on the substrate that is away from the display area.

[0009] In one embodiment, the driving circuit layer further includes a first conductive line and a second conductive line. One end of the first conductive line is connected to the gate driving circuit, and the other end is connected to the connecting line. One end of the second conductive line is used to electrically connect to the driving chip, and the other end is connected to the connecting line. The first conductive line and the second conductive line are disposed on the same layer. The display substrate further includes an insulating layer between the first conductive line and the connecting line. The insulating layer has a plurality of through holes, and the first conductive line and the second conductive line are electrically connected to the connecting line through the through holes.

[0010] In one embodiment, the extension directions of the first conductive line and the second conductive line intersect the extension direction of the connecting line, and in the extension direction of the connecting line, the first conductive line and the second conductive line are located on opposite sides of the connecting line; the orthographic projection of the first conductive line on the substrate overlaps with the orthographic projection of one end of the connecting line on the substrate, and the orthographic projection of the second conductive line on the substrate overlaps with the orthographic projection of the other end of the connecting line on the substrate.

[0011] In one embodiment, the display substrate further includes a conductive portion located within the through-hole, and the display substrate further includes a conductive structure, at least a portion of which is located within the through-hole and covers the conductive portion.

[0012] In one embodiment, the conductive structure portion is located on the side of the insulating layer opposite to the substrate, and the portion of the conductive structure on the side of the insulating layer opposite to the substrate covers the via.

[0013] In one embodiment, the plurality of gate driving circuits further includes a dummy gate driving circuit; the driving circuit layer further includes a target signal line located in the first frame region, the target signal line being electrically connected to the dummy gate driving circuit; the target signal line includes the connecting line, a first sub-signal line, and a second sub-signal line, wherein in the extension direction of the connecting line, the first sub-signal line and the second sub-signal line are located on opposite sides of the connecting line, and there are gaps between the connecting line and both the first and second sub-signal lines.

[0014] In one embodiment, the driving circuit layer further includes a conductive portion disposed on the same layer as the first conductive line, wherein the orthographic projection of the gap on the substrate does not overlap with the orthographic projection of the conductive portion on the substrate.

[0015] In one embodiment, the driving circuit layer includes a plurality of signal lines, and the width of the connecting line is greater than the width of the signal line.

[0016] In one embodiment, the material of the connecting wire is different from the material of the signal wire.

[0017] In one embodiment, the sub-pixels of the second border area are arranged in multiple rows, and the arrangement direction of the sub-pixels in the same row is the same as the extension direction of the second border area; the multiple rows of sub-pixels in the second border area include at least two rows of first sub-pixels adjacent to the display area, and the gate driving circuit electrically connected to the at least two rows of first sub-pixels is configured to output a black insertion signal to the pixel circuit of the corresponding first sub-pixel during the display of a frame, so that the at least two rows of first sub-pixels remain non-luminous.

[0018] In one embodiment, the plurality of gate driving circuits further includes a dummy gate driving circuit; the driving circuit layer further includes a target signal line located in the second border area, the dummy gate driving circuit being electrically connected to the target signal line; the target signal line includes the connecting line; the multiple rows of sub-pixels in the second border area further include at least one row of second sub-pixels located on the side of the at least two rows of first sub-pixels facing away from the display area, the dummy gate driving circuit being electrically connected to the pixel circuit of the row of second sub-pixels.

[0019] In one embodiment, the light-emitting structure layer includes liquid crystal molecules, and the display substrate further includes a sealing adhesive located in the second border area. The sealing adhesive surrounds the liquid crystal molecules and is located on the side of the at least two rows of first sub-pixels facing away from the display area, and on the side of the at least one row of second sub-pixels facing the display area, or the orthographic projection of the sealing adhesive on the substrate overlaps with the orthographic projection of the second sub-pixels on the substrate.

[0020] In one embodiment, the display substrate further includes a first polarizer located on the side of the substrate opposite to the driving circuit layer and a second polarizer located on the side of the light-emitting structure layer opposite to the substrate; the polarization axis of the first polarizer is perpendicular to the polarization axis of the second polarizer; the edges of the first polarizer and the edges of the second polarizer are respectively flush with the outer edges of the second frame area.

[0021] According to a second aspect of the present application, a display device is provided, the display device including the display substrate described above.

[0022] The display substrate and display device provided in this application embodiment, by providing a connection line connecting the starting row gate driving circuit and the driving chip in the second frame area, and the orthogonal projection of at least one pixel circuit on the substrate is located on the side of the orthogonal projection of the connection line on the substrate away from the display area, can avoid the connection line being cut off during the cutting of the large-size display substrate, thus solving the problem that the starting row driving circuit cannot work due to the cutting off of the connection line used to connect the starting row gate driving circuit and the driving circuit during the cutting of the large-size display substrate, and ensuring the normal display of the display substrate. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of a display substrate provided in an exemplary embodiment of this application;

[0024] Figure 2 This is a schematic diagram of the structure of the driving circuit layer of a display substrate provided in an exemplary embodiment of this application;

[0025] Figure 3 yes Figure 2 A partial structural schematic diagram of the driving circuit layer of the display substrate is shown.

[0026] Figure 4 This is a partial structural schematic diagram of the driving circuit layer of a display substrate provided in another exemplary embodiment of this application;

[0027] Figure 5 This is a partial structural schematic diagram of a display substrate provided in an exemplary embodiment of this application;

[0028] Figure 6 This is a partial structural schematic diagram of a display substrate provided in an exemplary embodiment of this application;

[0029] Figure 7 This is a partial cross-sectional view of a display substrate provided in an exemplary embodiment of this application. Detailed Implementation

[0030] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0031] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0032] It should be understood that although the terms first, second, third, etc., may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0033] This application provides a display substrate and a display device. The display substrate and display device of this application will be described in detail below with reference to the accompanying drawings. Unless otherwise specified, the features in the following embodiments can complement or combine with each other.

[0034] This application provides a display substrate. For example... Figure 1 As shown, the display substrate includes a display area 101 and a border area. The border area includes a first border area 102 and a second border area 103 that is adjacent to the first border area 102 and located on the side of the first border area 102.

[0035] The display substrate includes a substrate, a light-emitting structure layer, a driving circuit layer, and connecting lines. The light-emitting structure layer is located on one side of the substrate. Figure 1 As shown, the light-emitting structure layer includes a plurality of sub-pixels 10 located in the display area 101 and a plurality of sub-pixels 10 located in the second border area 103. The driving circuit layer is located between the substrate and the light-emitting structure layer, and includes a plurality of gate driving circuits and a plurality of pixel circuits. The plurality of gate driving circuits include a start row gate driving circuit. The pixel circuits are electrically connected to the sub-pixels. Figures 1 to 3 As shown, the gate driving circuit 20 is located in the first border area 102; the connecting line 30 is located in the first border area 102, one end of the connecting line 30 is electrically connected to the starting row gate driving circuit, and the other end is used to electrically connect to the driving chip, which provides a driving signal to the starting row gate driving circuit. At least one pixel circuit 40 has its orthographic projection on the substrate located on the side of the connecting line 30 on the substrate opposite to the display area 101.

[0036] The display substrate provided in this application embodiment, by providing a connection line connecting the starting row gate driving circuit and the driving chip in the second border area, and having at least one pixel circuit's orthogonal projection on the substrate located on the side of the connection line's orthogonal projection on the substrate away from the display area, can avoid the connection line being cut off during the cutting process of the large-size display substrate. This solves the problem that the starting row driving circuit cannot work due to the cutting off of the connection line used to connect the starting row gate driving circuit and the driving circuit during the cutting process of the large-size display substrate, and ensures the normal display of the display substrate.

[0037] In one embodiment, such as Figure 1 As shown, the bezel area of ​​the display substrate may include two first bezel areas 102 disposed opposite to each other. The display substrate also includes a third bezel area 104 disposed opposite to the second bezel area 103 and extending in the same direction. The second bezel area 103 and the third bezel area 104 may extend along a first direction X, and the two first bezel areas 102 may extend along a second direction Y. The first direction X and the second direction Y may be perpendicular to each other. The two first bezel areas 102 may each be provided with a gate driving circuit 20. The third bezel area 104 may be provided with fan-out lines, flexible circuit boards, etc. The flexible circuit board may be electrically connected to the driving chip, and the connecting lines may be electrically connected to the driving chip through electrical connection with the flexible circuit board. In the process of cutting the prepared large-size display substrate to obtain multiple display substrates, if the cutting area extends along the X direction, the large-size display substrate is cut along the X direction, resulting in the connection lines located in the first bezel area 102 being cut off. The second bezel area 103 and the area of ​​the first bezel area 102 adjacent to the second bezel area 103 are the areas retained after the bezel area is cut.

[0038] In one embodiment, the dimension of the display substrate in the first direction X is larger than its dimension in the second direction Y.

[0039] In one embodiment, such as Figure 1 As shown, the sub-pixels 10 of the light-emitting structure layer are arranged in multiple rows. The multiple rows of sub-pixels are arranged along the extension direction of the first border area 102, which is also along the second direction Y. Multiple sub-pixels located in the same row are arranged along the first direction X. The display area 101 and the second border area 103 are respectively provided with multiple rows of sub-pixels.

[0040] In one embodiment, a sub-pixel includes a first electrode, a second electrode located on the side of the first electrode facing away from the substrate, and liquid crystal molecules located between the first electrode and the second electrode. The display substrate includes an array substrate and a color filter substrate. The array substrate includes a substrate, a driving circuit layer, and a first electrode. The color filter substrate may include a second electrode and a color filter layer located on the side of the second electrode facing away from the substrate. The fabrication process of the display substrate can be as follows: First, a large-size array substrate and a large-size color filter substrate are fabricated; then, a sealant is coated on one of the large-size color filter substrate and the large-size array substrate, and liquid crystal material is added to the other; subsequently, the large-size color filter substrate and the large-size array substrate are assembled to obtain a large-size display substrate; finally, the large-size display substrate is cut to obtain multiple small-size display substrates. Alternatively, the fabrication process of the display substrate can be as follows: First, a small-size array substrate and a small-size color filter substrate are fabricated; then, a sealant is coated on one of the small-size color filter substrate and the small-size array substrate, and liquid crystal material is added to the other; subsequently, the small-size color filter substrate and the small-size array substrate are assembled to obtain a small-size display substrate. The small-size display substrate is also the display substrate provided in the embodiments of this application.

[0041] In one embodiment, the plurality of gate driving circuits on the array substrate further include non-starting row gate driving circuits. The starting row gate driving circuit operates after receiving a driving signal from the driving chip and outputs cascaded signals to the other non-starting row gate driving circuits. The number of starting row gate driving circuits can be one or more, for example, three.

[0042] In one embodiment, such as Figure 2 As shown, the driving circuit layer includes a first conductive layer 81 and a second conductive layer 82 located on the side of the first conductive layer 81 facing away from the substrate. Both the pixel circuit and the gate driving circuit can include thin-film transistors (TFTs). Each TFT includes an active layer, a gate electrode, a source electrode, and a drain electrode. The gate electrode can be located on the side of the active layer facing the substrate, while the source and drain electrodes can be located on the side of the active layer facing away from the substrate. The driving circuit layer may also include multiple signal lines, such as scan signal lines, data signal lines, low-level power signal lines 92, high-level power signal lines, and clock signal lines 91.

[0043] In one embodiment, the gate electrode, scan signal line, etc., may be located in the first conductive layer 81; the source electrode, drain electrode, data signal line, low-level power signal line, high-level power signal line, clock signal line, etc., may be located in the second conductive layer 82.

[0044] In one embodiment, the first conductive layer 81 and the second conductive layer 82 may be made of the same material, for example, both the first conductive layer 81 and the second conductive layer 82 may be made of copper. In other embodiments, the first conductive layer 81 and the second conductive layer 82 may be made of different materials.

[0045] In one embodiment, such as Figure 3 and Figure 4 As shown, the driving circuit layer further includes a first conductive line 70 and a second conductive line 60. One end of the first conductive line 70 is connected to the driving chip, and the other end is connected to the connecting line 30. One end of the second conductive line 60 is connected to the starting row gate driving circuit, and the other end is connected to the connecting line 30. The first conductive line 70 and the second conductive line 60 are disposed on the same layer. The display substrate further includes an insulating layer between the first conductive line 70 and the connecting line 30. The insulating layer has multiple through holes, and the first conductive line 70 and the second conductive line 60 are electrically connected to the connecting line 30 through the through holes. Specifically, the display substrate further includes conductive portions located within the through holes, and the first conductive line 70 and the second conductive line 60 are electrically connected to the connecting line 30 through the conductive portions located within the through holes. The connecting line 30 can be connected to multiple second conductive lines 60. In this embodiment, the connecting line 30 can be located in the second conductive layer 82. In some embodiments, the number of second conductive lines 60 may be the same as the number of gate driving circuits corresponding to the starting row sub-pixels, and the first conductive lines 70 are connected to each gate driving circuit corresponding to the starting row sub-pixels.

[0046] In one embodiment, such as Figure 3 and Figure 4 As shown, the extending directions of the first conductive line 70 and the second conductive line 60 intersect the extending direction of the connecting line 30, and the first conductive line 70 and the second conductive line 60 are located on opposite sides of the connecting line 30 in the extending direction of the connecting line 30. The orthographic projection of the first conductive line 70 on the substrate overlaps with the orthographic projection of one end of the connecting line 30 on the substrate, and the orthographic projection of the second conductive line 60 on the substrate overlaps with the orthographic projection of the other end of the connecting line 30 on the substrate. With this configuration, the first conductive line 70 and the second conductive line 60 can be directly connected to the connecting line 30 through through-holes without the need for other adapter structures, which helps to simplify the structure of the display substrate. Figure 3 and Figure 4 In the embodiment shown, the first conductive line 70 and the second conductive line 60 extend along the second direction Y, and the connecting line 30 extends along the first direction X.

[0047] In one embodiment, the plurality of gate driving circuits includes a dummy gate driving circuit. A dummy gate driving circuit refers to a gate driving circuit that does not provide gate driving signals to the pixel circuit. Figure 3 and Figure 4As shown, the driving circuit layer further includes a target signal line 50 located in the first bezel area 102, which is electrically connected to the dummy gate driving circuit. The target signal line 50 includes the connecting line 30, a first sub-signal line 51, and a second sub-signal line 52. In the extending direction of the connecting line 30, the first sub-signal line 51 and the second sub-signal line 52 are located on opposite sides of the connecting line 30, and a gap 501 exists between the connecting line 30 and both the first sub-signal line 51 and the second sub-signal line 52. Thus, by using a portion of the target signal line 50 located within the first bezel area 102 as the connecting line 30, no additional connecting line is required, which helps simplify the fabrication process of the display substrate.

[0048] In some embodiments, after the array substrate is prepared and before the array substrate and the color filter substrate are aligned, the target signal line 50 can be cut using a laser etching process to divide the target signal line 50 into three parts: a first sub-signal line 51, a second sub-signal line 52, and a connecting line 30. Two through-holes can be formed on the insulating layer between the first conductive layer 81 and the second conductive layer 82 using a laser etching process. One through-hole exposes a portion of the first conductive line 70, and the other through-hole exposes a portion of the second conductive line 60. Simultaneously with the laser etching, the ends of the connecting lines 30 melt and enter into the through-holes to form conductive portions, thereby connecting the connecting lines to the first conductive line 70 and the second conductive line 60.

[0049] In one embodiment, the driving circuit layer further includes a conductive portion disposed in the same layer as the first conductive line 70, wherein the orthographic projection of the gap 501 on the substrate does not overlap with the orthographic projection of the conductive portion on the substrate. This configuration prevents the laser energy from acting on the conductive portion during laser etching processes to cut the target signal line 50 and to etch vias in the insulating layer, thus avoiding melting of the conductive portion and electrical connection with other conductive portions, which could affect the performance of the display substrate. In some embodiments, the conductive portion may include a gate electrode, signal line, etc., located in the first conductive layer 81.

[0050] In one embodiment, such as Figure 3 As shown, the target signal line 50 is the clock signal line 91. In another embodiment, as... Figure 4 As shown, the target signal line 50 is a low-level power signal line 92. The orthographic projections of both the clock signal line 91 and the low-level power signal line 92 on the substrate overlap with the orthographic projections of the first conductive line 70 on the substrate, and also overlap with the orthographic projections of the second conductive line 60 on the substrate. Therefore, a portion of both the clock signal line 91 and the low-level power signal line 92 can serve as connecting lines 30 to facilitate the connection of the connecting lines 30 with the first conductive line 70 and the second conductive line 60.

[0051] In another embodiment, the width of the connection line 30 is greater than the width of the signal line in the driving circuit layer. In this embodiment, the connection line 30 can be formed after the first conductive layer 81 and the second conductive layer 82 are formed, and the connection line 30 can be formed by sputtering. Thus, the connection line 30 is independent of the layout of the first conductive layer 81 and the second conductive layer 82, and the position of the connection line 30 is more flexible. In some embodiments, the connection line 30 can be located in the gap between adjacent conductive structures in the second conductive layer 82. In other embodiments, the driving circuit layer may include a planarization layer located on the side of the second conductive layer 82 facing away from the substrate, and the connection line 30 can be located on the side of the planarization layer 80 facing away from the substrate. Compared with the signal line in the driving circuit layer, the connection line 30 formed by sputtering has a larger width and rougher edges.

[0052] Furthermore, the material of the connecting line 30 is different from the material of the signal lines of the driving circuit layer. The material of the connecting line 30 can be tungsten, which has high stability and is not easily oxidized, thus avoiding oxidation of the connecting line 30 and affecting its electrical connection with the first conductive line 70 and the second conductive line 60.

[0053] In one embodiment, the display substrate further includes a conductive structure, at least a portion of which is located within the through-hole and covers the conductive portion. Since the conductive portion within the through-hole is formed by melting the end of the connecting line 30 during laser etching, the amount of melting and entering the through-hole from the end of the connecting line 30 is uncontrollable, easily leading to poor contact between the conductive portion and the first conductive line 70 and the second conductive line 60. By providing a conductive structure, with at least a portion located within the through-hole and covering the conductive portion, the electrical connection effect between the connecting line 30 and the first conductive line 70 and the second conductive line 60 can be improved.

[0054] In one embodiment, the conductive structure portion is located on the side of the insulating layer opposite to the substrate, and this portion covers the via. This ensures that a larger portion of the conductive structure enters the via during its formation, which helps to avoid poor electrical connection between the connecting line 30 and the first conductive line 70 and the second conductive line 60.

[0055] In some embodiments, the conductive structure may be formed using a sputtering process. Specifically, the conductive structure is sputtered at the via, such that during the sputtering process, a portion of the conductive structure enters the via. The portion of the conductive structure outside the via covers at least a portion of the connecting line 30.

[0056] In some embodiments, the material of the conductive structure may be tungsten. Tungsten has high stability and is not easily oxidized, which can prevent the conductive structure from being oxidized and affecting its electrical connection with the first conductive line 70 and the second conductive line 60.

[0057] In one embodiment, such as Figure 5 As shown, the second border area 103 includes at least two rows of first sub-pixels 12 adjacent to the display area 101. A gate driving circuit electrically connected to the at least two rows of first sub-pixels 12 is configured to output a black insertion signal to the pixel circuit of the corresponding first sub-pixel during the display of one frame, causing the at least two rows of first sub-pixels 12 to remain non-illuminating. The second border area 103 has sub-pixels. Since the second border area is the area retained after the cutting of the cutting area, the second border area of ​​the display substrate does not have a black light-shielding layer. When the display substrate displays an image, the electrodes of the sub-pixels in the second border area 103 are easily coupled to signal lines, causing the sub-pixels of the second border area 103 to emit light—that is, the sub-pixels of the border area, which should be black, to emit light, affecting the user experience. By setting each row of first sub-pixels adjacent to the display area to remain non-illuminating during the display of one frame, the situation of first sub-pixels emitting light can be avoided. In an exemplary embodiment, after the pixel circuit receives the black insertion signal, the driving transistor of the pixel circuit is turned off.

[0058] Furthermore, such as Figure 5 As shown, when the target signal line in the first border area includes the connecting line, the multiple rows of sub-pixels in the second border area also include at least one row of second sub-pixels 11 located on the side of the at least two rows of first sub-pixels 12 facing away from the display area. The dummy gate driving circuit is electrically connected to the pixel circuit of the row of second sub-pixels 11. With this configuration, using a portion of the target signal line of the second sub-pixel 11 as a connecting line does not affect the fact that the first sub-pixel 12 remains non-illuminating during the display of one frame.

[0059] In another embodiment, when a large display substrate is cut along the second direction Y to obtain multiple display substrates, the first border area 102 of the display substrate is provided with multiple sub-pixels 10. The multiple sub-pixels 10 of the first border area 102 are arranged in multiple columns, and the sub-pixels 10 in the same column are arranged along the second direction Y. The multiple columns of sub-pixels in the first border area 102 include at least two columns of third sub-pixels 13 adjacent to the display area 101. The gate driving circuit electrically connected to the at least two columns of third sub-pixels 13 is configured to output a black insertion signal to the pixel circuit of the corresponding third sub-pixel during the display of a frame, so that the at least two columns of third sub-pixels 13 remain non-luminous. The first border area of ​​the display substrate is not provided with a black light-shielding layer. When the display substrate displays an image, the electrodes of the sub-pixels in the first border area 102 are easily coupled with signal lines, which causes the sub-pixels in the first border area 102 to emit light, that is, the sub-pixels of the border area that should be black emit light, affecting the user experience. By setting the third sub-pixels of each column adjacent to the display area to remain non-illuminating during the display of a frame, the first border area can be made black during the display of a frame.

[0060] In one embodiment, such as Figure 5 and Figure 6 As shown, the pixel circuit 40 of a row of sub-pixels 10 is connected to one scan signal line 97. In other embodiments, the pixel circuit 40 of a row of sub-pixels 10 may be connected to two or three scan signal lines 97.

[0061] In one embodiment, such as Figure 7 As shown, the light-emitting structure layer includes liquid crystal molecules 201, and the display substrate also includes a sealing adhesive 24 located in the second border region 103, the sealing adhesive 24 surrounding the liquid crystal molecules 201. The second border region 103 includes a first sub-border region 1031 and a second sub-border region 1032 located on the side of the first sub-border region 1031 facing away from the display region 101. A first sub-pixel 12 is located in the first sub-border region 1031, and a second sub-pixel 12 is located in the second sub-border region 1032. The sealing adhesive 24 is located in the second sub-border region 1032. That is, the at least two rows of first sub-pixels 12 are located outside the display region 101, and are located on the side of the at least one row of second sub-pixels 11 facing the display region 101, or the orthographic projection of the sealing adhesive 24 on the substrate overlaps with the orthographic projection of the second sub-pixels 11 on the substrate. With this configuration, the sealing adhesive 24 can prevent liquid crystal molecules from flowing to the area of ​​the second border area 103 located outside the first sub-pixel 12. Therefore, the second sub-pixel 11 does not contain liquid crystal molecules and cannot emit light, so that all pixels of the second border area 103 do not emit light during the display of one frame.

[0062] In one embodiment, such as Figure 7 As shown, the color filter substrate 95 of the display substrate includes a substrate layer 951 and a color filter layer 952 located on the side of the substrate layer 951 facing the liquid crystal molecules 201; the array substrate 96 of the display substrate includes a substrate 961 and a driving circuit layer 962 located on the side of the substrate 961 facing the liquid crystal molecules 201. The color filter layer 952 and the driving circuit layer 962 may be located in the display area 101, the first frame area, and the first sub-frame area 1021.

[0063] In one embodiment, such as Figure 7As shown, the display substrate further includes a first polarizer 93 located on the side of the substrate 961 opposite to the driving circuit layer 962 and a second polarizer 94 located on the side of the light-emitting structure layer opposite to the substrate 961; the polarization axis of the first polarizer 93 is perpendicular to the polarization axis of the second polarizer 94; the edges of the first polarizer 93 and the second polarizer 94 are respectively flush with the outer edge of the second frame area 103. With this configuration, light incident on the area of ​​the second frame area 103 where no liquid crystal molecules are present cannot escape, making the entire area of ​​the second frame area 103 black during the display of one frame, thus improving the user experience.

[0064] This application also provides a display device, which includes the display substrate described in any of the above embodiments.

[0065] In some embodiments, the display device further includes a housing, in which a display substrate is embedded.

[0066] The display device provided in this application embodiment can be any suitable display device, including but not limited to mobile phones, tablets, televisions, monitors, laptops, digital photo frames, navigators, e-books, and any other products or components with display functions.

[0067] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.

[0068] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0069] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A display substrate, characterized by, The display substrate comprises a display area and a frame area, the frame area comprises a first frame area and a second frame area adjacent to the first frame area and located on the side of the first frame area; the display substrate comprises: a substrate; a light-emitting structure layer located on one side of the substrate, the light-emitting structure layer comprises a plurality of sub-pixels located in the display area and a plurality of sub-pixels located in the second frame area; a driving circuit layer located between the substrate and the light-emitting structure layer, the driving circuit layer comprises a plurality of gate driving circuits and a plurality of pixel circuits, the gate driving circuits are located in the first frame area, and the pixel circuits are electrically connected with the sub-pixels; the plurality of gate driving circuits comprises a starting row gate driving circuit; a connection line located in the first frame area, one end of the connection line is electrically connected with the starting row gate driving circuit, and the other end is used for being electrically connected with a driving chip, the driving chip provides a driving signal to the gate driving circuit; the orthographic projection of at least one pixel circuit on the substrate is located on the side of the orthographic projection of the connection line on the substrate away from the display area; the driving circuit layer further comprises a target signal line located in the first frame area; the target signal line comprises the connection line, a first sub-signal line and a second sub-signal line.

2. The display substrate of claim 1, wherein, The driving circuit layer further comprises a first conductive line and a second conductive line, one end of the first conductive line is connected with the gate driving circuit, and the other end is connected with the connection line, one end of the second conductive line is used for being electrically connected with the driving chip, and the other end is connected with the connection line; the first conductive line and the second conductive line are arranged in the same layer; the display substrate further comprises an insulating layer between the first conductive line and the connection line, the insulating layer is provided with a plurality of through holes, and the first conductive line and the second conductive line are electrically connected with the connection line through the through holes respectively. 3.The display substrate of claim 2, wherein, The extension directions of the first conductive line and the second conductive line intersect with the extension direction of the connection line, and in the extension direction of the connection line, the first conductive line and the second conductive line are located on opposite sides of the connection line; the orthographic projection of the first conductive line on the substrate overlaps with the orthographic projection of one end of the connection line on the substrate, and the orthographic projection of the second conductive line on the substrate overlaps with the orthographic projection of the other end of the connection line on the substrate.

4. The display substrate of claim 2, wherein, The display substrate further comprises a conductive part located in the through hole, and the display substrate further comprises a conductive structure, at least part of the conductive structure is located in the through hole and covers the conductive part.

5. The display substrate of claim 4, wherein, Part of the conductive structure is located on the side of the insulating layer away from the substrate, and the part of the conductive structure located on the side of the insulating layer away from the substrate covers the through hole. 6.The display substrate of claim 3, wherein, The plurality of gate driving circuits further comprise a dummy gate driving circuit; the target signal line is electrically connected with the dummy gate driving circuit; in the extension direction of the connection line, the first sub-signal line and the second sub-signal line are located on opposite sides of the connection line, and gaps exist between the connection line and the first sub-signal line and the second sub-signal line. 7.The display substrate of claim 6, wherein, The driving circuit layer further comprises a conductive part arranged in the same layer as the first conductive line, and a projection of the gap on the substrate does not overlap a projection of the conductive part on the substrate. 8.The display substrate of claim 3, wherein, The driving circuit layer comprises a plurality of signal lines, and a width of the connection line is greater than a width of the signal line. 9.The display substrate of claim 8, wherein, The material of the connection line is different from the material of the signal line. 10.The display substrate of claim 1, wherein, The sub-pixels in the second bezel area are arranged in multiple rows, and the arrangement direction of the sub-pixels in the same row is the same as the extension direction of the second bezel area; the multiple rows of sub-pixels in the second bezel area include at least two rows of first sub-pixels adjacent to the display area, and a gate drive circuit electrically connected to the at least two rows of first sub-pixels is configured to output a black insertion signal to the pixel circuit of the corresponding first sub-pixel during a frame display period, so that the at least two rows of first sub-pixels remain unlit. 11.The display substrate of claim 10, wherein, The multiple gate drive circuits further comprise a dummy gate drive circuit; the driving circuit layer further comprises a target signal line located in the first bezel area, the dummy gate drive circuit is electrically connected to the target signal line; the target signal line comprises the connection line; the multiple rows of sub-pixels in the second bezel area further include at least one row of second sub-pixels located on a side of the at least two rows of first sub-pixels away from the display area, and the dummy gate drive circuit is electrically connected to the pixel circuit of the row of second sub-pixels. 12.The display substrate of claim 11, wherein, The light-emitting structure layer comprises liquid crystal molecules, and the display substrate further comprises a sealant located in the second bezel area, the sealant surrounds the liquid crystal molecules, the sealant is located on a side of the at least two rows of first sub-pixels away from the display area, and is located on a side of the at least one row of second sub-pixels facing the display area, or a projection of the sealant on the substrate overlaps a projection of the second sub-pixel on the substrate. 13.The display substrate of claim 1, wherein, The display substrate further comprises a first polarizer located on a side of the substrate away from the driving circuit layer and a second polarizer located on a side of the light-emitting structure layer away from the substrate; a polarization axis of the first polarizer is perpendicular to a polarization axis of the second polarizer; edges of the first polarizer and the second polarizer are flush with an outer edge of the second bezel area, respectively.

14. A display device comprising: The display device comprises the display substrate according to any one of claims 1 to 13.

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