Detection and termination of false gnss measurements in presence of interference

Abstract

Systems and methods for verifying global navigation satellite system (GNSS) space vehicle (SV) signals are disclosed. An extremely weak frame synchronization (EWFS) verification process is run on a current SV signal relative to another verified SV signal. An indication of frame synchronization completion for the current SV signal is set after a full frame synchronization occurs based on a peak EWFS correlation value for the current SV signal being equal to or greater than a first threshold. The indication can be set early based on the peak EWFS correlation value for the current SV signal being greater than a second threshold, the second threshold being greater than the first threshold. Tracking of the current SV signal can be terminated early based on the peak EWFS correlation value for the current SV signal being less than a third threshold, the third threshold being less than the first threshold.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 313,254, filed February 23, 2022, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The topics disclosed in this paper relate to enhancing Global Navigation Satellite System (GNSS) measurements. More specifically, the topics disclosed in this paper relate to systems and methods for verifying GNSS space vehicle (SV) signals based on known bit patterns of SV signals. Background Technology

[0004] Some frequency bands in Long Term Evolution (LTE) transmissions, such as bands B13 and B14, may generate second harmonics that can interfere with L1 GNSS signals. Other interfering signals may also interfere with L1 GNSS signals. In interference situations, GNSS receivers may acquire and track interference components that appear to be valid measurements but are not detected as invalid by normal attenuation checking techniques. If the output measurement includes interference components (referred to herein as false SVs), these components can cause position errors that can sometimes be on the order of tens of kilometers. False SVs typically lack the structured bit content carried by legitimate GPS signals, which can be verified in the tracking channel based on the bit content using Weak Frame Synchronization (WFS) metrics. Summary of the Invention

[0005] Example embodiments provide a method for verifying a GNSS SV signal, wherein the method may include: synchronizing one or more frames of a first SV signal of a first SV tracked by a GNSS receiver using a subframe synchronization procedure; synchronizing one or more frames of a second SV signal of a second SV tracked by a GNSS receiver using a subframe synchronization verification procedure, wherein the subframe synchronization verification procedure is performed at least in part based on the first SV signal; and generating frame synchronization data by the GNSS receiver including an indication that full frame synchronization has occurred, the generated frame synchronization data being at least in part based on a comparison between a peak correlation value associated with the second SV signal and a first threshold. In one embodiment, the comparison between the peak correlation value and the first threshold includes determining that the second SV signal is equal to or greater than the first threshold. In another embodiment, the comparison between the peak correlation value and the first threshold may include determining that a bit error is less than or equal to a first time value and that the carrier noise power density of the second SV signal is greater than a first power density level. In yet another embodiment, the method may further include, at least in part, the GNSS receiver ending the subframe synchronization verification of the second SV signal after full frame synchronization has occurred, based on the fact that the peak correlation value associated with the second SV signal is less than the first threshold. In another embodiment, ending the subframe synchronization check of the second SV signal can also be based on a bit error greater than a first time value and a carrier noise power density of the second SV signal less than or equal to a first power density level. In one embodiment, the method may further include generating frame synchronization information by a GNSS receiver at least in part based on a peak correlation value associated with the second SV signal greater than a second threshold, the frame synchronization information including an indication that a subframe synchronization check of the second SV signal has occurred before full frame synchronization occurs, the second threshold being greater than the first threshold. In another embodiment, the indication that a subframe synchronization check of the second SV signal has occurred before full frame synchronization occurs can also be based on a bit error less than or equal to a first time value and a carrier noise power density of the second SV signal greater than a first power density level. In yet another embodiment, the method may further include having the GNSS receiver end the subframe synchronization check of the second SV signal before full frame synchronization occurs based on a peak correlation value associated with the second SV signal less than a second threshold, the second threshold being less than a first threshold, or based on a bit error greater than a first time value.

[0006] An example embodiment provides a GNSS receiver that may include front-end circuitry and signal processing circuitry. The front-end circuitry may be configured to receive a plurality of SV signals. The signal processing circuitry may be configured to: synchronize a first SV signal of a first SV tracked by the signal processing circuitry using a subframe synchronization procedure; synchronize a second SV signal of a second SV tracked by the signal processing circuitry relative to the first SV signal using a subframe synchronization check procedure; and generate frame synchronization data including an indication that full-frame synchronization of the second SV signal has occurred, wherein the generated frame synchronization data may be based at least in part on a comparison between a peak correlation value associated with the second SV signal and a first threshold. In one embodiment, generating frame synchronization data including an indication that full-frame synchronization of the second SV signal has occurred may be based on determining that the second SV signal is equal to or greater than the first threshold. In another embodiment, the signal processing circuitry may also be configured to set an indication that subframe synchronization check of the second SV signal is complete based on a bit error less than or equal to a first time value and a carrier noise power density of the second SV signal greater than a first power density level. In another embodiment, the signal processing circuit may be configured to terminate the subframe synchronization check of the second SV signal after full-frame synchronization occurs, based at least in part on a peak correlation value associated with the second SV signal being less than a first threshold. In yet another embodiment, the signal processing circuit may be configured to terminate the subframe synchronization check of the second SV signal further based on a bit error greater than a first time value and a carrier noise power density of the second SV signal being less than or equal to a first power density level. In one embodiment, the signal processing circuit may also be configured to set an indication that the subframe synchronization check of the second SV signal is complete before full-frame synchronization occurs, based at least in part on a peak correlation value associated with the second SV signal being greater than a second threshold, where the second threshold is greater than the first threshold. In yet another embodiment, the signal processing circuit may be configured to set an indication that the subframe synchronization check of the second SV signal is complete before full-frame synchronization occurs, based at least in part on a bit error less than or equal to a first time value and a carrier noise power density of the second SV signal being greater than a first power density threshold level. In yet another embodiment, the signal processing circuit may also be configured to terminate the subframe synchronization check of the second SV signal before full-frame synchronization occurs, based on a peak correlation value associated with the second SV signal being less than a second threshold, the second threshold being less than a first threshold, or based on a bit error being greater than a first value. In still another embodiment, the GNSS receiver may be configured to enable bit synchronization information to update the GNSS system time in response to an indication that frame synchronization has been set.

[0007] The example embodiment provides a GNSS receiver that may include front-end circuitry and signal processing circuitry. The front-end circuitry may be configured to receive multiple SV signals. The signal processing circuit can be configured to: perform a subframe synchronization process on a first SV signal of a first SV tracked by the signal processing circuit until frame synchronization occurs; perform a subframe synchronization verification process on a second SV signal of a second SV tracked by the signal processing circuit, the second SV signal being tracked by the signal processing circuit; set an indication that the subframe synchronization verification of the second SV signal is completed before full frame synchronization occurs, based at least in part on a peak correlation value associated with the second SV signal being greater than a first threshold; terminate the subframe synchronization verification of the second SV signal before full frame synchronization occurs, based on a peak correlation value associated with the second SV signal being less than a second threshold, the second threshold being less than the first threshold, or based on a bit error being greater than a first time value; set an indication that the subframe synchronization verification of the second SV signal is completed after full frame synchronization occurs, based at least in part on a peak correlation value associated with the second SV signal being equal to or greater than a third threshold, the third threshold being less than the first threshold and greater than the second threshold; and terminate the subframe synchronization verification of the second SV signal after full frame synchronization occurs, based at least in part on a peak correlation value associated with the second SV signal being less than the second threshold. In one embodiment, the signal processing circuit may be configured to further set an indication that the subframe synchronization check of the second SV signal is complete before full-frame synchronization occurs, based on the bit error being less than or equal to a first time value and the carrier noise power density of the second SV signal being greater than a first power density level. In another embodiment, the signal processing circuit may be configured to further set an indication that the subframe synchronization check of the second SV signal is complete after full-frame synchronization occurs, based on the current SV frame synchronization search window including the expected boundary of full-frame synchronization. Attached Figure Description

[0008] In the following sections, aspects of the subject matter disclosed herein will be described with reference to exemplary embodiments shown in the accompanying drawings, wherein:

[0009] Figure 1 This is a block diagram of an example embodiment of a GNSS receiver capable of verifying GNSS measurements based on the subject matter disclosed herein;

[0010] Figure 2 Example tracking channel timelines are depicted for four different SVs;

[0011] Figure 3 This is a flowchart of an example embodiment of a method for verifying GNSS measurements based on a known bit transition pattern within a given GNSS subframe, according to the subject matter disclosed herein;

[0012] Figure 4Example H0 and H1 hypotheses for EWFS subframe verification and example detection thresholds are described based on the topics disclosed herein; and

[0013] Figure 5 An electronic device that may include a GNSS receiver in one embodiment is described, the GNSS receiver including a verification process according to the subject matter disclosed herein. Detailed Implementation

[0014] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of this disclosure. However, those skilled in the art will understand that the aspects disclosed can be practiced without these specific details. In other instances, well-known methods, processes, components, and circuits have not been described in detail so as not to obscure the subject matter of this disclosure.

[0015] Throughout this specification, references to “an embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in connection with that embodiment may be included in at least one embodiment disclosed herein. Therefore, the appearance of the phrases “in an embodiment,” “in an embodiment,” or “according to an embodiment” (or other phrases with similar meanings) throughout this specification does not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular features, structures, or characteristics may be combined in any suitable manner. In this regard, as used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any embodiment described herein as “exemplary” should not be construed as necessarily preferred or advantageous over other embodiments. Furthermore, in one or more embodiments, particular features, structures, or characteristics may be combined in any suitable manner. Additionally, depending on the context of the discussion herein, singular terms may include their corresponding plural forms, and plural terms may include their corresponding singular forms. Similarly, hyphenated terms (e.g., "two-dimensional", "pre-determined", "pixel-specific", etc.) are occasionally interchangeable with their unhyphenated counterparts (e.g., "two-dimensional", "pre-determined", "pixel specific", etc.), and uppercase entries (e.g., "counter clock", "row select", "pixout", etc.) are interchangeable with their non-uppercase counterparts (e.g., "counter clock", "row select", "pixout", etc.). Such occasional interchangeability should not be considered inconsistent with each other.

[0016] Furthermore, depending on the context of this discussion, singular terms may include their corresponding plural forms, and plural terms may include their corresponding singular forms. It should also be noted that the various figures shown and discussed herein (including component drawings) are for illustrative purposes only and are not drawn to scale. For example, the dimensions of some elements may be exaggerated relative to others for clarity. Additionally, reference numerals are repeated in the figures where deemed appropriate to indicate corresponding and / or similar elements.

[0017] The terminology used herein is for the purpose of describing some exemplary embodiments only and is not intended to limit the claimed subject matter. As used herein, the singular forms “a,” “an,” and “described” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the terms “comprising” and / or “including” as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The terms “first,” “second,” etc., as used herein, serve as labels for the nouns preceding them and do not imply any kind of ordering (e.g., spatial, temporal, logical, etc.) unless expressly defined as such. Furthermore, the same reference numerals may be used across two or more figures to refer to parts, components, blocks, circuits, units, or modules having the same or similar functions. However, such use is merely for the sake of simplicity and ease of discussion; it does not imply that the construction or architectural details of such parts or units are identical across all embodiments, or that such commonly referenced parts / modules are the only way to implement some of the exemplary embodiments disclosed herein.

[0018] It will be understood that when an element or layer is referred to as being on, "connected to," or "coupled to" another element or layer, it can be directly on, connected to, or coupled to another element or layer, or there may be intermediate elements or layers. Conversely, when an element is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intermediate elements or layers. The same numbers always refer to the same element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0019] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject pertains. It will also be understood that terms, such as those defined in common dictionaries, shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless so explicitly defined herein.

[0020] As used herein, the term "module" refers to any combination of software, firmware, and / or hardware configured to provide the functionality described herein in conjunction with modules. For example, software may be implemented as a software package, code, and / or a set of instructions or instructions, and the term "hardware" as used in any implementation described herein may include, for example, single or arbitrary combinations of assemblies, hardwired circuitry, programmable circuitry, state machine circuitry, and / or firmware storing instructions executed by the programmable circuitry. Modules may be implemented collectively or individually as part of a larger system of circuitry, such as, but not limited to, integrated circuits (ICs), system-on-a-chip (SoCs), components, etc.

[0021] The subject matter disclosed herein enhances the effectiveness of GNSS measurements by utilizing knowledge of known bits or known bit transition patterns within a given GNSS subframe, providing a significant improvement in the ability to detect and remove spurious GNSS measurements from being included in the position and / or velocity solutions. In one embodiment, the verification process disclosed herein effectively removes spurious measurements that may be generated by adjacent frequency band LTE transmissions and / or any other interference signals.

[0022] Traditional GNSS receivers perform frame synchronization for one space vehicle (SV) and can then extend that SV's frame synchronization to other SVs without any additional verification checks. The verification process disclosed herein improves upon the conventional method outlined above by utilizing subframe boundaries from SVs that have been previously determined to be accurately frame-synchronized, and performs cross-satellite subframe (SF) boundary verification. The subframe boundary verification process disclosed herein checks known subframe bit transition patterns and the timing of those patterns. If the received signal from an SV indicates a known bit transition pattern within ±20 milliseconds of other frame-synchronized SVs, then the given SV is verified. The verification process disclosed herein can be performed with minimal additional computational complexity without a significant impact on Time-To-First-Fix (TTFF) performance or loss of sensitivity.

[0023] The verification process disclosed herein includes an early boosting process that can detect valid GNSS measurements before the entire subframe has been received, minimizing any adverse impact on TTFF performance. Furthermore, the early release process can detect and terminate spurious measurements without requiring the entire subframe to be received, thus providing rapid recovery of the search for correct / additional GNSS signals. An additional check after the entire subframe is received allows for comparison of the two largest correlated amplitudes during the subframe course to verify the validity of the measurements.

[0024] The disclosed verification process also provides for the selective disabling of other impairment checks to reduce false alarms associated with other impairment checks. In other words, once the tracking channel has been verified, the probability of false alarms may be low enough to confidently and selectively disable other impairment checks associated with that tracking channel.

[0025] To prevent false SVs from injecting invalid bit synchronization information into the GNSS receiver, the verification process disclosed herein verifies the SV through a frame synchronization verification process before bit synchronization information can be enabled to update the receiver's system time. Therefore, invalid measurements caused by interference signals are effectively prevented from being included in the position solution, as interference signals typically do not pass the subframe verification criteria disclosed herein. For example, based on the presence of known GNSS interference sources, the entire verification process can be selectively set to always be enabled or selectively invoked.

[0026] Figure 1 This is a block diagram of an example embodiment of a GNSS receiver 100 capable of verifying GNSS measurements according to the subject matter disclosed herein. The GNSS receiver 100 includes a preamplifier circuit 101, a front-end circuit 102, an analog-to-digital converter (ADC) circuit 103, hardware / software (HW / SW) signal processing circuit 104, a navigation processing circuit 105, a reference oscillator circuit 106, and a frequency synthesizer circuit 107. An antenna 108 may be coupled to the preamplifier circuit 101 and receive GNSS signals from an SV (not shown). One or more external sensors 109, such as, but not limited to, an inertial navigation system (INS), Loran-C, and / or a barometric altimeter, may be coupled to the navigation processing circuit 105. The example GNSS receiver 100 may include... Figure 1 More or fewer components as depicted. In one embodiment, Figure 1 Each of the various components depicted for the example GNSS receiver 100 may consist of one or more modules.

[0027] Preamplifier circuit 101 amplifies and / or filters the GNSS signal received by antenna 108. The output from preamplifier circuit 101 can be input to front-end circuit 102, where the received GNSS signal can be down-converted to a baseband signal. Reference oscillator circuit 106 generates a reference frequency signal input to frequency synthesizer circuit 107. Frequency synthesizer circuit 107 outputs a local oscillator (LO) signal input to front-end circuit 102. Frequency synthesizer circuit 107 can also output other LO signals, clock signals, and interrupt signals input to other components of GNSS receiver 100.

[0028] The baseband signal output from front-end circuit 102 can be input to ADC circuit 103 to convert the baseband signal into a digital signal. The output of ADC circuit 103 is input to HW / SW signal processing circuit 104, which outputs determined and / or calculated information, such as, but not limited to, pseudorange, differential range, carrier phase, and navigation data. In addition to Weak Frame Synchronization (WFS) processing and Extremely Weak Frame Synchronization (EWFS) processing, HW / SW signal processing circuit 104 can also perform the verification processing disclosed herein. Navigation processing circuit 105 can use the output from HW / SW signal processing circuit 104 to generate navigation-related information, such as, but not limited to, position, speed, time, and fault detection and isolation signals.

[0029] In one embodiment disclosed herein, the EWFS metric can be used to verify the legitimacy of the tracking channel and prevent spurious SVs from appearing in the output measurement. An embodiment of the EWFS metric is disclosed in U.S. Patent No. 8,134,501 to Lennen et al., which is incorporated herein by reference. It can be assumed that spurious SVs do not carry the same subframe structure as those actually transmitted by GPS satellites. Therefore, the probability that a spurious SV will exhibit a peak in the EWFS correlation amplitude at the same bit offset as the remaining valid GPS SVs is very small (P = ~0.01).

[0030] Figure 2 Example tracking channel timelines 200 are depicted for four different SVs. Figure 2 In this context, it is assumed that a GNSS receiver (such as GNSS receiver 100) initiates the first tracking channel 201 for SV1 by running a weak frame synchronization algorithm in the HW / SW signal processing circuit 104, and at time T... FS Frame synchronization is achieved at this point. Other SVs can also observe T. FS Subframe boundaries within ±20ms. For example... Figure 2 The depicted GNSS receiver has SV2, SV3, and SV4 in the tracking channels indicated at positions 202-204, and is running the WFS algorithm against SV2, SV3, and SV4. Each of the corresponding WFS algorithms may or may not satisfy the time T. FS The frame synchronization at the location meets the criteria. However, in one embodiment, the weak frame synchronization algorithm can extend frame synchronization information from one SV to other SVs if certain conditions are met.

[0031] exist Figure 2In this case, time T1 corresponds to the time when tracking channel 201 starts tracking SV1. In the case of a GPS receiver, at time T1 + 6s, tracking channel 201 for SV1 will receive an entire subframe. At time T1 + 6s, the logic indicating the completion of the full subframe in (for example) HW / SW signal processing circuit 104 can be activated. The subframe synchronization algorithm (i.e., WFS or EWFS) can detect the subframe boundary (T FS )

[0032] at a time at or before T1 + 6s. After detecting the subframe boundary (T FS ) for SV1, before extending the frame synchronization information from SV1 to other SVs being tracked, additional checks can be applied to prevent false SV setting of the SUBFRAME_SYNC_DONE flag. The additional checks ensure that all SVs being tracked can meet all three of the following conditions before re-centering the tracking channel and inheriting the SUBFRAME_SYNC_DONE flag from SV1. If SV i (i≠1) is considered false, that is, does not meet the following three conditions, then the verification techniques disclosed herein "kill" or terminate the tracking of this "satellite" and resume the search for the same satellite SV. That is, in one embodiment, "Early Dismissal" and / or "Early Promotion" logic can be implemented, which can complete the decision-making process for SVs other than SV1 before T i +6s.

[0033] The first condition is that the EWFS amplitude shows a correlation peak greater than a certain threshold. For early promotion, before the full subframe has been received, the peak correlation value is greater than High_Thr. That is, a peak correlation value greater than High_Thr occurs after T FS and before T1 + 6s (i.e., T FS <t<T1 + 6s), where T1 is the time of the tracking channel for the first SV1. For the final decision, after receiving the full subframe (t = T i +6s), the peak correlation value is greater than Low_Thr. It should be noted that although the peak correlation value greater than Low_Thr after receiving the full subframe has been referred to as a decision metric, additional decision criteria can include the comparison of the two largest correlation values during the subframe process.

[0034] The EWFS subframe verification threshold described herein can be higher than the original EWFS threshold used for initial subframe synchronization (e.g., the one used by SV1 to find T FSThe threshold is more lenient. In this case, the GNSS receiver can already access T from other SVs. FS Other SVs can be used for cross-checking subframe boundaries and reducing the probability of false alarms. Therefore, an EWFS subframe verification threshold can be set to allow for a slightly higher false alarm rate. The exact value of the threshold can depend on the tolerable false alarm rate and can be determined by carefully examining the H0 and H1 assumptions at different C / N0 (carrier-to-noise ratio). In this paper, H0 corresponds to the probability density function (PDF) of the normalized EWFS amplitude when there are no correct subframe boundaries (false SVs). H1 corresponds to the probability density function (PDF) of the normalized EWFS amplitude when there are correct subframe boundaries (valid SVs) (see [link to relevant documentation]). Figure 4 (Explanation to be provided).

[0035] The second condition is that the peak correlation value appears within ±20 milliseconds of the subframe boundary detected by SV1.

[0036] The third condition is that C / N0 is greater than Min_CN0 (e.g., 14dB-Hz). In one embodiment, this verification process is used for SVs with signal strengths between 14dB-Hz and 22dB-Hz, but it can be extended to weaker or stronger SVs.

[0037] The verification process disclosed in this paper also includes an "early release" mechanism, which terminates tracking of "SV signals" that have shown correct subframe boundaries but for which no relevant peaks have been detected. Tracking will also terminate if the EWFS correlation amplitude at the correct bit offset ±1 bit is less than the minimum acceptable threshold.

[0038] Figure 3 This is a flowchart of an example embodiment of a method 300 for verifying GNSS measurements based on a known bit transition pattern within a given GNSS subframe, according to the subject matter disclosed herein. In one embodiment, method 300 may be performed, for example, in the HW / SW signal processing circuitry 104 of an example embodiment of a GNSS receiver 100.

[0039] The method begins at 301, where the HW / SW signal processing circuit 104 runs the EWFS algorithm on the tracked SV signal. The process continues to 302, where the HW / SW signal processing circuit 104 determines whether frame synchronization (FS) has occurred. If so, the process continues to 307, where the FS_Done flag is set. In one embodiment, the FS_DONE flag indicates that the current SV has successfully performed subframe boundary checking, and therefore the SV is a valid SV.

[0040] If at 302 it is determined that frame synchronization has not yet occurred, the process continues to 303, where the HW / SW signal processing circuit 104 determines whether frame synchronization has occurred for another SV being tracked. If not, the process returns to 301.

[0041] If at 303 it is determined that frame synchronization has already occurred for another SV, the process continues to 304, where the HW / SW signal processing circuitry determines whether the current SV frame synchronization search window includes the expected frame synchronization boundary. If not, the process returns to 301.

[0042] If at 304 it is determined that the current SV frame synchronization search window includes the expected frame synchronization boundary, the process continues to 305, 306 and 308, which can be processed in parallel.

[0043] At position 305, the HW / SW signal processing circuit 104 determines whether the three conditions for early boosting have been met. Specifically, the HW / SW signal processing circuit 104 determines whether ewfsMag > High_Thr, EwfsBitError < 20 milliseconds, and C / N0 > Min_CN0, where High_Thr is the ewfsMag value that allows subframe checking before receiving the full subframe, EwfsBitError is the time difference between the current SV's ewfsBit and the correct SF boundary detected by another SV, ewfsBit is the bit offset corresponding to ewfsMag, and Min_CN0 is the minimum C / N0 value that subframe checking can be performed for the SV. Furthermore, after the full subframe (SF) has been examined, ewfsBit is expected to indicate the correct subframe boundary. Assuming a normalized EWFS amplitude, the subframe synchronization threshold used by SV1 can be approximately 0.7, while the High-Thr used by other SVs for EWFS verification can be approximately 0.5, and the Low-Thr can be approximately 0.3 (see [link to relevant documentation]). Figure 4 (Explanation to be provided).

[0044] If at point 305, the HW / SW signal processing circuit 104 determines that the three conditions have been met, the process continues to point 307, where the FS_Done flag is set for the current SV trace. If at point 305, it is determined that the three conditions have not yet been met, the process returns to point 301.

[0045] At 306, the HW / SW signal processing circuit 104 determines whether ewfsMag < Low_Thr or EwfsBitError > 20 milliseconds for early release, where Low_Thr is the minimum acceptable ewfsMag value for subframe verification after receiving a full subframe, and ewfsMag is the maximum value of the extremely weak frame synchronization (EWFS) related amplitude within the current subframe. If so, the process continues to 309, where the current tracking is terminated. If not, the process returns to 301.

[0046] At 308, the HW / SW signal processing circuit 104 determines whether full frame synchronization has been received. If not, the process returns to 301. If so, the process continues to 310, where the HW / SW signal processing circuit 104 determines whether ewfsMag > Low_Thr and EwfsBitError < 20 milliseconds and C / N0 > Min_CN0 as a final decision. If so, the process continues to 307, where the FS_Done flag is set. If not, the process continues to 309 to terminate the current tracking.

[0047] The thresholds used herein should be selected so as to obtain a small error rate (e.g., 10 -4 ) when verifying subframes. For this purpose, the following can be considered.

[0048] The ewfsBit protocol parameter should be selected such that ewfsBitError ≤ 20 milliseconds. The verification process disclosed herein can have the maximum amplitude of the EWFS metric occurring within ±20 milliseconds from the previously detected SF boundary. This means that for a given GPS subframe including 300 bits, only 3 bit offsets are acceptable for subframe verification. Therefore, a false SV has only a 1% chance of being verified as a legitimate SV and setting the FS_DONE flag.

[0049] The High_Thr threshold can be determined based on the ewfsBit protocol parameter that provides an error verification rate of 10 -2 or less. Therefore, the High_Thr (early boost threshold) should be selected such that it also provides another level of error verification immunity equal to 10 -2 or less.

[0050] For the Low_Thr threshold, if for a given SV, the subframe cannot be verified by the early boost mechanism (i.e., pass through High_Thr before the end of the subframe), then another check can be performed once the full subframe is received. When full frame synchronization is received, the maximum EWFS amplitude of the past 300 bits can be compared with Low_Thr. The value of this threshold should be selected such that it provides 10 -2The error subframe check rate is then combined with the ewfsBit protocol parameters to provide the desired error check rate.

[0051] The Min_CN0 threshold indicator can be based on the EWFS metric to specify the minimum C / N0 value required for the subframe verification process disclosed herein. Based on processed log files, over 98.7% of subframe verifications occur at C / N0 > 14 dB-Hz. On the other hand, erroneous FS verifications may occur for SV power around 13 dB-Hz. Therefore, limiting EWFS verification to signals stronger than 14 dB-Hz may be reasonable.

[0052] Figure 4 Example H0 and H1 hypotheses for EWFS subframe verification, along with example detection thresholds, are described based on the topics disclosed herein. Figure 4 In the diagram, H0 corresponds to the probability density function (PDF) of the normalized EWFS magnitude when there is no correct subframe boundary (false SV). H1 corresponds to the probability density function (PDF) of the normalized EWFS magnitude when there is a correct subframe boundary (valid SV).

[0053] Figure 5 An electronic device 500, which may include a GNSS receiver in one embodiment, is depicted. The GNSS receiver includes a verification process according to the subject matter disclosed herein. The electronic device 500 may include a controller (or CPU) 510, input / output (I / O) devices 520 such as, but not limited to, a keypad, keyboard, display, touchscreen display, 2D image sensor, and 3D image sensor, a memory device 530, an interface 540, a graphics processing unit (GPU) 550, an image processing unit 560, a neural processing unit 570, and a Time-of-Flight (TOF) processing unit 580, all coupled to each other via a bus 590. The controller 510 may include, for example, at least one microprocessor, at least one digital signal processor, at least one microcontroller, etc. The memory 530 may be configured to store command codes to be used by the controller 510 and / or to store user data.

[0054] Interface 540 may be configured to include a wireless interface configured to transmit or receive data from, for example, a wireless communication network using RF signals. In another embodiment, interface 540 may include a GNSS receiver that includes a verification process according to the subject matter disclosed herein. Interface 540 may also include, for example, an antenna. Electronic device 500 can also be used in communication interface protocols of communication systems, such as, but not limited to, Code Division Multiple Access (CDMA), Global System for Mobile Communications (GSM), North American Digital Communications (NADC), Extended Time Division Multiple Access (E-TDMA), Wideband CDMA (WCDMA), CDMA2000, Wi-Fi, Muni Wi-Fi, Bluetooth, Digital Enhanced Cordless Telecommunications (DECT), Wireless Universal Serial Bus (Wireless USB), Fast Low Latency Access with Seamless Handover (Flash-OFDM), IEEE 802, General Packet Radio Service (GPRS), iBurst, Wireless Broadband (WiBro), WiMAX, Advanced WiMAX, Universal Mobile Telecommunications Service - Time Division Duplex (UMTS-TDD), High-Speed ​​Packet Access (HSPA), Evolved Data Optimized (EVDO), LTE-Advanced, Multichannel Multipoint Distribution Service (MMDS), 5G, and 6G.

[0055] Embodiments of the subject matter and operation described in this specification may be implemented in digital electronic circuits including the structures disclosed in this specification and their structural equivalents, or in computer software, firmware, or hardware, or in a combination of one or more of these. Embodiments of the subject matter described in this specification may be implemented as one or more computer programs (i.e., one or more modules of computer program instructions) encoded on a computer storage medium for execution by a data processing apparatus or for controlling the operation of the data processing apparatus. Alternatively or additionally, program instructions may be encoded on artificially generated propagating signals (e.g., machine-generated electrical, optical, or electromagnetic signals) generated to encode information for transmission to a suitable receiver device for execution by the data processing apparatus. The computer storage medium may be, or may be included in, a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination thereof. Furthermore, while the computer storage medium is not a propagating signal, it may be a source or destination of computer program instructions encoded in artificially generated propagating signals. The computer storage medium may also be, or be included in, one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices). Furthermore, the operations described in this specification can be implemented as operations performed by a data processing apparatus on data stored on one or more computer-readable storage devices or received from other sources.

[0056] While this specification may contain numerous specific details of implementation, such details should not be construed as limiting the scope of any claimed subject matter, but rather as a description of features characteristic of particular embodiments. Certain features described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations, and even initially claimed in this way, one or more features from a claimed combination may in some cases be removed from that combination, and a claimed combination may refer to a sub-combination or a variation of a sub-combination.

[0057] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific order or sequence shown, or requiring all illustrated operations to be performed to obtain the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0058] Therefore, specific embodiments of the subject matter have been described herein. Other embodiments are within the scope of the appended claims. In some cases, the actions set forth in the claims may be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific order or sequence shown to achieve the desired result. In some embodiments, multitasking and parallel processing may be advantageous.

[0059] As those skilled in the art will recognize, the innovative concepts described herein can be modified and varied across a wide range of applications. Therefore, the scope of the claimed subject matter should not be limited to any of the specific exemplary teachings above, but is defined by the appended claims.

Claims

1. A method for verifying the SV signal of a Global Navigation Satellite System (GNSS) spacecraft, the method comprising: One or more frames of the first SV signal tracked by the GNSS receiver are synchronized by the subframe synchronization process. One or more frames of a second SV signal tracked by a second SV are synchronized by a GNSS receiver using a subframe synchronization check process, the subframe synchronization check process being performed at least in part based on a first SV signal; as well as The GNSS receiver generates frame synchronization data that includes an indication that full-frame synchronization has occurred. The generated frame synchronization data is based, at least in part, on a comparison between the peak correlation value of the extremely weak frame synchronization EWFS associated with the second SV signal and a first threshold.

2. The method according to claim 1, wherein, The comparison between the peak correlation value and the first threshold includes determining whether the second SV signal is equal to or greater than the first threshold.

3. The method according to claim 1, wherein, The comparison between the peak correlation value and the first threshold includes determining that the bit error is less than or equal to the first time value, and that the carrier noise power density of the second SV signal is greater than the first power density level.

4. The method of claim 1, further comprising, at least in part, based on the fact that the peak correlation value associated with the second SV signal is less than a first threshold, having the GNSS receiver terminate the subframe synchronization check of the second SV signal after full-frame synchronization occurs.

5. The method according to claim 4, wherein, The subframe synchronization check of the second SV signal is also terminated based on the bit error being greater than the first time value and the carrier noise power density of the second SV signal being less than or equal to the first power density level.

6. The method of claim 1, further comprising generating frame synchronization information by a GNSS receiver at least in part based on a peak correlation value associated with the second SV signal being greater than a second threshold, the frame synchronization information including an indication that a subframe synchronization check of the second SV signal has occurred before full frame synchronization occurs, the second threshold being greater than a first threshold.

7. The method according to claim 6, wherein, The indication that the subframe synchronization check of the second SV signal has occurred before the full frame synchronization occurs is also based on the fact that the bit error is less than or equal to the first time value and the carrier noise power density of the second SV signal is greater than the first power density level.

8. The method of claim 1, further comprising, based on the fact that the peak correlation value associated with the second SV signal is less than a second threshold, wherein the second threshold is less than a first threshold, or based on the fact that the bit error is greater than a first time value, the GNSS receiver terminates the subframe synchronization check of the second SV signal before full-frame synchronization occurs.

9. A GNSS receiver for a global navigation satellite system, comprising: The front-end circuitry is configured to receive SV signals from multiple spacecraft. as well as The signal processing circuit is configured as follows: The first SV signal, tracked by the signal processing circuit, is synchronized using a subframe synchronization process. A subframe synchronization check process is used to synchronize the second SV signal relative to the first SV signal. The second SV signal is tracked by the signal processing circuit. Frame synchronization data is generated, including an indication that full-frame synchronization of the second SV signal has occurred. The generated frame synchronization data is based at least in part on a comparison between the peak correlation value of the extremely weak frame synchronization EWFS associated with the second SV signal and a first threshold.

10. The GNSS receiver according to claim 9, wherein, Frame synchronization data is generated, including an indication that full-frame synchronization has occurred with the second SV signal, based on determining that the second SV signal is equal to or greater than a first threshold.

11. The GNSS receiver according to claim 9, wherein, The signal processing circuit is further configured to set an indication that the subframe synchronization check of the second SV signal is complete based on the bit error being less than or equal to a first time value and the carrier noise power density of the second SV signal being greater than a first power density level.

12. The GNSS receiver according to claim 9, wherein, The signal processing circuit is configured to terminate the subframe synchronization check of the second SV signal after full-frame synchronization occurs, based at least in part on the fact that the peak correlation value associated with the second SV signal is less than a first threshold.

13. The GNSS receiver according to claim 12, wherein, The signal processing circuit is configured to terminate the subframe synchronization check of the second SV signal based on the bit error being greater than the first time value and the carrier noise power density of the second SV signal being less than or equal to the first power density level.

14. The GNSS receiver according to claim 9, wherein, The signal processing circuit is further configured to set an indication that the subframe synchronization check of the second SV signal is completed before full-frame synchronization occurs, at least in part based on a peak correlation value associated with the second SV signal being greater than a second threshold, whereby the second threshold is greater than a first threshold.

15. The GNSS receiver according to claim 14, wherein, The signal processing circuit is configured to also set an indication that the subframe synchronization check of the second SV signal is completed before the full frame synchronization occurs, based on the bit error being less than or equal to a first time value and the carrier noise power density of the second SV signal being greater than a first power density level.

16. The GNSS receiver according to claim 9, wherein, The signal processing circuit is further configured to terminate the subframe synchronization check of the second SV signal before full-frame synchronization occurs, based on the peak correlation value associated with the second SV signal being less than a second threshold, wherein the second threshold is less than a first threshold, or based on the bit error being greater than a first time value.

17. The GNSS receiver according to claim 9, wherein, The GNSS receiver is configured to enable bit synchronization information to update the GNSS system time in response to an indication that frame synchronization is set.

18. A GNSS receiver for a global navigation satellite system, comprising: The front-end circuitry is configured to receive SV signals from multiple spacecraft. as well as The signal processing circuit is configured as follows: The subframe synchronization process is performed on the first SV signal tracked by the signal processing circuit until frame synchronization occurs. The subframe synchronization check process is performed on the second SV signal relative to the first SV signal. The second SV signal is tracked by the signal processing circuit. The indication that the subframe synchronization check of the second SV signal is completed before full-frame synchronization occurs is set, based at least in part on the fact that the peak correlation value associated with the second SV signal is greater than a first threshold. The subframe synchronization check of the second SV signal ends before full-frame synchronization occurs, based on either the peak correlation value associated with the second SV signal being less than a second threshold, where the second threshold is less than a first threshold, or based on the bit error being greater than a first time value. At least in part, based on the fact that the peak correlation value associated with the second SV signal is equal to or greater than a third threshold, wherein the third threshold is less than a first threshold and greater than a second threshold, an indication that the subframe synchronization check of the second SV signal is complete is set after full-frame synchronization occurs. The subframe synchronization check of the second SV signal is terminated after full-frame synchronization occurs, based at least in part on the fact that the peak correlation value associated with the second SV signal is less than a second threshold.

19. The GNSS receiver according to claim 18, wherein, The signal processing circuit is configured to also set an indication that the subframe synchronization check of the second SV signal is completed before the full frame synchronization occurs, based on the bit error being less than or equal to a first time value and the carrier noise power density of the second SV signal being greater than a first power density level.

20. The GNSS receiver according to claim 18, wherein, The signal processing circuit is configured to, after full-frame synchronization occurs, set an indication that the subframe synchronization check of the second SV signal is complete, based on the expected boundary of the current SV frame synchronization search window including full-frame synchronization.

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