Pixel structure

Abstract

The present invention discloses a pixel structure, which includes a plurality of data lines, a plurality of scan lines, a plurality of sub-pixel units, a first common line, a second common line, at least one electrode, at least one first connection electrode, and at least one second connection electrode. Each of the sub-pixel units has at least one active element, at least one pixel electrode electrically connected to the active element, and at least one common electrode separated from the pixel electrode. The first common line is located between two adjacent sub-pixel units. The first common line includes a first common line segment and a second common line segment disconnected from the first common line segment. The first common line and the other of the data line or the scan line extend along a first direction. The electrode is located at the disconnection between the first common line segment and the second common line segment. The second connection electrode connects the first connection electrode and the electrode through at least one opening in the dielectric layer.

Description

Technical Field

[0001] The present invention relates to a pixel structure. Background Art

[0002] In the architecture of narrow bezel design (ZBD), the routing of data lines in the middle of pixels will cause a significant increase in coupling capacitance (C pd ). In order to shield the coupling capacitance, electrodes can be added between the data lines and the pixel electrodes. However, the sheet resistance value of the electrodes is very large, and it is still difficult for the signal to return to the proper level after being coupled, resulting in different voltage settings at the signal end and far from the signal end, leading to color deviation problems in the overall panel. How to propose a pixel structure that can solve the above problems is one of the problems that the industry is eager to invest in research and development resources to solve at present. Summary of the Invention

[0003] In view of this, an object of the present invention is to propose a pixel structure that can solve the above problems.

[0004] To achieve the above object, according to an embodiment of the present invention, a pixel structure includes a plurality of data lines, a plurality of scan lines, a plurality of sub-pixel units, a first common line, a second common line, at least one electrode, at least one first connection electrode, and at least one second connection electrode. The data lines and the scan lines are disposed on a substrate. The sub-pixel units are disposed on the substrate. Each of the sub-pixel units has at least one active element, at least one pixel electrode electrically connected to the active element, and at least one common electrode separated from the pixel electrode. The common electrode at least partially overlaps with the pixel electrode, and each of the active elements is electrically connected to one of the corresponding data lines and one of the corresponding scan lines. The first common line and the second common line are disposed on the substrate, and the first common line is located between two adjacent sub-pixel units. The first common line includes a first common line segment and a second common line segment disconnected from the first common line segment. The first common line extends along a first direction with the other of the data line or the scan line. The electrode is located at the disconnection between the first common line segment and the second common line segment, and the electrode is separated from the first common line segment and the second common line segment. The first connection electrode is located above the electrode and partially overlaps with the electrode. The first connection electrode connects the common electrodes of one of two adjacent sub-pixel units. The second connection electrode is located on the first connection electrode. A dielectric layer is interposed between the first connection electrode and the second connection electrode, and the second connection electrode is connected to the first connection electrode and the electrode through at least one opening of the dielectric layer.

[0005] In one or more embodiments of the present invention, the first common line extends along the first direction with the data line.

[0006] In one or more embodiments of the present invention, the pixel structure further includes a plurality of transmission scan lines disposed on the substrate, and each of the transmission scan lines is electrically connected to another one of the corresponding scan lines.

[0007] In one or more embodiments of the present invention, the transmission scan lines and the data lines extend along a first direction.

[0008] In one or more embodiments of the present invention, the pixel structure further includes at least one additional common line disposed on the substrate and connected to the electrodes. The additional common line and the scan line extend along a second direction, and the first direction and the second direction are interlaced.

[0009] In one or more embodiments of the present invention, the pixel structure further includes at least one branch common line disposed on the substrate, and the branch common line partially overlaps with the second common line segment. The branch common line is connected to the additional common line.

[0010] In one or more embodiments of the present invention, an insulating layer is interposed between the branch common line and the second common line segment, and the branch common line is connected to the second common line segment through at least one opening of the insulating layer.

[0011] In one or more embodiments of the present invention, the common electrodes of two adjacent sub-pixel units are connected to each other.

[0012] In one or more embodiments of the present invention, the pixel structure further includes at least one auxiliary electrode disposed on the substrate. The auxiliary electrode overlaps with the second common line.

[0013] In one or more embodiments of the present invention, the auxiliary electrode is connected to the second common line and extends along the first direction.

[0014] In one or more embodiments of the present invention, the auxiliary electrode is separated from the first common line, the electrode, the first connection electrode, the second connection electrode, and the common electrode.

[0015] In one or more embodiments of the present invention, the pixel structure further includes a plurality of transmission scan lines disposed on the substrate. The auxiliary electrode overlaps with the transmission scan lines.

[0016] In one or more embodiments of the present invention, the pixel structure further includes a third connection electrode disposed on the substrate. The third connection electrode connects the common electrode of one of two adjacent sub-pixel units and the common electrode of one of the sub-pixel units in the previous row or the next row.

[0017] In one or more embodiments of the present invention, each of the data lines extends through one of the corresponding pixel electrodes and one of the common electrodes.

[0018] In summary, in the pixel structure of the present invention, since the first common line segment and the second common line segment are disconnected, and there is an electrode at the disconnection of the first common line segment and the second common line segment, and the second connection electrode connected to the common electrode is connected to the first connection electrode and the electrode, the resistance value can be reduced to achieve better performance of the overall common voltage level (V COM ) of the panel. Accordingly, the pixel structure of the present invention can solve the problem of color deviation of the panel.

[0019] The above is only used to elaborate on the problems to be solved by the present invention, the technical means for solving the problems, and the effects produced thereby. The specific details of the present invention will be introduced in detail in the following embodiments and related drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To make the above and other objects, features, and advantages of the present invention more obvious and understandable, the descriptions of the accompanying drawings are as follows:

[0021] Figure 1 A top view of the pixel structure of an embodiment of the present invention;

[0022] Figure 2 An embodiment of the present invention along Figure 1 A cross-sectional view of the pixel structure along the section line A-A' of;

[0023] Figure 3 An embodiment of the present invention along Figure 1 A cross-sectional view of the pixel structure along the section line B-B' of;

[0024] Figure 4 An embodiment of the present invention along Figure 1 A cross-sectional view of the pixel structure along the section line C-C' of;

[0025] Figure 5 A top view of the pixel unit of an embodiment of the present invention;

[0026] Figure 6 A top view of the pixel unit of another embodiment of the present invention.

[0027] SYMBOL DESCRIPTION

[0028] 100, 100’: Pixel structure

[0029] 110: Substrate

[0030] 120: Insulating layer

[0031] 130: Passivation layer

[0032] 140: Light filtering layer

[0033] 150: Dielectric layer

[0034] 160: Liquid crystal layer

[0035] 170: Cover layer

[0036] A-A’, B-B’, C-C’: Hatching

[0037] C1: First common line

[0038] C1a: First common line segment

[0039] C1b: Second common line segment

[0040] C2: Second common line

[0041] Ca: Additional common line

[0042] Cb: Branch common line

[0043] CL: Common electrode line

[0044] CUT: Disconnection point

[0045] D1: First direction

[0046] D2: Second direction

[0047] DL: Data line

[0048] E: Electrode

[0049] E1: First connection electrode

[0050] E2: Second connection electrode

[0051] E3: Third connection electrode

[0052] E ax : Auxiliary electrode

[0053] E C : Common electrode

[0054] E CF : Upper plate common electrode

[0055] E px1 : First pixel electrode

[0056] E px2 : Second pixel electrode

[0057] GL: Gate line

[0058] O 120 , O 150 : Opening

[0059] PU, PU1: Pixel unit

[0060] PX1: The first pixel unit

[0061] PX2: The second pixel unit

[0062] SL: Scanning line

[0063] S T : Transmission scanning line

[0064] T: Active element Detailed implementation manners

[0065] The following will disclose multiple implementation manners of the present invention with the accompanying drawings. For the sake of clear illustration, many practical details will be described together in the following narrative. However, it should be understood that these practical details are not used to limit the present invention. That is to say, in some implementation manners of the present invention, these practical details are not necessary. In addition, for the sake of simplifying the drawings, some conventional existing structures and elements will be shown in a simple schematic manner in the drawings. The same reference numerals will be used to represent the same or similar elements in all the drawings.

[0066] In the drawings, for the sake of clarity, the thickness of layers, films, panels, regions, etc. is enlarged. Throughout the specification, the same reference numerals represent the same elements. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on the other element or connected to the other element, or intermediate elements may also exist. On the contrary, when an element is referred to as being "directly on" or "directly connected to" another element, no intermediate element exists. As used herein, "connected" can refer to physical and / or electrical connection. Furthermore, "electrical connection" or "coupling" may mean that other elements exist between two elements.

[0067] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, the "first element", "component", "region", "layer", or "part" discussed below can be referred to as the second element, component, region, layer, or part without departing from the teachings herein.

[0068] The terms used herein are for the purpose of describing particular embodiments only and are not limiting. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an" and "the" are intended to include the plural forms, including "at least one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It should also be understood that when used in this specification, the terms "comprises" and / or "comprising" specify the presence of the stated features, regions, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components, and / or combinations thereof.

[0069] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element, as shown in the figures. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is flipped, an element described as on the "lower" side of other elements will be oriented on the "upper" side of the other elements. Thus, the exemplary term "lower" can include both the "lower" and "upper" orientations, depending on the specific orientation of the figure. Similarly, if the device in one figure is flipped, an element described as "below" or "beneath" other elements will be oriented as "above" the other elements. Thus, the exemplary terms "below" or "beneath" can include both above and below orientations.

[0070] As used herein, "about", "approximately", or "substantially" includes the stated value and the average within an acceptable deviation range of a particular value determined by one of ordinary skill in the art, taking into account the particular amount of the measurements and the errors associated with the measurements (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Moreover, "about", "approximately", or "substantially" as used herein can be selected with respect to optical properties, etching properties, or other properties to choose a more acceptable deviation range or standard deviation, rather than applying one standard deviation to all properties.

[0071] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this invention, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0072] Please refer to Figure 1 。 Figure 1The top view of the pixel structure 100 according to an embodiment of the present invention. In this embodiment, as Figure 1 shown, the pixel structure 100 includes several data lines DL, scan lines SL, several transmission scan lines S Figures 2 to 4 above the substrate 110 as shown, T , a first pixel unit PX1, a second pixel unit PX2, a first common line C1, a second common line C2, an additional common line Ca, a branch common line Cb, an electrode E, an auxiliary electrode E ax , at least one first connection electrode E1, at least one second connection electrode E2, and a third connection electrode E3. As Figure 1 shown, the first pixel unit PX1 is adjacent to the second pixel unit PX2. Each of the first pixel unit PX1 and the second pixel unit PX2 has at least one active element T, a first pixel electrode E px1 electrically connected to the active element T, a second pixel electrode E px2 , and at least one common electrode E px1 separated from the first pixel electrode E px2 and the second pixel electrode E. C Each of the active elements T is electrically connected to one of the corresponding data lines DL and a corresponding scan line SL. As Figure 1 shown, in some embodiments, the data lines DL extend in a first direction D1, the scan lines SL extend in a second direction D2, and the scan lines SL and the data lines DL are arranged in an interlaced manner.

[0073] More specifically, as Figure 1 shown, the scan line SL is connected to the gate of the active element T. Each of the transmission scan lines S T is arranged in an interlaced manner with a corresponding scan line SL, and each of the transmission scan lines S T is electrically connected to a corresponding scan line SL. More specifically, as Figure 1 shown, one of the transmission scan lines S T in the pixel structure 100 is connected to a scan line SL through the auxiliary electrode E ax disposed therebelow. Thus, the active element T can be turned on through the scan line SL connected to the transmission scan line S T . Then, the data line DL is connected to the source of the active element T. Each of the data lines DL extends through one of the corresponding first pixel electrodes E px1 and the second pixel electrodes E px2 and one of the common electrodes E C . The electrode E is connected to the drain of the active element T, and the electrode E is connected to the first pixel electrode E px1and a second pixel electrode E px2 electrically connected. Thus, the active element T can receive a signal from the data line DL, and cause the first pixel electrode E px1 or the second pixel electrode E px2 to have a bias voltage with respect to the common voltage (V COM ).

[0074] Please continue to refer to Figure 1 . As Figure 1 shown, the first common line C1 is located between the adjacent first pixel units PX1 and the second pixel units PX2. The first common line C1 includes a first common line segment C1a and a second common line segment C1b. The second common line segment C1b is disconnected from the first common line segment C1a. In some embodiments, as Figure 1 shown, the electrode E is located at the disconnection between the first common line segment C1a and the second common line segment C1b. The branch common line Cb is connected to the additional common line Ca. The third connection electrode E3 connects the common electrode E of one of the adjacent first pixel units PX1 and the second pixel units PX2 C and the common electrode E of one of the first pixel units PX1 and the second pixel units PX2 in the previous or next column C (not shown). The auxiliary electrode E ax overlaps with the second common line C2, and the auxiliary electrode E ax overlaps with the transmission scan line S T . More specifically, auxiliary electrodes E are respectively disposed below the second common line C2 and the transmission scan line S T to reduce the gate loading and improve the display quality. The auxiliary electrode E ax is separated from the first common line C1, the electrode E, the first connection electrode E1, the second connection electrode E2, and the common electrode E ax . C

[0075] In some embodiments, the first common line C1 and the data line DL extend along the first direction D1, and the transmission scan line S T extends along the first direction D1 with the data line DL. In some embodiments, the additional common line Ca and the scan line SL extend along the second direction D2. In some embodiments, each of the transmission scan lines S T is electrically connected to the corresponding auxiliary electrode E ax .

[0076] In some embodiments, as Figure 1 shown, the first direction D1 and the second direction D2 are interlaced.

[0077] Please refer to Figure 2 ​。 Figure 2 A cross-sectional view of the pixel structure 100 along the section line A-A' according to an embodiment of the present invention. In this embodiment, as Figure 1 shown, the pixel structure 100 further includes a gate insulating layer 120, a passivation layer 130, a filter layer 140, a dielectric layer 150, a liquid crystal layer 160, and a cover layer 170. As Figure 2 shown, an auxiliary electrode E Figure 2 and a branch common line Cb are disposed on the substrate 110. The gate insulating layer 120 is disposed on the substrate 110 and partially covers the auxiliary electrode E ax and the branch common line Cb. A second common line C2, a data line DL, and a second common segment C1b are disposed on the gate insulating layer 120. The passivation layer 130 is disposed on the gate insulating layer 120 and covers the second common line C2, the data line DL, and the second common segment C1b. The filter layer 140 is disposed on the passivation layer 130. A common electrode E ax is disposed on the filter layer 140. The dielectric layer 150 is disposed on the common electrode E C . A first pixel electrode E C and a second pixel electrode E px1 are disposed on the dielectric layer 150. The liquid crystal layer 160 is disposed on the dielectric layer 150 and covers the first pixel electrode E px2 and the second pixel electrode E px1 . The cover layer 170 is disposed above the liquid crystal layer 160. In some embodiments, as px2 shown, the pixel structure 100 further includes an upper plate common electrode E Figure 2 located between the liquid crystal layer 160 and the cover layer 170. CF

[0078] Please continue to refer to Figure 2 . As Figure 2 shown, the gate insulating layer 120 has at least one opening O 120 . As Figure 1 and Figure 2 shown, the auxiliary electrode E ax is connected to the second common line C2 and extends along the first direction D1, and the branch common line Cb is connected to the second common segment C1b and extends along the first direction D1. Specifically, the second common line C2 fills the opening O 120 and contacts the auxiliary electrode E ax , and the second common segment C1b fills the opening O 120 and contacts the branch common line Cb. As Figure 2 shown, the common electrode E C of the adjacent first pixel unit PX1 is connected to the common electrode E C of the second pixel unit PX2. As Figure 2As shown, the common electrode E C overlaps at least partially with the first pixel electrode E px1 and the second pixel electrode E px2 .

[0079] Please refer to Figure 3 . Figure 3 FIG. is a cross-sectional view of a pixel structure 100 along the section line B-B' according to an embodiment of the present invention. In this embodiment, as Figure 1 shown, the electrode E, the additional common line Ca, and the branch common line Cb are disposed on the substrate 110. The electrode E is connected to the additional common line Ca, and the additional common line Ca is connected to the branch common line Cb. The first common segment C1a and the second common segment C1b are disposed on the gate insulating layer 120. The second connection electrode E2 is disposed on the dielectric layer 150. As Figure 3 shown, the electrode E is separated from the first common segment C1a and the second common segment C1b. As Figure 3 shown, the branch common line Cb overlaps partially with the second common segment C1b. Specifically, as Figure 1 and Figure 3 shown, the gate insulating layer 120 is interposed between the branch common line Cb and the second common segment C1b, and the branch common line Cb is connected to the second common segment C1b via at least one opening O Figure 3 of the gate insulating layer 120 120 .

[0080] Please refer to Figure 4 . Figure 4 FIG. is a cross-sectional view of a pixel structure 100 along the section line C-C' according to an embodiment of the present invention. In this embodiment, as Figure 1 shown, the dielectric layer 150 is interposed between the first connection electrode E1 and the second connection electrode E2. The dielectric layer 150 has at least one opening O Figure 4 . The second connection electrode E2 is connected to the first connection electrode E1 and the electrode E via at least one opening O 150 of the dielectric layer 150 150 . As Figure 4 shown, the first connection electrode E1 is located above the electrode E and overlaps partially with the electrode E. The first connection electrode E1 is connected to the common electrode E C of one of the adjacent first pixel unit PX1 and the second pixel unit PX2 px2 . The second connection electrode E2 is located on the first connection electrode E1. The second connection electrode E2 is separated from the second pixel electrode E

[0081] In some embodiments, as Figure 1As shown, the first common line C1 must be disconnected. More specifically, if the first common line C1 is not disconnected, the first common line C1 and the electrode E will form a configuration of a double-metal structure. When the filter layer 140 is formed here, it must conform to the ramp distribution of the above double-metal structure, and the filter layer 140 is likely to be damaged at the slope conversion point. Therefore, the first common line C1 must be disconnected to facilitate the further formation of the first connection electrode E1 and the second connection electrode E2. Since the second pixel electrode E px2 is connected to the electrode E via the first connection electrode E1 and the second connection electrode E2, the effect of reducing the resistance value can be achieved.

[0082] In some embodiments, the scan line SL, the additional common line Ca, the electrode E, the branch common line Cb, and the auxiliary electrode E ax are on the same layer. In some embodiments, the first common line C1, the second common line C2, the data line DL, and the transmission scan line S T are on the same layer. In some embodiments, the common electrode E C , the first connection electrode E1, and the third connection electrode E3 are on the same layer. In some embodiments, the first pixel electrode E px1 , the second pixel electrode E px2 and the second connection electrode E2 are on the same layer.

[0083] In some embodiments, the substrate 110 and the cover layer 170 can be light-transmissive materials. In some embodiments, the substrate 110 and the cover layer 170 can be, for example, glass or other suitable materials. In some embodiments, the gate insulating layer 120 can be, for example, an oxide or other suitable materials. In some embodiments, the passivation layer 130 and the dielectric layer 150 can be oxides, nitrides, or other suitable materials. In some embodiments, the filter layer 140 can be a color filter. In some embodiments, the common electrode E C , the first connection electrode E1, the second connection electrode E2, the third connection electrode E3, the first pixel electrode E px1 , and the second pixel electrode E px2 can be made of, for example, indium tin oxide (ITO) or other suitable conductive materials.

[0084] In some embodiments, the active element T can be a thin-film transistor. In some embodiments, the active element T can be, for example, a bottom-gate thin-film transistor, a top-gate thin-film transistor, or other suitable thin-film transistors. In some embodiments, the channel layer of the active element T can be a semiconductor material. In some embodiments, the semiconductor material can be, for example, amorphous silicon, polycrystalline silicon, oxide semiconductor, or other suitable semiconductor materials.

[0085] Please also refer to Figure 5 and Table 1 listed at the end of this paragraph. Figure 5 is a top view of a pixel unit PU according to an embodiment of the present invention. Table 1 lists a table of several possible combinations of the line number ratios of the routing lines of the pixel unit PU according to an embodiment of the present invention. As Figure 5 shown, the pixel unit PU includes several pixel structures 100 and several pixel structures 100'. The difference between the pixel structure 100 and the pixel structure 100' is that the first common line C1 of the pixel structure 100 is disconnected, while the first common line C1 of the pixel structure 100' is not disconnected. In this embodiment, according to the foregoing structural configuration of the pixel structure 100 or pixel structure 100' of the present invention, the line number ratios of the data line DL, the gate line GL, and the common electrode line CL in a pixel unit PU can be calculated. More specifically, the gate line GL is substantially equal to the extension of the transmission scan line S in the pixel structure 100. T Under the structural configuration of the pixel structure 100 or pixel structure 100' of the present invention, the number of data lines DL is equal to the sum of the number of gate lines GL and the number of common electrode lines CL. Assuming that the required screen resolution is A (rows): B (columns), and the number of horizontal regions is Y (that is, the signal of the gate line GL can simultaneously turn on the gates of the active elements T of Y columns of sub-pixel units through the scan line SL), and since each pixel has three display points (display points for red light, green light, and blue light), the number of data lines DL is 3×A, and the number of gate lines GL is B×Y. The number of data lines DL (3×A) and the number of gate lines GL (B×Y) can be reduced, or the reduced number of lines can be multiplied according to requirements. Then, subtract the number of reduced data lines DL from the number of reduced gate lines GL to calculate the number of common electrode lines CL.

[0086] For example, if the required screen resolution is 32:9 and the number of horizontal rows is 8, the number of data lines DL is 96 (32×3), and the number of gate lines GL is 72 (9×8). According to the calculated ratio of the number of lines, if the number of data lines DL is fixed at 32 (96 / 3), the number of gate lines GL should be 24 (72 / 3). Accordingly, the number of common electrode lines CL should be 8 (32 - 24) (as shown in Table 1). This means that when there are 32 data lines DL, there should be 24 gate lines GL and 8 common electrode lines CL. Such a configuration can achieve the equivalent of "8 incoming points of the signal of the gate line GL on the same column of scan lines SL (one incoming point per area)".

[0087] Table 1

[0088]

[0089]

[0090] Please continue to refer to Figure 5 . Figure 5 Illustrates a pixel unit PU according to a required resolution of 32:9 and 8 horizontal areas. Figure 5 One column of the illustrated pixel unit PU has 12 sub-pixel units, one row has 9 sub-pixel units, and the pixel unit PU includes 12 data lines DL, 9 gate lines GL, 3 common electrode lines CL, and 9 scan lines SL. In some embodiments, the data lines DL, the gate lines GL, and the common electrode lines CL extend in a first direction D1, and the scan lines SL extend in a second direction D2. In a usage scenario, as Figure 5 shown, the manufacturer can form a break CUT on the common electrode line CL. Accordingly, the common electrode line CL includes a first common line C1 having a break CUT, where the break CUT separates a first common line segment C1a and a second common line segment C1b as Figure 1 shown.

[0091] Please refer to Figure 6 . Figure 6 Is a top view of a pixel unit PU1 according to another embodiment of the present invention. In this embodiment, as Figure 6 shown, the structural configuration of the pixel unit PU1 is substantially similar to that of the pixel unit PU. The difference between the pixel unit PU1 and the pixel unit PU is that the common electrode line CL of the pixel unit PU1 includes several breaks CUT. In a usage scenario, as Figure 6 shown, the manufacturer can form, for example, 8 breaks CUT on the common electrode line CL. Since the common electrode line CL includes breaks CUT, the overall resistance value of the pixel unit PU can be reduced to solve the problem due to the common voltage level (V COMThe panel color deviation problem caused by the offset.

[0092] In summary, since the pixel unit PU or the pixel unit PU1 includes at least one pixel structure 100 (that is, the pixel unit PU or the pixel unit PU1 has at least one disconnection CUT), the overall resistance value of the pixel unit PU can be reduced to solve the panel color deviation problem caused by the common conduction level (V COM ) offset.

[0093] From the above detailed description of the specific embodiments of the present invention, it can be clearly seen that in the pixel structure of the present invention, since the first common line segment and the second common line segment are disconnected, and the disconnection of the first common line segment and the second common line segment has an electrode, and the second connection electrode connected to the common electrode connects the first connection electrode and the electrode, the resistance value can be reduced to achieve better performance of the overall common conduction level (V COM ) of the panel. Accordingly, the pixel structure of the present invention can solve the problem of panel color deviation.

[0094] Although the present invention is disclosed in combination with the above embodiments, it is not intended to limit the present invention. Any person skilled in this art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. A pixel structure, comprising: A plurality of data lines and a plurality of scan lines disposed on a substrate; A plurality of sub-pixel units disposed on the substrate, wherein each of the sub-pixel units has at least one active element, at least one pixel electrode electrically connected to the at least one active element, and at least one common electrode separated from the at least one pixel electrode, the at least one common electrode at least partially overlaps with the at least one pixel electrode, and each of the at least one active element is electrically connected to one of the corresponding data lines and one of the corresponding scan lines; A first common line and a second common line disposed on the substrate, and the first common line is located between two adjacent sub-pixel units, wherein the first common line includes a first common line segment and a second common line segment disconnected from the first common line segment, and the first common line and the data lines extend along a first direction; At least one electrode located at the disconnection between the first common line segment and the second common line segment, and the at least one electrode is separated from the first common line segment and the second common line segment; At least one first connection electrode located above the at least one electrode and partially overlapping with the at least one electrode, wherein the at least one first connection electrode connects the at least one common electrode of one of the two adjacent sub-pixel units; and At least one second connection electrode located on the at least one first connection electrode, wherein a dielectric layer is interposed between the at least one first connection electrode and the at least one second connection electrode, and the at least one second connection electrode connects the at least one first connection electrode and the at least one electrode through at least one opening in the dielectric layer.

2. The pixel structure according to claim 1, wherein the first common line and the data lines extend along the first direction.

3. The pixel structure according to claim 1, further comprising a plurality of transmission scan lines disposed on the substrate, and each of the transmission scan lines is electrically connected to one of the corresponding scan lines.

4. The pixel structure according to claim 3, wherein the transmission scan lines and the data lines extend along the first direction.

5. The pixel structure according to claim 1, further comprising at least one additional common line disposed on the substrate and connected to the at least one electrode, wherein the at least one additional common line and the scan line extend along a second direction, and the first direction and the second direction are staggered.

6. The pixel structure according to claim 5, further comprising at least one branch common line disposed on the substrate, and the at least one branch common line partially overlaps with the second common line segment, wherein the at least one branch common line is connected to the at least one additional common line.

7. The pixel structure according to claim 6, wherein an insulating layer is interposed between the at least one branch common line and the second common line segment, and the at least one branch common line connects the second common line segment through at least one opening in the insulating layer.

8. The pixel structure according to claim 1, wherein the at least one common electrode of the two adjacent sub-pixel units is connected.

9. The pixel structure as claimed in claim 1, further comprising at least one auxiliary electrode disposed on the substrate, wherein the at least one auxiliary electrode overlaps with the second common line.

10. The pixel structure as claimed in claim 9, wherein the at least one auxiliary electrode is connected to the second common line and extends along the first direction.

11. The pixel structure as claimed in claim 9, wherein the at least one auxiliary electrode is separated from the first common line, the at least one electrode, the at least one first connection electrode, the at least one second connection electrode, and the at least one common electrode.

12. The pixel structure as claimed in claim 9, further comprising a plurality of transmission scan lines disposed on the substrate, wherein the at least one auxiliary electrode overlaps with the transmission scan lines.

13. The pixel structure as claimed in claim 1, further comprising a third connection electrode disposed on the substrate, wherein the third connection electrode connects the at least one common electrode of one of the two adjacent sub-pixel units and the at least one common electrode of one of the sub-pixel units in the upper or lower column.

14. The pixel structure as claimed in claim 1, wherein each of the data lines extends through one of the corresponding at least one pixel electrode and one of the at least one common electrode.

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