Broadcasting methods and systems for field-programmable gate array (FPGA) accelerator clusters

Abstract

This invention provides a broadcasting method and system for a field-programmable gate array (FPGA) accelerator cluster, relating to the field of communications. The method includes: during a sniffing broadcast phase, a control server sniffs and broadcasts to all subnet nodes through all communication links; during a topology filling phase, two FPGAs that forward sniffing broadcast messages are treated as connected FPGAs, and information about the connected FPGAs is uploaded to the local subnet router and recorded in the direct link table; during the formal broadcast phase, targeted broadcasts are performed to the managed target nodes according to broadcast requirements. This invention solves the problem of unknown routing links between FPGAs in a distributed FPGA accelerator cluster network, avoids the occurrence of ring broadcast storms, and further solves the problems of high latency and high energy consumption caused by network congestion and repeated retransmission of data packets.

Description

Technical Field

[0001] This invention relates to the field of communications, and in particular to a broadcasting method, system, computer storage medium, and electronic device for a field-programmable gate array (FPGA) accelerator cluster. Background Technology

[0002] In traditional distributed field-programmable gate array (FPGA) accelerator cluster networks, the lack of knowledge about direct links between FPGAs in conventional routing links makes directional broadcasts prone to routing link congestion. When direct links are unavailable, repeated retransmissions lead to high latency and high energy consumption. Furthermore, even with the introduction of direct links, ring broadcast storms can easily occur, further exacerbating the high energy consumption and high latency issues caused by link congestion and repeated retransmissions. Summary of the Invention

[0003] The purpose of this invention is to provide a field-programmable gate array (FPGA) accelerator cluster and its broadcasting method, broadcasting system, storage medium, and electronic device, which can reduce directional broadcasting latency.

[0004] To address the aforementioned technical problems, this invention provides a broadcasting method for a field-programmable gate array (FPGA) accelerator cluster, comprising:

[0005] During the sniffing broadcast phase, the control server sniffs and broadcasts to all nodes in all subnets under its management through all communication links; the nodes include routers and field-programmable gate array accelerators.

[0006] During the topology filling phase, the two field-programmable gate array (FPGA) accelerators that forward sniffing broadcast messages via direct links during the sniffing broadcast phase are treated as connected FPGAs, and the information of the connected FPGA accelerators is uploaded to the router of the local subnet; the router of the local subnet records the information of the connected FPGA accelerators in the direct link table.

[0007] During the formal broadcast phase, the control server broadcasts to the target nodes it manages according to the broadcast requirements.

[0008] The control server conducts sniffing broadcasts to all nodes within all subnets it manages through all communication links, including:

[0009] After the direct link information between all field-programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of its respective subnet, each node forwards the sniffing broadcast according to the forwarding rules. The forwarding rules are obtained by comparing the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the sensing phase. The comparison results are used to guide the node on whether to forward the sniffing broadcast.

[0010] Each node forwards the sniffing broadcast according to the forwarding rules during forwarding, including:

[0011] When each node receives a sniffing broadcast message, it records the arrival time of the sniffing broadcast message and records it in the broadcast statistics table it maintains.

[0012] Parse the sniffed broadcast message to obtain the broadcast field value;

[0013] The broadcast field value is compared with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;

[0014] If so, stop forwarding the sniffing broadcast message;

[0015] If not, record the broadcast field value in the broadcast statistics table and forward the sniffing broadcast message to other nodes within the directed broadcast subnet domain.

[0016] Forwarding the sniffed broadcast message to other nodes within the directed broadcast subnet includes:

[0017] If the node is a router, the sniffing broadcast message is forwarded to other nodes within the directional broadcast subnet, excluding the previous hop node.

[0018] Forwarding the sniffed broadcast message to other nodes within the directed broadcast subnet includes:

[0019] If the node is a field-programmable gate array accelerator, when the previous node is a field-programmable gate array accelerator, the sniffing broadcast message will be uploaded to the router of the subnet through the routing link;

[0020] When the previous hop node is the router of the subnet, it is determined whether the field-programmable gate array accelerator communicates with other field-programmable gate array accelerators through a direct link;

[0021] If a direct link exists and the connected field-programmable gate array accelerator is within the directional broadcast subnet, then the sniffing broadcast message is forwarded;

[0022] If the direct link does not exist, or if the direct link exists but the connected field-programmable gate array accelerator is not within the directional broadcast subnet, the forwarding of the sniffing broadcast message will be stopped.

[0023] This also includes:

[0024] During the sniffing broadcast phase, all nodes except the control server forward the sniffing broadcast according to the forwarding rules.

[0025] When the control server broadcasts to the managed target nodes according to broadcast requirements, it also includes:

[0026] The node records the broadcast reception time of the directed broadcast message, parses the Internet Protocol address of the broadcast source of the directed broadcast message, and updates the reception time to the broadcast statistics table it maintains.

[0027] The broadcast end time is obtained by querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address.

[0028] The broadcast message transmission delay is determined based on the broadcast end time.

[0029] The current broadcast message transmission delay of the current node in the formal broadcast phase is determined based on the broadcast start time and the broadcast end time.

[0030] If the transmission delay of the broadcast message is greater than the current transmission delay of the broadcast message, the broadcast message will not be forwarded.

[0031] If the transmission delay of the broadcast message is less than or equal to the current transmission delay of the broadcast message, the broadcast message continues to be forwarded.

[0032] If, when querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address, the broadcast end time cannot be found, the following additional steps are also included:

[0033] If the node is found to have a link anomaly during the sniffing broadcast phase, the Internet Protocol address, the start time of the directed broadcast, and the reception time of the directed broadcast are stored in the broadcast statistics table.

[0034] The process, which involves the control server sniffing and broadcasting information to nodes within all managed subnets via all communication links, also includes:

[0035] Determine the shortest broadcast delay for each of the nodes.

[0036] This also includes:

[0037] Each node generates its own broadcast statistics table; the broadcast statistics table contains the Internet Protocol address of the broadcast source, the broadcast start time, and the broadcast arrival time.

[0038] This also includes:

[0039] The router in the local subnet generates the directly connected link table; the directly connected link table contains the local FPGA accelerator Internet Protocol address and the directly connected FPGA accelerator Internet Protocol address.

[0040] The formal broadcast phase also includes:

[0041] A formal broadcast forwarding rule is set, which stipulates that when the control server performs a directional broadcast, all nodes in the target directional subnet, forwarding routers, and programmable gate array accelerators under the forwarding routers that have direct links to the field programmable gate array accelerators in the directional subnet can also participate in the forwarding of the directional broadcast.

[0042] Wherein, if the broadcast message transmission delay is greater than the current broadcast message transmission delay, the method further includes:

[0043] Determine that the broadcast message received by the current node at the broadcast arrival time originates from a communication link with a long latency.

[0044] Wherein, if the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay, it further includes:

[0045] Update the broadcast end time in the broadcast statistics table to the broadcast arrival time.

[0046] This also includes:

[0047] After the formal broadcast phase ends, each node clears its own broadcast statistics table, and the router clears its own direct link table.

[0048] Prior to the sniffing broadcast phase, the following is also included:

[0049] Construct a field-programmable gate array (FPGA) accelerator cluster consisting of the control server, the router, and the FPGA accelerator;

[0050] The control server, the router, and the field-programmable gate array (FPGA) accelerators are connected by routing links, and the FPGA accelerators belonging to different routers are connected by direct links. The control server is used to manage the FPGA accelerator cluster. The FPGA accelerators are used to perform network communication and application computing.

[0051] The field-programmable gate array accelerator includes:

[0052] The system comprises a communication subkernel, a computing subkernel, and a control subkernel; the communication subkernel is used for network communication, the computing subkernel is used for application computing, and the control subkernel is used for executing logic control.

[0053] The present invention also provides a broadcasting system for a field-programmable gate array (FPGA) accelerator cluster, comprising:

[0054] The sniffing broadcast module is used to, during the sniffing broadcast phase, have the control server sniff and broadcast to all nodes in all subnets under its management through all communication links; the nodes include routers and field-programmable gate array accelerators.

[0055] The topology filling module is used to, during the topology filling phase, treat two field-programmable gate array (FPGA) accelerators that forward sniffing broadcast messages via direct links during the sniffing broadcast phase as connected FPGAs, and upload the information of the connected FPGA accelerators to the router of the local subnet; the router of the local subnet records the information of the connected FPGA accelerators in the direct link table;

[0056] The formal broadcast module is used during the formal broadcast phase for the control server to perform targeted broadcasts to the managed target nodes according to broadcast requirements.

[0057] The broadcast sniffing module includes:

[0058] The forwarding submodule is used to forward the sniffing broadcast according to the forwarding rules after the direct link information between all field-programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of its subnet. The forwarding rules are obtained by comparing the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the sensing phase. The comparison results are used to guide the node on whether to forward the sniffing broadcast.

[0059] The forwarding submodule includes:

[0060] The recording unit is used to record the arrival time of the sniffing broadcast message when each node receives it, and to record it in the broadcast statistics table maintained by itself.

[0061] The parsing unit is used to parse the sniffed broadcast message and obtain the broadcast field value;

[0062] The judgment unit is used to compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;

[0063] A stop forwarding unit is used to stop forwarding the sniffing broadcast message if the broadcast field value exists in the broadcast statistics table;

[0064] The forwarding unit is used to record the broadcast field value to the broadcast statistics table if the broadcast field value does not exist in the broadcast statistics table, and forward the sniffed broadcast message to other nodes in the directed broadcast subnet domain.

[0065] The forwarding unit includes:

[0066] The first forwarding subunit is used, if the node is a router, to forward the sniffing broadcast message to other nodes within the directional broadcast subnet, excluding the previous hop node.

[0067] The forwarding unit includes:

[0068] The upload subunit is used to upload the sniffing broadcast message to the router of the subnet through the routing link when the previous node is a field-programmable gate array accelerator, if the node is a field-programmable gate array accelerator.

[0069] The judgment sub-unit is used to determine whether the field-programmable gate array accelerator communicates with other field-programmable gate array accelerators through a direct link when the previous hop node is the router of the subnet.

[0070] The second forwarding subunit is used to forward the sniffing broadcast message if there is a direct link and the connected field-programmable gate array accelerator is within the range of the directional broadcast subnet;

[0071] The stop forwarding subunit is used to stop forwarding the sniffing broadcast message if the direct link does not exist, or if the direct link exists but the connected field-programmable gate array accelerator is not within the range of the directional broadcast subnet.

[0072] This also includes:

[0073] The forwarding module is used to forward the sniffing broadcast according to the forwarding rules by all nodes except the control server during the sniffing broadcast phase.

[0074] This also includes:

[0075] The first update module is used when the control server broadcasts to the managed target nodes according to broadcast requirements, the node records the broadcast reception time of the targeted broadcast message, parses the Internet Protocol address of the broadcast source of the targeted broadcast message, and updates the reception time to the broadcast statistics table maintained by itself.

[0076] The first determining module is used to query the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address to obtain the broadcast end time.

[0077] The second determining module is used to determine the broadcast message transmission delay based on the broadcast end time;

[0078] The third determining module is used to determine the current broadcast message transmission delay of the current node in the formal broadcast phase based on the broadcast start time and the broadcast end time;

[0079] The stop forwarding module is used to stop forwarding broadcast messages if the transmission delay of the broadcast message is greater than the current transmission delay of the broadcast message.

[0080] The forwarding module is used to continue forwarding the broadcast message if the transmission delay of the broadcast message is less than or equal to the transmission delay of the current broadcast message.

[0081] This also includes:

[0082] The storage module is configured to, if, when querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address, the broadcast end time cannot be found, and it is determined that the node has experienced a link anomaly during the sniffing broadcast phase, store the Internet Protocol address, the directed broadcast start time, and the directed broadcast reception time into the broadcast statistics table.

[0083] This also includes:

[0084] The first generation module is used for each node to generate its own broadcast statistics table; the broadcast statistics table includes the Internet Protocol address of the broadcast source, the broadcast start time, and the broadcast arrival time.

[0085] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described above.

[0086] The present invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described above when it invokes the computer program in the memory.

[0087] This invention provides a broadcasting method for a field-programmable gate array (FPGA) accelerator cluster, comprising: during a sniffing broadcast phase, a control server sniffs and broadcasts to nodes in all managed subnets through all communication links; the nodes include routers and FPGA accelerators; during a topology filling phase, two FPGA accelerators that forwarded sniffing broadcast messages through direct links during the sniffing broadcast phase are treated as connected FPGAs, and the information of the connected FPGA accelerators is uploaded to the router of the local subnet; the router of the local subnet records the information of the connected FPGA accelerators in a direct link table; during the formal broadcast phase, the control server performs targeted broadcasts to the managed target nodes according to broadcast requirements.

[0088] In this invention, since each FPGA accelerator only needs to upload data to the router of its local subnet after completing the sniffing and sensing of all communication links during the sniffing and broadcasting phase, the router topology expansion phase has the shortest time. The sniffing and broadcasting phase, however, requires broadcasting to all directional subnets controlled by the control server (which acts as the broadcast source), making the network situation relatively complex and therefore longer. The actual broadcasting phase takes significantly longer than the other two phases because the arrival of broadcast tasks is uncertain, thus the actual broadcasting time is much longer. The topology filling phase effectively senses the dynamic changes of the FPGA accelerator cluster network in real time, allowing for real-time adjustment of broadcast links. Therefore, this invention solves the problem of unknown routing links between FPGA accelerators in distributed FPGA accelerator cluster networks, and avoids the occurrence of ring broadcast storms while introducing direct links. It further solves the problems of high latency and high energy consumption caused by network congestion and repeated retransmission of data packets.

[0089] The present invention also provides a broadcasting system, a computer-readable storage medium, and an electronic device for a field-programmable gate array accelerator cluster, which have the above-mentioned beneficial effects, and will not be repeated here. Attached Figure Description

[0090] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0091] Figure 1 This is a schematic diagram of the structure of a field-programmable gate array accelerator cluster provided in an embodiment of the present invention;

[0092] Figure 2 This is a schematic diagram of the structure of a field-programmable gate array accelerator provided in an embodiment of the present invention;

[0093] Figure 3 A flowchart illustrating the broadcasting method for a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention;

[0094] Figure 4 A schematic diagram of the broadcasting process of a three-stage field-programmable gate array accelerator cluster provided in an embodiment of the present invention;

[0095] Figure 5 This is a schematic diagram of the broadcast system structure of a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention;

[0096] Figure 6 This is a structural diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0097] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0098] To better understand the broadcasting process of the field-programmable gate array accelerator cluster provided by this invention, please refer to [link to relevant documentation]. Figure 1 , Figure 1 This is a schematic diagram of a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention. The FPGA accelerator cluster includes:

[0099] Control server, router, and field-programmable gate array (FPGA) accelerator cluster;

[0100] There are routing links between the control server, router and field-programmable gate array accelerator, and direct links between field-programmable gate array accelerators belonging to different routers;

[0101] The control server is used to manage the field-programmable gate array (FPGA) accelerator cluster and to perform targeted broadcasts to the routers and FPGA accelerators.

[0102] The router is used to perform data communication between the controller and the field-programmable gate array accelerator;

[0103] Field-programmable gate array (FPGA) accelerators are used to perform network communication and application computing.

[0104] This embodiment addresses the problem of high energy consumption and latency in directional broadcasts from a control server acting as a broadcast source to the FPGAs within its managed subnet in a distributed field-programmable gate array (FPGA) accelerator cluster network. Furthermore, in traditional distributed FPGA accelerator cluster networks, the lack of knowledge about direct links between FPGAs in conventional routing links leads to routing link congestion during directional broadcasts. When direct links are unavailable, repeated retransmissions cause high latency and high energy consumption. Moreover, even with the introduction of direct links, ring broadcast storms can easily occur, further exacerbating the high energy consumption and high latency issues caused by link congestion and repeated retransmissions.

[0105] to this end, Figure 1 This is a schematic diagram of a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention, which realizes direct connection of FPGA accelerators under different subnet routers. Figure 1 In this invention, since all field-programmable gate array accelerators within a subnet managed by the same router can communicate directly with each other without the need for router forwarding, and the speeds of the routing link and the direct link are close, there are no direct links between field-programmable gate array accelerators in the same subnet.

[0106] This invention proposes a multicast architecture for distributed field-programmable gate array (FPGA) accelerator clusters. Based on the existing multicast architecture of distributed FPGA accelerator clusters consisting of FPGA accelerators, routers, and control servers, it further includes a point-to-point communication architecture for FPGA accelerators that supports high-speed inter-kernel communication.

[0107] Figure 1 It mainly includes: control server, router, and field-programmable gate array (FPGA) accelerator. Figure 1 For example, the control server is mainly responsible for the daily management of the field-programmable gate array (FPGA) accelerator cluster, remote application updates, and task distribution. Figure 2 As shown, Figure 2 This is a schematic diagram of the structure of a field-programmable gate array (FPGA) accelerator provided in an embodiment of the present invention. The FPGA accelerator can contain multiple sub-kernels based on the FPGA kernel virtualization function. By designing communication, computing, and control sub-kernels, the FPGA accelerator has functions such as network communication, application computing, and logic control. It communicates with routers through routing links, and FPGA accelerators under different routing subnets can communicate with each other through direct links. The router is responsible for data communication functions and communicates with other routers, FPGA accelerators, and control servers through routing links.

[0108] It should be noted that in the distributed field-programmable gate array (FPGA) cluster network proposed in this invention, all FPGA accelerators, control servers, and other network terminals access the network through routers. Furthermore, each FPGA accelerator is interconnected with other FPGA accelerators to achieve direct communication. Since all FPGA accelerators within the same subnet can be directly interconnected without router forwarding, there are no direct links between FPGA accelerators within the same subnet. Additionally, an FPGA accelerator typically has two optical ports.

[0109] exist Figure 1 Based on the field-programmable gate array (FPGA) accelerator cluster shown, see [link / reference]. Figure 2 , Figure 2 This is a schematic diagram of a field-programmable gate array (FPGA) accelerator provided in an embodiment of the present invention. The FPGA accelerator can have a communication subcore, a computation subcore, and a control subcore. The communication subcore is used for network communication, the computation subcore is used for application computation, and the control subcore is used for executing logic control.

[0110] This invention proposes a field-programmable gate array (FPGA) accelerator cluster. Building upon the existing multicast architecture of distributed FPGA accelerator clusters consisting of FPGA accelerators, routers, and a control server, it further incorporates a point-to-point communication architecture for FPGA accelerators supporting high-speed inter-kernel communication. Since all FPGA accelerators within a subnet managed by the same router can communicate directly with each other without router forwarding, the routing link and direct link speeds are similar. Furthermore, there are no direct links between FPGA accelerators within the same subnet. This allows the broadcast method to fully utilize both direct and routing links, effectively resolving issues such as routing congestion and ring broadcast storms. It reasonably improves the utilization rate of cluster communication links while avoiding the use of high-latency communication links and the forwarding of broadcast messages. This reduces transmission latency and achieves energy savings in communication links.

[0111] Building upon the field-programmable gate array (FPGA) accelerator cluster described above, this invention also provides a broadcasting method for FPGA accelerator clusters, see [link to relevant documentation]. Figure 3 , Figure 3 This is a flowchart of a broadcasting method for a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention. The broadcasting method includes:

[0112] S101: During the sniffing broadcast phase, the control server sniffs and broadcasts to all nodes in all subnets under its management through all communication links; the nodes include routers and field-programmable gate array accelerators.

[0113] S102: During the topology filling phase, the two field-programmable gate array (FPGA) accelerators that forward sniffing broadcast messages via direct links during the sniffing broadcast phase are treated as connected FPGAs, and the information of the connected FPGA accelerators is uploaded to the router of the local subnet; the router of the local subnet records the information of the connected FPGA accelerators in the direct link table.

[0114] S103: During the formal broadcast phase, the control server broadcasts to the target nodes it manages according to the broadcast requirements.

[0115] The broadcast method provided by this invention is divided into a sniffing broadcast phase, a topology expansion phase, and a formal broadcast phase. In the sniffing broadcast phase, the control server primarily performs sniffing broadcasts to nodes within all subnets it manages. The control server, acting as the broadcast source, broadcasts to all managed nodes through all communication links (routing links and direct links), and can simultaneously set corresponding forwarding rules for each node. It should be noted that the broadcast method with these three phases provided in this embodiment can be executed cyclically, i.e., cyclic broadcasting. This avoids loop broadcast storms while obtaining the shortest broadcast time for each node under the most complex and largest-scale targeted broadcast subnet participation. This addresses the problem of each router being unaware of the direct links to the field-programmable gate array accelerators within the subnet. Compared to the formal broadcast phase, which only requires some nodes to participate in targeted broadcasting, the network situation in the sniffing broadcast phase is more complex and prone to congestion and link disconnections. Therefore, it is easier to comprehensively evaluate the targeted broadcast capability of each node, thereby obtaining the shortest latency for each node when all nodes in all subnets participate in targeted broadcasting.

[0116] The topology expansion phase, following the sniffing and broadcasting phase, is responsible for transmitting the direct link information between all FPGAs within all nodes of the targeted subnet to the routers of their respective subnets. In cases where the router is unaware of the direct links between FPGAs or if direct links are broken, each FPGA reports and modifies the information based on the results of the sniffing and broadcasting phase. After completing the sniffing and broadcasting phases and the topology expansion phase of this cyclic broadcast, the server acting as the broadcast source can then conduct the formal broadcast as needed.

[0117] During the formal broadcast phase, the control server, acting as the controller and manager of the FPGA accelerator cluster, needs to conduct targeted broadcasts based on actual business requirements. Therefore, the actual node size of the targeted broadcast subnet is generally smaller than the node size when all subnets participate in the broadcast during the sniffing broadcast phase. Furthermore, each node in this phase compares its actual transmission latency during broadcast with the transmission latency value from the sensing phase to determine whether to forward the message. This achieves the goals of low latency and high energy efficiency in FPGA accelerator cluster broadcasting.

[0118] Furthermore, among the three stages mentioned above, the router topology expansion stage is the shortest because each FPGA accelerator only needs to upload data to the router in its local subnet after completing the sniffing and sensing of all communication links during the sniffing and broadcasting stage. The sniffing and broadcasting stage, however, is relatively longer due to the complexity of the network situation, as it requires broadcasting to all directional subnets controlled by the control server acting as the broadcast source. The actual broadcasting stage takes significantly longer than the other two stages because the arrival of broadcast tasks is uncertain, thus significantly increasing the actual broadcasting time. It should be noted that these three stages can be executed cyclically, and the topology can effectively sense the dynamic changes in the FPGA accelerator cluster network in real time, allowing for real-time adjustments to the broadcast links.

[0119] This invention addresses the problem of unknown routing links between FPGA accelerators in distributed FPGA accelerator cluster networks. By introducing direct links, it avoids the occurrence of ring broadcast storms. Furthermore, it resolves the high latency and high energy consumption issues caused by network congestion and repeated retransmission of data packets.

[0120] This invention proposes a three-stage cyclic broadcasting method for field-programmable gate array (FPGA) accelerator clusters, consisting of a sniffing broadcasting stage, a topology expansion stage, and a formal broadcasting stage. For example... Figure 4 As shown, Figure 4 The above three stages are arranged in a cyclical manner according to time sequence, and are a schematic diagram of the broadcast process of a three-stage field-programmable gate array accelerator cluster provided in the embodiment of the present invention.

[0121] The three-stage field-programmable gate array (FPGA) accelerator cluster cyclic broadcast strategy proposed in this invention is as follows:

[0122] First, each node in the FPGA accelerator cluster network (excluding the control server) (routers and FPGA accelerators) maintains a hash table to record received broadcast messages, denoted as the broadcast statistics table. The corresponding key-value pair format is: <(broadcast source IP address, broadcast start time), broadcast arrival time>. Here, the broadcast source IP address is denoted as brdcst_IP, and the broadcast start time is denoted as Tb. send The broadcast arrival time is denoted as Tb. rcv In this invention, to accurately measure transmission delay, the lengths of the sniffed broadcast message and the formal broadcast message are set to the same length during each round of broadcasting.

[0123] Secondly, the steps corresponding to the three-phase operation of each loop broadcast are as follows:

[0124] Sniffing broadcast phase:

[0125] During the sniffing broadcast phase, after the direct link information between all field-programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of its respective subnet, each node forwards the sniffing broadcast according to the forwarding rules. The forwarding rules are based on a comparison between the actual transmission delay of the sniffing broadcast and the perceived transmission delay during the sensing phase. The comparison results are used to guide the node on whether to forward the sniffing broadcast.

[0126] Specifically, within the time period [T0+(n1-1)*ΔT, T0+n1*ΔT1] (where n1 is a positive integer and ΔT=ΔT1+ΔT2+ΔT3), the control server acting as the broadcast source forwards sniffing broadcast messages to all nodes, including field-programmable gate array accelerators and routers, within all subnets it manages. Specifically, the control server acting as the broadcast source begins targeted broadcasting to all controlled nodes at time T0+(n1-1)*ΔT. The control server acting as the broadcast source only needs to perform targeted broadcasting to a subset of the managed nodes. Compared to the targeted broadcasting to only a subset of managed nodes in the third stage, the network environment caused by targeted broadcasting in the sniffing broadcast stage is more complex, with a higher probability of network congestion and communication link disconnections. Therefore, the broadcast latency of each node in the first stage is greater than the broadcast latency value in the third stage.

[0127] Furthermore, each received field-programmable gate array (FPGA) accelerator and router updates the broadcast statistics table's broadcast source Internet Protocol address, broadcast start time, and broadcast arrival time fields based on the received sniffed broadcast packets. Specifically, during the forwarding process, the following forwarding rules are followed:

[0128] When each node receives a sniffing broadcast message from the broadcast source, it records the exact time of arrival (denoted as Tb).now ), and will sniff the broadcast arrival time Tb of the broadcast message. rcv Value updated to Tb now Then, the broadcast packets are parsed and sniffed to obtain brdcst_IP and Tb. send and Tb rcv The field values ​​are then retrieved. Then, the hash table itself is queried to determine if the hash table already exists.

[0129] If it already exists, it means that the current node has already received the current sniffing broadcast message and will no longer process and forward the current sniffing broadcast message;

[0130] If it does not exist, it means that the current node has not received the current sniffing broadcast message, therefore <(brdcst_IP, Tb scnd ), Tb rcv After completing the above steps, this will update Tb. rcv The sniffed broadcast message is forwarded to other nodes within the directed broadcast subnet. Since the current node could be either a field-programmable gate array accelerator or a router, the forwarded update is Tb. rcv The sniffing of broadcast messages can be divided into the following two cases:

[0131] If the node is a field-programmable gate array accelerator, when the previous node is a field-programmable gate array accelerator, the sniffing broadcast message will be uploaded to the router of the subnet through the routing link;

[0132] When the previous hop node is the router of the subnet, it is determined whether the field-programmable gate array accelerator communicates with other field-programmable gate array accelerators through a direct link;

[0133] If a direct link exists and the connected field-programmable gate array accelerator is within the directional broadcast subnet, then the sniffing broadcast message is forwarded;

[0134] If no direct link exists, or if a direct link exists but the connected field-programmable gate array accelerator is not within the directional broadcast subnet, the forwarding of the sniffing broadcast message will cease.

[0135] If the node is a router, it will forward the sniffed broadcast message to other nodes within the directional broadcast subnet, excluding the previous hop node, including routers and field-programmable gate array accelerators.

[0136] If the current node is a field-programmable gate array (FPGA) accelerator, and the previous hop node is also an FPGA accelerator, the sniffed broadcast message is uploaded to the router of its subnet via the routing link. If the previous hop node is the router of its subnet, it is determined whether this FPGA accelerator communicates with other FPGA accelerators via direct links. If a direct link exists and the connected FPGA accelerator is within the directional broadcast subnet, the message is forwarded; otherwise, if no direct link exists or a direct link exists but the connected FPGA accelerator is not within the directional broadcast subnet, the message is not forwarded.

[0137] Furthermore, as long as the time period [T0+(n1-1)*ΔT, T0+n1*ΔT1] is within the specified range, all network nodes except the control server will execute the above broadcast message forwarding rules. It should also be noted that when the control server, acting as the broadcast source, broadcasts to all nodes (routers and field-programmable gate array accelerators) within each managed directional broadcast subnet, each node can participate in forwarding the corresponding sniffing broadcast messages via routing links and direct links.

[0138] During the topology expansion phase:

[0139] Within the time interval [T0+n1*ΔT1, T0+n1*(ΔT1+ΔT2)], the two field-programmable gate array (FPGA) accelerators that forward broadcast messages via direct links in the first phase must both upload information about their connected FPGA accelerators to the router on their local subnet. The router then records this information using a separate hash table, called the direct link table, with key-value pairs containing <local FPGA accelerator IP address, directly connected FPGA accelerator IP address>. The local FPGA accelerator IP address is denoted as local_addr, and the directly connected FPGA accelerator IP address is denoted as direct_addr.

[0140] During the official broadcast phase:

[0141] Within the time interval [T0+n1*(ΔT1+ΔT2), T0+n1*ΔT] (where n1 is a positive integer and ΔT=ΔT1+ΔT2+ΔT3), the control server, acting as the broadcast source, performs targeted broadcasts to nodes within the managed subnets according to business needs. The following three rules can be followed during the forwarding of targeted broadcast messages:

[0142] Firstly, when the control server, acting as the broadcast source, broadcasts to the target subnet, in addition to all nodes in the target targeted broadcast subnet, the forwarding router and the field-programmable gate array accelerators under the forwarding router that have direct links to the field-programmable gate array accelerators in the targeted subnet can also participate in forwarding.

[0143] Secondly, during the forwarding process, each node needs to record the current reception time Tb. cur The control server IP address of the broadcast source is denoted as brdcst_IP_now, and the broadcast start time is denoted as Tb. send_now The broadcast arrival time is denoted as Tb. rcv_now And Tb rcv_now The value is updated to Tb cur Then determine whether to proceed with the next forwarding step:

[0144] Based on the broadcast start time Tb of the first phase of sniffing broadcast messages send The value of T0 (i.e., T0+(n1-1)*ΔT) and the brdcst_IP_now obtained from the broadcast message parsed by this node are used to query the broadcast statistics table stored in the broadcast sniffing phase of this loop to obtain the corresponding broadcast end time Tb. rcv The broadcast message transmission delay ΔTb in this cycle is obtained according to the following formula (1);

[0145] ΔTb=Tb rcv -Tb send (1)

[0146] It should be noted that if the forwarding router and nodes within the directed broadcast subnet during the formal broadcast phase cannot find the corresponding information in the broadcast statistics table of the first phase, this means that an extreme situation such as a link break occurred in the previous phase. Therefore, it is necessary to adjust brdcst_IP_now and Tb in the current phase. send_now and Tb rcv_now The value is stored in the broadcast statistics table. Then, forwarding to the next-hop node is performed. If there is no next-hop node, no further forwarding is required.

[0147] Combined with broadcast start time Tb send_now and broadcast arrival time Tb rcv_now The value ΔTb is used to obtain the broadcast message transmission delay ΔTb of the current node during the formal broadcast phase. cur Specifically, as shown in formula (2):

[0148] ΔTb cur =Tb rcv_now -Tb send_now (2)

[0149] Compare ΔTb curand the value of ΔTb:

[0150] If ΔTb cur If the value is greater than ΔTb, then broadcast message forwarding will cease. This is because in the first phase, the control server, acting as the broadcast source, performs targeted broadcasts to all subnets under its control, making the communication situation more complex compared to the third phase, where targeted broadcasts are only performed to some subnets. This indicates that the current node is at Tb... rcv_ow The broadcast messages received at any given time come from complex communication links that take longer to process. The current node has a high probability of completing the forwarding of data packets during the broadcast phase of this cycle, so there is no need to forward the broadcast messages again, thus achieving the effect of reducing repeated forwarding of broadcast messages and saving energy.

[0151] If ΔTb cur If the time is ≤ΔTb, then the broadcast message is forwarded. Since the broadcast arrival time stored in the first phase is the time corresponding to the earliest sniffed broadcast message to arrive at the node via the communication link, this represents the current node's arrival time in Tb... rcv_ow The broadcast message received at any given time is transmitted through the relatively optimal communication link verified in the first phase. Simultaneously, the corresponding Tb in the broadcast statistics table is... rcv The value is updated to Tb rcv_now Tb send The value is updated to Tb send_now This ensures that during the formal broadcast phase, the current node is transmitted via the link with the shortest latency, and avoids the high energy consumption problem caused by further forwarding of broadcast messages from other high-latency links.

[0152] Finally, after completing the three-stage operation of this cyclic broadcast, each node will clear its own broadcast statistics table and direct link table.

[0153] To better describe this invention, the following description uses specific routing subnets and Internet Protocol addresses as examples to illustrate the broadcast method of the field-programmable gate array (FPGA) accelerator cluster provided by this invention, taking the first loop broadcast as an example, combined with... Figure 1The illustrated tree-structured FPGA (Field-Programmable Gate Array) accelerator cluster network topology, directly interconnected across subnets, includes one control server for management, four routers, and eight FPGAs. It comprises three routing subnets, managed by routers #2, #3, and #4 respectively. Router #1 manages routers #2, #3, and #4, as well as the control server #1. FPGAs within the three routing subnets are interconnected via direct links. Specifically, FPGA #3 within the subnet managed by router #2 is directly connected to FPGA #4 within the subnet managed by router #3. Similarly, FPGA #6 within the subnet managed by router #3 is directly connected to FPGA #7 within the subnet managed by router #4.

[0154] Furthermore, the present invention is designed Figure 1 The subnet ranges and IP address ranges of the central control server, routers, and each field-programmable gate array accelerator are shown in Table 1, and routing subnets 1#, 2#, 3#, and 4# are set up respectively. Figure 1 It can be seen that subnets #2, #3, and #4 are all subnets under subnet #1. Based on the address range 192.168.122.129 / 5 of subnet #1, it contains IP addresses from 192.168.122.128 to 192.168.122.159, totaling 32 IP addresses. Specifically, the address range 192.168.122.137 / 3 of the #2 routing subnet contains IP addresses ranging from 192.168.122.136 to 192.168.122.143, totaling 8 IP addresses. Similarly, the address range 192.168.122.145 / 3 of the #3 routing subnet contains IP addresses ranging from 192.168.122.144 to 192.168.122.151, totaling 8 IP addresses. The address range 192.168.122.153 / 3 of the #4 routing subnet contains IP addresses ranging from 192.168.122.152 to 192.168.122.159, totaling 8 IP addresses. A comparison shows that the address allocation of the three routing subnets #2, #3, and #4 is a further subdivision of the #1 routing subnet. See Table 1, which shows the IP addresses of all nodes in the field-programmable gate array (FPGA) accelerator cluster network diagram.

[0155] Table 1. IP addresses of all nodes in the Field Programmable Gate Array (FPGA) accelerator cluster network diagram.

[0156]

[0157] Assume the routing link between router #1 and router #3 is interrupted, and set the time ΔT1 for the first stage of this loop to 200ms, the time ΔT2 for the second stage to 60ms, and the time ΔT3 for the third stage to 1500ms. Set the broadcast start time for this loop to 2023-01:0100:00:00.000. The time range for the first stage is [2023-01-01 00:00:00.000, 2023-01:01 00:00:00.200], the time range for the second stage is [2023-01-01 00:00:00.200, 2023-01:01 00:00:00.260], and the time range for the third stage is [2023-01-01 00:00:00.260, 2023-01:01 00:00:01.760].

[0158] Furthermore, since the length of the sniffing broadcast message and the length of the formal broadcast message are the same in each round of broadcasting, the message body length of both the sniffing broadcast message and the formal broadcast message is set to 12 bytes. The transmission delays of the routing links and direct links between nodes during the sniffing broadcast phase of the first round of broadcasting are shown in Table 2. Table 2 is the transmission delay table for each link during the sniffing broadcast phase of the first round of broadcasting.

[0159] Table 2. Transmission delay of each link during the sniffing broadcast phase of the first loop broadcast.

[0160]

[0161]

[0162] Based on Table 2, and considering the links during the sniffing broadcast phase, the arrival time and transmission delay of the sniffing broadcast messages from the broadcast source control server to each node can be obtained sequentially, as shown in Table 3. It should be noted that since the transmitted sniffing broadcast messages and the formal broadcast messages have the same message body length, and the time spent by each node on local copying and calculation in the first and third phases is equal, related time calculations were not included in the relevant calculations.

[0163] Taking router #3 as an example, according to Table 2, since the routing link between router #1 and router #3 is interrupted, the shortest communication link from the broadcast source control server #1 to router #3 is: Control Server #1 → Router #1 → Router #4 → FPGA Accelerator #7 → FPGA Accelerator #6 → FPGA Accelerator #3. The transmission delay of router #3 corresponding to this communication link is 10ms + 3ms + 8ms + 3ms + 2ms = 26ms, so the broadcast arrival time is 2023-01-01 00:00:00.026. After receiving the sniffed broadcast message of this communication link according to the forwarding rules, router #3 obtains the IP address of the broadcast source control server (192.168.122.159) and the broadcast start time (2023-01-01 00:00:00.000) by parsing the sniffed broadcast message, and then queries the broadcast statistics table. The data is found to be empty, therefore router #3 needs to store the corresponding information in the broadcast statistics table <(192.168.122.159, 2023-01-01 00:00:00.000), 2023-01-01 00:00:00.026>. After completing the above operations, proceed to the next forwarding step, which can forward data to FPGA accelerators #4 and #5.

[0164] In fact, there are other forwarding links, such as: 1# control server → 1# router → 2# router → 3# field-programmable gate array accelerator → 4# field-programmable gate array accelerator → 3# field-programmable gate array accelerator. The transmission delay corresponding to this communication link is 10ms + 5ms + 6ms + 3ms + 14ms = 38ms. Therefore, the broadcast arrival time of this communication link is: 2023-01-01 00:00:00.038.

[0165] Upon receiving the sniffing broadcast message from this communication link, router #3 parses the message to obtain the IP address of the broadcast source control server (192.168.122.159) and the broadcast start time (2023-01-01 00:00:00.000). Querying the broadcast statistics table reveals the previous broadcast arrival time (2023-01-01 00:00:00.026), indicating that a communication link with lower transmission latency already exists, and forwarding and related operations are no longer performed. See Table 3, which shows the arrival time and transmission latency values ​​of sniffing broadcast messages for each node during the sniffing broadcast phase.

[0166] Table 3. Arrival time and transmission delay of sniffing broadcast messages at each node during the sniffing broadcast phase.

[0167]

[0168]

[0169] During the topology expansion phase, taking router #3 as an example, at least two communication links existed during the sniffing broadcast phase of this round-robin broadcast. Furthermore, the direct links between accelerators #3 and #4, and between accelerators #6 and #7, were used. These links are unknown to accelerator #3; therefore, during the topology expansion phase, accelerators #4 and #6 need to upload data to router #3 and record it in the direct link table, as shown in Table 4. Table 4 is the direct link table for router #3 during the direct link expansion phase of the first round-robin broadcast.

[0170] Table 4. Direct Links of Router #3 during the First Loop Broadcast Phase 3

[0171]

[0172] After completing the first two phases of communication link sensing and topology expansion for the first round of broadcasting, it is assumed that the #1 control server, acting as the broadcast source, begins broadcasting to all nodes within the #3 routing subnet at 00:00:00.260 on January 1, 2023. It is also assumed that the transmission delay during the formal broadcast phase is as shown in Table 5. Table 5 shows that the routing link between router #1 and router #3 is still blocked or disconnected; therefore, routers #2 and #4 need to be used as forwarding routers.

[0173] Based on this, further analysis using router #3 as an example reveals that two communication links still exist to transmit the formal broadcast message to router #3, denoted as communication link A and communication link B. Communication link A is: Control Server #1 → Router #1 → Router #4 → FPGA #7 → FPGA #6 → FPGA #3, with a corresponding transmission delay ΔTb. cur The value is 10ms + 3ms + 5ms + 3ms + 2ms = 23ms. Communication link B is: 1# Control Server → 1# Router → 1# Router → 3# Field Programmable Gate Array Accelerator → 4# Field Programmable Gate Array Accelerator → 3# Field Programmable Gate Array Accelerator, with a corresponding transmission delay ΔTb. cur The value is 10ms + 2ms + 3ms + 3ms + 2ms = 20ms. Therefore, the formal broadcast message transmitted via communication link B arrives at router #3 before communication link A.

[0174] When the formal broadcast message reaches router #3 via link B, the IP address of the broadcast source control server (192.168.122.159) is obtained through parsing the sniffed broadcast message. The broadcast start time Tb of the sniffed broadcast phase of this round-robin broadcast is then used to determine the broadcast start time. send The value 2023-01-01 00:00:00.000 can be used to query the broadcast statistics table to obtain the broadcast arrival time Tb of the corresponding sniffed broadcast message. rcv The value is 2023-01-01 00:00:00.026, further revealing that the transmission delay ΔTb of the sniffing broadcast message of router #3 during the sniffing broadcast phase is 26ms. Because ΔTb cur <ΔTb, therefore Tb in the broadcast statistics table needs to be changed. send The value was updated to Tb on 2023-01-01 00:00:00.000. send_now The value 2023-01-01 00:00:00.260 corresponds to Tb rcv The value was updated from 2023-01-01 00:00:00.026 to 2023-01-01 00:00:00.280.

[0175] Subsequently, when the formal broadcast message reaches router #3 via link A, the IP address of the broadcast source control server, 192.168.122.159, is obtained through parsing the sniffed broadcast message. The broadcast start time Tb of the sniffed broadcast phase of this loop broadcast is then used to determine the broadcast start time. send The value 2023-01-01 00:00:00.260 can be used to query the broadcast statistics table to obtain the broadcast arrival time Tb of the corresponding sniffed broadcast message. rcv The value is 2023-01-01 00:00:00.280, further yielding a broadcast message transmission delay ΔTb of 20ms. Because the transmission delay ΔTb of link A... cur It is 23ms, i.e., ΔTb cur >ΔTb. Therefore, no further forwarding is needed. Hence, the shortest transmission delay for the formal broadcast message of node #3 is 20ms. This saves energy and time caused by repeated retransmission of broadcast messages. See Table 5, which shows the transmission delay of each link during the sniffing broadcast phase of the first loop broadcast.

[0176] Table 5. Transmission delay of each link during the sniffing broadcast phase of the first loop broadcast.

[0177]

[0178]

[0179] After the first three-phase loop broadcast is completed, each field-programmable gate array accelerator and router will clear the broadcast routing table, and each router will also clear the contents of the directly connected link table.

[0180] See Figure 5 , Figure 5 This is a schematic diagram of the broadcast system structure of a field-programmable gate array (FPGA) accelerator cluster provided in an embodiment of the present invention. The present invention also provides a broadcast system for a FPGA accelerator cluster, comprising:

[0181] The sniffing broadcast module is used to, during the sniffing broadcast phase, have the control server sniff and broadcast to all nodes in all subnets under its management through all communication links; the nodes include routers and field-programmable gate array accelerators.

[0182] The topology filling module is used to, during the topology filling phase, treat two field-programmable gate array (FPGA) accelerators that forward sniffing broadcast messages via direct links during the sniffing broadcast phase as connected FPGAs, and upload the information of the connected FPGA accelerators to the router of the local subnet; the router of the local subnet records the information of the connected FPGA accelerators in the direct link table;

[0183] The formal broadcast module is used during the formal broadcast phase for the control server to perform targeted broadcasts to the managed target nodes according to broadcast requirements.

[0184] Based on the above embodiments, the broadcast sniffing module includes:

[0185] The forwarding submodule is used to forward the sniffing broadcast according to the forwarding rules after the direct link information between all field-programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of its subnet. The forwarding rules are obtained by comparing the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the sensing phase. The comparison results are used to guide the node on whether to forward the sniffing broadcast.

[0186] Based on the above embodiments, the forwarding submodule includes:

[0187] The recording unit is used to record the arrival time of the sniffing broadcast message when each node receives it, and to record it in the broadcast statistics table maintained by itself.

[0188] The parsing unit is used to parse the sniffed broadcast message and obtain the broadcast field value;

[0189] The judgment unit is used to compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;

[0190] A stop forwarding unit is used to stop forwarding the sniffing broadcast message if the broadcast field value exists in the broadcast statistics table;

[0191] The forwarding unit is used to record the broadcast field value to the broadcast statistics table if the broadcast field value does not exist in the broadcast statistics table, and forward the sniffed broadcast message to other nodes in the directed broadcast subnet domain.

[0192] Based on the above embodiments, the forwarding unit includes:

[0193] The first forwarding subunit is used, if the node is a router, to forward the sniffing broadcast message to other nodes within the directional broadcast subnet, excluding the previous hop node.

[0194] Based on the above embodiments, the forwarding unit includes:

[0195] The upload subunit is used to upload the sniffing broadcast message to the router of the subnet through the routing link when the previous node is a field-programmable gate array accelerator, if the node is a field-programmable gate array accelerator.

[0196] The judgment sub-unit is used to determine whether the field-programmable gate array accelerator communicates with other field-programmable gate array accelerators through a direct link when the previous hop node is the router of the subnet.

[0197] The second forwarding subunit is used to forward the sniffing broadcast message if there is a direct link and the connected field-programmable gate array accelerator is within the range of the directional broadcast subnet;

[0198] The stop forwarding subunit is used to stop forwarding the sniffing broadcast message if the direct link does not exist, or if the direct link exists but the connected field-programmable gate array accelerator is not within the range of the directional broadcast subnet.

[0199] Based on the above embodiments, it also includes:

[0200] The forwarding module is used to forward the sniffing broadcast according to the forwarding rules by all nodes except the control server during the sniffing broadcast phase.

[0201] Based on the above embodiments, it also includes:

[0202] The first update module is used when the control server broadcasts to the managed target nodes according to broadcast requirements, the node records the broadcast reception time of the targeted broadcast message, parses the Internet Protocol address of the broadcast source of the targeted broadcast message, and updates the reception time to the broadcast statistics table maintained by itself.

[0203] The first determining module is used to query the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address to obtain the broadcast end time.

[0204] The second determining module is used to determine the broadcast message transmission delay based on the broadcast end time;

[0205] The third determining module is used to determine the current broadcast message transmission delay of the current node in the formal broadcast phase based on the broadcast start time and the broadcast end time;

[0206] The stop forwarding module is used to stop forwarding broadcast messages if the transmission delay of the broadcast message is greater than the current transmission delay of the broadcast message.

[0207] The forwarding module is used to continue forwarding the broadcast message if the transmission delay of the broadcast message is less than or equal to the transmission delay of the current broadcast message.

[0208] Based on the above embodiments, it also includes:

[0209] The storage module is configured to, if, when querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address, the broadcast end time cannot be found, and it is determined that the node has experienced a link anomaly during the sniffing broadcast phase, store the Internet Protocol address, the directed broadcast start time, and the directed broadcast reception time into the broadcast statistics table.

[0210] Based on the above embodiments, it also includes:

[0211] The first generation module is used for each node to generate its own broadcast statistics table; the broadcast statistics table includes the Internet Protocol address of the broadcast source, the broadcast start time, and the broadcast arrival time.

[0212] Based on the above embodiments, it also includes:

[0213] The second generation module is used by the router of the local subnet to generate the directly connected link table; the directly connected link table includes the local field-programmable gate array (FPGA) accelerator Internet Protocol (IP) address and the directly connected FPGA accelerator Internet Protocol (IP) address.

[0214] Based on the above embodiments, it also includes:

[0215] The formal broadcast forwarding rule setting module is used to set formal broadcast forwarding rules during the formal broadcast phase. The formal broadcast forwarding rules stipulate that when the control server performs a directional broadcast, all nodes in the target directional subnet, forwarding routers, and programmable gate array accelerators under the forwarding routers that have direct links to the field programmable gate array accelerators in the directional subnet can also participate in the forwarding of the directional broadcast.

[0216] Based on the above embodiments, it also includes:

[0217] The fourth determining module is used to determine, if the transmission delay of the broadcast message is greater than the transmission delay of the current broadcast message, that the broadcast message received by the current node at the broadcast arrival time originates from a communication link with a longer transmission time.

[0218] Based on the above embodiments, it also includes:

[0219] The second update module is used to update the broadcast end time in the broadcast statistics table to the broadcast arrival time if the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay.

[0220] Based on the above embodiments, it also includes:

[0221] The clearing module is used to clear the broadcast statistics table of each node after the formal broadcast phase ends, and the router clears its direct link table.

[0222] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed, can perform the steps provided in the above embodiments. The storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0223] The present invention also provides an electronic device, see [link to relevant documentation]. Figure 6 The present invention provides a structural diagram of an electronic device, as shown in the embodiment of the invention. Figure 6 As shown, it may include a processor 1410 and a memory 1420.

[0224] The processor 1410 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 1410 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 1410 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 1410 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 1410 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0225] The memory 1420 may include one or more computer-readable storage media, which may be non-transitory. The memory 1420 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 1420 is used to store at least the following computer program 1421, which, after being loaded and executed by the processor 1410, is capable of implementing the relevant steps of the methods disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 1420 may also include an operating system 1422 and data 1423, etc., and the storage method may be temporary storage or permanent storage. The operating system 1422 may include Windows, Linux, Android, etc.

[0226] In some embodiments, the electronic device may further include a display screen 1430, an input / output interface 1440, a communication interface 1450, a sensor 1460, a power supply 1470, and a communication bus 1480.

[0227] certainly, Figure 6 The structure of the electronic device shown does not constitute a limitation on the electronic device in the embodiments of the present invention. In practical applications, the electronic device may include more than […]. Figure 6 More or fewer components as shown, or combinations of certain components.

[0228] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. As the system provided in the embodiments corresponds to the method provided in the embodiments, the description is relatively simple; relevant parts can be found in the method section.

[0229] This article uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

[0230] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method of broadcasting for a field programmable gate array accelerator cluster, the method comprising: Comprising: In the sniffing broadcast phase, the control server performs sniffing broadcast on all nodes in all managed subnets through all communication links; the nodes include routers and field programmable gate array accelerators; In the topology filling phase, two field programmable gate array accelerators that forward sniffing broadcast messages through direct link in the sniffing broadcast phase are taken as connected field programmable gate array accelerators, and information of the connected field programmable gate array accelerators is uploaded to a router of a local subnet; the router of the local subnet records the information of the connected field programmable gate array accelerators to a direct link table; In the formal broadcast phase, the control server performs directional broadcast on target nodes according to broadcast requirements.

2. The broadcasting method of claim 1, wherein, The sniffing broadcast performed by the control server on all nodes in all managed subnets through all communication links comprises: After the direct link information between all field programmable gate array accelerators in all directional subnets under the control server is transmitted to the routers of the subnets, each node forwards the sniffing broadcast according to a forwarding rule when forwarding; the forwarding rule is that a comparison result is obtained by comparing an actual transmission delay of the sniffing broadcast with a sensing transmission delay in a sensing phase, and the comparison result is used to guide whether to forward the sniffing broadcast.

3. The broadcasting method of claim 2, wherein, The forwarding of the sniffing broadcast by each node according to the forwarding rule when forwarding comprises: When each node receives a sniffing broadcast message, the arrival time of the sniffing broadcast message is recorded, and the broadcast statistical table maintained by the node is recorded; The sniffing broadcast message is analyzed to obtain a broadcast field value; The broadcast field value is compared with the broadcast statistical table to determine whether the broadcast field value exists in the broadcast statistical table; If yes, the forwarding of the sniffing broadcast message is stopped; If no, the broadcast field value is recorded to the broadcast statistical table, and the sniffing broadcast message is forwarded to other nodes in a directional broadcast subnet domain.

4. The broadcasting method of claim 3, wherein, The forwarding of the sniffing broadcast message to other nodes in the directional broadcast subnet domain comprises: If the node is a router, the sniffing broadcast message is forwarded to other nodes in the directional broadcast subnet domain except the previous hop node.

5. The broadcasting method of claim 4, wherein, The forwarding of the sniffing broadcast message to other nodes in the directional broadcast subnet domain comprises: If the node is a field programmable gate array accelerator, when the previous node is a field programmable gate array accelerator, the sniffing broadcast message is uploaded to the router of the subnet through a routing link; When the previous hop node is the router of the subnet, it is determined whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link; If there is a direct link and the connected field programmable gate array accelerators are in the directional broadcast subnet domain, the sniffing broadcast message is forwarded; If there is no direct link, or there is a direct link but the connected field programmable gate array accelerators are not in the directional broadcast subnet domain, the forwarding of the sniffing broadcast message is stopped.

6. The broadcasting method of claim 2, wherein, Further comprising: In the sniffing broadcast phase, all the nodes except the control server forward the sniffing broadcast according to the forwarding rule.

7. The broadcasting method of claim 1, wherein, When the control server performs the directed broadcast according to the broadcast requirement, the method further comprises: The node records the broadcast receiving time of the directed broadcast packet and parses the Internet Protocol address of the broadcast source of the directed broadcast packet, and updates the receiving time to the broadcast statistical table maintained by itself; According to the sniffing broadcast start time of the sniffing broadcast phase and the broadcast statistical table of the Internet Protocol address in the sniffing broadcast phase, the broadcast end time is obtained; According to the broadcast end time, the broadcast packet transmission delay is determined; According to the broadcast start time and the broadcast end time, the current broadcast packet transmission delay of the node in the formal broadcast phase is determined; If the broadcast packet transmission delay is greater than the current broadcast packet transmission delay, the broadcast packet is no longer forwarded; If the broadcast packet transmission delay is less than or equal to the current broadcast packet transmission delay, the broadcast packet is continued to be forwarded.

8. The broadcasting method of claim 7, wherein, If the broadcast end time cannot be queried according to the sniffing broadcast start time of the sniffing broadcast phase and the broadcast statistical table of the Internet Protocol address in the sniffing broadcast phase, the method further comprises: It is determined that the node has a link exception in the sniffing broadcast phase, and the Internet Protocol address, the directed broadcast start time and the directed broadcast receiving time are stored in the broadcast statistical table.

9. The broadcasting method of claim 7, wherein, After the control server performs sniffing broadcast on all the nodes in all the subnets managed by it through all the communication links, the method further comprises: The shortest broadcast delay corresponding to each node is determined.

10. The broadcasting method of claim 3, wherein, The method further comprises: Each node generates the broadcast statistical table maintained by itself; The broadcast statistical table contains the Internet Protocol address of the broadcast source, the broadcast start time and the broadcast arrival time.

11. The broadcasting method of claim 1, wherein, The method further comprises: The router of the local subnet generates the direct link table; The direct link table contains the local field programmable gate array accelerator Internet Protocol address and the direct field programmable gate array accelerator Internet Protocol address.

12. The broadcasting method of claim 1, wherein, During the formal broadcast phase, the method further comprises: The formal broadcast forwarding rule is set, and the formal broadcast forwarding rule is that when the control server performs directed broadcast, all the nodes in the target directed subnet, the forwarding router and the programmable gate array accelerator which has a direct link with the field programmable gate array accelerator in the directed subnet under the forwarding router can also participate in the forwarding of the directed broadcast.

13. The broadcasting method of claim 7, wherein, If the broadcast packet transmission delay is greater than the current broadcast packet transmission delay, the method further comprises: It is determined that the broadcast packet received by the current node at the broadcast arrival time is from a communication link with long time consumption.

14. The broadcasting method of claim 7, wherein, If the broadcast packet transmission delay is less than or equal to the current broadcast packet transmission delay, the method further comprises: The broadcast end time in the broadcast statistical table is updated to the broadcast arrival time.

15. The broadcasting method of claim 1 or 8, wherein, The method further comprises: After the formal broadcast phase ends, each node clears the broadcast statistical table maintained by itself, and the router clears the direct link table maintained by itself.

16. The broadcasting method of claim 1, wherein, Before the sniffing broadcast phase, the method further comprises: constructing a field programmable gate array accelerator cluster composed of the control server, the router and the field programmable gate array accelerator; wherein the control server, the router and the field programmable gate array accelerator are provided with a routing link, and the field programmable gate array accelerators belonging to different routers are provided with the direct connection link; the control server is configured to manage the field programmable gate array accelerator cluster; and the field programmable gate array accelerator is configured to perform network communication and application calculation.

17. The broadcasting method of claim 16, wherein, The field programmable gate array accelerator comprises: a communication sub-kernel, a calculation sub-kernel and a control sub-kernel; the communication sub-kernel is configured to perform network communication, the calculation sub-kernel is configured to perform application calculation, and the control sub-kernel is configured to perform logical control.

18. A broadcast system for a field programmable gate array accelerator cluster, the system comprising: comprise: a sniffing broadcast module configured to control the control server to perform sniffing broadcast on nodes in all subnets managed by the control server through all communication links in a sniffing broadcast phase; the nodes comprise routers and field programmable gate array accelerators; a topology filling module configured to, in a topology filling phase, upload information of two field programmable gate array accelerators connected by a direct connection link, which perform sniffing broadcast message forwarding through the direct connection link in the sniffing broadcast phase, to a router of a local subnet; and the router of the local subnet records the information of the two field programmable gate array accelerators connected by the direct connection link to a direct connection link table; an official broadcast module configured to control the control server to perform directional broadcast on target nodes managed by the control server according to broadcast requirements in an official broadcast phase.

19. A computer readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by a processor to realize the steps of the method according to any one of claims 1-17.

20. An electronic device, comprising: The computer program is executed by a processor to realize the steps of the method according to any one of claims 1-17. The computer program is executed by a processor to realize the steps of the method according to any one of claims 1-17.

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