Method and Module for Generating PWM Control Signal of LED Display Screen

Abstract

The present invention relates to a method and a module for generating a PWM control signal of an LED display screen. The method for generating a PWM control signal includes the following steps: storing the high j bits of data in the first frame of PWM grayscale data into a first memory, and then cyclically reading the high j bits of data 2 k‑1 times and storing the remaining k bits of data in the first frame of PWM grayscale data into a second memory, then reading the low k bits of data in the first frame of PWM grayscale data, and cyclically reading the high j bits of data again 2 k‑1 times and storing the high j bits of data in the second frame of PWM grayscale data into the second memory, and performing writing and reading operations on the data of the second frame and subsequent frames in a similar manner until the PWM grayscale data of all frames is processed. The module for generating a PWM control signal includes a first memory, a second memory, and a status counter. By using the method and the module for generating a PWM control signal of the LED display screen of the present invention, the volume of the chip can be effectively reduced on the premise of ensuring the chip performance.

Description

Technical Field

[0001] The present invention relates to the technical field of LED display, and particularly to a method and module for generating a PWM control signal of an LED display screen. Background Art

[0002] An LED display screen is a modern flat display screen composed of LED dot matrix modules or pixel units, and has the advantages of high luminous efficiency, long service life, large viewing angle range, rich colors, and strong adaptability to indoor and outdoor environments. The gray display intensity of the LED display screen is controlled based on gray data.

[0003] Currently, in medium and high-end display screens, a constant current source driving chip capable of outputting high-refresh PWM is usually used to control the LED dot matrix module. Such a chip first receives all the gray data of a complete frame, and then generates a PWM driving signal by using a PWM generating device based on the gray data. Storing all the gray data requires a large memory. A common memory structure is as Figure 1 shown, adopting a ping-pong (ping-pong frame) storage structure, which is divided into two regions (Banks) for reading and writing. Each region can store the gray data of a complete frame. It can be seen that the memory requires at least twice the frame image data space, so it occupies a large chip area. Summary of the Invention

[0004] In view of some or all of the problems in the prior art, a first aspect of the present invention provides a method for generating a PWM control signal of an LED display screen, including:

[0005] Storing the high j bits of data in the first frame of PWM gray data into a first memory;

[0006] Circularly reading the high j bits of data 2 k-1 times from the first memory to generate a PWM signal. At the same time, storing the remaining k bits of data in the first frame of PWM gray data into a second memory, where k = n - j, and n is the number of bits of a frame of PWM gray data;

[0007] Reading the low k bits of data of the first frame of PWM gray data from the first memory to generate a PWM signal and display once;

[0008] Circularly reading the high j bits of data of the first frame of PWM gray data from the first memory again 2 k-1 times to generate a PWM signal. At the same time, storing the high j bits of data in the second frame of PWM gray data into the second memory;

[0009] Circularly reading the high j bits of data of the second frame of PWM gray data from the second memory 2 k-1Next, to generate a PWM signal, at the same time, store the remaining k-bit data in the second-frame PWM grayscale data into the first memory; and

[0010] Read the low k-bit data of the second-frame PWM grayscale data from the first memory to generate a PWM signal and display it once;

[0011] Read the high j-bit data of the second-frame PWM grayscale data from the first memory in a loop 2 k-1 times to generate a PWM signal. At the same time, store the high j-bit data in the third-frame PWM grayscale data into the second memory, and so on until all the PWM grayscale data of all frames is processed.

[0012] Further, the loop of reading the high j-bit data 2 k-1 times means reading the high j-bit data, taking one complete scanning cycle (sub-frame) as one time, and repeating 2 k-1 times.

[0013] Further, the values of j and k are both positive integers selected from 1 to (n - 1), and j + k = n, where n is the number of bits of a frame of PWM grayscale data.

[0014] Further, the display time of a frame of PWM grayscale data is {2 k *(P j-1 *2 j-1 +P j-2 *2 j-2 ……+P j-j+1 *2 1 +P j-j *2 0 )]+[P k-1 *2 k-1 +P k-2 *2 k-2 ……+P2*2 2 +P1*2 1 +P0*2 0 )} PWM clock cycles.

[0015] The second aspect of the present invention provides a generation module for a PWM control signal of an LED display screen, including:

[0016] A first memory, which is a readable and writable memory, for storing PWM grayscale data;

[0017] A second memory, which is a readable and writable memory, for storing PWM grayscale data

[0018] A status counter, for calculating the number of times of reading data in the first memory and the second memory.

[0019] A status register, used to control the writing and reading of the first memory and the second memory.

[0020] Further, the generating module further includes:

[0021] A PWM duty cycle generating module, used to generate a PWM control signal according to the read PWM grayscale data.

[0022] Further, the first memory and / or the second memory is a random access memory (RAM, Random Access Memory).

[0023] Further, the size range of the first memory is from 1 / 2 to (n - 1) / n of the frame image data size of the LED display screen, where n is the number of bits of a frame of PWM grayscale data.

[0024] Further, the size range of the second memory is from 1 / 2 to (n - 1) / n of the frame image data size of the LED display screen, where n is the number of bits of a frame of PWM grayscale data.

[0025] The third aspect of the present invention further provides a driving chip for an LED display screen, which includes the generating module of the PWM control signal as described above.

[0026] A method and module for generating a PWM control signal of an LED display screen provided by the present invention, by dividing a frame of PWM grayscale data into two parts to generate PWM signals respectively, so that the memory capacity inside the driving chip can be reduced to 1 / 2 to (n - 1) / n of the memory capacity size in the traditional driving chip, where n is the number of bits of a frame of PWM grayscale data. On the premise of ensuring the chip performance, the volume of the chip is effectively reduced. On the one hand, the reliability of the chip can be improved, and on the other hand, it is more conducive to the miniaturization development of the LED display screen driving chip. Description of the Drawings

[0027] To further clarify the above and other advantages and features of the embodiments of the present invention, more specific descriptions of the embodiments of the present invention will be presented with reference to the drawings. It can be understood that these drawings only depict typical embodiments of the present invention and will not be considered as limiting its scope. In the drawings, for clarity, the same or corresponding components will be denoted by the same or similar reference numerals.

[0028] Figure 1 It is a schematic diagram of the memory structure in the existing LED display screen driving chip;

[0029] Figure 2 It is a schematic diagram of the storage unit structure and capacity of the memory in the existing LED display screen driving chip;

[0030] Figure 3 Schematic diagram of the memory data reading and writing method in an existing LED display driver chip;

[0031] Figure 4 Schematic diagram of the storage unit structure and capacity of the memory in an LED display driver chip according to an embodiment of the present invention;

[0032] Figure 5 Schematic flow chart of a method for generating a PWM control signal of an LED display according to an embodiment of the present invention. Detailed implementation manners

[0033] In the following description, the present invention is described with reference to various embodiments. However, those skilled in the art will recognize that the embodiments can be implemented without one or more of the specific details or in combination with other alternative and / or additional methods or components. In other instances, well-known structures or operations are not shown or described in detail to avoid obscuring the inventive aspects of the present invention. Similarly, for purposes of explanation, specific numbers and configurations are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, the present invention is not limited to these specific details.

[0034] In this specification, the reference to "an embodiment" or "the embodiment" means that the specific features, structures, or characteristics described in connection with the embodiment are included in at least one embodiment of the present invention. The phrase "in an embodiment" appearing throughout this specification does not necessarily all refer to the same embodiment.

[0035] It should be noted that the embodiments of the present invention describe the method steps in a specific order. However, this is only for the purpose of illustrating the specific embodiment and does not limit the sequence of the steps. On the contrary, in different embodiments of the present invention, the sequence of the steps can be adjusted according to actual requirements.

[0036] In a traditional LED display driver chip, due to the adoption of the "ping-pong" structure, the memory therein usually requires a capacity twice the size of the frame image data, which occupies a relatively large area.

[0037] Figure 2It is a schematic diagram of the storage unit structure and capacity of the memory in an existing LED display driver chip. Assume the number of chip channels is x, the PWM grayscale data of each channel is n, and the number of scanning rows is r. Then the total number of storage units in the traditional "ping-pong" complete frame storage structure is n * x * r * 2. The working process of the traditional LED display driver chip is as follows: Read the grayscale data of the first row for display; Read the grayscale data of the second row for display; Read the data of each row in sequence for display until the grayscale data of the r-th row is read for display; Then repeat these reading operations. During this period, data is written to the second storage unit. Until all the data in the first memory is displayed, read the data in the second memory and write data to the first memory at the same time.

[0038] Figure 3 It is a schematic diagram of the data reading and writing method of the memory in an existing LED display driver chip. The specific reading and writing method is as follows: Step 001, read the data in the first memory for display and store the data in the second memory at the same time; Step 002, read the data in the second memory for display and store the data in the first memory at the same time; Read the data in the first memory and the second memory in turn like this, and store the data in the second memory and the first memory in turn, and cycle through reading and storing data.

[0039] The inventor found through research that if the capacity of the memory can be reduced, the chip volume can be effectively reduced and the reliability of the chip can be improved at the same time. The inventor further found that for an n-bit PWM grayscale data with the data [P n-1 ,P n-2 ,……P2,P1,P0], its display time is {P n-1 *2 n-1 +P n-2 *2 n-2 ……+P2*2 2 +P1*2 1 +P0*2 0} PWM clock cycles. If this data is recorded as [P j-1 ,P j-2 ,……P1,P0,P k-1 ,P k-2 ] ,……P2,P1,P0], where j + k = n, then its display time is {P j-1 *2 j+k-1 +P j-2 *2 j+k-2 ……+P j-j+1 *2 k+1 +P j-j *2 k +P k-1 *2 k-1 +P k-2 *2k-2 …… + P2 * 2 2 + P1 * 2 1 + P0 * 2 0} PWM clock cycles. After arrangement, the display time can be obtained as {2 k *(P j-1 * 2 j-1 + P j-2 * 2 j-2 …… + P j-j+1 * 2 1 + P j-j * 2 0 )] + [P k-1 * 2 k-1 + P k-2 * 2 k-2 …… + P2 * 2 2 + P1 * 2 1 + P0 * 2 0 )} PWM clock cycles. Based on this, the inventor splits the n-bit PWM data into [P j-1 , P j-2 , …… P2, P1, P0] and [P k-1 , P k-2 , …… P2, P1, P0] into two parts, and performs reading and writing separately. Among them, the high j bits are stored in one memory area, and the low k bits are stored in another memory area. According to the foregoing analysis, it can be seen that at this time, the high j-bit data needs to be cycled 2 k times, while the low k-bit data only needs to be cycled once to achieve the original grayscale display effect. And because the high j bits have more cycles, the low k bits can also be written during their cycles to improve the system efficiency.

[0040] Next, in combination with the accompanying drawings of the embodiments, the solution of the present invention will be further described.

[0041] Figure 4 It is a schematic diagram of the storage unit structure and capacity of the memory in an LED display driving chip according to an embodiment of the present invention. Assume that the number of chip channels is x, the PWM grayscale data of each channel is n, and the number of scanning lines is r; when j = k = n / 2, the number of storage units required is (n / 2) * x * r * 2 = n * x * r, which is half of the total number of storage units n * x * r * 2 of the traditional "ping-pong" complete frame storage structure.

[0042] Figure 5 It is a schematic flowchart of a method for generating a PWM control signal of an LED display according to an embodiment of the present invention. As Figure 5 shown, a method for generating a PWM control signal of an LED display includes:

[0043] First, in step 101, store the high j-bit data. Store the high j-bit data in a frame of PWM grayscale data into the first memory or the first memory area, and the first memory or the first memory area can be independently read and written. In an embodiment of the present invention, the first memory is preferably a random access memory (RAM, Random Access Memory);

[0044] Next, in step 102, read the high j-bit data and store the low k-bit data. Read the high j-bit data from the first memory or the first memory area in a loop 2 k-1 times to generate a PWM signal. The loop of reading the high j-bit data 2 k-1 times means reading the high j-bit data, taking one complete scan cycle (sub-frame) as one time, and repeating 2 k-1 times. During this period, store the remaining low k-bit data in the PWM grayscale data into the second memory, where k = n - j, and n is the number of bits of a frame of PWM grayscale data;

[0045] Next, in step 103, read the low k-bit data. Read the low k-bit data of the first frame of PWM grayscale data from the second memory or the second memory area to generate a PWM signal. As mentioned above, the low k-bit data only needs to work once, and after this reading is completed, it can be overwritten by subsequent data;

[0046] Next, in step 104, read the high j-bit data and store the high j-bit data of the next frame. As mentioned above, the high j-bit data needs to work 2 k times. Therefore, after the low k-bit data finishes working, the high j-bit data still needs to continue working 2 k-1 times. Based on this, after the low k-bit data finishes working, it is necessary to read the high j-bit data of the first frame of PWM grayscale data from the first memory or the first memory area in a loop 2 k-1 times to generate a PWM signal. At this point, the high j-bit data works 2 k times, and the low k-bit works 1 time to complete the display time of the entire frame of data. At the same time, to improve efficiency, during the last 2 k-1 times of the high j-bit data working, store the high j-bit data of the next frame of PWM grayscale data into the second memory or the second memory area. After the previous frame of PWM grayscale data finishes working, perform read and write operations on the next frame of PWM grayscale data in the same way until all PWM grayscale data finishes working.

[0047] Since two memories or memory regions need to perform corresponding read and write operations alternately, in order to avoid the situation where the newly written data cannot completely overwrite the original data, and at the same time to minimize the memory capacity, in an embodiment of the present invention, the value of j is equal to the value of k, which is equal to 1 / 2 of the size n of one frame of PWM grayscale data.

[0048] j = k = n / 2 is an example. The value ranges of both j and k are positive integer values taken between 1 and (n - 1), and j + k = n, where n is the number of bits of one frame of PWM grayscale data. Then the number of storage units required is MAX(j, k) * x * r * 2, where MAX(j, k) means taking the maximum value of j and k. The value range of MAX(j, k) is from n / 2 to (n - 1), which is 1 / 2 to (n - 1) / n of the total number of storage units n * x * r * 2 of the traditional "ping-pong" complete frame storage structure. The present invention can reduce the memory capacity size, effectively reduce the chip volume, and improve the reliability of the chip at the same time.

[0049] In order to implement the foregoing generation method, the present invention further provides a generation module for the PWM control signal of an LED display screen, which includes two independent memories: a first memory and a second memory, or includes a memory, and the memory includes two independent regions: a first storage region and a second storage region. The memory can perform read and write operations. In an embodiment of the present invention, the memory is a random access memory (RAM, Random Access Memory).

[0050] As described above, the first memory, the second memory, or the first memory region and the second memory region are used to alternately perform the write and read operations of the high j bits and the low k bits in the PWM grayscale data.

[0051] In an embodiment of the present invention, the writing and reading of the first memory, the second memory, or the first memory region and the second memory region are both controlled by a status register. Specifically, it is through the status register to control the read or write object of the chip, thereby implementing the PWM control signal generation method as described above.

[0052] Since in the embodiments of the present invention, different data need to be read different times, therefore, in an embodiment of the present invention, a status counter is also provided to calculate the number of times the data is read. Specifically, after the data of the high j bits is read 2 k-1 times, the status counter notifies the status register to switch the read object, and after the data of the low k bits is read 1 time, the status counter notifies the status register to switch the read object, and at the same time writes new data into the corresponding memory or memory region. Overall, it enables the generation module to achieve: the first memory or the first storage region works 2k -1 times, then the second memory or the second storage area works 1 time, and then the first memory or the first storage area continues to work 2 k-1 times. Next, the second memory or the second storage area works 2 k-1 times, then the first memory or the first storage area works 1 time, and then the second memory or the second storage area continues to work 2 k-1 times, and the first memory or the first storage area works 2 k-1 times, and so on.

[0053] In addition, in an embodiment of the present invention, the generating module further includes a PWM duty cycle generating module, which can generate a PWM control signal according to the read PWM gray-scale data.

[0054] As described above, in an embodiment of the present invention, the value of j is equal to the value of k, which is equal to 1 / 2 of the size of a frame of PWM gray-scale data. Therefore, in an embodiment of the present invention, the capacity of the first memory, the second memory, or the first memory area and the second memory area is equal to 1 / 2 of the size of the frame image data of the LED display screen. As described above, the value ranges of j and k are both positive integers between 1 and (n - 1), and j + k = n. The capacity of the first memory, the second memory, or the first memory area and the second memory area is equal to 1 / 2 to (n - 1) / n of the size of the frame image data of the LED display screen, where n is the number of bits of a frame of PWM gray-scale data.

[0055] When the driving chip of the LED display screen adopts the method and module for generating the PWM control signal as described above, the internal memory capacity can be reduced to 1 / 2 to (n - 1) / n of the traditional design solution, thereby greatly reducing the chip volume and improving the stability of the chip.

[0056] In the present invention, each module of the system according to the present invention can be implemented using software, hardware, firmware, or a combination thereof. When a module is implemented using software, the functions of the module can be realized through a computer program process. For example, the module can be implemented by a code segment (such as a code segment in languages like C, C++) stored in a storage device (such as a hard disk, memory, etc.), where when the code segment is executed by a processor, the corresponding functions of the module can be realized. When a module is implemented using hardware, the functions of the module can be realized by setting the corresponding hardware structure. For example, the functions of the module can be realized by hardware programming of a programmable device such as a Field Programmable Gate Array (FPGA), or by designing an Application Specific Integrated Circuit (ASIC) including multiple electronic devices such as transistors, resistors, and capacitors. When a module is implemented using firmware, the functions of the module can be written in a read-only memory such as an EPROM or EEPROM of the device in the form of program code, and when the program code is executed by a processor, the corresponding functions of the module can be realized. Additionally, certain functions of the module may need to be implemented by separate hardware or in cooperation with the hardware. For example, the detection function is realized through corresponding sensors (such as proximity sensors, acceleration sensors, gyroscopes, etc.), the signal emission function is realized through corresponding communication devices (such as Bluetooth devices, infrared communication devices, baseband communication devices, Wi-Fi communication devices, etc.), the output function is realized through corresponding output devices (such as displays, speakers, etc.), and so on.

[0057] Although the embodiments of the present invention have been described above, it should be understood that they are presented only as examples and not as limitations. It will be apparent to those skilled in the relevant art that various combinations, variations, and changes can be made thereto without departing from the spirit and scope of the present invention. Therefore, the width and scope of the present invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined only by the appended claims and their equivalents.

Claims

1. A method for generating a PWM control signal of an LED display screen, characterized in that Including steps: Store the high j - bit data in the first - frame PWM grayscale data into the first memory; Cyclically read the high j-bit data 2 from the first memory k-1 times to generate a PWM signal. Meanwhile, store the remaining low k-bit data in the first-frame PWM grayscale data into a second memory, where k = n - j and n is the number of bits of a frame of PWM grayscale data; Read the low k - bit data of the first - frame PWM grayscale data from the second memory to generate a PWM signal and display it once; Read the high j-bit data 2 of the first-frame PWM grayscale data from the first memory in a loop again k-1 times to generate a PWM signal. Meanwhile, store the high j-bit data in the second-frame PWM grayscale data into the second memory; Cyclically read the high j bits of the second-frame PWM grayscale data 2 from the second memory k-1 times to generate a PWM signal. At the same time, store the remaining k bits of the second-frame PWM grayscale data in the first memory; Read the low k - bit data of the second - frame PWM grayscale data from the first memory to generate a PWM signal and display it once; And Read the high j-bit data 2 of the second frame of PWM grayscale data from the second memory in a loop again k-1 times to generate a PWM signal. At the same time, store the high j-bit data in the third frame of PWM grayscale data into the first memory, and so on until the PWM grayscale data of all frames is processed.

2. The generation method according to claim 1, characterized in that The loop reads the high j-bit data 2 k-1 times for reading the high j-bit data, with one complete scan cycle (sub-frame) as one time, and repeats 2 k-1 times.

3. The generation method according to claim 1, characterized in that, The values of j and k are both positive integers selected from the range of 1 to (n - 1), j + k=n, where n is the number of bits of a frame of PWM grayscale data.

4. The generation method according to claim 1, wherein The display time of one frame of PWM grayscale data is {2 k *(P j-1 *2 j-1 +P j-2 *2 j-2 ……+P j-j+1 *2 1 +P j-j *2 0 )]+[P k-1 *2 k-1 +P k-2 *2 k-2 ……+P2*2 2 +P1*2 1 +P0*2 0 )} PWM clock cycles.

5. A generating module for generating a PWM control signal for the LED display screen according to any one of claims 1-4, characterized in that, Including: A first memory, which is a read - write memory and is configured to store part of the data in a frame of PWM grayscale data; A second memory, which is a read - write memory and is configured to store the remaining part of the data in a frame of PWM grayscale data; A status counter, which is configured to calculate the number of times the data in the first memory and the second memory are read; A status register, which is configured to control the writing and reading of the first memory and the second memory.

6. The generation module according to claim 5, wherein Further including: A PWM duty - cycle generation module, which is configured to generate a PWM control signal according to the read PWM grayscale data.

7. The generating module according to claim 5, characterized in that The first memory and / or the second memory is a random - access memory.

8. The generating module according to claim 5, wherein The size of the first memory ranges from 1 / 2 of the frame - image data size of the LED display screen to (n - 1) / n, where n is the number of bits of a frame of PWM grayscale data.

9. The generation module according to claim 5, wherein The size of the second memory ranges from 1 / 2 of the frame - image data size of the LED display screen to (n - 1) / n, where n is the number of bits of a frame of PWM grayscale data.

10. A driving chip for an LED display screen, characterized in that Including the generation module according to any one of claims 5 - 9.

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