Directional coupler

By adjusting the phase difference between the output signals by setting a phaser in the directional coupler, the problem of unstable phase difference caused by frequency band changes in the prior art is solved, achieving low loss and stable phase difference over a wide frequency band, which is suitable for communication devices.

CN116762230BActive Publication Date: 2026-06-09MURATA MFG CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MURATA MFG CO LTD
Filing Date
2021-11-22
Publication Date
2026-06-09

AI Technical Summary

Technical Problem

Existing directional couplers face challenges in achieving broadband and low-loss performance, especially as the phase difference between output signals becomes unstable with frequency band changes, affecting the gain and loss characteristics of communication devices.

Method used

A four-partition directional coupler structure is adopted. By setting phasers between the coupler on the input side and the two couplers on the output side, the phase difference between the output signals is adjusted to ensure a stable phase difference over a wide frequency band.

Benefits of technology

It achieves stable phase difference between output signals over a wide bandwidth with low loss, reduces signal interference, and meets the needs of communication devices for broadband and low loss.

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Abstract

The present invention relates to a directional coupler. A directional coupler (100) divides an input signal received at an input terminal (TI) into four to be output to output terminals (TO1-TO4). The directional coupler is provided with couplers (CP1-CP3) and phase adjusters (PH1, PH2). The coupler (CP1) is connected to the input terminal (TI) and divides the input signal into two to be output to terminals (T1, T2). The coupler (CP2) divides the signal from the terminal (T1) into two to be output to the output terminals (TO1, TO2). The coupler (CP1) divides the signal from the terminal (T2) into two to be output to the output terminals (TO3, TO4). The phase adjuster (PH1) is connected between the terminal (T1) and the coupler (CP2) and advances the phase of the signal from the terminal (T1). The phase adjuster (PH2) is connected between the terminal (T2) and the coupler (CP3) and delays the phase of the signal from the terminal (T2). The phase difference between the output signals of the phase adjusters (PH1, PH2) is 180°±10°.
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Description

Technical Field

[0001] This disclosure relates to directional couplers, and more particularly, to techniques for stabilizing the phase between output signals in a four-way split coupler. Background Technology

[0002] Japanese Patent Application Publication No. 10-145103 (Patent Document 1) discloses a four-phase converter (directional coupler) that outputs four signals with a 90° phase difference from the input signal.

[0003] In the four-phase converter disclosed in Patent Document 1, it consists of a two-wire 90-degree coupler connected to the input terminal and two 180-degree converters connected to the two outputs of the 90-degree coupler respectively. In the four-phase converter disclosed in Patent Document 1, four output signals with a phase difference of 90 degrees are output from the four output terminals.

[0004] Patent Document 1: Japanese Patent Application Publication No. 10-145103

[0005] In communication devices that transmit and receive high-frequency signals, array antennas containing multiple radiating elements are sometimes used. In such communication devices, directional couplers as described above are sometimes used in order to distribute a signal to multiple radiating elements.

[0006] In communication devices, there is a high demand for broadband and low loss. As a result, there is a need for directional couplers that can achieve stable phase difference between output signals with low loss and over a wide frequency band. Summary of the Invention

[0007] This disclosure was made to solve such a problem, and its purpose is to provide a four-part directional coupler that can achieve a stable phase difference between output signals with low loss and over a wide frequency band.

[0008] The directional coupler disclosed herein distributes an input signal received at an input terminal into four outputs to a first to a fourth output terminal. The directional coupler includes a first to a third coupler and a first and a second phaser. The first coupler is connected to the input terminal and distributes the input signal into two outputs to the first and second terminals. The second coupler distributes the signal from the first terminal into two outputs to the first and second output terminals. The third coupler distributes the signal from the second terminal into two outputs to the third and fourth output terminals. The first phaser is connected between the first terminal and the second coupler, advancing the phase of the signal from the first terminal. The second phaser is connected between the second terminal and the third coupler, delaying the phase of the signal from the second terminal. The phase difference between the signal output from the first phaser and the signal output from the second phaser is 180° ± 10°.

[0009] The directional coupler according to this disclosure has the following structure: one output signal of a first coupler connected to an input terminal is provided to a second coupler via a first phaser, and another output signal is provided to a third coupler via a second phaser. Furthermore, the two phasers are designed such that the phase difference between the output signals is 180° ± 10°. Thus, by configuring the phasers in the middle, the frequency characteristics of the phase difference between the signals input to the second and third couplers can be adjusted within a desired range. Therefore, in the four-segment directional coupler, the phase difference between the output signals can be stabilized with low loss and over a wide frequency band. Attached Figure Description

[0010] Figure 1 This is a circuit diagram of the directional coupler involved in the implementation method.

[0011] Figure 2 This is a diagram showing a modified example of a phaser.

[0012] Figure 3 It is used for explanation Figure 1 A diagram showing the characteristics of a directional coupler.

[0013] Figure 4 This is a diagram used to illustrate the frequency characteristics of a phaser.

[0014] Figure 5 yes Figure 1 A three-dimensional view of the directional coupler.

[0015] Figure 6A It means Figure 5 A diagram showing an example of the configuration of the elements in a directional coupler.

[0016] Figure 6B This is a diagram showing an example of the configuration of elements in a modified directional coupler.

[0017] Figure 7 It means Figure 5 An exploded stereoscopic view of an example of a stacked structure of a directional coupler.

[0018] Figure 8 This is a diagram representing the first example of a planar directional coupler.

[0019] Figure 9 This is a diagram representing the second example of a planar directional coupler.

[0020] Figure 10 This is a diagram representing the third example of a planar directional coupler. Detailed Implementation

[0021] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Furthermore, the same or equivalent parts in the drawings will be labeled with the same reference numerals, and their descriptions will not be repeated.

[0022] [Structure of a directional coupler]

[0023] Figure 1 This is a circuit diagram of the directional coupler 100 according to the implementation method. (Refer to...) Figure 1 The directional coupler 100 includes couplers CP1, CP2, and CP3, and phasers PH1 and PH2. The directional coupler 100 distributes the signal received at input terminal TI into four segments and outputs them from output terminals TO1 to TO4. Phaser PH1 is connected between coupler CP1 and coupler CP2. Additionally, phaser PH2 is connected between coupler CP1 and coupler CP3.

[0024] Couplers CP1 through CP3 are two-wire couplers with two parallel lines that split the input signal into two outputs. With the wavelength of the high-frequency signal being transmitted defined as λ, the lines of each coupler have an electrical length of λ / 4. In each coupler, if a signal flows to one line, a signal is induced in the other line due to electromagnetic coupling.

[0025] Coupler CP1 includes a first line CL1 and a second line CL2 arranged in parallel. In coupler CP1, one end of the first line CL1 is connected to the input terminal TI, and the other end is connected to the second terminal on the output side. The end of the second line CL2, opposite to the second terminal TI of the first line CL1, is connected to the terminating terminal TE. The end of the second line CL2, opposite to the input terminal TI of the first line CL1, is connected to the first terminal T1. The impedance of the terminating terminal TE is set to a characteristic impedance of 50Ω. The first terminal T1 of coupler CP1 is connected to phase converter PH1.

[0026] Phaser PH1 is an LC filter comprising capacitors C1 and C2 and inductor L1. Capacitors C1 and C2 are connected in series between couplers CP1 and CP2. Inductor L1 is connected between the connection node between capacitors C1 and C2 and ground potential. That is, phaser PH1 constitutes a so-called T-type high-pass filter. Therefore, the output signal of phaser PH1 is a signal whose phase is advanced relative to the input signal of phaser PH1.

[0027] Coupler CP2 includes a third line CL3 and a fourth line CL4 arranged in parallel. One end of the third line CL3 is connected to the phase converter PH1, and the other end is connected to the output terminal TO1. The end of the fourth line CL4, opposite to the phase converter PH1 side of the third line CL3, is connected to the output terminal TO2. The end of the fourth line CL4, opposite to the output terminal TO1 side of the third line CL3, is connected to the termination terminal TE.

[0028] Phaser PH2 is an LC filter comprising capacitors C11 and C12 and inductor L11. Capacitor C11 is connected between the end of inductor L11 on the coupler CP1 side and ground potential. Additionally, capacitor C12 is connected between the end of inductor L11 on the coupler CP3 side and ground potential. That is, phaser PH2 constitutes a so-called π-type low-pass filter. Therefore, the output signal of phaser PH2 is a signal whose phase is delayed relative to the input signal of phaser PH2. In the directional coupler 100 of this embodiment, phaser PH1 is adjusted so that its phase is advanced by 90° relative to phaser PH2.

[0029] Coupler CP3 includes a fifth line CL5 and a sixth line CL6 arranged in parallel. One end of the fifth line CL5 is connected to the phase converter PH2, and the other end is connected to the output terminal TO3. The end of the sixth line CL6, opposite to the phase converter PH2 side of the fifth line CL5, is connected to the output terminal TO4. The end of the sixth line CL6, opposite to the output terminal TO3 side of the fifth line CL5, is connected to the termination terminal TE.

[0030] Furthermore, as long as the phase of phaser PH1 can be set 90° ahead of the phase of phaser PH2, phasers PH1 and PH2 are not limited to the structures described above. For example, phaser PH1 can also be configured as follows: Figure 2 As shown in (A), a so-called π-type high-pass filter has inductors L2 and L3, one end of which is grounded, connected across the capacitor C3. Alternatively, the phase transformer PH2 can also be configured as... Figure 2 As shown in (B), a so-called T-type low-pass filter has a capacitor C13 with one end grounded connected at the connection node of the series-connected inductors L12 and L13.

[0031] In the directional coupler 100 configured as such, if a high-frequency signal is supplied to the input terminal T1, current flows from the input terminal T1 toward the second terminal T2 in the first line CL1. As described above, if the signal flows to the first line CL1, a signal is induced in the second line CL2 due to electromagnetic coupling.

[0032] At this point, in the second line CL2, the end of the second terminal T2 side of the first line CL1 is connected to the terminal TE, and the electrical length of each line is λ / 4. Therefore, the signal induced in the second line CL2 from the first terminal T1 becomes a signal whose phase is 90° ahead of the signal output from the second terminal T2. Similarly, in coupler CP2, the signal output from output terminal TO2 is also 90° ahead of the signal output from output terminal TO1. In coupler CP3, the signal output from output terminal TO4 is also 90° ahead of the signal output from output terminal TO3.

[0033] Here, without the phase transformers PH1 and PH2, in coupler CP2, if the phase of the signal output from output terminal TO1 is set to 0°, then a signal with a +90° phase is output from output terminal TO2. On the other hand, in coupler CP3, the input signal, whose phase is 90° delayed compared to the signal input to coupler CP2 via coupler CP1, is output from output terminal TO3 with a phase of -90° (i.e., +270°) relative to output terminal TO1, and a signal with a 0° phase is output from output terminal TO4. That is, the signals output from output terminal TO1 and output terminal TO4 are in phase. In this case, for example, in an antenna where each output terminal is individually connected to a radiating element, interference may occur from radio waves from the radiating element connected to output terminal TO1 and from radio waves from the radiating element connected to output terminal TO4.

[0034] On the other hand, in the directional coupler 100 of the embodiment, the phase of phaser PH1 is adjusted to be 90° ahead of phaser PH2, so the phase of the signal output from phaser PH1 is approximately 180° ahead of the phase of the signal output from phaser PH2. Thus, if the phase of the signal output from output terminal TO1 is set to 0°, a signal with a +90° phase is output from output terminal TO2. On the other hand, in coupler CP3, a signal with a -180° (i.e., +180°) phase is output from output terminal TO3, and a signal with a -90° (i.e., +270°) phase is output from output terminal TO4. Thus, in the directional coupler 100, signals with a 90° phase difference are output from output terminals TO1 to TO4. Therefore, interference between radiating elements in an antenna where radiating elements are individually connected to each output terminal can be suppressed. Furthermore, the phase difference between the signal output from phaser PH1 and the signal output from phaser PH2 does not have to be exactly 180°; for example, it is permissible as long as it is within the range of 180° ± 10°. In addition, the phase difference of the signals output from each output terminal TO1 to TO4 is allowed as long as it is within ±10°.

[0035] In communication devices that transmit and receive high-frequency signals, directional couplers are used to distribute a signal to multiple paths. Historically, such communication devices have had a high demand for broadband and low-loss capabilities, which is becoming increasingly apparent with the widespread adoption of 5G (the fifth-generation communication standard) in recent years.

[0036] In directional couplers, the output signal typically exhibits a frequency response. If the frequency changes, the phase relative to the input signal may also change. If the frequency responses of the phases of the outputs differ, the phase difference between the output signals will vary, potentially preventing the desired gain or loss characteristics from being achieved.

[0037] In the directional coupler of this embodiment, as described above, in the four-part directional coupler, a phaser is individually provided between the input coupler and the two output couplers. This phaser allows for appropriate adjustment of the phase difference between the input signals of the two output couplers. Therefore, the phase difference between the output signals in the desired passband can be stabilized.

[0038] Characteristics of directional couplers

[0039] Figure 3 It is used for explanation Figure 1 A diagram showing the characteristics of the directional coupler 100. Figure 3 The left figure shows the total signal loss relative to the input signal from all output terminals, while the center figure shows the individual insertion loss for each output terminal. Additionally, Figure 3 The right figure shows the phase of the signals output from each output terminal.

[0040] In addition, Figure 3 In the various charts, the horizontal axis represents frequency. The frequency band from F1 to F2 in the chart represents the desired passband BW1. Additionally, in the insertion loss (center chart) and phase (right chart) figures, solid lines LN11 and LN21 represent output terminal TO1, dashed lines LN12 and LN22 represent output terminal TO4, dotted lines LN13 and LN23 represent output terminal TO3, and double-dotted lines LN14 and LN24 represent output terminal TO2.

[0041] Reference Figure 3 First, observing the total loss (left figure), it can be seen that the loss is about 1.0 to 1.2 dB in the passband BW1 range (solid line LN1), and it has the characteristics of low loss and roughly flat throughout the entire passband BW1 region.

[0042] Regarding the insertion loss of each output terminal (central diagram), each output exhibits a loss of 6–8 dB within the passband BW1, and the output levels of each output are similar throughout the entire passband BW1. Regarding the phase of each output (right diagram), within the passband BW1, each output changes in the direction of phase delay as the frequency increases. However, the slope of the phase change is approximately the same for each output, and the phase difference between each output remains approximately constant regardless of the frequency.

[0043] That is, in the directional coupler 100, the characteristics of low loss and approximately constant phase difference between outputs are achieved within the desired passband.

[0044] Figure 4 This is a diagram used to illustrate the frequency characteristics of phasers PH1 and PH2. Figure 4 In the diagram, the solid line LN31 represents the phase of the output signal of phaser PH1, and the dashed line LN32 represents the phase of the output signal of phaser PH1. Additionally, the solid line LN30 represents the phase difference between the output signals of phasers PH1 and PH2.

[0045] Reference Figure 4 In passband BW1, the phases of phasers PH1 and PH2 vary in the delay direction as the frequency increases. However, the phase difference between phasers PH1 and PH2 remains approximately constant at 90° throughout the entire passband BW1. Thus, by designing the phasers such that the phase difference between phasers PH1 and PH2 is approximately 90° within the desired passband, it is possible to stabilize the phase difference between the output signals with low loss within the desired passband.

[0046] [Detailed structure of directional coupler]

[0047] Next, use Figures 5-10 The detailed structure of the directional coupler is described below. Figures 5-7 In this example, an example is given showing the various elements constituting a directional coupler arranged three-dimensionally on a substrate. For Figures 8-10 An example of how each element is arranged planarly on a substrate will be explained.

[0048] (Example of a 3D configuration)

[0049] Figure 5 This is a perspective view of the directional coupler 100. (Refer to...) Figure 5 The directional coupler 100 includes a dielectric substrate 110 with a multilayer structure having a cuboid or approximately cuboid shape. For example... Figure 7As described later, the dielectric substrate 110 is formed by stacking multiple dielectric layers LY1 to LY21 along a predetermined direction. In the dielectric substrate 110, the direction in which the multiple dielectric layers LY1 to LY21 are stacked is designated as the stacking direction. Each dielectric layer of the dielectric substrate 110 is formed, for example, from a ceramic such as low-temperature co-fired ceramics (LTCC) or from a resin. Inside the dielectric substrate 110, multiple electrodes disposed in each dielectric layer and multiple vias disposed between the dielectric layers constitute inductors and capacitors for couplers CP1 to CP3 and phasers PH1 and PH2. Furthermore, in this specification, "via" refers to a conductor disposed in a dielectric layer for connecting electrodes disposed in different dielectric layers. Vias are formed, for example, from conductive paste, plating, and / or metal pins.

[0050] Furthermore, in the following description, the stacking direction of the dielectric substrate 110 is defined as the "Z-axis direction", the direction perpendicular to the Z-axis direction and along the long side of the dielectric substrate 110 is defined as the "X-axis direction", and the direction along the short side of the dielectric substrate 110 is defined as the "Y-axis direction". In addition, in the following, the positive direction of the Z-axis in each figure is sometimes referred to as the upper side, and the negative direction is sometimes referred to as the lower side.

[0051] A directional mark DM for determining the orientation of the substrate is disposed on the upper surface 111 of the dielectric substrate 110. Additionally, a plurality of external electrodes, approximately C-shaped, are disposed on the dielectric substrate 110, extending from the upper surface 111 through the side of the dielectric substrate 110 to the lower surface 112. These external electrodes include an input terminal TI, output terminals TO1 to TO4, a termination terminal TE, and a ground terminal GND. The portion of the dielectric substrate 110 on the lower surface 112 of each external electrode is electrically connected to a mounting substrate (not shown) using solder or other connecting components.

[0052] Figure 6A It means Figure 5 A diagram illustrating a schematic configuration example of the elements in the directional coupler 100. Additionally, Figure 6B This is a diagram showing a configuration example corresponding to the directional coupler 100A in the modified example.

[0053] exist Figure 6AIn the directional coupler 100 of this embodiment, the input-side coupler CP1 is disposed on the first portion RG1 on the upper surface 111 side of the dielectric substrate 110. The output-side couplers CP2 and CP3 are disposed on the second portion RG2 and the third portion RG3 on the lower surface 112 side of the dielectric substrate 110, respectively. In the stacking direction (Z-axis direction) of the dielectric substrate 110, the phaser PH1 is disposed on the fourth portion RG4 between the couplers CP1 and CP2. In addition, in the stacking direction of the dielectric substrate 110, the phaser PH2 is disposed on the fifth portion RG5 between the couplers CP1 and CP3. The fourth portion RG4 where the phaser PH1 is disposed can be the same layer as the fifth portion RG5 where the phaser PH2 is disposed, or it can be a different layer.

[0054] Figure 6B In a modified example, the directional coupler 100A is configured opposite to that of the directional coupler 100. Specifically, the input-side coupler CP1 is disposed in the first portion RG1A on the lower surface 112 side of the dielectric substrate 110. The output-side couplers CP2 and CP3 are disposed in the second portion RG2A and the third portion RG3A on the upper surface 111 side of the dielectric substrate 110, respectively. In the stacking direction of the dielectric substrate 110, the phaser PH1 is disposed in the fourth portion RG4A between couplers CP1 and CP2. Furthermore, in the stacking direction of the dielectric substrate 110, the phaser PH2 is disposed in the fifth portion RG5A between couplers CP1 and CP3.

[0055] In either of the directional couplers 100 and 100A, the coupler and phaser constituting the directional coupler are configured to be stacked in the Z-axis direction. Therefore, although the dimension in the Z-axis direction is slightly thicker, the area viewed from above in the Z-axis direction is smaller. Thus, compared with... Figures 8-10 Compared to the planar configuration described later, the area occupied on the mounting substrate is reduced. Therefore, it is possible to miniaturize the circuit containing the directional coupler.

[0056] Figure 7 It means Figure 5 An exploded perspective view of an example of the stacked structure of the directional coupler 100. As described above, the dielectric substrate 110 has a structure in which multiple dielectric layers LY1 to LY21 are stacked in the Z-axis direction.

[0057] A directional mark DM for determining the orientation of the substrate is disposed on the upper surface 111 (dielectric layer LY1) of the dielectric substrate 110. A ground terminal GND is disposed on the short side of the dielectric layer LY1, and an input terminal TI, output terminals TO1 to TO4, and a termination terminal TE are disposed on the long side. Figure 5As shown, each electrode extends from the side of the dielectric substrate 110 to the lower surface 112 (dielectric layer LY21).

[0058] In brief, coupler CP1 is formed by portions of dielectric layers LY3 to LY6 (first portion RG1), and couplers CP2 and CP3 (second portion RG2 and third portion RG3) are formed by portions of dielectric layers LY17 to LY20. Phasers PH1 and PH2 are disposed on dielectric layers LY8 to LY15 (fourth portion RG4 and fifth portion RG5). Furthermore, planar electrodes GP1, GP2, GP3, and GP4, connected to the ground terminal GND, are respectively disposed on dielectric layers LY2, LY7, LY16, and LY21. In other words, planar electrode GP2 is disposed between first portion RG1 and fourth portion RG4 / fifth portion RG5, and planar electrode GP3 is disposed between second portion RG2 / third portion RG3 and fourth portion RG4 / fifth portion RG5.

[0059] Planar electrodes GP1 and GP4 are positioned close to the upper surface 111 and lower surface 112, respectively, and function as shielding elements to reduce the influence of electromagnetic waves from outside the equipment. Planar electrode GP2 is disposed in the layer between coupler CP1 and phasers PH1 and PH2. Planar electrode GP2 suppresses electromagnetic coupling between coupler CP1 and each phaser. Planar electrode GP3 suppresses electromagnetic coupling between coupler CP2 and phaser PH1, and between coupler CP3 and phaser PH2.

[0060] Input terminal TI is connected to a linear wiring electrode LP1 disposed on dielectric layer LY3. Wiring electrode LP1 is connected to via V1 near the center of dielectric layer LY3, and through via V1 is connected to one end of wiring electrode LP2 disposed on dielectric layer LY4. Wiring electrode LP2 has a spiral shape. The other end of wiring electrode LP2 is connected via via V2 to one end of a linear wiring electrode LP3 disposed on dielectric layer LY6. Wiring electrode LP2 and... Figure 1 The first line CL1 of the coupler CP1 in the middle corresponds to this.

[0061] A spiral-shaped wiring electrode LP11 is disposed in dielectric layer LY5. One end of wiring electrode LP11 is connected via via V10 and wiring electrode LP10 disposed in dielectric layer LY6 to a terminal terminal TE extending to the side of dielectric substrate 110. The other end of wiring electrode LP11 is connected via via V11 to wiring electrode LP12 disposed in dielectric layer LY6. Wiring electrode LP11 corresponds to the second line CL2 of coupler CP1.

[0062] Wiring electrode LP11 is opposite to wiring electrode LP2 disposed on dielectric layer LY4. The winding directions of the opposing portions of wiring electrodes LP2 and LP11 are the same. Wiring electrodes LP2 and LP11 are electromagnetically coupled to each other.

[0063] The other end of the wiring electrode LP12 is connected to the capacitor electrode CA11 disposed on the dielectric layer LY9 via the via V12. The capacitor electrode CA11 is configured such that, when viewed from above in the Z-axis direction, at least a portion overlaps with the capacitor electrode CA12 disposed on the dielectric layer LY10. The circuit consists of capacitor electrode CA11 and capacitor electrode CA12. Figure 1 Capacitor C1 in phaser PH1.

[0064] Capacitor electrode CA12 is connected via via V13 to one end of wiring electrode LP13 disposed on dielectric layer LY12. Wiring electrode LP13 has a spiral shape. The other end of wiring electrode LP13 is connected via via V15 to one end of wiring electrode LP14 disposed on dielectric layer LY14. Wiring electrode LP14 has a spiral shape. The other end of wiring electrode LP14 is connected via via V16 to one end of planar electrode GP3 disposed on dielectric layer LY16. Wiring electrodes LP13 and LP14, and vias V13, V15, and V16 constitute the inductor L1 of phase transformer PH1.

[0065] Furthermore, capacitor electrode CA12 is configured such that, when viewed from above in the Z-axis direction, at least a portion overlaps with capacitor electrode CA13 disposed in dielectric layer LY11. Capacitor electrode CA12 and capacitor electrode CA13 together constitute capacitor C2 in phaser PH1.

[0066] Capacitor electrode CA13 is connected to via V14. Via V14 is biased in dielectric layer LY17 and connected to one end of wiring electrode LP40 disposed in dielectric layer LY18. Wiring electrode LP40 has a spiral shape. The other end of wiring electrode LP40 is connected via via V40 to wiring electrode LP41 disposed in dielectric layer LY17. Wiring electrode LP41 is connected to output terminal TO1 extending to the side of dielectric substrate 110. Wiring electrode LP40 and... Figure 1 The third line CL3 of the coupler CP2 in the middle corresponds to this.

[0067] A spiral-shaped wiring electrode LP50 is disposed on dielectric layer LY19, opposite to wiring electrode LP40. One end of wiring electrode LP50 is connected to output terminal TO2 extending to the side of dielectric substrate 110. The other end of wiring electrode LP50 is connected to terminal terminal TE extending to the side of dielectric substrate 110 via via V50 and wiring electrode LP51 disposed on dielectric layer LY20. Wiring electrode LP50 corresponds to the fourth line CL4 of coupler CP2.

[0068] Additionally, the other end of the wiring electrode LP3 is connected to the via V3, and through the via V3, it is connected to the capacitor electrode CA1 of the dielectric layer LY8 and one end of the wiring electrode LP4 disposed on the dielectric layer LY12. The capacitor electrode CA1 is configured such that, when viewed from above in the Z-axis direction, at least a portion overlaps with the planar electrode GP2 disposed on the dielectric layer LY7. The circuit consists of the capacitor electrode CA1 and the planar electrode GP2. Figure 1 The capacitor C11 in the phaser PH2.

[0069] Wiring electrode LP4 has a spiral shape. The other end of wiring electrode LP4 is connected via via V4 to one end of wiring electrode LP5 disposed in dielectric layer LY13. Wiring electrode LP5 has a spiral shape. The other end of wiring electrode LP5 is connected via via V5 to one end of wiring electrode LP6 disposed in dielectric layer LY14. Wiring electrode LP6 has a generally L-shaped shape. The other end of wiring electrode LP6 is connected via via V6 to capacitor electrode CA2 disposed in dielectric layer LY15. Wiring electrodes LP4 to LP6 and vias V3 to V6 constitute inductor L11 in phaser PH2.

[0070] The capacitor electrode CA2 is configured such that, when viewed from above in the Z-axis direction, at least a portion overlaps with the planar electrode GP3 disposed in the dielectric layer LY16. The capacitor electrode CA2 and the planar electrode GP3 constitute the capacitor C12 in the phaser PH2.

[0071] Additionally, via V6 is biased in dielectric layer LY17 and is also connected to one end of wiring electrode LP20 disposed in dielectric layer LY18. Wiring electrode LP20 has a spiral shape. The other end of wiring electrode LP20 is connected to wiring electrode LP21 disposed in dielectric layer LY17 via via V20. Wiring electrode LP21 is connected to output terminal TO3 extending to the side of dielectric substrate 110. Wiring electrode LP20 and Figure 1 The fifth line CL5 of the coupler CP3 corresponds to this.

[0072] A spiral-shaped wiring electrode LP30 is disposed on dielectric layer LY19, opposite to wiring electrode LP20. One end of wiring electrode LP30 is connected to output terminal TO4 extending to the side of dielectric substrate 110. The other end of wiring electrode LP30 is connected to terminal terminal TE extending to the side of dielectric substrate 110 via via V30 and wiring electrode LP31 disposed on dielectric layer LY20. Wiring electrode LP30 corresponds to the sixth line CL6 of coupler CP3.

[0073] Achieve the above structure Figure 1 The directional coupler 100 of the embodiment shown.

[0074] Furthermore, the capacitors C1 and C2 included in the phaser PH1, which is a high-pass filter, require relatively large capacitance to meet their characteristics. However, if the area of ​​the capacitor electrodes is increased to increase capacitance, the parasitic capacitance between them and the grounding plate electrode increases, thus reducing impedance and potentially degrading performance. Additionally, if the spacing between the capacitor electrodes and the plate electrode is increased to reduce this parasitic capacitance, the thickness dimension of the dielectric substrate increases, which could become a major obstacle to miniaturization.

[0075] Therefore, in the directional coupler 100 of the embodiment, the dielectric constant ε2 of the dielectric layers LY9 to LY11 (fourth part RG4) of the capacitor electrodes CA11 to CA13 of the capacitors C1 and C2 of the phaser PH1 is larger than the dielectric constant ε1 of the other dielectric layers (first part RG1, second part RG2, third part RG3) (ε1 < ε2). By setting the dielectric constant to this value, compared to setting the dielectric constant of all dielectric layers to ε1, the desired capacitance of the capacitor included in the phaser PH1 can be achieved with a smaller electrode area. If the electrode area is smaller, the parasitic capacitance between the capacitor electrode and the grounding plate electrode is smaller, and the spacing between the capacitor electrode and the plate electrode is smaller. Therefore, it is possible to achieve reduced suppression characteristics and miniaturization.

[0076] (Example of a planar layout)

[0077] Next, a planar directional coupler in which the constituent elements of the directional coupler are planarly arranged on a substrate will be described. Figures 8-10 The image shows a top view of the dielectric substrate as seen from the normal direction (Z-axis direction). Furthermore, in... Figures 8-10 The detailed structure of couplers CP1 to CP3 and phasers PH1 and PH2 is omitted; only a schematic configuration of the elements on the dielectric substrate is shown. Figures 8-10 Each dielectric layer in the structure can be either a single-layer structure or a multi-layer structure.

[0078] In a planar directional coupler, if with Figure 6A , Figure 6B Compared to the directional coupler with a three-dimensional configuration described above, the mounting area is larger, but the dimension in the Z-axis direction, i.e., the thickness of the dielectric substrate, can be reduced. Therefore, it is suitable for applications requiring low height.

[0079] (first example)

[0080] Figure 8 This diagram illustrates the first example of a planar directional coupler. The first example, directional coupler 100B, is an example of a structure where the signal paths from the input-side coupler CP1 to the output-side couplers CP2 and CP3 are in the same direction.

[0081] Reference Figure 8 In the directional coupler 100B, coupler CP1, phaser PH1, and coupler CP2 are arranged on a rectangular dielectric substrate 110B in the positive X-axis direction DR1 (first direction). In other words, phaser PH1 is arranged between coupler CP1 and coupler CP2 along the X-axis direction.

[0082] Furthermore, in the directional coupler 100B, coupler CP1, phaser PH2, and coupler CP3 are also arranged along the first direction on the dielectric substrate 110B. In other words, phaser PH2 is arranged between coupler CP1 and coupler CP3 along the X-axis direction.

[0083] (Second example)

[0084] Figure 9 This is a diagram illustrating a second example of a planar directional coupler. The second example of the directional coupler 100C is an example of a structure in which the signal paths from the input-side coupler CP1 toward the output-side couplers CP2 and CP3 are in different directions.

[0085] Reference Figure 9 In the directional coupler 100C, the coupler CP1, phaser PH1 and coupler CP2 are arranged on the rectangular dielectric substrate 110C in the positive direction DR1 (first direction) of the X-axis, similar to the directional coupler 100B in the first example.

[0086] On the other hand, coupler CP1, phaser PH2 and coupler CP3 are arranged on dielectric substrate 110C in the opposite direction to the first direction, namely the negative direction of the X-axis DR2 (second direction).

[0087] In the configuration of directional coupler 100C, compared to the directional coupler 100B in the first example, the length of the short side of the dielectric substrate can be shortened. This configuration is suitable for situations where a directional coupler needs to be placed in a long and narrow area on the mounting substrate. Furthermore, in directional coupler 100C, the first signal path output from coupler CP1 via coupler CP2 and the second signal path output from coupler CP1 via coupler CP3 are not adjacent on the dielectric substrate 110C. Therefore, coupling between the first signal path and the second signal path is suppressed, and the isolation is increased.

[0088] (Third case)

[0089] Figure 10 This is a diagram showing the third example of a planar directional coupler. The third example, directional coupler 100D, is another example of a structure where the signal paths from the input-side coupler CP1 to the output-side couplers CP2 and CP3 are in different directions.

[0090] Reference Figure 10 In the directional coupler 100D, the dielectric substrate 110D has a generally L-shaped form. In the directional coupler 100D, the coupler CP1, the phaser PH1, and the coupler CP2 are arranged on the rectangular dielectric substrate 110D in the positive direction DR1 (first direction) of the X-axis, similar to the directional coupler 100B in the first example.

[0091] On the other hand, coupler CP1, phaser PH2 and coupler CP3 are arranged on dielectric substrate 110D in a direction orthogonal to the first direction, namely the positive direction of the Y-axis DR2A (second direction).

[0092] The configuration of the directional coupler 100D is suitable for situations where the area on the mounting substrate where the directional coupler can be configured has an L-shape. Furthermore, in the directional coupler 100D, the first signal path output from coupler CP1 via coupler CP2 and the second signal path output from coupler CP1 via coupler CP3 are not adjacent on the dielectric substrate 110D, thus suppressing coupling between the first and second signal paths and increasing isolation.

[0093] The embodiments disclosed herein should be considered illustrative in all respects and are not intended to be limiting. The scope of this disclosure is set forth in the claims and not in the description of the embodiments above, and is intended to include all modifications equivalent to and within the scope of the claims.

[0094] Explanation of reference numerals in the attached figures

[0095] 100, 100A~100D…Directional couplers; 110, 110B~110D…Dielectric substrates; 111…Top surface; 112…Bottom surface; BW1…Passband; C1~C3, C11~C13…Capacitors; CA1, CA2, CA11~CA13…Capacitor electrodes; CL1~CL6…Lines; CP1~CP3…Couplers; DM…Directional marking; GND…Ground terminal; GP1~GP4…Plate electrodes; L1~L3, L11~L13…Inductors Devices; LP1~LP6, LP10, LP11~LP14, LP20, LP21, LP30, LP31, LP40, LP41, LP50, LP51… Wiring electrodes; LY1~LY21… Dielectric layer; PH1, PH2… Phaser; T1… First terminal; T2… Second terminal; TE… Terminal; TI… Input terminal; TO1~TO4… Output terminal; V1~V6, V10~V16, V20, V30, V40, V50… Through holes.

Claims

1. A directional coupler that distributes an input signal into four outputs, comprising: Dielectric substrate with a multilayer structure; The input terminal receives the aforementioned input signals; First output terminal, second output terminal, third output terminal, fourth output terminal; A first coupler is connected to the aforementioned input terminal and distributes the aforementioned input signal into two parts for output to the first terminal and the second terminal; The second coupler divides the signal from the first terminal into two, and outputs them to the first output terminal and the second output terminal. The third coupler divides the signal from the second terminal into two, and outputs them to the third output terminal and the fourth output terminal. A first phaser is connected between the first terminal and the second coupler to advance the phase of the signal from the first terminal; as well as A second phaser, connected between the second terminal and the third coupler, delays the phase of the signal from the second terminal. The phase difference between the signal output from the first phaser and the signal output from the second phaser is 180° ± 10°. The first coupler is disposed on the first portion of the dielectric substrate. In the stacking direction of the dielectric substrate, the second coupler is disposed in a second portion different from the first portion. In the stacking direction of the dielectric substrate, the third coupler is disposed in a third portion different from the first portion. The first phaser is configured in the fourth part, located between the first part and the second part. The second phaser is configured in the fifth part, which is located between the first part and the third part.

2. The directional coupler according to claim 1, wherein, When the phase of the signal output from the first output terminal is set to 0°, The phase of the signal output from the second output terminal is 90°±10°. The phase of the signal output from the third output terminal is 180°±10°. The phase of the signal output from the fourth output terminal is 270°±10°.

3. The directional coupler according to claim 1, wherein, The first phaser mentioned above is a high-pass filter. The second phaser mentioned above is a low-pass filter.

4. The directional coupler according to claim 3, wherein, The first phaser and the second phaser described above are respectively configured as T-type or π-type LC filters.

5. The directional coupler according to any one of claims 1 to 4, wherein, The first phaser, the second phaser, and the first to third couplers are disposed on the dielectric substrate.

6. The directional coupler according to claim 5, wherein, When viewing the dielectric substrate from the normal direction, The first phaser is configured between the first coupler and the second coupler. The second phaser is configured between the first coupler and the third coupler.

7. The directional coupler according to claim 6, wherein, When viewing the dielectric substrate from the normal direction, The first coupler, the first phaser, and the second coupler are arranged in a first direction. The first coupler, the second phaser, and the third coupler are arranged in the first direction.

8. The directional coupler according to claim 6, wherein, When viewing the dielectric substrate from the normal direction, The first coupler, the first phaser, and the second coupler are arranged in a first direction. The first coupler, the second phaser, and the third coupler are arranged in a second direction that is different from the first direction.

9. The directional coupler according to claim 1, wherein, The second part and the third part are disposed at the same position in the stacking direction of the dielectric substrate.

10. The directional coupler according to claim 1 or 9, wherein, In the dielectric substrate described above, a ground electrode is disposed in the layer between the first part and the fourth part, the layer between the first part and the fifth part, the layer between the second part and the fourth part, and the layer between the third part and the fifth part.

11. The directional coupler according to claim 1 or 9, wherein, The first phaser mentioned above is an LC filter that includes a capacitor and an inductor. The dielectric constant of the dielectric substrate of the portion in the fourth part where the capacitor of the first phaser is disposed is greater than the dielectric constant of the dielectric substrate of the first part, the second part and the third part.