A tape polishing method for silicon wafer processing

Abstract

The application discloses a tape grinding method for silicon wafer processing, which comprises the following steps: installing a grinding tape with a granularity parameter greater than #2000 on an edge polishing machine; setting grinding parameters and polishing parameters of the edge polishing machine; wherein the grinding time of a BCF part of the silicon wafer is greater than the grinding time of ACF and TOP parts, in the embodiment of the application, a grinding tape model with a finer granularity parameter is adopted to reduce the mechanical damage layer of the silicon wafer grinding part, and different grinding times are set for the BCF, ACF and TOP parts of the silicon wafer, since the grinding time parameter of the BCF part of the silicon wafer is greater than the grinding time of the ACF and TOP parts, the mechanical damage layer generated by the ACF part of the silicon wafer is smaller relative to the BCF part, on the basis of shortening the edge polishing time, the good processing surface of the ACF part of the silicon wafer is ensured, the direct shortening of the edge polishing time is avoided to cause the slip lines and layer faults of the silicon wafer epitaxy, and the grinding and polishing efficiency of the silicon wafer is greatly improved, so that the production capacity of a single edge polishing machine is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of silicon wafer processing, and particularly relates to a method for polishing silicon wafer by using adhesive tape. BACKGROUND

[0002] The processing step of edge polishing of a silicon wafer is end face etching or adhesive tape polishing plus edge polishing, and the time of edge polishing changes according to the different types of silicon wafer doping, and the traditional silicon wafer edge polishing process is end face processing, that is, each face is polished by using a polishing adhesive tape, and the processing time of the front face, the back face and the side face is the same, and then edge polishing processing is performed.

[0003] At present, taking P+ silicon wafer as an example, the edge polishing process time of the edge polishing machine is 39 seconds, the wafer output rate is about 73 seconds per wafer, and the daily production capacity is about 900 wafers, if the production capacity needs to be improved, the number of edge polishing machines needs to be increased, and under the existing equipment quantity, the usual way to improve the production capacity is to shorten the edge polishing time, however, shortening the edge polishing time may affect the edge polishing quality, and even there is a risk of epitaxial slip line and layer dislocation, it is difficult to guarantee the removal effect of the CVD film on the surface of the silicon wafer, resulting in the decrease of the overall performance of the silicon wafer. SUMMARY

[0004] In view of the defects of the prior art, the present application provides a method for polishing silicon wafer by using adhesive tape, which has higher polishing efficiency and less damage.

[0005] To achieve the above object, the present application is implemented by the following technical scheme.

[0006] The present application provides a method for polishing silicon wafer by using adhesive tape, which includes:

[0007] The polishing adhesive tape with a particle size parameter greater than #2000 is installed on the edge polishing machine;

[0008] The polishing parameters and polishing parameters of the edge polishing machine are set;

[0009] Based on the polishing parameters, the edge polishing of the silicon wafer is performed, and based on the polishing parameters, the edge polishing is performed after the edge polishing is completed;

[0010] The polishing time of the BCF part of the silicon wafer is greater than the polishing time of the ACF and TOP parts.

[0011] Further limitation, the above-mentioned method for polishing silicon wafer by using adhesive tape, wherein the polishing parameters include the polishing time of the BCF, ACF and TOP parts, and the running speed and running amplitude of the polishing table.

[0012] Further limitation, the above-mentioned method for polishing silicon wafer by using adhesive tape, wherein the polishing parameters include the polishing time, polishing path and running speed and running amplitude of the polishing table.

[0013] With further limitation, the tape polishing method for wafer processing as above, wherein the edge polishing is further followed by:

[0014] Obtaining a CVD film residue detection result of the wafer surface.

[0015] With further limitation, the tape polishing method for wafer processing as above, wherein the obtaining of the CVD film residue detection result of the wafer surface is further followed by:

[0016] Performing qualified discharging or reworking based on the CVD film residue detection result of the wafer surface.

[0017] With further limitation, the tape polishing method for wafer processing as above, wherein the obtaining of the CVD film residue detection result of the wafer surface is further followed by:

[0018] Adjusting the polishing time parameter and / or polishing time parameter of the corresponding part of the edge polishing machine based on the detection compliance of the BCF, ACF and TOP parts.

[0019] With further limitation, the tape polishing method for wafer processing as above, wherein the obtaining of the CVD film residue detection result of the wafer surface is further followed by:

[0020] Obtaining a reduced polishing time correction parameter under the CVD film residue compliance of the wafer surface.

[0021] Adjusting the polishing parameter of the edge polishing machine based on the polishing time correction parameter.

[0022] With further limitation, the tape polishing method for wafer processing as above, wherein the polishing tape is sequentially and unidirectionally polished along the BCF part, the TOP part and the ACF part.

[0023] With further limitation, the tape polishing method for wafer processing as above, wherein the polishing tape is sequentially polished along the BCF part, the TOP part and the ACF part, and the ACF part is executed multiple times by turning back.

[0024] With further limitation, the tape polishing method for wafer processing as above, wherein the polishing tape is of 3000# or 4000# type.

[0025] The present application has at least the following advantages:

[0026] 1. By adopting a grinding tape model with finer granularity parameters to reduce the mechanical damage layer of the wafer grinding part, and setting different grinding times for the BCF, ACF and TOP parts of the wafer, since the grinding time parameter of the BCF part of the wafer is greater than that of the ACF and TOP parts, the mechanical damage layer generated by the ACF part of the wafer is smaller than that of the BCF part, which ensures a good processing surface of the ACF part of the wafer on the basis of shortening the edge polishing time, avoids the generation of slip lines and layer faults in the wafer epitaxy caused by directly shortening the edge polishing time, greatly improves the grinding and polishing efficiency of the wafer, and thus improves the production capacity of a single edge polishing machine.

[0027] 2. Under the condition that the CVD film residual on the wafer surface meets the standard, the polishing time parameter of the edge polishing machine has a certain shrinkage margin, and through iteration of the polishing time correction parameter, the minimum polishing time parameter meeting the standard requirement can be finally obtained, so as to shorten the processing time to the greatest extent. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 Flow chart of the wafer grinding method for wafer processing according to the embodiment of the present application;

[0029] Figure 2 Schematic diagram of the grinding surface of the wafer in the wafer grinding method for wafer processing according to the embodiment of the present application;

[0030] Figure 3 Schematic diagram of the edge polishing path of the wafer in the wafer grinding method for wafer processing according to the embodiment of the present application;

[0031] Figure 4 Schematic diagram of the edge polishing path of the wafer in the wafer grinding method for wafer processing according to the embodiment of the present application. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be described clearly below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, those skilled in the art can obtain all other embodiments.

[0033] All other embodiments obtained by those skilled in the art are within the scope of protection of the present application.

[0034] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally a class, not limited to the number of objects, for example, the first object can be one or more. In addition, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / ", generally indicates that the objects before and after are in a "or" relationship.

[0035] The silicon wafer processing tape grinding method provided by the embodiments of the present application will be described in detail below in combination with the drawings, specific embodiments and application scenarios.

[0036] As shown in the drawings, Figure 1 The silicon wafer processing tape grinding method provided by the embodiments of the present application comprises:

[0037] S1, selecting and installing a grinding tape with a particle size parameter greater than #2000 on an edge polishing machine;

[0038] S2, setting the grinding parameters and polishing parameters of the edge polishing machine, wherein the grinding time parameters of the BCF part of the silicon wafer are greater than the grinding time parameters of the ACF and TOP parts;

[0039] S3, performing edge grinding of the silicon wafer, and performing polishing after the edge grinding is completed.

[0040] As can be understood, Figure 2 The edge grinding and polishing area of the silicon wafer includes BCF (back edge), ACF (front edge), and TOP (side edge), and the processing technology of silicon wafers of different doping types is different. Taking an 8-inch heavily doped silicon wafer as an example, the processing technology generally includes the following main steps: slicing → chamfering → grinding → chemical polishing → APCVD (chemical vapor deposition technology) → end face treatment (hydrofluoric acid treatment or tape grinding) → edge polishing → single side polishing → dewaxing cleaning → final cleaning.

[0041] In step S1, since the purpose of the tape grinding is to remove the CVD film on the edge of the wafer, if a tape with a particle size parameter less than 2000# is used for grinding, the damage layer is deep, and the edge polishing time is long. If the edge polishing time is reduced, the damage layer will not be completely removed, which will cause slip lines and dislocation defects in the subsequent processing process. If a tape with a particle size parameter greater than 2000# is used for grinding, on the one hand, it can ensure that a smaller mechanical damage layer is generated than the original process, and on the other hand, after replacing the finer grinding tape, even if the grinding and polishing time is shortened, the mechanical damage layer is smaller, so that a good processing surface can be obtained more easily.

[0042] In step S2, the grinding parameters include the grinding time of BCF, ACF, and TOP, and the travel speed and travel amplitude of the grinding table. In step S3, based on the parameter setting of the grinding time, the grinding time of the BCF part is greater than that of the ACF and TOP parts.

[0043] It can be understood that the APCVD process mainly forms a CVD film on the BCF of the wafer, and there is almost no CVD film on the ACF. From the application perspective, the ACF part of the wafer is not allowed to have slip lines and dislocation defects after epitaxy, and the requirements for the BCF part are not as strict as those for the ACF part. Since the purpose of the tape grinding is to remove the CVD film, the processing time of the BCF, ACF, and TOP parts is the same in the traditional grinding process. In this case, the CVD film on the BCF part is completely removed, and the ACF part is overground. In this case, the damage degree of the ACF part is greater than that of the BCF part. Since a finer grinding tape is selected in step S1, and the grinding time of the ACF part is set to be shorter than that of the BCF part, the mechanical damage layer generated in the ACF part is smaller than that in the BCF part. Even if the edge polishing time is reduced later, a good processing surface can be obtained more easily.

[0044] In step S2, the polishing parameters include the polishing time, polishing path, and travel speed and travel amplitude of the grinding table. Since a finer grinding tape is selected in step S1, and the grinding time of the ACF part is set to be shorter than that of the BCF and TOP parts, the mechanical damage layer generated in the ACF part is smaller than that in the BCF part. Therefore, the polishing time parameter can be shortened to speed up the polishing efficiency, and the processing surface effect of the ACF part can be guaranteed.

[0045] In the embodiment of the present application, the above-mentioned adhesive tape grinding method for silicon wafer processing is adopted, the mechanical damage layer of the silicon wafer grinding part is reduced by adopting a grinding adhesive tape model with finer particle size parameters, and different grinding times are set for the BCF, ACF and TOP parts of the silicon wafer. Since the grinding time parameter of the BCF part of the silicon wafer is greater than that of the ACF and TOP parts, the mechanical damage layer generated in the ACF part of the silicon wafer is smaller than that in the BCF part. On the basis of shortening the edge polishing time, a good processing surface of the ACF part of the silicon wafer is ensured, direct shortening of the edge polishing time is avoided to cause slip lines and layer faults in the silicon wafer epitaxy, and the grinding and polishing efficiency of the silicon wafer is greatly improved, thereby improving the production capacity of a single edge polishing machine.

[0046] In a preferred embodiment, the grinding adhesive tape in step S1 adopts 3000# or 4000#.

[0047] In a preferred embodiment, as shown in Figure 1 After the polishing is completed, the method further includes:

[0048] S4, silicon wafer surface CVD film residue detection, based on the detection result, performing discharging or rework until the detection result meets the standard.

[0049] It can be understood that in step S4, since the surface of the silicon wafer has undergone a grinding and high light, in order to reduce the mechanical damage of the silicon wafer surface caused by secondary grinding and polishing, the corresponding process time needs to be reduced when the reworked silicon wafer is ground and polished again.

[0050] In a preferred embodiment, step S4 further includes:

[0051] Based on the detection result of the silicon wafer surface CVD film residue detection, the grinding parameters and polishing parameters of the edge polishing machine are adjusted.

[0052] Specifically, if the detection result shows that there is more CVD film residue, the grinding time and / or polishing time need to be appropriately extended, and vice versa, the grinding time and / or polishing time is shortened to reduce the degree of mechanical damage to the surface of the silicon wafer, wherein the adjustment of the grinding parameters and polishing parameters corresponds to the standard condition of the BCF part, the TOP part and the ACF part respectively.

[0053] In a preferred embodiment, step S4 further includes:

[0054] Under the condition that the silicon wafer surface CVD film residue meets the standard, a reduced polishing time correction parameter is obtained;

[0055] Based on the polishing time correction parameter, the polishing parameters of the edge polishing machine are adjusted.

[0056] It can be understood that, under the condition that the CVD film on the surface of the silicon wafer meets the standard, the polishing time parameter of the edge polishing machine has a certain reduction margin, and through iteration of the polishing time correction parameter, the minimum polishing time parameter meeting the standard requirement can be finally obtained, so as to shorten the processing time to the greatest extent.

[0057] In a preferred embodiment, as shown in FIG. 6, after APCVD, the CVD film on the edge of the silicon wafer is removed by using 3000# adhesive tape, the grinding time of the ACF part is set to 2s, the grinding time of the TOP part is set to 5s, the grinding time of the BCF part is set to 20s, the edge polishing time is reduced to 15s, the travel rate of the lapping table is set to 1mm / s, and the travel range of the lapping table is 15mm. Figure 3 In the preferred embodiment, the grinding tape polishes along the BCF part, the TOP part and the ACF part in sequence, and the actual travel of the lapping table is 15mm.

[0058] In a preferred embodiment, as shown in FIG. 6, after APCVD, the CVD film on the edge of the silicon wafer is removed by using 3000# adhesive tape, the grinding time of the ACF part is set to 2s, the grinding time of the TOP part is set to 5s, the grinding time of the BCF part is set to 20s, the edge polishing time is reduced to 15s, the travel rate of the lapping table is set to 1mm / s, and the travel range of the lapping table is 15mm.

[0059] Figure 4 In the preferred embodiment, the grinding tape polishes along the BCF part, the TOP part and the ACF part in sequence, and the actual travel of the lapping table is 15mm.

[0060] In the preferred embodiment, the grinding tape polishes along the BCF part, the TOP part and the ACF part in sequence, and the actual travel of the lapping table is 15mm.

[0061] It should be noted that in this document, the terms "comprise", "comprising", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article, or device that includes a list of elements not only includes those elements, but also includes other elements not explicitly listed, or inherent to such a process, method, article, or device. Without more limitations, the element defined by the statement "comprises a" does not exclude the presence of additional identical elements in the process, method, article, or device that includes the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to the order of performing the functions shown or discussed, but can also include performing the functions in a substantially simultaneous manner or in reverse order, for example, the described method can be performed in an order different from the described order, and various steps can be added, omitted, or combined. In addition, the features described with reference to certain examples can be combined in other examples.

[0062] ​The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the specific embodiments described above, and the specific embodiments described above are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims.

Claims

1. A tape polishing method for silicon wafer processing, characterized by, The method comprises the following steps: installing a grinding tape with a particle size parameter greater than #2000 on an edge polishing machine; setting grinding parameters and polishing parameters of the edge polishing machine; performing edge grinding based on the grinding parameters, and performing edge polishing based on the polishing parameters after the edge grinding is completed; wherein the grinding time of the BCF part of the silicon wafer is greater than the grinding time of the ACF and TOP parts, BCF represents the back edge, ACF represents the front edge, and TOP represents the side edge; obtaining a CVD film residue detection result of the surface of the silicon wafer, adjusting the grinding time parameter and / or the polishing time parameter of the corresponding part of the edge polishing machine based on the detection compliance of the BCF, ACF and TOP parts, if the detection result shows that there is much CVD film residue, the grinding time and / or the polishing time are extended, otherwise the grinding time and / or the polishing time are shortened, wherein the adjustment of the grinding parameters and the polishing parameters corresponds to the compliance of the BCF part, the TOP part and the ACF part respectively.

2. The tape polishing method for silicon wafer processing according to claim 1, wherein, The grinding parameters include the grinding time of the BCF, ACF and TOP parts, and the running speed and amplitude of the grinding table.

3. The tape polishing method for silicon wafer processing according to claim 1, wherein, The polishing parameters include the polishing time, polishing path, and the running speed and amplitude of the grinding table.

4. The tape polishing method for silicon wafer processing according to claim 1, wherein, After obtaining the CVD film residue detection result of the surface of the silicon wafer, the method further comprises the following steps: performing qualified discharging or reworking based on the CVD film residue detection result of the surface of the silicon wafer.

5. The tape polishing method for silicon wafer processing according to claim 1, wherein, After obtaining the CVD film residue detection result of the surface of the silicon wafer, the method further comprises the following steps: obtaining a reduced polishing time correction parameter when the CVD film residue of the surface of the silicon wafer meets the standard; adjusting the polishing parameters of the edge polishing machine based on the polishing time correction parameter.

6. The tape polishing method for silicon wafer processing according to claim 3, wherein, The grinding tape is polished along the BCF part, the TOP part and the ACF part in sequence and unidirectionally.

7. The tape polishing method for silicon wafer processing according to claim 3, wherein The grinding tape is polished along the BCF part, the TOP part and the ACF part in sequence, and the ACF part is polished multiple times by turning back.

8. The tape polishing method for silicon wafer processing according to claim 1, wherein, The grinding tape adopts a 3000# or 4000# model.

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