Implementation circuit and optical module for 10G multimode optical module

Abstract

The application discloses an implementation circuit for a 10G multimode optical module and the optical module, and relates to the technical field of optical communication transmission, wherein the circuit comprises an optical module sending circuit, a sending filter circuit, a master control circuit, a golden finger interface circuit, an optical module receiving circuit, a power supply circuit and a storage circuit; the optical module sending circuit is electrically connected with the sending filter circuit; the sending filter circuit is electrically connected with the master control circuit; the master control circuit is electrically connected with the golden finger interface circuit and the optical module receiving circuit respectively; and the golden finger interface circuit is electrically connected with the power supply circuit. The application optimizes the interface power-on buffer circuit, can effectively protect the internal circuit during power-on, optimizes the high-frequency transmission circuit, and improves the integrity and stability of signal transmission.

Description

Technical Field

[0001] This invention relates to the field of optical communication transmission technology, and more specifically, to an implementation circuit and optical module for a 10G multimode optical module. Background Technology

[0002] An optical module is an electronic component used in optical communication. It consists of optical components, electronic components, and a housing, and is used for transmitting, receiving, and converting optical signals. Optical modules can be equipped with different optical and electronic components to meet various optical communication requirements, depending on the signal type and transmission distance.

[0003] Optical modules typically consist of three main parts: a transmitter, a receiver, and a housing. The transmitter converts electrical signals into optical signals and outputs them; the receiver converts optical signals into electrical signals and outputs them; and the housing protects both the transmitter and receiver. Current optical module design targets are 10Gbps dual-fiber SFP packages with a communication distance of 20km. Common circuit technologies and designs can meet basic transmission requirements and design goals, but mismatches exist in specific application scenarios and usage needs, mainly in the following aspects:

[0004] (1) The signal integrity of the internal circuit of the existing optical module is insufficient, and higher performance is expected in the current application scenario;

[0005] (2) Insufficient module stability design. In terms of the design of module operation stability, common modules have certain design risks, which need to be addressed in the current design.

[0006] (3) The heat dissipation design of the circuit board needs to be optimized. Under the influence of temperature, the circuit signal indicators will change with the temperature. The circuit design needs to be optimized to reduce the impact on the final transmission performance.

[0007] (4) The stability of the circuit firmware design is insufficient. Common module firmware designs have the potential for untimely feedback and abnormal feedback when dealing with temperature changes, voltage changes and external communication signal interference. The current design needs to be optimized in terms of supporting hardware and software.

[0008] No effective solutions have yet been proposed to address the problems in the relevant technologies. Summary of the Invention

[0009] The main objective of this invention is to provide an implementation circuit and optical module for a 10G multimode optical module, so as to overcome the above-mentioned technical problems existing in the prior art.

[0010] Therefore, the specific technical solution adopted by the present invention is as follows:

[0011] According to one aspect of the present invention, an implementation circuit for a 10G multimode optical module is provided, the circuit including an optical module transmitting circuit, a transmitting filtering circuit, a main control circuit, a gold finger interface circuit, an optical module receiving circuit, a power supply circuit, and a storage circuit.

[0012] The optical module transmitting circuit is electrically connected to the transmitting filter circuit, the transmitting filter circuit is electrically connected to the main control circuit, the main control circuit is electrically connected to the gold finger interface circuit and the optical module receiving circuit respectively, and the gold finger interface circuit is electrically connected to the power supply circuit.

[0013] Optionally, the optical module transmitting circuit includes a transmitting optical module connector CON1, the third and fourth pins of which are connected to the transmitting filter circuit, and the second and fifth pins of the transmitting optical module connector CON1 are grounded.

[0014] Optionally, the transmitting filter circuit includes inductors L1, L2, L3, L4, L5, L6, L7, L8, capacitors C2, C3, C6, C8, resistors R3, R4, R8, R9, R14, and R15.

[0015] One end of inductor L1 is connected to one end of resistor R3, one end of capacitor C2, and one end of capacitor C3, and connected to VCC_T. The other end of inductor L1 is connected to the other end of resistor R3 and one end of inductor L4. The other ends of capacitors C2 and C3 are grounded. The other end of inductor L4 is connected to the third pin of the transmit optical module connector CON1 and one end of resistor R8. The other end of resistor R8 is connected to one end of capacitor C6. The other end of capacitor C6 is connected to inductor L3 and the main control circuit. The other end of inductor L3 is connected to one end of inductor L2 and one end of resistor R4. The other end of resistor R4 is connected to the other end of inductor L2 and connected to VCC_T.

[0016] One end of inductor L5 is connected to the fourth pin of the transmitting optical module connector CON1 and one end of resistor R9. The other end of inductor L5 is connected to one end of resistor R14 and one end of inductor L7. The other end of inductor L7 is connected to the other end of resistor R14. The other end of resistor R9 is connected to one end of capacitor C8. The other end of capacitor C8 is connected to one end of inductor L6 and the main control circuit. The other end of inductor L6 is connected to one end of inductor L8 and one end of resistor R15. The other end of resistor R15 is connected to the other end of inductor L8 and connected to VCC_T.

[0017] Optionally, the main control circuit includes chip U2, capacitors C4, C5, C10, C11, C14, C15, C20, C21, resistors R5 and R16.

[0018] The first pin of chip U2 is grounded. The second and third pins of chip U2 are both connected to the gold finger interface circuit. The fourth pin of chip U2 is connected to one end of capacitor C10 and one end of capacitor C11, respectively, and connected to VCC_R. The other ends of capacitors C10 and C11 are both grounded. The fifth and sixth pins of chip U2 are both connected to the gold finger interface circuit. The thirteenth pin of chip U2 is connected to one end of capacitor C4 and one end of capacitor C5, respectively, and connected to VCC_T. The other ends of capacitors C4 and C5 are grounded. The fourteenth pin of chip U2 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The fifteenth pin of chip U2 is grounded. The sixteenth pin of chip U2 is connected to inductor L3... The seventeenth pin of chip U2 is connected to inductor L6 and capacitor C8 respectively. The eighteenth pin of chip U2 is grounded. The nineteenth pin of chip U2 is connected to one end of capacitor C14 and one end of capacitor C15 respectively. The other ends of capacitor C14 and C15 are both grounded. The twenty-third pin of chip U2 is connected to one end of resistor R16. The other end of resistor R16 is grounded. The twenty-fourth pin of chip U2 is connected to one end of capacitor C20 and one end of capacitor C21 respectively and connected to VCC_R. The other ends of capacitor C20 and C21 are both grounded. The twenty-fifth and twenty-sixth pins of chip U2 are both connected to the optical module receiving circuit. The twenty-seventh pin of chip U2 is grounded.

[0019] Optionally, the gold finger interface circuit includes a gold finger interface CON2, capacitors C7, C9, C12, C13, resistors R6, R7, R10, R11, R12, and R13.

[0020] Pins 1, 6, 10, 11, 14, 17, and 20 of the gold finger interface CON2 are all grounded. Pin 2 of the gold finger interface CON2 is connected to one end of resistor R6. The other end of resistor R6 is connected to one end of resistor R7 and connected to VCC_T. The other end of resistor R7 is connected to pin 3 of the gold finger interface CON2. Pin 7 of the gold finger interface CON2 is connected to one end of resistor R11, and the other end of resistor R11 is grounded. Pin 8 of the gold finger interface CON2 is connected to one end of resistor R10, and the other end of resistor R10 is connected to VCC_R. Pin 9 of the gold finger interface CON2 is connected to one end of resistor R13, and the other end of resistor R13 is connected to... The 12th pin of the gold finger interface CON2 is connected to one end of capacitor C13. The other end of capacitor C13 is connected to one end of resistor R12 and the second pin of chip U2. The 13th pin of the gold finger interface CON2 is connected to one end of capacitor C12. The other end of capacitor C12 is connected to the other end of resistor R12 and the third pin of chip U2. The 15th and 16th pins of the gold finger interface CON2 are both connected to the power supply circuit. The 18th pin of the gold finger interface CON2 is connected to one end of capacitor C9. The other end of capacitor C9 is connected to the fifth pin of chip U2. The 19th pin of the gold finger interface CON2 is connected to one end of capacitor C7. The other end of capacitor C7 is connected to the sixth pin of chip U2.

[0021] Optionally, the optical module receiving circuit includes a receiving optical module connector CON3, capacitors C22, C23, C24, C25, and C26, an inductor L11, a resistor R18, and a resistor R19.

[0022] The first pin of the receiving optical module connector CON3 is connected to one end of capacitor C22, one end of capacitor C23, and one end of inductor L11. The other ends of capacitors C22 and C23 are grounded. The other end of inductor L11 is connected to VCC_R. The second and fifth pins of the receiving optical module connector CON3 are grounded. The third pin of the receiving optical module connector CON3 is connected to one end of resistor R18 and one end of capacitor C24. The other end of capacitor C24 is connected to the twenty-fifth pin of the main control circuit. The fourth pin of the receiving optical module connector CON3 is connected to the other end of resistor R18 and one end of capacitor C25. The other end of capacitor C25 is connected to the twenty-sixth pin of the main control circuit. The sixth pin of the receiving optical module connector CON3 is connected to one end of capacitor C26 and one end of resistor R19. The other end of capacitor C26 is grounded.

[0023] Optionally, the power supply circuit includes a field-effect transistor U3, capacitors C16, C17, C18, and C19, a resistor R17, an inductor L9, and an inductor L10.

[0024] The first pin of MOSFET U3 is connected to one end of resistor R17 and one end of capacitor C17, respectively. The other end of resistor R17 is grounded. The other end of capacitor C17 is connected to the second pin of MOSFET U3, the fifteenth pin and the sixteenth pin of the gold finger interface CON2, respectively. The third pin of MOSFET U3 is connected to one end of capacitor C19, one end of inductor L10 and one end of inductor L9, respectively. The other end of capacitor C19 is grounded. The other end of inductor L10 is connected to one end of capacitor C18 and connected to VCC_R. The other end of capacitor C18 is grounded. The other end of inductor L9 is connected to one end of capacitor C16 and connected to VCC_T. The other end of capacitor C16 is grounded.

[0025] Optionally, the storage circuit includes a memory U1, a resistor R1, a resistor R2, and a capacitor C1;

[0026] The first, second, third, and fourth pins of memory U1 are all grounded. The fifth pin of memory U1 is connected to one end of resistor R2. The sixth pin of memory U1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the other end of resistor R2 and connected to VCC_R. The seventh pin of memory U1 is grounded. The eighth pin of memory U1 is connected to one end of capacitor C1 and connected to VCC_R. The other end of capacitor C1 is grounded.

[0027] Optionally, chip U2 is used to configure and operate the transmit and receive characteristics of the optical module.

[0028] According to another aspect of the present invention, an optical module is also provided, including an optical module housing, wherein the implementation circuit for a 10G multimode optical module is encapsulated inside the optical module housing.

[0029] The beneficial effects of this invention are as follows:

[0030] 1. The implementation circuit for 10G multimode optical modules provided by this invention has been optimized in terms of interface circuit design. While ensuring compliance with module design standards and specifications, it improves the reliability of contact plugging and unplugging. There are no exposed external components, which improves the reliability and stability of the module. It not only optimizes the interface power-on buffer circuit, which can effectively protect the internal circuit, but also optimizes the high-frequency transmission circuit, which improves the integrity and stability of signal transmission.

[0031] 2. In terms of structural design, this invention considers the size matching of the circuit board, shell, laser, and receiver, which can improve the performance of heat accumulation, signal crosstalk, and structural stability. In addition, in the high-frequency signal adjustment at the laser transmitter end, the matching relationship between circuit components and laser is optimized to achieve ideal transmission performance. At the same time, in the design of the high-frequency signal at the receiver end, the sensitivity characteristics of the receiver can be fully utilized. Furthermore, the component layout and wiring fully consider the processing and assembly errors caused by the processing and assembly precision, thereby improving the yield of the module.

[0032] 3. This invention reduces the impact of heat dissipation on the overall module performance through the rational arrangement of heat dissipation components. The transmitter and receiver are typically located close to the printed circuit board inside the module. Appropriate adjustments to their positions can help control heat accumulation. Simultaneously, the appropriately designed length of the flexible circuit board simplifies assembly. The smaller bending angle of the flexible circuit board positively impacts high-frequency signal transmission. Furthermore, the inward bending design of the flexible circuit board prevents direct contact between the signal lines and the module casing, thus improving the quality of high-frequency signal transmission. Attached Figure Description

[0033] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0034] Figure 1 This is a circuit diagram of an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention;

[0035] Figure 2 This is a circuit diagram of the optical module transmission circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention.

[0036] Figure 3 This is a circuit diagram of a transmission filter circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention;

[0037] Figure 4 This is a circuit diagram of the main control circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention.

[0038] Figure 5 This is a circuit diagram of a gold finger interface circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention.

[0039] Figure 6 This is a circuit diagram of the optical module receiving circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention.

[0040] Figure 7 This is a circuit diagram of a power supply circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention;

[0041] Figure 8 This is a circuit diagram of a storage circuit in an implementation circuit for a 10G multimode optical module according to an embodiment of the present invention;

[0042] Figure 9 This is a diagram illustrating the optical device connections and printed circuit board in an optical module according to an embodiment of the present invention.

[0043] In the picture:

[0044] 1. Optical module transmitting circuit; 2. Transmitting filter circuit; 3. Main control circuit; 4. Gold finger interface circuit; 5. Optical module receiving circuit; 6. Power supply circuit; 7. Storage circuit. Detailed Implementation

[0045] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0046] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in sequences other than those illustrated or described herein.

[0047] As described in the background section, the signal integrity of the internal circuit of the optical module in the prior art is insufficient. In order to solve the above problem, the present invention proposes an implementation circuit and optical module for a 10G multimode optical module.

[0048] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments, such as... Figure 1 As shown, the implementation circuit for a 10G multimode optical module according to an embodiment of the present invention includes an optical module transmitting circuit 1, a transmitting filtering circuit 2, a main control circuit 3, a gold finger interface circuit 4, an optical module receiving circuit 5, a power supply circuit 6, and a storage circuit 7.

[0049] The optical module transmitting circuit 1 is electrically connected to the transmitting filter circuit 2, the transmitting filter circuit 2 is electrically connected to the main control circuit 3, the main control circuit 3 is electrically connected to the gold finger interface circuit 4 and the optical module receiving circuit 5 respectively, and the gold finger interface circuit 4 is electrically connected to the power supply circuit 6.

[0050] Among them, such as Figure 2As shown, the optical module transmitting circuit 1 includes a transmitting optical module connector CON1. ​​The third and fourth pins of the transmitting optical module connector CON1 are both connected to the transmitting filter circuit 2, and the second and fifth pins of the transmitting optical module connector CON1 are grounded.

[0051] Among them, such as Figure 3 As shown, the transmitting filter circuit 2 includes inductors L1, L2, L3, L4, L5, L6, L7, L8, capacitors C2, C3, C6, and C8, and resistors R3, R4, R8, R9, R14, and R15.

[0052] One end of inductor L1 is connected to one end of resistor R3, one end of capacitor C2, and one end of capacitor C3, and connected to VCC_T. The other end of inductor L1 is connected to the other end of resistor R3 and one end of inductor L4. The other ends of capacitors C2 and C3 are grounded. The other end of inductor L4 is connected to the third pin of the transmitting optical module connector CON1 and one end of resistor R8. The other end of resistor R8 is connected to one end of capacitor C6. The other end of capacitor C6 is connected to inductor L3 and main control circuit 3. The other end of inductor L3 is connected to one end of inductor L2 and one end of resistor R4. The other end of resistor R4 is connected to... The other end of inductor L2 is connected to VCC_T; one end of inductor L5 is connected to the fourth pin of the transmitting optical module connector CON1 and one end of resistor R9, the other end of inductor L5 is connected to one end of resistor R14 and one end of inductor L7, the other end of inductor L7 is connected to the other end of resistor R14, the other end of resistor R9 is connected to one end of capacitor C8, the other end of capacitor C8 is connected to one end of inductor L6 and main control circuit 3, the other end of inductor L6 is connected to one end of inductor L8 and one end of resistor R15, the other end of resistor R15 is connected to the other end of inductor L8 and connected to VCC_T.

[0053] It should be noted that the transmitting filter circuit 2 is a laser matching network and high-frequency signal integrity processing. Based on the circuit design and component design, the optical and electrical signals at the high-frequency transmitting and receiving ends of the module are optimized.

[0054] Among them, such as Figure 4 As shown, the main control circuit 3 includes chip U2, capacitors C4, C5, C10, C11, C14, C15, C20, C21, resistors R5 and R16.

[0055] The first pin of chip U2 is grounded. The second and third pins of chip U2 are both connected to the gold finger interface circuit 4. The fourth pin of chip U2 is connected to one end of capacitor C10 and one end of capacitor C11, respectively, and connected to VCC_R. The other ends of capacitors C10 and C11 are both grounded. The fifth and sixth pins of chip U2 are both connected to the gold finger interface circuit 4. The thirteenth pin of chip U2 is connected to one end of capacitor C4 and one end of capacitor C5, respectively, and connected to VCC_T. The other ends of capacitors C4 and C5 are grounded. The fourteenth pin of chip U2 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The fifteenth pin of chip U2 is grounded. The sixteenth pin of chip U2 is connected to inductor L3... The seventeenth pin of chip U2 is connected to inductor L6 and capacitor C8 respectively. The eighteenth pin of chip U2 is grounded. The nineteenth pin of chip U2 is connected to one end of capacitor C14 and one end of capacitor C15 respectively. The other ends of capacitor C14 and C15 are both grounded. The twenty-third pin of chip U2 is connected to one end of resistor R16. The other end of resistor R16 is grounded. The twenty-fourth pin of chip U2 is connected to one end of capacitor C20 and one end of capacitor C21 respectively and connected to VCC_R. The other ends of capacitor C20 and C21 are both grounded. The twenty-fifth and twenty-sixth pins of chip U2 are both connected to optical module receiving circuit 5. The twenty-seventh pin of chip U2 is grounded.

[0056] Chip U2 is used to configure and operate the transmit and receive characteristics of the optical module.

[0057] Among them, such as Figure 5 As shown, the gold finger interface circuit 4 includes a gold finger interface CON2, capacitors C7, C9, C12, and C13, and resistors R6, R7, R10, R11, R12, and R13.

[0058] Pins 1, 6, 10, 11, 14, 17, and 20 of the gold finger interface CON2 are all grounded. Pin 2 of the gold finger interface CON2 is connected to one end of resistor R6. The other end of resistor R6 is connected to one end of resistor R7 and connected to VCC_T. The other end of resistor R7 is connected to pin 3 of the gold finger interface CON2. Pin 7 of the gold finger interface CON2 is connected to one end of resistor R11, and the other end of resistor R11 is grounded. Pin 8 of the gold finger interface CON2 is connected to one end of resistor R10, and the other end of resistor R10 is connected to VCC_R. Pin 9 of the gold finger interface CON2 is connected to one end of resistor R13, and the other end of resistor R13 is connected to... The 12th pin of the gold finger interface CON2 is connected to one end of capacitor C13. The other end of capacitor C13 is connected to one end of resistor R12 and the second pin of chip U2. The 13th pin of the gold finger interface CON2 is connected to one end of capacitor C12. The other end of capacitor C12 is connected to the other end of resistor R12 and the third pin of chip U2. The 15th and 16th pins of the gold finger interface CON2 are both connected to power supply circuit 6. The 18th pin of the gold finger interface CON2 is connected to one end of capacitor C9. The other end of capacitor C9 is connected to the fifth pin of chip U2. The 19th pin of the gold finger interface CON2 is connected to one end of capacitor C7. The other end of capacitor C7 is connected to the sixth pin of chip U2.

[0059] It should be noted that the gold finger interface CON2 in the gold finger interface circuit 4 is the gold finger of the module interface part, which improves the reliability of contact plugging and unplugging while ensuring compliance with module design standards and specifications.

[0060] Among them, such as Figure 6 As shown, the optical module receiving circuit 5 includes a receiving optical module connector CON3, capacitors C22, C23, C24, C25, and C26, an inductor L11, a resistor R18, and a resistor R19.

[0061] The first pin of the receiving optical module connector CON3 is connected to one end of capacitor C22, one end of capacitor C23, and one end of inductor L11. The other ends of capacitors C22 and C23 are grounded. The other end of inductor L11 is connected to VCC_R. The second and fifth pins of the receiving optical module connector CON3 are grounded. The third pin of the receiving optical module connector CON3 is connected to one end of resistor R18 and one end of capacitor C24. The other end of capacitor C24 is connected to the twenty-fifth pin of the main control circuit 3. The fourth pin of the receiving optical module connector CON3 is connected to the other end of resistor R18 and one end of capacitor C25. The other end of capacitor C25 is connected to the twenty-sixth pin of the main control circuit 3. The sixth pin of the receiving optical module connector CON3 is connected to one end of capacitor C26 and one end of resistor R19. The other end of capacitor C26 is grounded.

[0062] Among them, such as Figure 7 As shown, the power supply circuit 6 includes a field-effect transistor U3, capacitors C16, C17, C18, and C19, a resistor R17, an inductor L9, and an inductor L10.

[0063] The first pin of MOSFET U3 is connected to one end of resistor R17 and one end of capacitor C17, respectively. The other end of resistor R17 is grounded. The other end of capacitor C17 is connected to the second pin of MOSFET U3, the fifteenth pin and the sixteenth pin of the gold finger interface CON2, respectively. The third pin of MOSFET U3 is connected to one end of capacitor C19, one end of inductor L10 and one end of inductor L9, respectively. The other end of capacitor C19 is grounded. The other end of inductor L10 is connected to one end of capacitor C18 and connected to VCC_R. The other end of capacitor C18 is grounded. The other end of inductor L9 is connected to one end of capacitor C16 and connected to VCC_T. The other end of capacitor C16 is grounded.

[0064] It should be noted that the power supply circuit 6 has optimized the interface power-on buffer circuit, which can effectively protect the internal circuit from power-on.

[0065] Among them, such as Figure 8 As shown, the storage circuit 7 includes a memory U1, a resistor R1, a resistor R2, and a capacitor C1.

[0066] The first, second, third, and fourth pins of memory U1 are all grounded. The fifth pin of memory U1 is connected to one end of resistor R2. The sixth pin of memory U1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the other end of resistor R2 and connected to VCC_R. The seventh pin of memory U1 is grounded. The eighth pin of memory U1 is connected to one end of capacitor C1 and connected to VCC_R. The other end of capacitor C1 is grounded.

[0067] It should be noted that the memory U1 in the storage circuit 7 is used to store the configuration parameters of the current module.

[0068] According to another embodiment of the present invention, an optical module is also provided, including an optical module housing; the implementation circuit for the 10G multimode optical module is encapsulated inside the optical module housing.

[0069] It should be noted that, as Figure 9 As shown, this invention features an optimized design and layout for the optical devices and printed circuit boards. The printed circuit board substrate employs a multi-layered circuit board structure, and flexible circuit boards are used for the connection of the optical devices. The optical devices are arranged in a parallel layout. The bending direction of the flexible circuit boards is uniformly directed towards the interior of the module base groove. The transmitting and receiving devices are located on the first surface layer of the printed circuit board, and the laser, receiver, driver, and module housing are connected via thermally conductive materials.

[0070] In summary, by utilizing the above-mentioned technical solutions of the present invention, the implementation circuit for the 10G multimode optical module provided by the present invention has been optimized in terms of interface circuit design. While ensuring compliance with module design standards and specifications, it improves the reliability of contact plugging and unplugging, eliminates exposed external components, and enhances the reliability and stability of the module. It not only optimizes the interface power-on buffer circuit to effectively protect the internal circuitry, but also optimizes the high-frequency transmission circuit to improve the integrity and stability of signal transmission.

[0071] In terms of structural design, this invention considers the size matching of the circuit board, housing, laser, and receiver, which can improve performance in terms of heat accumulation, signal crosstalk, and structural stability. In addition, in the high-frequency signal adjustment at the laser transmitter end, the matching relationship between circuit components and laser is optimized to achieve ideal transmission performance. At the same time, in the design of the high-frequency signal at the receiver end, the characteristics of receiver sensitivity can be fully utilized. Furthermore, the component layout and wiring fully consider the processing and assembly errors caused by the processing and assembly precision, thereby improving the yield of the module.

[0072] This invention reduces the impact of heat dissipation on the overall module performance through the rational arrangement of heat dissipation components. The transmitter and receiver are typically located close to the printed circuit board inside the module. Appropriate adjustments to their positions can help control heat accumulation. Simultaneously, the appropriately designed length of the flexible circuit board simplifies assembly. The smaller bending angle of the flexible circuit board positively impacts high-frequency signal transmission. Furthermore, the inward bending design of the flexible circuit board prevents direct contact between signal lines and the module casing, thus improving the quality of high-frequency signal transmission. The above description is merely a preferred embodiment of this invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications should also be considered within the scope of protection of this invention.

Claims

1. An implementation circuit for a 10G multimode optical module, characterized in that, The circuit includes an optical module transmitting circuit (1), a transmitting filtering circuit (2), a main control circuit (3), a gold finger interface circuit (4), an optical module receiving circuit (5), a power supply circuit (6), and a storage circuit (7). The optical module transmitting circuit (1) is electrically connected to the transmitting filtering circuit (2), the transmitting filtering circuit (2) is electrically connected to the main control circuit (3), the main control circuit (3) is electrically connected to the gold finger interface circuit (4) and the optical module receiving circuit (5) respectively, and the gold finger interface circuit (4) is electrically connected to the power supply circuit (6). The transmitting filter circuit (2) includes inductors L1, L2, L3, L4, L5, L6, L7, L8, capacitors C2, C3, C6, C8, resistors R3, R4, R8, R9, R14, and R15. One end of the inductor L1 is connected to one end of the resistor R3, one end of the capacitor C2 and one end of the capacitor C3 and connected to VCC_T. The other end of the inductor L1 is connected to the other end of the resistor R3 and one end of the inductor L4. The other ends of the capacitor C2 and the capacitor C3 are grounded. The other end of the inductor L4 is connected to the third pin of the transmitting optical module connector CON1 and one end of the resistor R8. The other end of the resistor R8 is connected to one end of the capacitor C6. The other end of the capacitor C6 is connected to the inductor L3 and the main control circuit (3). The other end of the inductor L3 is connected to one end of the inductor L2 and one end of the resistor R4. The other end of the resistor R4 is connected to the other end of the inductor L2 and connected to VCC_T. One end of the inductor L5 is connected to the fourth pin of the transmitting optical module connector CON1 and one end of the resistor R9. The other end of the inductor L5 is connected to one end of the resistor R14 and one end of the inductor L7. The other end of the inductor L7 is connected to the other end of the resistor R14. The other end of the resistor R9 is connected to one end of the capacitor C8. The other end of the capacitor C8 is connected to one end of the inductor L6 and the main control circuit (3). The other end of the inductor L6 is connected to one end of the inductor L8 and one end of the resistor R15. The other end of the resistor R15 is connected to the other end of the inductor L8 and connected to VCC_T.

2. The implementation circuit for a 10G multimode optical module according to claim 1, characterized in that, The optical module transmitting circuit (1) includes a transmitting optical module connector CON1. ​​The third and fourth pins of the transmitting optical module connector CON1 are connected to the transmitting filter circuit (2). The second and fifth pins of the transmitting optical module connector CON1 are grounded.

3. The implementation circuit for a 10G multimode optical module according to claim 2, characterized in that, The main control circuit (3) includes chip U2, capacitor C4, capacitor C5, capacitor C10, capacitor C11, capacitor C14, capacitor C15, capacitor C20, capacitor C21, resistor R5 and resistor R16. The first pin of chip U2 is grounded. The second and third pins of chip U2 are both connected to the gold finger interface circuit (4). The fourth pin of chip U2 is connected to one end of capacitor C10 and one end of capacitor C11 and connected to VCC_R. The other ends of capacitor C10 and C11 are both grounded. The fifth and sixth pins of chip U2 are both connected to the gold finger interface circuit (4). The thirteenth pin of chip U2 is connected to one end of capacitor C4 and one end of capacitor C5 and connected to VCC_T. The other ends of capacitor C4 and C5 are grounded. The fourteenth pin of chip U2 is connected to one end of resistor R5. The other end of resistor R5 is grounded. The fifteenth pin of chip U2 is grounded. The sixteenth pin of chip U2 is connected to the inductor L. 3 and the capacitor C6 are connected. The seventeenth pin of the chip U2 is connected to the inductor L6 and the capacitor C8 respectively. The eighteenth pin of the chip U2 is grounded. The nineteenth pin of the chip U2 is connected to one end of the capacitor C14 and one end of the capacitor C15 respectively. The other end of the capacitor C14 and the other end of the capacitor C15 are both grounded. The twenty-third pin of the chip U2 is connected to one end of the resistor R16. The other end of the resistor R16 is grounded. The twenty-fourth pin of the chip U2 is connected to one end of the capacitor C20 and one end of the capacitor C21 respectively and connected to VCC_R. The other end of the capacitor C20 and the other end of the capacitor C21 are both grounded. The twenty-fifth and twenty-sixth pins of the chip U2 are both connected to the optical module receiving circuit (5). The twenty-seventh pin of the chip U2 is grounded.

4. The implementation circuit for a 10G multimode optical module according to claim 3, characterized in that, The gold finger interface circuit (4) includes a gold finger interface CON2, capacitors C7, C9, C12, C13, resistors R6, R7, R10, R11, R12 and R13. The first, sixth, tenth, eleventh, fourteenth, seventeenth, and twentieth pins of the gold finger interface CON2 are all grounded. The second pin of the gold finger interface CON2 is connected to one end of resistor R6. The other end of resistor R6 is connected to one end of resistor R7 and connected to VCC_T. The other end of resistor R7 is connected to the third pin of the gold finger interface CON2. The seventh pin of the gold finger interface CON2 is connected to one end of resistor R11, and the other end of resistor R11 is grounded. The eighth pin of the gold finger interface CON2 is connected to one end of resistor R10, and the other end of resistor R10 is connected to VCC_R. The ninth pin of the gold finger interface CON2 is connected to one end of resistor R13, and the other end of resistor R13 is grounded. The twelfth pin of the finger interface CON2 is connected to one end of the capacitor C13. The other end of the capacitor C13 is connected to one end of the resistor R12 and the second pin of the chip U2. The thirteenth pin of the gold finger interface CON2 is connected to one end of the capacitor C12. The other end of the capacitor C12 is connected to the other end of the resistor R12 and the third pin of the chip U2. The fifteenth and sixteenth pins of the gold finger interface CON2 are both connected to the power supply circuit (6). The eighteenth pin of the gold finger interface CON2 is connected to one end of the capacitor C9. The other end of the capacitor C9 is connected to the fifth pin of the chip U2. The nineteenth pin of the gold finger interface CON2 is connected to one end of the capacitor C7. The other end of the capacitor C7 is connected to the sixth pin of the chip U2.

5. The implementation circuit for a 10G multimode optical module according to claim 4, characterized in that, The optical module receiving circuit (5) includes a receiving optical module connector CON3, capacitors C22, C23, C24, C25, and C26, an inductor L11, a resistor R18, and a resistor R19. The first pin of the receiving optical module connector CON3 is connected to one end of capacitor C22, one end of capacitor C23 and one end of inductor L11 respectively. The other ends of capacitor C22 and capacitor C23 are grounded. The other end of inductor L11 is connected to VCC_R. The second and fifth pins of the receiving optical module connector CON3 are grounded. The third pin of the receiving optical module connector CON3 is connected to one end of resistor R18 and one end of capacitor C24 respectively. The other end of capacitor C24 is connected to the twenty-fifth pin of the main control circuit (3). The fourth pin of the receiving optical module connector CON3 is connected to the other end of resistor R18 and one end of capacitor C25 respectively. The other end of capacitor C25 is connected to the twenty-sixth pin of the main control circuit (3). The sixth pin of the receiving optical module connector CON3 is connected to one end of capacitor C26 and one end of resistor R19 respectively. The other end of capacitor C26 is grounded.

6. The implementation circuit for a 10G multimode optical module according to claim 1, characterized in that, The power supply circuit (6) includes a field-effect transistor U3, capacitors C16, C17, C18, and C19, a resistor R17, an inductor L9, and an inductor L10. The first pin of the field-effect transistor U3 is connected to one end of the resistor R17 and one end of the capacitor C17, respectively. The other end of the resistor R17 is grounded. The other end of the capacitor C17 is connected to the second pin of the field-effect transistor U3, the fifteenth pin and the sixteenth pin of the gold finger interface CON2, respectively. The third pin of the field-effect transistor U3 is connected to one end of the capacitor C19, one end of the inductor L10 and one end of the inductor L9, respectively. The other end of the capacitor C19 is grounded. The other end of the inductor L10 is connected to one end of the capacitor C18 and connected to VCC_R. The other end of the capacitor C18 is grounded. The other end of the inductor L9 is connected to one end of the capacitor C16 and connected to VCC_T. The other end of the capacitor C16 is grounded.

7. The implementation circuit for a 10G multimode optical module according to claim 1, characterized in that, The storage circuit (7) includes a memory U1, a resistor R1, a resistor R2, and a capacitor C1; The first, second, third, and fourth pins of the memory U1 are all grounded. The fifth pin of the memory U1 is connected to one end of the resistor R2. The sixth pin of the memory U1 is connected to one end of the resistor R1. The other end of the resistor R1 is connected to the other end of the resistor R2 and connected to VCC_R. The seventh pin of the memory U1 is grounded. The eighth pin of the memory U1 is connected to one end of the capacitor C1 and connected to VCC_R. The other end of the capacitor C1 is grounded.

8. The implementation circuit for a 10G multimode optical module according to claim 4, characterized in that, The chip U2 is used to configure and operate the transmit and receive characteristics of the optical module.

9. An optical module, characterized in that, Including the housing of the optical module; The implementation circuit for a 10G multimode optical module as described in any one of claims 1-8, wherein the implementation circuit for the 10G multimode optical module is encapsulated inside the housing of the optical module.

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