A surge current suppression circuit

By using a surge current suppression circuit composed of a switching transistor and a resistor in a switching power supply, and utilizing a current mirror and a Zener diode, surge current is suppressed, thus solving the problem of device damage caused by surge current in switching power supplies and improving the safety and reliability of the circuit.

CN116896260BActive Publication Date: 2026-06-02FSP POWERLAND TECHNOLOGY INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
FSP POWERLAND TECHNOLOGY INC
Filing Date
2023-07-20
Publication Date
2026-06-02

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Abstract

The application discloses a surge current suppression circuit, belonging to the technical field of surge protection, comprising a plurality of switching tubes and a plurality of resistors, the third end of the first switching tube is connected with the first end of the first resistor, the first switching tube and the first resistor are connected in series at the output positive end of a switching power supply, the first end of the first switching tube is connected with the collector of the second switching tube and the second end of the first switching tube through the second resistor, the emitter of the second switching tube is connected with the second end of the first resistor, the first end of the first switching tube is connected with the first end of the third resistor, the second end of the third resistor is connected with the collector of the third switching tube, the base of the second switching tube is connected with the collector of the third switching tube and the base of the third switching tube, and the emitter of the third switching tube is connected with the second end of the first resistor. The surge current suppression circuit can effectively suppress the surge current in the switching power supply.
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Description

Technical Field

[0001] This invention relates to the field of surge protection technology, and in particular to a surge current suppression circuit. Background Technology

[0002] In practical applications, most switching power supplies use a capacitor connected in parallel at the output of the rectifier circuit for rectification, such as... Figure 1 As shown, the input voltage V in The input terminals of rectifier circuit 11 are connected in parallel across the two ends of the circuit, and capacitor C1 is connected in parallel across the output terminal of rectifier circuit 11. The terminals P1 and P2 of capacitor C1 are connected to the subsequent circuit. At the instant the power supply is switched on, because the initial voltage across capacitor C1 is zero, a large voltage will be generated on the bus during the instant C1 charges, resulting in a large inrush current. Especially when the switching power supply is frequently switched on and off, the voltage on the bus will frequently peak, and inrush currents will frequently occur, which may damage the components in the circuit. Summary of the Invention

[0003] To address the above problems, this invention provides a surge current suppression circuit.

[0004] To achieve the above objectives, the technical solution of the present invention is as follows:

[0005] A surge current suppression circuit includes multiple switching transistors and multiple resistors. The third terminal of a first switching transistor is connected to the first terminal of a first resistor. The first switching transistor and the first resistor are connected in series at the positive output terminal of a switching power supply. The first terminal of the first switching transistor is connected to the collector of a second switching transistor and the second terminal of the first switching transistor via a second resistor. The emitter of the second switching transistor is connected to the second terminal of the first resistor. The first terminal of the first switching transistor is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the collector of a third switching transistor. The base of the second switching transistor is connected to the collector of the third switching transistor and the base of the third switching transistor. The emitter of the third switching transistor is connected to the second terminal of the first resistor.

[0006] In one specific embodiment, the surge current suppression circuit described above further includes at least one first Zener diode, the at least one first Zener diode being connected in series in the same direction, the second end of the third resistor being connected to the cathode of the first Zener diode, and the anode of the first Zener diode being connected to the collector of the third switching transistor.

[0007] In one specific embodiment, the surge current suppression circuit described above further includes a first diode, the cathode of which is connected to the base of the third switching transistor, and the anode of which is connected to the emitter of the second switching transistor.

[0008] In one specific embodiment, the surge current suppression circuit described above further includes an equivalent constant current source, which outputs an equivalent current to the second terminal of the first switching transistor.

[0009] The above includes a fourth switch, a fourth resistor, a fifth resistor, and a second Zener diode. The first end of the fourth resistor is connected to the first end of the first switch, the second end of the fourth resistor is connected to the collector of the fourth switch, the emitter of the fourth switch is connected to the second end of the first switch, the first end of the fourth resistor is connected to the cathode of the second Zener diode, the anode of the second Zener diode is connected to the base of the fourth switch, and the base of the fourth switch is connected to the second end of the first resistor via the fifth resistor.

[0010] The present invention also provides a switching power supply, including the aforementioned surge current suppression circuit, voltage source, rectifier circuit and capacitor, wherein the input terminal of the rectifier circuit is connected in parallel across the two ends of the voltage source, and the capacitor is connected in parallel across the output terminal of the rectifier circuit.

[0011] The rectifier circuit described above includes a second diode, a third diode, a fourth diode, and a fifth diode. The anode of the second diode is connected to the cathode of the third diode, the anode of the fourth diode is connected to the cathode of the fifth diode, the cathode of the second diode is connected to the cathode of the fourth diode, the anode of the third diode is connected to the anode of the fifth diode, the positive terminal of the voltage source is connected to the anode of the second diode, and the negative terminal of the voltage source is connected to the anode of the fourth diode.

[0012] Beneficial effect: The surge current suppression circuit of the present invention can effectively suppress surge current in switching power supplies.

[0013] To make the above-mentioned features and advantages of the invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of a capacitor-filtered rectifier circuit for a switching power supply.

[0015] Figure 2 This is a circuit diagram of a surge current suppression circuit according to the present invention.

[0016] Figure 3 This is a circuit diagram of a specific embodiment of a surge current suppression circuit according to the present invention.

[0017] Figure 4 This is a circuit diagram of another specific embodiment of a surge current suppression circuit according to the present invention.

[0018] Figure 5 for Figure 3 Simulation waveform diagram of a specific embodiment.

[0019] Figure 6 for Figure 4 Simulation waveform diagram of a specific embodiment.

[0020] In the accompanying drawings, similar reference numerals refer to the same elements. Detailed Implementation

[0021] To make the objectives and technical solutions of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0022] Figure 2 This is a circuit diagram of a surge current suppression circuit 22 according to the present invention. Figure 2 As shown, the first end of capacitor C1 is connected to the first end of switching transistor Q1. The third end of switching transistor Q1 is connected to terminal P1 via resistor R1. The first end of capacitor C1 is connected to the collector of switching transistor Q2 via resistor R2. The second end of switching transistor Q1 is connected to the collector of switching transistor Q2. The emitter of switching transistor Q2 is connected to terminal P1. The first end of capacitor C1 is connected to the collector of switching transistor Q3 via resistor R3. The base of switching transistor Q3 is connected to the base of switching transistor Q2 and the collector of switching transistor Q3. The emitter of switching transistor Q3 is connected to terminal P1. The second end of capacitor C1 is connected to terminal P2. The second end of capacitor C1 is grounded. Terminals P1 and P2 are connected in parallel to the subsequent circuit.

[0023] Ignoring the voltage across the PN junction of the switching transistor, the voltage V between points A and C is... CA =i2*R3.

[0024] Since the current mirror formed by switching transistors Q2 and Q3, and ignoring the base current of switching transistor Q1, the currents i1 and i2 satisfy the following relationship: i1≈i2.

[0025] The voltage V between points B and A is... BA =V CA -i1*R2=V CA -V CA / R3*R2=V CA *(1-R2 / R3).

[0026] At the same time, the voltage V between points B and A BA ≈V BE +I mos*R1.

[0027] Due to voltage V BE It is very small, so it can be ignored. Combining the above two equations, we get the surge current I. mos The expression: I mos =V CA *(1-R2 / R3) / R1.

[0028] In the above formula, resistor R2 should be slightly larger than resistor R3, so that the surge current I... mos With voltage V CA Inversely proportional. At the instant the power supply is switched on, the voltage V... CA It will be very large; when the switching power supply is frequently switched on and off, the voltage V CA Peak values ​​will also occur frequently. This is due to the surge current I... mos With voltage V CA Inversely proportional, at voltage V CA Peak surge current I mos It will drop to the bottom, thereby suppressing the surge current and greatly reducing the loss of the switching transistor Q1.

[0029] More specifically, the switch Q1 is always on during operation or the switch Q1 can be bypassed by other circuits with lower impedance.

[0030] It should be noted that the switching transistor Q1 includes, but is not limited to, transistors, MOSFETs, etc.

[0031] Figure 3 This diagram illustrates a specific embodiment of a surge current suppression circuit according to the present invention. Figure 3 As shown, the rectifier circuit 31 includes diodes D1, D2, D3, and D4. The anode of diode D1 is connected to the cathode of diode D2, the anode of diode D3 is connected to the cathode of diode D4, the cathode of diode D1 is connected to the cathode of diode D3, and the anode of diode D2 is connected to the anode of diode D4. The input voltage V... in The positive terminal is connected to the anode of diode D1, and the input voltage V in The negative terminal is connected to the anode of diode D3.

[0032] The surge current suppression circuit 32 includes switching transistors Q1, Q2, and Q3. The first terminal of capacitor C1 is connected to the first terminal of switching transistor Q1. The third terminal of switching transistor Q1 is connected to terminal P1 via resistor R1. The first terminal of capacitor C1 is connected to the collector of switching transistor Q2 via resistor R2. The second terminal of switching transistor Q1 is connected to the collector of switching transistor Q2. The emitter of switching transistor Q2 is connected to terminal P1. The first terminal of capacitor C1 is connected to the cathode of Zener diode D5 via resistor R3. The anode of Zener diode D5 is connected to… The cathode and anode of Zener diode D6 are connected to the collector of switching transistor Q3. The base of switching transistor Q3 is connected to the base of switching transistor Q2 and the collector of switching transistor Q3. The emitter of switching transistor Q3 is connected to terminal P1. The anode of diode D7 is connected to the emitter of switching transistor Q2. The cathode of diode D7 is connected to the base of switching transistor Q2. The second terminal of capacitor C1 is connected to terminal P2 and grounded. Terminal P1 and terminal P2 are connected in parallel with capacitor C2. Terminal P1 and terminal P2 are connected in parallel with the subsequent circuit.

[0033] Ignoring the voltage across the PN junction of the switching transistor, the voltage V between points A and C is... CA =i2*R3+V Z , where V Z The sum of the stable voltages of Zener diodes D5 and D6.

[0034] Since the current mirror formed by switching transistors Q2 and Q3, and ignoring the base current of switching transistor Q1, the currents i1 and i2 satisfy the following relationship: i1≈i2.

[0035] The voltage V between points B and A is... BA =V CA -i1*R2=V CA -(V CA -V Z ) / R3*R2=V CA *(1-R2 / R3)+(R2 / R3)*V Z .

[0036] At the same time, the voltage V between points B and A BA ≈V BE +I mos *R1.

[0037] Due to voltage V BE It is very small, so it can be ignored. Combining the above two equations, we get the surge current I. mos The expression: I mos =V CA *(1-R2 / R3) / R1+(R2 / R3)*V Z / R1.

[0038] In the above formula, resistor R2 should be slightly larger than resistor R3, so that the surge current I... mos With voltage V CA Inversely proportional. At the instant the power supply is switched on, the voltage V... CA It will be very large; when the switching power supply is frequently switched on and off, the voltage V CA Peak values ​​will also occur frequently. This is due to the surge current I... mos With voltage V CA Inversely proportional, at voltage V CA Peak surge current I mos It will drop to the bottom, thereby suppressing the surge current.

[0039] More specifically, Zener diodes D5 and D6 serve to stabilize the voltage.

[0040] More specifically, the function of diode D7 is to prevent excessive reverse voltage from being applied between the base and emitter of switching transistor Q2, or between the base and emitter of switching transistor Q3.

[0041] Figure 5 for Figure 3 The simulation waveform diagram of the embodiment, voltage V bus The voltage between terminals P1 and P2, from Figure 5 It can be seen that the surge current I mos With voltage V CA Inversely proportional, at voltage V CA Peak surge current I mos It will plummet to the bottom.

[0042] Figure 4 The diagram shows a circuit schematic of another specific embodiment of a surge current suppression circuit according to the present invention. Figure 4 The rectifier circuit 41 in the middle and Figure 3The structure of the intermediate rectifier circuit 31 is the same and will not be described again here. The surge current suppression circuit 42 includes an equivalent constant current source 421. More specifically, the first end of capacitor C1 is connected to the first end of switch Q1, the third end of switch Q1 is connected to terminal P1 through resistor R1, the first end of capacitor C1 is connected to the collector of switch Q2 through resistor R2, the second end of switch Q1 is connected to the collector of switch Q2, the emitter of switch Q2 is connected to terminal P1, the first end of capacitor C1 is connected to the collector of switch Q3 through resistor R3, the base of switch Q3 is connected to the base of switch Q2 and the collector of switch Q3, the emitter of switch Q3 is connected to terminal P1, the second end of capacitor C1 is connected to terminal P2, the second end of capacitor C1 is grounded, capacitor C2 is connected in parallel between terminal P1 and terminal P2, and the subsequent stage circuit is connected in parallel between terminal P1 and terminal P2. The first end of capacitor C1 is connected to the collector of switching transistor Q4 through resistor R4. The emitter of switching transistor Q4 is connected to the second end of switching transistor Q1. The first end of capacitor C1 is connected to the cathode of Zener diode D8. The anode of Zener diode D8 is connected to the base of switching transistor Q4. The base of switching transistor Q4 is connected to terminal P1 through resistor R5.

[0043] Ignoring the voltage across the PN junction of the switching transistor, the voltage V between points A and C is... CA =i2*R3.

[0044] Since the current mirror formed by switching transistors Q2 and Q3, and ignoring the base current of switching transistor Q1, the currents i1 and i2 satisfy the following relationship: i1≈i2-i3.

[0045] The voltage V between points B and A is... BA =V CA –(i2-i3)*R2=V CA –[(V CA [ / R3-i3)*R2]=V CA *(1-R2 / R3)+i3*R2.

[0046] At the same time, the voltage V between points B and A BA ≈V BE +I mos *R1.

[0047] Due to voltage V BE It is very small, so it can be ignored. Combining the above two equations, we get the surge current I. mos The expression: I mos =V CA *(1-R2 / R3) / R1+i3*R2 / R1.

[0048] In the above formula, resistor R2 should be slightly larger than resistor R3, so that the surge current I... mos With voltage V CAInversely proportional. At the instant the power supply is switched on, the voltage V... CA It will be very large; when the switching power supply is frequently switched on and off, the voltage V CA Peak values ​​will also occur frequently. This is due to the surge current I... mos With voltage V CA Inversely proportional, at voltage V CA Peak surge current I mos It will drop to the bottom, thereby suppressing the surge current.

[0049] Figure 6 for Figure 4 The simulation waveform diagram of the embodiment, voltage V bus The voltage between terminals P1 and P2, from Figure 6 It can be seen that the surge current I mos With voltage V CA Inversely proportional, at voltage V CA Peak surge current I mos It will plummet to the bottom.

[0050] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A surge current suppression circuit, characterized in that, The circuit includes multiple switching transistors and multiple resistors. The first terminal of a first switching transistor is connected to the positive output terminal of a switching power supply rectifier circuit. The third terminal of the first switching transistor is connected to the first terminal of a first resistor. The second terminal of the first resistor is connected to the positive output terminal of the switching power supply. The first terminal of the first switching transistor is connected to the first terminal of a second resistor, forming node C. The second terminal of the second resistor is connected to the collector of a second switching transistor and the second terminal of the first switching transistor. The emitter of the second switching transistor is connected to the second terminal of the first resistor, forming node A. The first terminal of the first switching transistor is connected to the first terminal of a third resistor. The second terminal of the third resistor is connected to the collector of a third switching transistor. The base of the second switching transistor is connected to the collector and base of the third switching transistor. The emitter of the third switching transistor is connected to the second terminal of the first resistor. The resistance of the second resistor is greater than the resistance of the third resistor, such that the surge current is inversely proportional to the voltage between nodes C and A.

2. The surge current suppression circuit as described in claim 1, characterized in that, It also includes at least one first Zener diode, the at least one first Zener diode being connected in series in the same direction, the second end of the third resistor being connected to the cathode of the first Zener diode, and the anode of the first Zener diode being connected to the collector of the third switching transistor.

3. The surge current suppression circuit as described in claim 2, characterized in that, It also includes a first diode, the cathode of which is connected to the base of the third switching transistor, and the anode of which is connected to the emitter of the second switching transistor.

4. The surge current suppression circuit as described in claim 1, characterized in that, It also includes an equivalent constant current source, which outputs an equivalent current to the second terminal of the first switching transistor.

5. The surge current suppression circuit as described in claim 4, characterized in that, The equivalent constant current source includes a fourth switch, a fourth resistor, a fifth resistor, and a second Zener diode. The first end of the fourth resistor is connected to the first end of the first switch, the second end of the fourth resistor is connected to the collector of the fourth switch, the emitter of the fourth switch is connected to the second end of the first switch, the first end of the fourth resistor is connected to the cathode of the second Zener diode, the anode of the second Zener diode is connected to the base of the fourth switch, and the base of the fourth switch is connected to the second end of the first resistor via the fifth resistor.

6. A switching power supply, characterized in that, The device includes a surge current suppression circuit, a voltage source, a rectifier circuit, and a capacitor as described in any one of claims 1-5, wherein the input terminal of the rectifier circuit is connected in parallel across the two ends of the voltage source, and the capacitor is connected in parallel across the output terminal of the rectifier circuit.

7. A switching power supply as described in claim 6, characterized in that, The rectifier circuit includes a second diode, a third diode, a fourth diode, and a fifth diode. The anode of the second diode is connected to the cathode of the third diode, the anode of the fourth diode is connected to the cathode of the fifth diode, the cathode of the second diode is connected to the cathode of the fourth diode, the anode of the third diode is connected to the anode of the fifth diode, the positive terminal of the voltage source is connected to the anode of the second diode, and the negative terminal of the voltage source is connected to the anode of the fourth diode.