Amplifier, radio frequency chip and electronic device

Abstract

The application discloses an amplifier, a radio frequency chip and an electronic device. The amplifier comprises a field effect tube, a drain matching circuit, a gate matching circuit, a gate bias circuit and a source matching circuit. The field effect tube comprises a drain, a gate and a source, and is used for signal amplification. The first end of the drain matching circuit is connected with the drain of the field effect tube, and the second end of the drain matching circuit is connected with a radio frequency signal output end. The first end of the gate matching circuit is connected with the gate of the field effect tube, and the second end of the gate matching circuit is connected with a radio frequency signal input end. The gate bias circuit is connected with the third end of the gate matching circuit. The source matching circuit is connected with the source of the field effect tube. The gate matching circuit comprises a low coupling inductance pair, and the coupling inductance pair is an inductance pair with opposite induced magnetic field directions. The application has small power consumption, small size, low cost and low noise.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronics, in particular to an amplifier, a radio frequency chip and an electronic device. BACKGROUND

[0002] With the development of communication technology, especially the emergence of 5G technology, high-frequency wireless communication technology has become an important development direction of wireless communication.

[0003] A large number of amplifiers are included in the transceiving system of high-frequency wireless communication, and the performance of the amplifiers will have an important influence on the performance of the radio frequency transceiving system. Therefore, the high-frequency wireless communication technology puts forward higher requirements on the performance and cost of the amplifiers, such as integration, noise performance, power consumption, etc.

[0004] The existing radio frequency or high-frequency amplifier chip is mostly composed of transistors, lumped parameter elements inductors, lumped parameter elements capacitors, resistors, microstrip lines, etc. Among the elements, inductors, microstrip lines, capacitors, etc. will generate electromagnetic radiation and other induced magnetic fields or electric fields due to signal excitation, which will affect the arrangement and normal work of other elements. In the design or manufacture of the amplifier, in order to solve the electromagnetic compatibility problem between elements, the existing method is to realize electromagnetic compatibility by maintaining a larger arrangement distance between elements, which will result in a larger size of the amplifier, which is not convenient for high-density integration and cost reduction. In addition, electromagnetic radiation, induced magnetic field or electric field will cause energy loss, sacrificing the performance of the amplifier. In order to realize the popularization of high-frequency wireless communication technology, it is an urgent problem to be solved to reduce the cost and improve the performance of components. SUMMARY

[0005] In order to solve the above technical problems or at least partially solve the above technical problems, the present application provides an amplifier, a radio frequency chip and an electronic device.

[0006] In a first aspect, the present application provides an amplifier, which comprises:

[0007] a field effect transistor, the field effect transistor comprising a drain, a gate and a source, and the field effect transistor being used for signal amplification;

[0008] a drain matching circuit, a first end of the drain matching circuit being connected with the drain of the field effect transistor, and a second end of the drain matching circuit being connected with a radio frequency signal output end;

[0009] a gate matching circuit, a first end of the gate matching circuit being connected with the gate of the field effect transistor, and a second end of the gate matching circuit being connected with a radio frequency signal input end;

[0010] a gate bias circuit, the gate bias circuit being connected with a third end of the gate matching circuit;

[0011] a source matching circuit connected to the source of the field effect tube;

[0012] The gate matching circuit comprises a low-coupling inductor pair, and the inductor pair is an inductor pair with opposite directions of induced magnetic field.

[0013] In the embodiment of the present application, the low-coupling inductor pair comprises:

[0014] a third inductor, a second end of the third inductor being connected to the gate of the field effect tube;

[0015] a fourth inductor, a first end of the fourth inductor being connected to the first end of the third inductor, and a second end of the fourth inductor being connected to the gate bias circuit;

[0016] The third inductor and the fourth inductor have opposite directions of induced magnetic field.

[0017] In the embodiment of the present application, the gate matching circuit further comprises:

[0018] a third capacitor, a first end of the third capacitor being connected to the radio frequency signal input end, and a second end of the third capacitor being connected to the first end of the third inductor.

[0019] In the embodiment of the present application, the gate bias circuit comprises:

[0020] a fourth capacitor, a first end of the fourth capacitor being connected to ground, and a second end of the fourth capacitor being connected to the gate bias power supply end.

[0021] In the embodiment of the present application, the source matching circuit comprises:

[0022] a fifth inductive unit, a first end of the fifth inductive unit being connected to the source of the field effect tube, and a second end of the fifth inductive unit being connected to ground;

[0023] The fifth inductive unit is one of an inductor, a microstrip line, and a combination of an inductor and a microstrip line.

[0024] In the embodiment of the present application, the source matching circuit is ground.

[0025] In the embodiment of the present application, the gate bias circuit is ground.

[0026] In the embodiment of the present application, the source matching circuit comprises:

[0027] a sixth inductive unit, a first end of the sixth inductive unit being connected to the source of the field effect tube;

[0028] a fifth capacitor, a first end of the fifth capacitor being connected with a second end of the sixth inductive unit, and a second end of the fifth capacitor being grounded;

[0029] a first resistor, a first end of the first resistor being connected with the second end of the sixth inductive unit, and a second end of the first resistor being grounded;

[0030] wherein the sixth inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0031] In the embodiments of the present application, the source matching circuit comprises:

[0032] a seventh inductive unit, a first end of the seventh inductive unit being connected with the source of the field effect transistor;

[0033] a sixth capacitor, a first end of the sixth capacitor being connected with a second end of the seventh inductive unit, and a first end of the sixth capacitor being further connected with the source bias power supply end, and a second end of the sixth capacitor being grounded;

[0034] wherein the seventh inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0035] In the embodiments of the present application, the drain matching circuit comprises:

[0036] a first inductive unit, a first end of the first inductive unit being connected with the drain of the field effect transistor;

[0037] a second inductive unit, a second end of the second inductive unit being connected with a second end of the first inductive unit, and the second end of the second inductive unit being connected with the drain bias power supply end;

[0038] a first capacitor, a first end of the first capacitor being connected with a second end of the first inductive unit, and a second end of the first capacitor being connected with the radio frequency signal output end;

[0039] a second capacitor, a first end of the second capacitor being connected with a second end of the second inductive unit, and a second end of the second capacitor being grounded;

[0040] wherein the first inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line, and / or the second inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0041] In the embodiments of the present application, the third inductor and the fourth inductor are both spiral inductors and are arranged in the amplifier with opposite spiral directions.

[0042] In the embodiments of the present application, the third inductor and the fourth inductor are arranged in the amplifier as mirror images of each other.

[0043] In the embodiments of the present application, the third inductor is composed of a first microstrip line, and the first microstrip line is wound into a first spiral pattern; the fourth inductor is composed of a second microstrip line, and the second microstrip line is wound into a second spiral pattern; the first end and the second end of the first microstrip line are respectively the first end and the second end of the third inductor; the first end and the second end of the second microstrip line are respectively the first end and the second end of the fourth inductor; and the second end of the first microstrip line and the second end of the second microstrip line are connected together so that the first microstrip line and the second microstrip line form a combined microstrip line.

[0044] In the embodiments of the present application, the first and second spiral patterns do not overlap and are adjacent but at a distance in the direction parallel to the wiring layer of the amplifier.

[0045] In the embodiments of the present application, the combined microstrip line is composed of multiple layers of metal materials, and each layer of metal material is located in a different wiring layer of the amplifier.

[0046] In the embodiments of the present application, the combined microstrip line is composed of a single layer of metal material, and the single layer of metal material is located in the same or different wiring layer of the amplifier.

[0047] In a second aspect, a radio frequency chip is provided, which includes a substrate and the amplifier as described above on the substrate.

[0048] In a third aspect, an electronic device is provided, which includes the radio frequency chip as described above.

[0049] The embodiments of the present application provide an amplifier, which includes: a field effect tube, the field effect tube including a drain, a gate and a source, and the field effect tube being used for signal amplification; a drain matching circuit, a first end of the drain matching circuit being connected with the drain of the field effect tube, and a second end of the drain matching circuit being connected with a radio frequency signal output end; a gate matching circuit, a first end of the gate matching circuit being connected with the gate of the field effect tube, and a second end of the gate matching circuit being connected with a radio frequency signal input end; a gate bias circuit, the gate bias circuit being connected with a third end of the gate matching circuit; and a source matching circuit, the source matching circuit being connected with the source of the field effect tube; wherein the gate matching circuit includes a low-coupling inductor pair, and the low-coupling inductor pair is a pair of inductors with opposite induced magnetic fields. In the embodiments of the present application, the low-coupling inductor pair is a pair of inductors with opposite induced magnetic fields, a pair of inductors with opposite induced magnetic fields generate induced electric fields in opposite directions, and the induced electric fields in opposite directions can partially offset each other, so that the radiation generated by the induced electric fields is reduced, thereby reducing the energy loss of the circuit. In addition, because the induced electric fields offset each other, the inductors in the low-coupling inductor pair can be closer to each other, thereby reducing the size of the amplifier, reducing the cost and reducing the noise. Attached Figure Description

[0050] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0051] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a circuit diagram of the amplifier in an embodiment of this application;

[0053] Figure 2 This is a circuit diagram of the amplifier in an embodiment of this application;

[0054] Figure 3 This is a circuit diagram of the amplifier in an embodiment of this application;

[0055] Figure 4 This is a circuit diagram of the amplifier in an embodiment of this application;

[0056] Figure 5 This is a circuit diagram of the amplifier in an embodiment of this application;

[0057] Figure 6 This is a schematic diagram of the radio frequency chip in an embodiment of this application;

[0058] Figure 7 This is a schematic diagram of the arrangement of low-coupled inductor pairs in the amplifier according to an embodiment of this application;

[0059] Figure 8 This is a schematic diagram of an electronic device in an embodiment of this application. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0061] The amplifier provided in this application embodiment can be used as a standalone component or applied to radio frequency chips or system integration.

[0062] likeFigure 1 As shown in the figure, the embodiment of the present application provides an amplifier, which comprises:

[0063] a field effect tube 110, comprising an enhancement type field effect tube and a depletion type field effect tube, the field effect tube 110 comprising a drain, a gate and a source, and the field effect tube 110 being used for signal amplification;

[0064] a drain matching circuit 120, a first end of the drain matching circuit 120 being connected with the drain of the field effect tube 110, and a second end of the drain matching circuit 120 being connected with a radio frequency signal output end RFOUT;

[0065] a gate matching circuit 130, a first end of the gate matching circuit 130 being connected with the gate of the field effect tube 110, and a second end of the gate matching circuit 130 being connected with a radio frequency signal input end RFIN;

[0066] a source matching circuit 140, connected with the source of the field effect tube 110;

[0067] a gate bias circuit 150, connected with a third end of the gate matching circuit 130;

[0068] wherein the gate matching circuit 130 comprises a low-coupling inductance pair 131, and the low-coupling inductance pair 131 is an inductance pair with opposite directions of induced magnetic field.

[0069] The field effect tube 110 in the embodiment of the present application has three poles, i.e., a source (S pole), a gate (G pole) and a drain (D pole), and is used for amplification of radio frequency signals, which will not be described here.

[0070] In the embodiment of the present application, the drain matching circuit 120 is used for matching the drain output impedance of the field effect tube 110 to a first target impedance, and the first target impedance is the output impedance of the radio frequency signal output end RFOUT of the amplifier.

[0071] In the embodiment of the present application, the gate matching circuit 130 is used for matching the gate input impedance of the field effect tube 110 to a second target impedance, and the second target impedance is the input impedance of the radio frequency signal input end RFIN of the amplifier.

[0072] As shown in the figure, Figure 1 , Figure 2 the low-coupling inductance pair 131 comprises:

[0073] a third inductance L3, a second end of the third inductance L3 being connected with the gate of the field effect tube 110;

[0074] a fourth inductor L4, a first end of the fourth inductor L4 is connected with the first end of the third inductor L3, and a second end of the fourth inductor L4 is connected with the gate bias circuit 150;

[0075] The third inductor L3 and the fourth inductor L4 have opposite directions of induced magnetic fields.

[0076] In the embodiments of the present application, the third inductor L3 and the fourth inductor L4 can be planar spiral inductors, and the spiral directions of the third inductor L3 and the fourth inductor L4 are opposite.

[0077] In other embodiments of the present application, the third inductor L3 and the fourth inductor L4 can also be other structures and physical layouts capable of realizing opposite directions of induced magnetic fields, which will not be described here.

[0078] When a signal is excited on an inductor, an induced magnetic field is generated, which generates an induced electric field, and the induced electric field generates radiation, thereby causing energy loss. Therefore, the third inductor L3 and the fourth inductor L4 also have induced magnetic fields, and the induced electric fields generated by the induced magnetic fields cause energy loss.

[0079] In the embodiments of the present application, the third inductor L3 and the fourth inductor L4 have opposite directions of induced magnetic fields, so that the directions of the induced electric fields generated by the induced magnetic fields of the third inductor L3 and the fourth inductor L4 are also opposite. The two opposite induced electric fields can partially cancel each other out, so that the radiation generated by the induced electric fields is reduced, thereby reducing energy loss.

[0080] Because the induced electric fields between the third inductor L3 and the fourth inductor L4 partially cancel each other out, the physical distance between the third inductor L3 and the fourth inductor L4 can be closer, thereby reducing the size of the circuit and reducing costs.

[0081] In the embodiments of the present application, the gate matching circuit 130 includes a low-coupling inductor pair 131, and the low-coupling inductor pair 131 is a pair of inductors L3 and L4 having opposite directions of induced magnetic fields, which can reduce mutual coupling and energy loss. In addition, the physical distance between the third inductor L3 and the fourth inductor L4 can be closer, thereby reducing the size of the circuit and reducing costs.

[0082] In the embodiments of the present application, as shown in FIG. 1, Figure 2 the gate matching circuit 130 further includes:

[0083] a third capacitor C3, a first end of the third capacitor C3 is connected with the radio frequency signal input end RFIN, and a second end of the third capacitor C3 is connected with the first end of the third inductor L3.

[0084] The gate bias circuit 150 includes:

[0085] a fourth capacitor C4, a first end of the fourth capacitor C4 being grounded, and a second end of the fourth capacitor C4 being connected with the gate bias power terminal VG.

[0086] In the embodiment of the present application, the third capacitor C3 and the fourth capacitor C4 and the low-coupling inductor pair 131 form an amplifier input matching network, which is used to match the gate input impedance of the field effect tube 110 to the second target impedance.

[0087] In the embodiment of the present application, the resonance point frequency of the fourth capacitor C4 is close to or the same as the center frequency of the working frequency band of the amplifier, which is used to realize the isolation of the amplifier and the radio frequency signal of the gate bias power terminal VG, and at the same time, provides the radio frequency signal ground for the second end of the fourth inductor L4.

[0088] In the embodiment of the present application, as shown in Figure 2 the source matching circuit 140 includes:

[0089] a fifth inductive unit L5, a first end of the fifth inductive unit L5 being connected with the source of the field effect tube 110, and a second end of the fifth inductive unit L5 being grounded;

[0090] In the embodiment of the present application, the fifth inductive unit L5 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0091] In the embodiment of the present application, by adjusting the parameters of the fifth inductive unit L5, the optimal noise impedance of the field effect tube 110 and the optimal gain matching impedance of the field effect tube 110 can be adjusted to be consistent, thereby reducing the noise of the amplifier and improving the performance of the amplifier.

[0092] In the embodiment of the present application, as shown in Figure 2 the gate bias power terminal VG is used to provide the gate bias voltage VG for the field effect tube 110, and the drain bias power terminal VD is used to provide the drain bias voltage VD for the field effect tube 110, so as to maintain the normal operation of the field effect tube 110. The radio frequency signal is input through the radio frequency signal input terminal RFIN, drives the gate of the field effect tube 110 through the gate matching circuit 130, and is output through the radio frequency signal output terminal RFOUT after being amplified by the field effect tube 110 and passing through the drain matching circuit 120.

[0093] In the embodiment of the present application, the low-coupling inductor pair 131 is an inductor pair with opposite directions of induced magnetic field, which can reduce the energy loss in the corresponding gate matching circuit 130, reduce the circuit size, and reduce the cost. In addition, in the embodiment of the present application, the low-coupling inductor pair 131 is used, which can reduce the area and at the same time, is beneficial to reduce the noise of the amplifier.

[0094] In the embodiment of the present application, as shown in Figure 3 the source matching circuit 140 is grounded.

[0095] In a specific application scenario of this application embodiment, in the source matching circuit 140, the source matching circuit 140 is grounded, that is, the source of the field-effect transistor 110 can be directly grounded, such as... Figure 3 As shown.

[0096] This application Figure 3 In the illustrated embodiment, a gate bias voltage VG is provided to the field-effect transistor 110 through the gate bias power supply terminal VG, and a drain bias voltage VD is provided to the field-effect transistor 110 through the drain bias power supply terminal VD, thus maintaining the normal operation of the field-effect transistor 110. The radio frequency (RF) signal is input through the RF signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the field-effect transistor 110, is amplified by the field-effect transistor 110, passes through the drain matching circuit 120, and is output through the RF signal output terminal RFOUT.

[0097] In this embodiment, the low-coupling inductor pair 131 is an inductor pair with opposite directions of induced magnetic field, which can reduce energy loss in the corresponding gate matching circuit 130, reduce circuit size, and reduce cost.

[0098] This application Figure 2 , Figure 3 In the illustrated embodiment, a gate bias voltage VG needs to be provided. Figure 4 In the illustrated embodiment, it can be a single-supply self-biased amplifier, thus eliminating the need to provide a gate bias voltage VG.

[0099] like Figure 4 As shown in the embodiment of this application, the gate bias circuit 150 is ground.

[0100] like Figure 4 As shown in the embodiment of this application, the source matching circuit 140 includes:

[0101] The sixth sense unit L6, the first end of which is connected to the source of the field-effect transistor 110;

[0102] The fifth capacitor C5 has its first terminal connected to the second terminal of the sixth sensing unit L6, and its second terminal is grounded.

[0103] A first resistor R1, the first end of which is connected to the second end of the sixth sensing unit L6, and the second end of the first resistor R1 is grounded;

[0104] The sixth sensor unit L6 is an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0105] In the embodiment of the application, by adjusting the parameter of the sixth inductive unit L6, the optimal noise impedance of the field effect transistor 110 and the optimal gain matching impedance of the field effect transistor 110 can be adjusted to be consistent, thereby reducing the noise of the amplifier and improving the performance of the amplifier.

[0106] In the embodiment of the application, the fifth capacitor C5 couples the radio frequency signal output by the source of the field effect transistor 110 and passing through the sixth inductive unit L6 to the ground, thereby reducing the energy loss of the source matching circuit 140.

[0107] In the embodiment of the application, the first resistor R1 is used to raise the source potential of the field effect transistor 110, so that the voltage from the gate to the source of the field effect transistor 110 is negative, thereby maintaining the normal operation of the amplifier.

[0108] In the embodiment of the application, Figure 4 In the embodiment of the application, the drain bias power terminal VD is used to provide the drain bias voltage VD for the field effect transistor 110, at this time, the current from the drain to the source of the field effect transistor 110 flows through the resistor R1 in the source matching circuit 140, thereby raising the source potential of the field effect transistor 110, making the voltage from the gate to the source of the field effect transistor 110 negative, and maintaining the normal operation of the field effect transistor 110. The radio frequency signal is input through the radio frequency signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the field effect transistor 110, and is output through the radio frequency signal output terminal RFOUT after being amplified by the field effect transistor 110 and passing through the drain matching circuit 120.

[0109] In the embodiment of the application, the gate matching circuit 130 includes a low-coupling inductive pair 131, the low-coupling inductive pair 131 is an inductive pair with opposite directions of induced magnetic field, which can reduce the energy loss in the corresponding gate matching circuit 130, reduce the circuit size, reduce the cost, and reduce the noise.

[0110] In the embodiment of the application, an embodiment of an amplifier is also provided, as shown in Figure 5 .

[0111] The gate bias circuit 150 is connected with the gate bias power terminal VG, that is, the second end of the capacitor C4 is connected with the gate bias power terminal VG.

[0112] As shown in Figure 5 , at this time, the source matching circuit 140 includes:

[0113] The seventh inductive unit L7 has a first end connected with the source of the field effect transistor 110;

[0114] a sixth capacitor C6, a first end of the sixth capacitor C6 being connected with a second end of the seventh inductive unit L7, the first end of the sixth capacitor C6 also being connected with the source bias power supply end VS, and a second end of the sixth capacitor C6 being grounded;

[0115] The seventh inductive unit L7 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0116] In the embodiment of the present application, by adjusting the parameters of the seventh inductive unit L7, the optimal noise impedance of the field effect transistor 110 and the optimal gain matching impedance of the field effect transistor 110 can be adjusted to be consistent, thereby reducing the noise of the amplifier and improving the performance of the amplifier.

[0117] In the embodiment of the present application, the resonance point frequency of the sixth capacitor C6 is close to or the same as the center frequency of the working frequency band of the amplifier, which is used to realize the isolation of the amplifier and the source bias power supply end VS from the radio frequency signal, and at the same time, to provide the radio frequency signal ground for the second end of the seventh inductive unit L7.

[0118] In the embodiment of the present application, Figure 5 In the embodiment of the present application, the gate bias voltage VG is provided to the amplifier through the gate bias power supply end VG, the drain bias voltage VD is provided to the amplifier through the drain bias power supply end VD, and the source bias voltage VS is provided to the amplifier through the source bias power supply end VS. The voltage difference between VG and VS is adjusted to be the gate-source bias power supply in the normal working state of the field effect transistor 110, and the voltage difference between VD and VS is adjusted to be the drain-source bias power supply in the normal working state of the field effect transistor 110, so that the field effect transistor 110 is in the normal working state. The radio frequency signal is input through the radio frequency signal input end RFIN, drives the gate of the field effect transistor 110 in the amplifier through the gate matching circuit 130, and is output through the radio frequency signal output end RFOUT after being amplified by the field effect transistor 110.

[0119] In the embodiment of the present application, the gate matching circuit 130 includes a low-coupling inductor pair 131, and the low-coupling inductor pair 131 is an inductor pair with opposite directions of induced magnetic field, which can reduce the energy loss in the corresponding gate matching circuit 130, reduce the circuit size, reduce the cost, and reduce the noise.

[0120] As shown in the embodiment of the present application, Figures 2 to 5 The drain matching circuit 120 includes:

[0121] a first inductive unit L1, a first end of the first inductive unit L1 being connected with the drain of the field effect transistor 110;

[0122] a second inductive unit L2, a second end of the second inductive unit L2 being connected with a second end of the first inductive unit L1, and the second end of the second inductive unit L2 being connected with the drain bias power supply end VD.

[0123] A first capacitor C1, the first end of which is connected to the second end of the first inductive unit L1, and the second end of which is connected to the radio frequency signal output terminal RFOUT.

[0124] The second capacitor C2 has its first terminal connected to the second terminal of the second inductive unit L2, and its second terminal grounded.

[0125] Wherein, the first inductive unit L1 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line, and / or the second inductive unit L2 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

[0126] In this embodiment, the resonant frequency of the second capacitor C2 is close to or the same as the center frequency of the amplifier's operating frequency band, which is used to isolate the amplifier from the RF signal of the drain bias power supply terminal VD, and at the same time provide an RF signal ground for the second terminal of the second inductive unit L2.

[0127] In the embodiments of this application, the power supply biasing methods of the amplifier include single-supply self-biasing, dual-supply biasing, and triple-supply biasing. Single-supply self-biasing refers to the amplifier being biased by only the drain bias power supply VD provided externally, such as... Figure 4 As shown; dual-supply bias refers to the external supply of drain bias power VD and gate bias power supply VG, such as... Figure 2 and Figure 3 As shown; three-power supply bias refers to the external supply of gate bias power supply VD, gate bias power supply VG, and source bias power supply VS, as shown. Figure 5 As shown. Single-supply self-biased power supply is simple, dual-supply biased power supply can achieve better power performance, and triple-supply biased power supply is beneficial for energy saving. The power supply biasing method can be configured according to the actual application. The power supply biasing method of the embodiments of this application can also be used in other circuits, which will not be described in detail here.

[0128] This application Figure 4 and Figure 5 In some application scenarios, the sixth sensor unit L6 and the seventh sensor unit L7 may be omitted in the embodiments shown, without affecting the operation and function of the amplifier in the embodiments of this application.

[0129] This application also provides a radio frequency chip, which includes a substrate and an amplifier as described above on the substrate.

[0130] like Figure 1 As shown, the amplifier includes:

[0131] 110 field-effect transistor;

[0132] A drain matching circuit 120, a first end of the drain matching circuit 120 is connected with the drain of the field effect transistor 110, and a second end of the drain matching circuit 120 is connected with the radio frequency signal output end RFOUT;

[0133] A gate matching circuit 130, a first end of the gate matching circuit 130 is connected with the gate of the field effect transistor 110, and a second end of the gate matching circuit 130 is connected with the radio frequency signal input end RFIN;

[0134] A gate bias circuit 150, the gate bias circuit 150 is connected with a third end of the gate matching circuit 130;

[0135] A source matching circuit 140, connected with the source of the field effect transistor 110;

[0136] The gate matching circuit 130 includes a low-coupling inductance pair 131, and the low-coupling inductance pair 131 is an inductance pair with opposite directions of induced magnetic fields.

[0137] In the embodiment of the present application, as shown in Figure 1 、 Figure 2 The low-coupling inductance pair 131 includes:

[0138] A third inductance L3, a second end of the third inductance L3 is connected with the gate of the field effect transistor 110;

[0139] A fourth inductance L4, a first end of the fourth inductance L4 is connected with the first end of the third inductance L3, and a second end of the fourth inductance L4 is connected with the gate bias circuit 150;

[0140] The third inductance L3 and the fourth inductance L4 have opposite directions of induced magnetic fields.

[0141] In the embodiment of the present application, the third inductance L3 and the fourth inductance L4 can be planar spiral inductances, and the spiral direction of the third inductance L3 is opposite to the spiral direction of the fourth inductance L4.

[0142] In other embodiments of the present application, the third inductance L3 and the fourth inductance L4 can also be other structures and physical layouts capable of realizing opposite directions of induced magnetic fields, which will not be described here.

[0143] When a signal is excited on an inductance, an induced magnetic field is generated, and the induced magnetic field generates an induced electric field, which generates an induced eddy current in the substrate of the chip, thereby causing energy loss; therefore, the third inductance L3 and the fourth inductance L4 also have induced magnetic fields, and the induced electric field generated by the induced magnetic fields generates an induced eddy current in the substrate of the chip, thereby causing energy loss.

[0144] In the embodiments of the present application, the directions of the induced magnetic fields of the third inductor L3 and the fourth inductor L4 are opposite, so that the directions of the induced electric fields generated by the induced magnetic fields of the third inductor L3 and the fourth inductor L4 are also opposite, the directions of the induced eddy currents generated by the two opposite induced electric fields are opposite, the opposite induced eddy currents can partially offset each other, so that the induced eddy currents are reduced, the energy loss is reduced, and thus the energy loss of the chip matching network is reduced.

[0145] Since the induced eddy currents generated by the third inductor L3 and the fourth inductor L4 on the substrate are partially offset, the physical distance between the third inductor L3 and the fourth inductor L4 can be closer, so that the size of the circuit can be reduced and the cost can be reduced.

[0146] In the embodiments of the present application, in the gate matching circuit 130 of the amplification circuit in the chip, the directions of the induced magnetic fields of the third inductor L3 and the fourth inductor L4 are opposite, so that the induced eddy currents in the substrate can be partially offset and the energy loss can be reduced. In addition, the physical distance between the third inductor L3 and the fourth inductor L4 can be closer, so that the size of the chip can be reduced and the cost can be reduced.

[0147] The specific implementation of the amplifier in the chip of the embodiments of the present application is described with reference to the above embodiments and Figures 1 to 5 The above description is not repeated here.

[0148] It can be seen that the radio frequency chip in the embodiments of the present application has low power consumption, low noise, small size, and low cost.

[0149] As Figure 6 shown, the radio frequency chip 1500 can include an amplifier 1501, wherein the amplifier 1501 can be any embodiment of the amplifier described above. One amplifier 1501 can be used alone, or multiple amplifiers 1501 can be combined for use. In an example, the radio frequency chip 1500 can include one or more amplifiers 1501.

[0150] In embodiments of an amplifier and a radio chip employing a low-coupling inductor pair, the layout of the low-coupling inductor pair greatly affects the size of the circuit. When an inductor is excited by a signal, an induced magnetic field is generated, which in turn generates an induced electric field, which in turn generates radiation, resulting in energy loss. For example, the induced electric field generates eddy current in the medium of the circuit, and electromagnetic radiation in the space. If the two inductors are placed close to each other, they will be mutually coupled, which will exacerbate such loss. Embodiments of the present application at least partially reduce the mutual coupling between the two inductors of a low-coupling inductor pair by configuring the two inductors to generate induced magnetic fields in opposite directions, so that the induced electric fields caused by the induced magnetic fields of the two inductors are also in opposite directions, thereby partially or completely canceling out, thereby reducing or eliminating the energy loss caused by the induced electric field, so that the two inductors of the low-coupling inductor pair can be placed close to each other to further reduce the chip area occupied by the amplifier.

[0151] For example, the third inductor L3 and the fourth inductor L4 of the low-coupling inductor pair 131 can be configured to be adjacent to each other and such that the induced magnetic field generated by the third inductor L3 is in the opposite direction of the induced magnetic field generated by the fourth inductor L4.

[0152] In one example, the third inductor L3 and the fourth inductor L4 are both spiral inductors, which can be arranged in the amplifier to have opposite spiral directions. For example, one inductor has a clockwise spiral direction, and the other has a counterclockwise spiral direction.

[0153] In one example, the third inductor L3 and the fourth inductor L4 are arranged in the amplifier to be mirror images of each other.

[0154] Figure 7 A schematic diagram of the layout of a low-coupling inductor pair in an amplifier according to an embodiment of the present application is shown. Figure 7 A schematic diagram of a low-coupling inductor pair of an amplifier is shown from the direction perpendicular to the wiring layer of the amplifier. In one example, the amplifier can be a radio chip.

[0155] As Figure 7As shown, the low-coupling inductor pair 131 includes two inductors, each of which is composed of a first microstrip line 1314 and a second microstrip line 1315, and the first microstrip line 1314 is wound into a first spiral pattern S1 and the second microstrip line 1315 is wound into a second spiral pattern S2. The first end 1311 and the second end 1312 of the first microstrip line 1314 are the first end and the second end of the third inductor L3, respectively. The first end 1313 and the second end 1312 of the second microstrip line 1315 are the first end and the second end of the fourth inductor L4, respectively. The second end 1312 of the first microstrip line 1314 and the second end 1312 of the second microstrip line 1315 are connected together to form a common end 1312 of the third inductor L3 and the fourth inductor L4, and the first microstrip line 1314 and the second microstrip line 1315 form a combined microstrip line. The first end 1311 of the third inductor L3, the first end 1313 of the fourth inductor L4, and the second end 1312 of the third inductor L3 and the fourth inductor L4 are connected to other parts of the amplifier through connection lines, respectively.

[0156] The combined microstrip line (the first microstrip line / second microstrip line) of the embodiments of the present application can be composed of single-layer or multi-layer metal materials. In one example, the combined microstrip line is composed of multi-layer metal materials, each of which is located in a different wiring layer of the amplifier. The multi-layer metal materials located in different wiring layers are superimposed together to form the combined microstrip line, and are connected through interlayer vias between the layers. In another example, the combined microstrip line is composed of single-layer metal materials, which can be located in the same or different wiring layers of the amplifier. For example, part of the single-layer metal materials is located in a wiring layer, and the other part is located in one or more different wiring layers. Similarly, the single-layer metal materials located in different wiring layers are connected through vias.

[0157] In Figure 7 In the example shown, both spiral patterns S1 and S2 include multiple turns, but it can be understood that they can also each include one turn, or one includes multiple turns and the other includes multiple turns.

[0158] As an example, the first microstrip line 1314 and the second microstrip line 1315 can be wound in opposite directions, so that the spiral directions of the first spiral pattern S1 and the second spiral pattern S2 are opposite, so that when the low-coupling inductor pair 131 is in operation, the directions of the induced magnetic fields caused by the currents in the microstrip lines forming the two spiral patterns S1 and S2 are opposite. For example, the spiral direction of one of S1 and S2 is counterclockwise, and the spiral direction of the other is clockwise. Here, the direction from the first end to the common end of the third inductor L3 or the fourth inductor L4 can be referred to as the spiral direction, or the direction from the common end to the first end of the third inductor L3 or the fourth inductor L4 can also be referred to as the spiral direction.

[0159] InFigure 7 In this embodiment, the first microstrip line 1314 is wound from the first end 1311 to the common end 1312 in a counterclockwise direction, forming a first spiral pattern S1, from the inside out (inner turns first, then outer turns). Similarly, the second microstrip line 1315 is wound from the first end 1313 to the common end 1312 in a clockwise direction, forming a second spiral pattern S2, from the inside out (inner turns first, then outer turns). It is understood that one can be wound from the inside out and the other from the outside in (outer turns first, then inner turns), or both can be wound from the outside in. It is understood that when winding the microstrip lines into spiral patterns S1 or S2, it is not necessary to always wind them in an inside-out or outside-in direction; the direction can be changed once or multiple times. For example, it can start from the inside out and then change to the outside in, or vice versa.

[0160] In summary, each spiral pattern in S1 and S2 can wind the microstrip line from its respective first end to the common end in one of the following ways:

[0161] From the inside out;

[0162] From the outside in;

[0163] The combination of the two above.

[0164] exist Figure 7 In one embodiment, the two spiral patterns S1 and S2 do not overlap and are adjacent but spaced a certain distance D in a direction parallel to the amplifier's wiring layer. In this embodiment, as described above, due to the low mutual coupling between the two inductors, the two spiral patterns S1 and S2 can be arranged as close as possible (but without overlapping), thereby reducing circuit size and cost. In one example, the spacing between the two spiral patterns S1 and S2 (e.g., ...) is... Figure 7 The distance D shown can be as small as approximately 3 micrometers. The "spacing between two spiral patterns" mentioned here refers to the distance between the closest microstrip lines of the two spiral patterns. For example... Figure 7 As shown, distance D is the distance between the outermost adjacent turns of S1 and S2. In practice, the minimum spacing between the two spiral patterns is determined by the chip manufacturing process.

[0165] exist Figure 7 In the example, the first microstrip line 1314 and the second microstrip line 1315 are of equal length. That is, the common terminal 1312 is located at the midpoint of the merged microstrip line. It is understood that the common terminal 1312 may not be located at the midpoint of the merged microstrip line, but at other locations, such as closer to S1 or S2.

[0166] like Figure 7As shown, in this embodiment, the spiral patterns S1 and S2 are arranged in mirror image, both are mirror image patterns, in Figure 7 which are arranged in axial symmetry. That is, the spiral patterns S1 and S2 have the same configuration, for example, have the same number of turns, microstrip line width and spacing between adjacent turns, etc., except that their patterns are opposite (the winding way is opposite), both are in a symmetric / mirror image relationship about a plane perpendicular to the wiring layer located between them. S1 and S2 can also be arranged in mirror image, for example, S1 and S2 have different configurations, for example, S1 and S2 have different numbers of turns, microstrip line widths or spacings between adjacent turns, etc., as long as the induced magnetic field directions of the spiral patterns S1 and S2 wound are opposite.

[0167] It can be understood that, Figure 7 the arrangement of the first spiral pattern S1 and the second spiral pattern S2 in

[0168] In the low-coupling inductor pair 131 according to the above-mentioned embodiments of the present application, the microstrip lines of the two inductors have a common end and are arranged as two spiral patterns with opposite spiral directions. In the working state, when an excitation signal is applied to the low-coupling inductor pair 131, the excitation signal is split at the common end to the two spirals (microstrip lines of the two inductors), so that the directions of the induced magnetic fields generated by the currents in the two spirals are opposite, thereby at least partially reducing the mutual coupling / mutual inductance between the two inductors.

[0169] In the above-mentioned inductor pair embodiments, as Figure 7 shown, the inductor pair is arranged in the integrated circuit chip to have three ends: a common end 1312, a first end 1311 as a first branch end of the inductor pair, and a second end 1313 as a second branch end of the inductor pair. As mentioned before, the three ends of the inductor pair can be connected to an excitation signal or other circuit parts through leads. For example, a radio frequency excitation signal can be accessed from the common end 1312 of the inductor pair, and the radio frequency excitation signal is split at the common end 1312 to the first microstrip line (first inductor) and the second microstrip line (second inductor). The radio frequency excitation signal is generally a periodically varying signal, for example, a sinusoidal signal. Assuming that the excitation signal accessed at the common end 1312 is i com = I com ·sinωt. The excitation signal is split at the common end 1312 into two branches, one flowing through the first spiral pattern S1 of the common end 1312 to the first branch end (first end) 1311, and the other flowing through the second spiral pattern S2 of the common end 1312 to the second branch end (second end) 1313. Assuming that the excitation signal in the first spiral pattern S1 is i1(t), and the excitation signal in the second spiral pattern S2 is i2(t), assuming that there is no reflection, then i1(t)+i2(t)=I com• sin ωt. If the common terminal is located at the midpoint of the merged microstrip line, and S1 and S2 are in an axisymmetric pattern, the excitation signals in S1 and S2 are exactly the same at any time, i.e. The excitation signals i1(t) and i2(t) in the inductive pair are periodic signals, and the current amplitudes vary periodically and non-uniformly, so the induced magnetic fields generated are also periodic and non-uniform. The varying magnetic fields in turn generate electric fields, thus producing electromagnetic waves. In the case where the excitation signals in S1 and S2 are exactly the same, since the spiral directions of S1 and S2 are opposite, the induced magnetic field generated by S1 at any time is the same in amplitude as the induced magnetic field generated by S2, but the directions are opposite, and the corresponding induced electric fields also have opposite directions and change direction periodically. Therefore, the induced magnetic fields generated by S1 and S2 will almost completely cancel each other out in many areas, and partially cancel each other out in some areas, so the corresponding electric fields or electromagnetic waves caused by the induced magnetic fields will also be partially canceled, thus reducing the loss of the inductive pair.

[0170] If the common terminal is not located at the midpoint of the merged microstrip line, or S1 and S2 are in a pattern with different configurations, it may not be possible to guarantee that the excitation signals in S1 and S2 are exactly the same, so the degree of mutual cancellation of the induced magnetic fields of S1 and S2 is weakened compared to the case where the excitation signals in S1 and S2 are exactly the same, but the induced magnetic fields generated by S1 and S2 will still partially cancel each other out at any time, weakening the electromagnetic radiation intensity, thus reducing the loss of the inductive pair to some extent.

[0171] It should be noted that, in theory, the inductive pair with three ports (a common terminal, a first branch terminal being the head end of the merged microstrip line, and a second branch terminal being the tail end of the merged microstrip line) as described above is a passive lossless network, and since passive networks have reciprocity, the loss and transmission characteristics of the inductive pair are reciprocal regardless of which port the excitation signal is input from.

[0172] The low-coupling inductive pair 131 composed of the third inductor L3 and the fourth inductor L4 in the amplifier can adopt the low-coupling inductive pair arrangement as described above. The above description of the low-coupling inductive pair applies to all low-coupling inductive pairs referred to herein, and for the sake of brevity, will not be repeated elsewhere in this document.

[0173] In the amplifier embodiments described above, the use of the aforementioned low-coupling inductor pairs provides the following advantages to the amplifier of this application: by configuring the two inductors forming the inductor pair such that their respective induced magnetic fields are in opposite directions, the inductor pair becomes a low-coupling inductor pair, which reduces the losses in the amplifier's input matching circuit. Furthermore, because this method reduces the coupling between the two inductors forming the low-coupling inductor pair and the radiation range of the inductors' induced electric and magnetic fields, the inductors and other components can be arranged closer together, further reducing the circuit size.

[0174] This application also provides an electronic device, which includes the radio frequency chip described above. The radio frequency chip, including the amplifier embodiment of this application, can be used in the electronic device.

[0175] like Figure 8 As shown, the electronic device 1600 includes, as Figure 6 The radio frequency chip 1500 is shown. The electronic device 1600 can be a wireless device or any other electronic device that can use an amplifier.

[0176] Wireless devices can be user equipment (UE), mobile stations, terminals, access terminals, subscriber units, base stations, etc. Wireless devices can also be cellular phones, smartphones, tablets, wireless modems, personal digital assistants (PDAs), handheld devices, laptops, smartbooks, netbooks, cordless phones, wireless local loop (WLL) stations, Bluetooth devices, etc. Wireless devices can communicate with wireless communication systems or receive signals from broadcast stations, signals from one or more satellites, etc. Wireless devices can support one or more wireless communication technologies (e.g., 5G, LTE, CDMA2000, WCDMA, TD-SCDMA, GSM, 802.11, millimeter wave, etc.).

[0177] The embodiment of the present application provides an amplifier, a radio frequency chip and an electronic device, the amplifier comprises: a field effect tube; a drain matching circuit, a first end of the drain matching circuit is connected with a drain of the field effect tube, and a second end of the drain matching circuit is connected with a radio frequency signal output end; a gate matching circuit, a first end of the gate matching circuit is connected with a gate of the field effect tube, and a second end of the gate matching circuit is connected with a radio frequency signal input end; a gate bias circuit, the gate bias circuit is connected with a third end of the gate matching circuit; a source matching circuit, connected with a source of the field effect tube; wherein the gate matching circuit comprises a low-coupling inductor pair, and the coupling inductor pair is an inductor pair with opposite induced magnetic field directions. In the embodiment of the present application, the low-coupling inductor pair is an inductor pair with opposite induced magnetic field directions, and the induced electric field directions generated by the inductor pair with opposite induced magnetic field directions are also opposite. The induced electric fields with opposite directions can be partially offset, and the offset induced electric field does not generate radiation, thereby reducing the energy loss of the circuit. In addition, due to the partial offset of the induced electric field, the physical distance of the inductors in the low-coupling inductor pair can be closer, thereby reducing the size of the circuit and reducing the cost. The radio frequency chip provided by the present application comprises a substrate and an amplifier as described above on the substrate. The radio frequency chip in the embodiment of the present application has low power consumption, low noise, small size and low cost.

[0178] The amplifier in the embodiment of the present application can be independently used, or can be used in multiple stages in cascade, or can be applied to an integrated system, or can be applied to a multifunctional chip. The radio frequency chip in the embodiment of the present application can also comprise an independently used amplifier, or can comprise a plurality of amplifiers used in cascade, or can comprise a plurality of independently used amplifiers.

[0179] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional units and modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. In addition, the specific names of the functional units and modules are only for convenient distinction, and do not limit the protection scope of the present application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the context, which will not be repeated here.

[0180] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in detail in a certain embodiment can be referred to the relevant description in other embodiments.

[0181] The units or modules described as separate components may or may not be physically separate, and the components displayed as units or modules may or may not be physical units, and may be located in one place, or distributed to multiple functional units. Part or all of the units or modules can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0182] In addition, each functional unit or module in each embodiment of the present application can be integrated in one chip unit, or each unit or module can exist physically alone, or two or more units or modules can be integrated in one unit.

[0183] It should be noted that, in this paper, relationship terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or equipment. Without more limitations, the element defined by the sentence "including a…" does not exclude the presence of other identical elements in the process, method, article or equipment including the element.

[0184] The above is only a specific embodiment of the present application, so that those skilled in the art can understand or implement the present application. Various modifications of these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features applied herein.

Claims

1. An amplifier characterized by, The amplifier comprises: a field effect tube comprising a drain, a gate and a source, the field effect tube being used for signal amplification; a drain matching circuit, a first end of the drain matching circuit being connected with the drain of the field effect tube, and a second end of the drain matching circuit being connected with a radio frequency signal output end; a gate matching circuit, a first end of the gate matching circuit being connected with the gate of the field effect tube, and a second end of the gate matching circuit being connected with a radio frequency signal input end; a gate bias circuit, the gate bias circuit being connected with a third end of the gate matching circuit; a source matching circuit, the source matching circuit being connected with the source of the field effect tube; wherein the gate matching circuit comprises a low-coupling inductance pair, the low-coupling inductance pair being a pair of inductors with opposite directions of induced magnetic field; the low-coupling inductance pair comprises: a third inductor, a second end of the third inductor being connected with the gate of the field effect tube; a fourth inductor, a first end of the fourth inductor being connected with a first end of the third inductor, and a second end of the fourth inductor being connected with the gate bias circuit; wherein the third inductor and the fourth inductor have opposite directions of induced magnetic field.

2. The amplifier of claim 1, wherein The gate matching circuit further comprises: a third capacitor, a first end of the third capacitor being connected with the radio frequency signal input end, and a second end of the third capacitor being connected with a first end of the third inductor.

3. The amplifier of claim 2, wherein, The gate bias circuit comprises: a fourth capacitor, a first end of the fourth capacitor being grounded, and a second end of the fourth capacitor being connected with a gate bias power supply end.

4. The amplifier of claim 3, wherein, The source matching circuit comprises: a fifth inductive unit, a first end of the fifth inductive unit being connected with the source of the field effect tube, and a second end of the fifth inductive unit being grounded; wherein the fifth inductive unit is one of an inductor, a microstrip line or a combination of an inductor and a microstrip line.

5. The amplifier of claim 3, wherein, The source matching circuit is grounded.

6. The amplifier of claim 2, wherein, The gate bias circuit is grounded.

7. The amplifier of claim 6, wherein, The source matching circuit comprises: a sixth inductive unit, a first end of the sixth inductive unit being connected with the source of the field effect tube; a fifth capacitor, a first end of the fifth capacitor being connected with a second end of the sixth inductive unit, and a second end of the fifth capacitor being grounded; a first resistor, a first end of the first resistor being connected with the second end of the sixth inductive unit, and a second end of the first resistor being grounded; wherein the sixth inductive unit is one of an inductor, a microstrip line or a combination of an inductor and a microstrip line.

8. The amplifier of claim 3, wherein, The source matching circuit comprises: a seventh inductive unit, a first end of the seventh inductive unit being connected with the source of the field effect tube; a sixth capacitor, a first end of the sixth capacitor being connected with a second end of the seventh inductive unit, and a second end of the sixth capacitor being connected with the source bias power supply end, and a second end of the sixth capacitor being grounded; wherein the seventh inductive unit is one of an inductor, a microstrip line or a combination of an inductor and a microstrip line.

9. The amplifier of claim 1, wherein, The drain matching circuit comprises: a first inductive unit, a first end of the first inductive unit being connected with the drain of the field effect tube; a second inductive unit, a second end of the second inductive unit being connected with a second end of the first inductive unit, and a second end of the second inductive unit being connected with a drain bias power supply end; a first capacitor, a first end of the first capacitor being connected to a second end of the first inductive unit, a second end of the first capacitor being connected to the radio frequency signal output end; a second capacitor, a first end of the second capacitor being connected to a second end of the second inductive unit, a second end of the second capacitor being connected to ground; wherein the first inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line, and / or the second inductive unit is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

10. The amplifier of claim 1, wherein, the third inductor and the fourth inductor are both spiral inductors and are arranged in the amplifier with opposite spiral directions.

11. The amplifier of claim 1, wherein, the third inductor and the fourth inductor are arranged in the amplifier as mirror images of each other.

12. The amplifier of claim 1, wherein, the third inductor is composed of a first microstrip line wound in a first spiral pattern, and the fourth inductor is composed of a second microstrip line wound in a second spiral pattern, wherein a first end and a second end of the first microstrip line are respectively a first end and a second end of the third inductor, a first end and a second end of the second microstrip line are respectively a first end and a second end of the fourth inductor, and the second end of the first microstrip line and the second end of the second microstrip line are connected together so that the first microstrip line and the second microstrip line form a combined microstrip line.

13. The amplifier of claim 12, wherein, the first and second spiral patterns do not overlap and are adjacent but at a distance in a direction parallel to the wiring layers of the amplifier.

14. The amplifier of claim 12, wherein, the combined microstrip line is composed of multiple layers of metal material, wherein each layer of metal material is located in a different wiring layer of the amplifier.

15. The amplifier of claim 12, wherein, the combined microstrip line is composed of a single layer of metal material, wherein the single layer of metal material is located in the same or different wiring layers of the amplifier.

16. A radio frequency chip, comprising: the radio frequency chip comprises a substrate, and the amplifier as claimed in any one of claims 1 to 15 on the substrate.

17. An electronic device, comprising: a radio frequency chip as claimed in claim 16.

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