Graphical pitch inspection method for quantum chip layout, storage medium and electronic device

Abstract

The application discloses a kind of quantum chip layout graphic pitch inspection method, storage medium and electronic equipment.The method comprises: obtaining the edge line of all graphics in quantum chip layout;Find at least part in the distance range of two edge lines as adjacent edge line pair;Filter out the first edge line relative to the preset side of its belonging graphics and the preset side of the second edge line relative to the graphics of its belonging graphics as the opposite adjacent line segment pair of target line segment pair;Error mark is carried out in the overlapping region of the two edge lines of target line segment pair respectively in the preset side.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip layout design, in particular to a quantum chip layout graphic spacing checking method, a storage medium and an electronic device. BACKGROUND

[0002] A quantum chip is a chip stacked by many superconducting layers and dielectric layers according to certain design rules. For example, a Josephson junction, which is a key device of a quantum chip, is composed of two superconducting layers with a dielectric layer sandwiched therebetween. Therefore, many graphics representing devices need to be drawn in a quantum chip layout. After the quantum chip layout is designed, DRC (Design rules checking) needs to be performed, and spacing checking is a key work of DRC.

[0003] In the existing quantum chip design rule checking process, designers mainly adopt manual checking, and then mark error positions one by one. However, there are thousands of graphics in a quantum chip, and manual checking is slow in efficiency, low in accuracy, and high in error rate, which cannot meet the design needs. SUMMARY

[0004] The purpose of the present application is to provide a quantum chip layout graphic spacing checking method, a storage medium and an electronic device, so as to solve the problem that manual checking cannot meet the design needs in the prior art, and to automatically complete spacing checking, improve checking efficiency and accuracy.

[0005] To solve the above technical problems, the present application provides a quantum chip layout graphic spacing checking method, comprising:

[0006] obtaining edge lines of all graphics in a quantum chip layout;

[0007] finding two edge lines at least partially within a preset distance range as adjacent edge line pairs;

[0008] screening out a target edge line pair of adjacent edge line pairs, in which a preset side of a first edge line relative to a graphic to which the first edge line belongs and a preset side of a second edge line relative to a graphic to which the second edge line belongs are opposite to each other;

[0009] error marking an overlapping area of the preset side of each edge line of the target edge line pair.

[0010] Preferably, the finding of two edge lines at least partially within a preset distance range as adjacent edge line pairs comprises:

[0011] selecting a path point including a starting point and an ending point on each edge line as a detection point;

[0012] finding two detection points within a preset distance range and belonging to different edge lines as adjacent point pairs;

[0013] The edge lines to which the two detection points in each of the adjacent point pairs belong are taken as adjacent edge line pairs.

[0014] Preferably, the path points on each edge line are selected according to a preset step length starting from a starting point.

[0015] Preferably, the two detection points within a preset distance range and belonging to different edge lines are taken as adjacent point pairs, including:

[0016] A KD tree is constructed according to the coordinates of all the detection points.

[0017] The two detection points within a preset distance range and belonging to different edge lines are found based on the KD tree.

[0018] Preferably, the preset side of the first edge line is a side of the first edge line away from the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line away from the figure to which the second edge line belongs.

[0019] Or the preset side of the first edge line is a side of the first edge line toward the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line toward the figure to which the second edge line belongs.

[0020] Or the preset side of the first edge line is a side of the first edge line away from the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line toward the figure to which the second edge line belongs.

[0021] Preferably, the error marking of the overlapping region on the preset side of each of the two edge lines of the target edge line pair includes:

[0022] A first Euclidean region is constructed on the preset side of the first edge line of the target edge line pair according to the preset distance, and a second Euclidean region is constructed on the preset side of the second edge line according to the preset distance.

[0023] The coincident intersection of the first edge line in the second Euclidean region is determined, and the coincident intersection of the second edge line in the first Euclidean region is determined.

[0024] An enclosing region enclosing the coincident intersections of the two edge lines is generated, and error marking is performed.

[0025] Preferably, the step of constructing a first Euclidean region on the preset side of the first edge line of the target edge line pair according to the preset distance specifically includes:

[0026] constructing a first mirror line with a preset distance from the first side of the first side line of the target side line pair and constructing a first circular arc line with a radius of the preset distance connecting the extension line of the first side line and the first mirror line respectively, to obtain a first Euclidean region;

[0027] The step of constructing a second Euclidean region with a preset distance from the second side of the second side line is specifically:

[0028] constructing a second mirror line with a preset distance from the second side of the second side line and constructing a second circular arc line with a radius of the preset distance connecting the extension line of the second side line and the second mirror line respectively, to obtain a second Euclidean region.

[0029] Preferably, the error marking of the overlapping region on the preset side of each of the two side lines of the target side line pair comprises:

[0030] constructing a first projection region with a preset distance from the first side of the first side line of the target side line pair and constructing a second projection region with a preset distance from the second side of the second side line;

[0031] determining the coincident intersection point of the first side line in the second projection region and determining the coincident intersection point of the second side line in the first projection region;

[0032] generating an enclosing region enclosing the coincident intersection points of the two side lines and performing error marking.

[0033] Preferably, the step of constructing a first projection region with a preset distance from the first side of the first side line of the target side line pair comprises:

[0034] constructing a first mirror line with a preset distance from the first side of the first side line of the target side line pair and connecting the first mirror line and the first side line to obtain a first projection region;

[0035] The step of constructing a second projection region with a preset distance from the second side of the second side line comprises:

[0036] constructing a second mirror line with a preset distance from the second side of the second side line and connecting the second mirror line and the second side line to obtain a second projection region.

[0037] Preferably, before the first edge line and the second edge line are selected as the target edge line pair, the method further comprises:

[0038] removing the adjacent edge line pair formed by the two edge lines intersecting each other.

[0039] Preferably, before the first edge line and the second edge line are selected as the target edge line pair, the method further comprises:

[0040] removing the adjacent edge line pair formed by the two edge lines intersecting each other.

[0041] Preferably, before the first edge line and the second edge line are selected as the target edge line pair, the method further comprises:

[0042] removing the adjacent edge line pair formed by the two edge lines belonging to the same graph.

[0043] To solve the above technical problems, the application further provides a storage medium, wherein the storage medium stores a computer program, and the computer program is configured to execute the graph spacing checking method of the quantum chip layout when running.

[0044] To solve the above technical problems, the application further provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to execute the graph spacing checking method of the quantum chip layout when running the computer program.

[0045] Different from the prior art, the graph spacing checking method of the quantum chip layout provided by the application can obtain all the edge lines of the graphs in the quantum chip layout, find two edge lines meeting the conditions as an adjacent edge line pair, then select the first edge line and the second edge line as the target edge line pair, and finally mark the overlapping area on the preset side of each of the two edge lines of the target edge line pair, so that the spacing checking can be automatically completed, and the checking efficiency and accuracy are improved.

[0046] The storage medium and the electronic device provided by the present application and the pattern spacing checking method of the quantum chip layout belong to the same inventive concept, and therefore have the same beneficial effects, which will not be described herein again. BRIEF DESCRIPTION OF DRAWINGS

[0047] Figure 1 A flowchart of the pattern spacing checking method of the quantum chip layout of the embodiment of the present application.

[0048] Figure 2 A schematic diagram of two patterns of the quantum chip layout in the embodiment of the present application.

[0049] Figure 3 A schematic diagram of Figure 1 A flowchart of step S2 in the pattern spacing checking method shown in FIG. 1.

[0050] Figure 4 A schematic diagram of the detection points selected on the two edge lines.

[0051] Figure 5 A schematic diagram of Figure 1 A flowchart of step S5 in the pattern spacing checking method shown in FIG. 1.

[0052] Figure 6 A schematic diagram of the Euclidean regions respectively constructed based on the two edge lines.

[0053] Figure 7 A schematic diagram of the enclosing regions generated in the Euclidean regions of the two edge lines.

[0054] Figure 8 A schematic diagram of the enclosing regions in the Euclidean regions marked as errors.

[0055] Figure 9 A flowchart of another step S5 in the pattern spacing checking method shown in FIG. 1. Figure 1 A flowchart of another step S5 in the pattern spacing checking method shown in FIG. 1.

[0056] Figure 10 A schematic diagram of the projection regions respectively constructed based on the two edge lines.

[0057] Figure 11 A schematic diagram of the enclosing regions generated in the projection regions of the two edge lines.

[0058] Figure 12 A schematic diagram of the enclosing regions in the projection regions marked as errors. DETAILED DESCRIPTION

[0059] The specific embodiments of the present application will be described below in greater detail with reference to the accompanying drawings. The advantages and features of the present application will become more apparent from the following description and claims. It should be noted that the drawings are in extremely simplified form and are not drawn to precise scale, and are merely used to facilitate, clarify and aid in the understanding of the embodiments of the present application.

[0060] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0061] In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features referred to. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise explicitly specified.

[0062] Please refer to Figure 1 The embodiment of the present application provides a graphic spacing checking method of a quantum chip layout. The graphic spacing checking method comprises the following steps:

[0063] S1: Obtain the edge lines of all graphics in the quantum chip layout.

[0064] Among them, the graphics of the quantum chip layout are polygons in a two-dimensional plane, each polygon includes at least three edge lines, and each edge line can be obtained by identifying the graphics.

[0065] S2: Find two edge lines at least partially within a preset distance range as adjacent edge line pairs.

[0066] Among them, the distance between the two edge lines is at least partially within the preset distance range, for example, the shortest distance from one end point of one edge line to another edge line is less than the preset distance, so that the edge line is at least partially within the preset distance range of the other edge line. The positional relationship of the two edge lines can be any relationship, such as parallel or not parallel. As shown in Figure 2 The distance between at least one point of edge line A1 of graphic A and at least one point of edge line B1 of graphic B is within the preset distance range, so edge line A1 and edge line B1 are taken as adjacent edge line pairs.

[0067] S3: screen out the target edge line pair from the adjacent edge line pairs whose respective preset sides of the two edge lines are opposite to each other.

[0068] The preset side of the first edge line relative to the graph to which the first edge line belongs includes two cases: one is that the first edge line is directed to the side of the graph, i.e., the inside of the graph, and the other is that the first edge line is directed away from the side of the graph, i.e., the outside of the graph. The two edge lines are opposite to each other relative to the preset sides of the graphs to which the two edge lines belong, which means that there is an overlapping area between the preset side of the first edge line relative to the graph to which the first edge line belongs and the preset side of the second edge line relative to the graph to which the second edge line belongs.

[0069] In the embodiment, the preset side of the first edge line is the side of the first edge line away from the graph to which the first edge line belongs, the preset side of the second edge line is the side of the second edge line away from the graph to which the second edge line belongs, or the preset side of the first edge line is the side of the first edge line directed to the graph to which the first edge line belongs, the preset side of the second edge line is the side of the second edge line directed to the graph to which the second edge line belongs, or the preset side of the first edge line is the side of the first edge line away from the graph to which the first edge line belongs, and the preset side of the second edge line is the side of the second edge line directed to the graph to which the second edge line belongs. As shown in FIG. 1, the preset side of the edge line A1 of the graph A is the side away from the graph A, and the preset side of the edge line B1 of the graph B is the side away from the graph B. The two sides are opposite to each other, and thus the edge line A1 and the edge line B1 are the target edge line pair. Figure 2

[0070] S4: error mark the overlapping area of the preset sides of the two edge lines of the target edge line pair.

[0071] Since the preset sides of the two edge lines are opposite to each other, the preset sides of the two edge lines at least partially overlap, and the error mark is performed on the overlapping area, which can prompt that the distance between the graphs to which the two edge lines belong does not meet the requirement. The marking manner can be any manner, for example, a certain symbol mark or a certain graph mark.

[0072] In some embodiments of the present application, referring to FIG. 2, the step of screening out the two edge lines at least partially within the preset distance range as the adjacent edge line pair, i.e., the step S2, includes: Figure 3

[0073] S21: select a path point including a starting point and an ending point on each edge line as a detection point.

[0074] ​​In this context, path points are points on the edge lines. The start and end points of an edge line are also considered edge lines; therefore, the start and end points can also serve as path points. The start and end points of an edge line can be specified by the user or determined by the drawing order of the path points. When drawing the layout, two endpoints are usually selected to generate an edge line between them, with the first selected endpoint becoming the default start point.

[0075] In this embodiment, the path points on each edge are selected starting from the starting point according to a preset step size. For example... Figure 4 As shown, the detection points on edge A1 are a1, a2, a3, a4, and a5 starting from the starting point, with a5 being the endpoint. The detection points on edge B1 are b1, b2, b3, and b4 starting from the starting point, with b4 being the endpoint. The preset step size is step. It should be noted that when the distance between the endpoint and the preceding detection point is less than the preset step size step, the endpoint is directly selected as the detection point.

[0076] S22: Find two detection points that are within a preset distance range and belong to different edges as neighboring point pairs.

[0077] Among them, such as Figure 4 As shown, the distance between detection point a1 and detection point b4 is less than the preset distance L. Therefore, they are within the preset distance range, and since detection points a1 and b4 belong to different edges, they are considered as a pair of neighboring points.

[0078] In this embodiment, finding two detection points that are within a preset distance range and belong to different edges as neighboring point pairs includes: constructing a KD tree based on the coordinates of all detection points; and finding two detection points that are within a preset distance range and belong to different edges as neighboring point pairs based on the KD tree.

[0079] A KD-tree (K-dimensional tree) is a high-dimensional indexed tree data structure frequently used for nearest neighbor searches in large-scale high-dimensional data spaces. A KD-tree allows you to find neighboring checkpoints for each checkpoint. For a checkpoint, a search area is defined with that checkpoint as its center. If other checkpoints exist within the search area besides the checkpoint itself, these are considered neighboring checkpoints of the checkpoint at the center. If the checkpoint at the center and its neighboring checkpoints are on different boundaries, they are considered a nearest neighbor pair.

[0080] S23: Take the edges of the two detection points in each pair of neighboring points as neighboring edge pairs.

[0081] Among them, such as Figure 4 As shown, taking the neighboring point pair a1 and b4 as an example, detection point a1 and detection point b4 belong to edge line A1 and edge line B1 respectively. Therefore, edge line A1 and edge line B1 are regarded as neighboring edge line pairs.

[0082] In some embodiments of the present application, the error marking is performed by forming a specific pattern in the overlapping region on the preset side of each of the two edges of the target edge pair.

[0083] In an actual application, the specific pattern can be a Euclidean region. Specifically, as shown in Figure 5 the step of marking the overlapping region on the preset side of each of the two edges of the target edge pair, i.e., step S5, includes:

[0084] S51A: constructing a first Euclidean region on the preset side of the first edge of the target edge pair with the first edge as the base and a second Euclidean region on the preset side of the second edge with the second edge as the base according to a preset distance.

[0085] The Euclidean region refers to that there is a peripheral region outside a given pattern, the Euclidean distance from any point on the given pattern to the peripheral region is a constant, and the region between the given pattern and the peripheral region is the Euclidean region. The given pattern can be a polygon or a line.

[0086] As shown in Figure 6 the first Euclidean region constructed with the first edge A1 as the base is A11, which includes a straight line parallel to the first edge A1 and a circular arc line connected to the first edge A1, and the radius of the circular arc line is the preset distance L, that is, the distance from any point on the circular arc line to the end point of the first edge A1 is the preset distance L, and the perpendicular distance from any point on the straight line to the first edge A1 is also the preset distance L.

[0087] In this embodiment, the step of constructing the first Euclidean region on the preset side of the first edge of the target edge pair with the first edge as the base according to the preset distance specifically includes: constructing a first mirror line with a preset distance on the preset side of the first edge of the target edge pair and constructing a first circular arc line with a radius of the preset distance connecting the extension line of the first edge and the first mirror line, respectively, to obtain the first Euclidean region. The first mirror line is a straight line parallel to the first edge A1, and the first circular arc line has two parts, which are two circular arc lines with the end points of the first edge A1 as the centers, and the extension line of the first edge A1 is a line segment connecting the two end points of the first edge A1 and the two parts of the first circular arc line.

[0088] Similarly, the second Euclidean region constructed with the second edge line B1 as the base is B11, the first Euclidean region includes a straight line parallel to the second edge line B1 and a circular arc line connected with the second edge line B1, the radius of the circular arc line is the preset distance L, that is, the distance from any point on the circular arc line to the end point of the second edge line B1 is the preset distance L, and the vertical distance from any point on the straight line to the second edge line B1 is also the preset distance L.

[0089] In the embodiment, the step of constructing the second Euclidean region on the preset side of the second edge line with the second edge line as the base and at the preset distance is specifically: constructing a second mirror line with a preset distance on the preset side of the second edge line and constructing a second circular arc line with a radius of a preset distance and connecting the extension line of the second edge line and the second mirror line respectively, to obtain the second Euclidean region. The second mirror line is a straight line parallel to the second edge line B1, and the second circular arc line has two ends, that is, the two first circular arc lines are circular arc lines with the two end points of the second edge line B1 as the centers, and the extension line of the second edge line B1 is a line segment connecting the two ends of the second edge line B1 and the two second circular arc lines.

[0090] S52A: Determine the coincident intersection point of the first edge line in the second Euclidean region, and determine the coincident intersection point of the second edge line in the first Euclidean region.

[0091] As shown in Figure 6 , the coincident intersection point of the first edge line A1 in the second Euclidean region B11 is the path point included by the line segment A0 of the first edge line A1 in the second Euclidean region B11. The coincident intersection point of the second edge line B1 in the first Euclidean region A11 is the path point included by the line segment B0 of the second edge line B1 in the first Euclidean region A11.

[0092] S53A: Generate a surrounding region surrounding the coincident intersection points of the two edge lines, and mark an error.

[0093] As shown in Figure 7 , the surrounding region surrounding the coincident intersection points of the two edge lines is AB, that is, the surrounding region AB circumscribes the line segment A0 and the line segment B0. In the embodiment, the coincident intersection point of the first edge line is the two end points of the line segment of the first edge line in the second Euclidean region, the coincident intersection point of the second edge line is the two end points of the line segment of the second edge line in the first Euclidean region, and the surrounding region is the convex hull of the four end points of the two line segments, that is, the smallest polygon surrounding the four end points, and the convex hull can be calculated and generated by a convex hull algorithm.

[0094] The surrounding region can be marked with an error by shading display and / or highlighting display. As shown in Figure 8 , the surrounding region AB is displayed with grid filling.

[0095] In a practical application, a specific graphic can serve as a projection area. Specifically, for example... Figure 9 As shown, step S5, which involves marking errors in the overlapping area on a predetermined side of each of the two edge lines of the target edge pair, includes:

[0096] S51B: Construct a first projection area with a preset distance and a width of a preset distance on a preset side of the first edge line as the base, and construct a second projection area with a preset distance and a width of a preset distance on a preset side of the second edge line as the base.

[0097] The projection region refers to the area between the two endpoints of a line segment and the line drawn perpendicular to each other in the same direction on a plane. The line connecting the two feet of the perpendiculars is the projection line of the line segment on the plane, and the area between the projection line and the line segment is the projection region.

[0098] like Figure 10 As shown, the first projection area constructed with the first edge line A1 as the base is A11. The first projection area includes a straight line parallel to the first edge line A1 and a perpendicular line connecting the straight line and the first edge line A1. The perpendicular distance from any point on the straight line to the first edge line A1 is a preset distance L, and the length of the perpendicular line is also a preset distance L.

[0099] In this embodiment, the step of constructing a first projection area with a preset width on a preset side of the first edge line of the target edge line pair as the base is specifically as follows: constructing a first mirror line with a preset spacing on a preset side of the first edge line of the target edge line pair, and connecting the first mirror line and the first edge line to obtain the first projection area. The first mirror line is a straight line parallel to the first edge line A1, and the first mirror line and the first edge line A1 are connected by two perpendicular lines.

[0100] Similarly, the second projection region constructed with the second edge line B1 as the base is B11. The second projection region includes a straight line parallel to the second edge line B1 and a perpendicular line connecting the straight line and the second edge line B1. The perpendicular distance from any point on the straight line to the second edge line B1 is a preset distance L, and the length of the perpendicular line is also a preset distance L.

[0101] In this embodiment, the step of constructing a first projection area with a preset width on a preset side of the first edge line, with the second edge line as the base, specifically involves: constructing a second mirror line with a preset spacing on a preset side of the second edge line, and connecting the second mirror line and the second edge line to obtain the second projection area. The second mirror line is a straight line parallel to the second edge line B1, and the connection between the second mirror line and the second edge line B1 is two perpendicular lines.

[0102] S52B: determining the coincident intersection of the first edge line in the second projection region, and determining the coincident intersection of the second edge line in the first projection region.

[0103] As shown in FIG. 6, the coincident intersection of the first edge line A1 in the second projection region B11 is the path point included in the line segment A0 of the first edge line A1 in the second projection region B11. The coincident intersection of the second edge line B1 in the first projection region is the path point included in the line segment B0 of the second edge line B1 in the first projection region. Figure 10

[0104] S53B: generating an enclosing region enclosing the coincident intersections of the two edge lines, and marking an error.

[0105] As shown in FIG. 6, the enclosing region enclosing the coincident intersections of the two edge lines is AB, that is, the enclosing region AB circumscribes the line segment A0 and the line segment B0. In the embodiment, the coincident intersection of the first edge line is the two end points of the line segment of the first edge line in the second projection region, the coincident intersection of the second edge line is the two end points of the line segment of the second edge line in the first projection region, and the enclosing region is the convex hull of the four end points of the two line segments, that is, the smallest polygon enclosing the four end points, which can be calculated by a convex hull algorithm. Figure 11 The enclosing region can be marked with an error by shading and / or highlighting. As shown in FIG. 6, the enclosing region AB is displayed with a grid fill.

[0106] Figure 12

[0107] As a preferred embodiment, in the embodiment, before screening the target edge line pair in which the relative preset side of the first edge line to the figure to which the first edge line belongs and the relative preset side of the second edge line to the figure to which the second edge line belongs are opposite adjacent edge line pairs, after finding the two edge lines at least partially within the preset distance range as the adjacent edge line pair, the method further includes: removing the adjacent edge line pair formed by the two edge lines with an included angle within the preset angle interval. In some DRC requirements, the adjacent edge line pair formed by the two edge lines with an included angle within the preset angle interval does not need to be subjected to DRC. For example, the preset angle interval is 35-45 degrees, and if the included angle of the two edge lines of the adjacent edge line pair is 40 degrees, the adjacent edge line pair is removed.

[0108] ​​​As a preferred implementation, before the first edge line opposite to a preset side of the graph to which the first edge line belongs and the second edge line opposite to a preset side of the graph to which the second edge line belongs are screened out as the target edge line pair, after the two edge lines at least partially within the preset distance range are searched as the adjacent edge line pair, the method further includes: removing the adjacent edge line pair of the two edge lines intersecting with each other. The two edge lines intersect with each other at an intersection point, and whether the two edge lines intersect with each other can be determined by judging whether the two edge lines have the intersection point.

[0109] As a preferred implementation, before the first edge line opposite to a preset side of the graph to which the first edge line belongs and the second edge line opposite to a preset side of the graph to which the second edge line belongs are screened out as the target edge line pair, after the two edge lines at least partially within the preset distance range are searched as the adjacent edge line pair, the method further includes: removing the adjacent edge line pair of the two edge lines belonging to the same graph. Since the adjacent edge line pair composed of the edge lines on the same graph is easy to cause DRC misjudgment, removing such adjacent edge line pair can minimize the misjudgment.

[0110] In the foregoing manner, the method for checking the graph spacing of the quantum chip layout can automatically complete the spacing check and improve the check efficiency and accuracy by acquiring the edge lines of all the graphs in the quantum chip layout, searching for two edge lines meeting the condition as the adjacent edge line pair, screening out the first edge line opposite to a preset side of the graph to which the first edge line belongs and the second edge line opposite to a preset side of the graph to which the second edge line belongs as the target edge line pair, and finally marking the overlapping area on the preset side of each of the two edge lines of the target edge line pair.

[0111] The application further provides a storage medium having a computer program stored therein, and the computer program is configured to execute the method for checking the graph spacing of the quantum chip layout when running.

[0112] Specifically, in the embodiment, the storage medium can include but is not limited to a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0113] The application further provides an electronic device including a memory and a processor, the memory having a computer program stored therein, and the processor is configured to execute the computer program to execute the method for checking the graph spacing of the quantum chip layout.

[0114] Specifically, the memory and the processor can be connected through a data bus. In addition, the electronic device can further include a transmission device connected with the processor and an input / output device connected with the processor.

[0115] In the description of the present specification, the description referring to the terms "one embodiment", "some embodiments", "an example", or "a specific example" or the like means that the specific feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In the present specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Also, the specific feature, structure, material or characteristic described can be combined in any appropriate manner in any one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in the present specification.

[0116] The above merely describes the preferred embodiments of the present application and does not limit the present application in any way. Any person skilled in the art can make any form of equivalent replacement or modification or the like to the technical solutions and technical contents disclosed in the present application without departing from the scope of the technical solutions of the present application, which still falls within the protection scope of the present application.

Claims

1. A method for checking the pattern spacing of a quantum chip layout, characterized in that, include: Obtain the edges of all shapes in the quantum chip layout; Find two edges that are at least partially within a preset distance range as adjacent edge pairs; Select the adjacent edge pairs that are opposite to each other on the preset side of the first edge relative to its own graphic and the preset side of the second edge relative to its own graphic as target edge pairs; Errors are marked in the overlapping area on a predetermined side of each of the two sides of the target sideline pair; Among them, the two edge lines are opposite to the preset side of their respective graphics, meaning that the first edge line and the second edge line have an overlapping area relative to the preset side of their respective graphics.

2. The graphic spacing inspection method according to claim 1, characterized in that, The process of finding two edges that are at least partially within a preset distance range as adjacent edge pairs includes: Select path points, including the start and end points, as detection points on each sideline; Find two detection points that are within a preset distance range and belong to different edges as neighboring point pairs; The edges to which the two detection points belong in each pair of neighboring points are considered as neighboring edge pairs.

3. The method according to claim 2, characterized in that, The path points on each edge are selected from the starting point according to a preset step size.

4. The method according to claim 2, characterized in that, The process of finding two detection points within a preset distance range and belonging to different edges as neighboring point pairs includes: Construct a KD tree based on the coordinates of all the detection points; Based on the KD tree, two detection points that are within a preset distance range and belong to different edges are identified as neighboring point pairs.

5. The method according to claim 1, characterized in that, The predetermined side of the first edge line is the side of the first edge line that is far away from its corresponding graphic; the predetermined side of the second edge line is the side of the second edge line that is far away from its corresponding graphic. Alternatively, the preset side of the first edge line is the side of the first edge line facing its corresponding graphic, and the preset side of the second edge line is the side of the second edge line facing its corresponding graphic. Alternatively, the preset side of the first edge line is the side of the first edge line that is away from its corresponding graphic, and the preset side of the second edge line is the side of the second edge line that faces its corresponding graphic.

6. The method according to claim 5, characterized in that, The step of marking errors in the overlapping area on a predetermined side of each of the two sides of the target edge pair includes: A first Euclidean region is constructed on a predetermined side of the first edge of the target edge pair at a predetermined distance, with the first edge as the base; and a second Euclidean region is constructed on a predetermined side of the second edge as the base at a predetermined distance. Determine the point where the first edge line coincides within the second Euclidean region, and determine the point where the second edge line coincides within the first Euclidean region; Generate a bounding region that surrounds the coincident intersection of the two edges, and mark any errors. Wherein, the coincident intersection point of the first edge line within the second Euclidean region is the path point included by the line segment of the first edge line within the second Euclidean region, and the coincident intersection point of the second edge line within the first Euclidean region is the path point included by the line segment of the second edge line within the first Euclidean region, and the enclosing region is a convex hull.

7. The method according to claim 6, characterized in that, The specific steps of constructing a first Euclidean region on a predetermined side of the first edge line of the target edge pair at a predetermined distance, with the first edge line as the base, are as follows: A first mirror line with a distance of the preset distance is constructed on a preset side of the first edge line of the target edge line pair, and a first arc line with a radius of the preset distance is constructed connecting the extension line of the first edge line and the first mirror line respectively. This results in a first Euclidean region. The specific steps of constructing the second Euclidean region on a predetermined side of the second edge line at the predetermined distance, with the second edge line as the base, are as follows: A second Euclidean region is obtained by constructing a second mirror line at a predetermined distance from the second edge line on a predetermined side and constructing a second arc line with a radius equal to the predetermined distance, which connects the extension line of the second edge line and the second mirror line respectively.

8. The method according to claim 5, characterized in that, The step of marking errors in the overlapping area on a predetermined side of each of the two sides of the target edge pair includes: A first projection area with a width of the preset distance is constructed on a preset side of the first edge line of the target edge line pair as the base, and a second projection area with a width of the preset distance is constructed on a preset side of the second edge line as the base; Determine the point of intersection of the first edge line within the second projection area, and determine the point of intersection of the second edge line within the first projection area; Generate a bounding region that surrounds the coincident intersection of the two edges, and mark any errors. Wherein, the coincident intersection point of the first edge line within the second projection area is the path point included by the line segment of the first edge line within the second projection area, and the coincident intersection point of the second edge line within the first projection area is the path point included by the line segment of the second edge line within the first projection area, and the enclosing area is a convex hull.

9. The method according to claim 8, characterized in that, The step of constructing a first projection region with a width of the preset distance on a preset side of the first edge line as the base of the target edge line pair is specifically as follows: A first mirror line with a preset distance between it and the first edge line is constructed on a preset side of the first edge line of the target edge line pair, and the first mirror line and the first edge line are connected to obtain a first projection area; The specific steps of constructing a second projection area with a width of the preset distance on a preset side of the second edge line, with the second edge line as the base, are as follows: A second mirror line is constructed on one side of the second edge line at a distance from the preset distance, and the second mirror line and the second edge line are connected to obtain a second projection area.

10. The method according to claim 1, characterized in that, Before selecting the first edge line as the target edge line pair and the second edge line as the target edge line pair, the process of finding two edge lines that are at least partially within a preset distance range as the target edge line pair further includes: Remove adjacent edge pairs whose included angle falls within a preset angle range.

11. The method according to claim 1, characterized in that, Before selecting the first edge line as the target edge line pair and the second edge line as the target edge line pair, the process of finding two edge lines that are at least partially within a preset distance range as the target edge line pair further includes: Remove adjacent pairs of edges where two edges intersect.

12. The method according to claim 1, characterized in that, Before selecting the first edge line as the target edge line pair and the second edge line as the target edge line pair, the process of finding two edge lines that are at least partially within a preset distance range as the target edge line pair further includes: Remove adjacent edge pairs that belong to the same shape.

13. A storage medium, characterized in that, The storage medium stores a computer program, which is configured to execute the pattern spacing inspection method for the quantum chip layout according to any one of claims 1 to 12 when it is run.

14. An electronic device, characterized in that, The device includes a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the pattern spacing inspection method for a quantum chip layout according to any one of claims 1 to 12.

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