Signal amplification circuit, signal processing system comprising same and analog-to-digital conversion system

Abstract

A signal amplification circuit includes an amplifier and a common-mode feedback circuit. The amplifier is configured to generate a first output and a second output. The common-mode feedback circuit is configured to receive the first output and the second output and to control an output common-mode voltage of the first output and the second output to be substantially the same as a first reference voltage. The common-mode feedback circuit includes an output common-mode voltage detection circuit, a pull-up circuit, and a pull-down circuit. The output common-mode voltage detection circuit is configured to generate a first control signal and a second control signal based on a value of the output common-mode voltage. The pull-up circuit has a first conduction level controlled by the first control signal and controls the output common-mode voltage to be positively correlated with the first conduction level. The pull-down circuit has a second conduction level controlled by the second control signal and controls the output common-mode voltage to be negatively correlated with the second conduction level.

Description

Technical Field

[0001] This disclosure relates to a signal amplification circuit, and more particularly to a signal amplification circuit including a common-mode feedback circuit, a signal processing system including the same, and an analog-to-digital conversion system. Background Technology

[0002] The input signal of an amplifier circuit includes differential input and common-mode noise. The amplifier's performance can be determined by its common-mode rejection ratio (CMRR). The CMRR is defined as the absolute value of the differential gain divided by the common-mode gain. A higher CMRR indicates better amplifier performance. Ideally, the output common-mode voltage of a fully differential amplifier circuit should be set at the average of its high and low operating voltages to maximize the differential voltage output swing. Incorporating a common-mode feedback circuit into a fully differential amplifier circuit not only stabilizes the amplifier's output common-mode voltage but also effectively reduces the common-mode gain, thereby improving the CMRR. Summary of the Invention

[0003] This disclosure provides a signal amplification circuit including an amplifier and a common-mode feedback circuit. The amplifier generates a first output and a second output. The common-mode feedback circuit receives the first and second outputs and controls the common-mode voltages of the first and second outputs to be substantially the same as a first reference voltage. The common-mode feedback circuit includes an output common-mode voltage detection circuit, a pull-up circuit, and a pull-down circuit. The output common-mode voltage detection circuit generates a first control signal and a second control signal based on the value of the output common-mode voltage. The pull-up circuit has a first conduction level controlled by the first control signal and controls the output common-mode voltage to be positively correlated with the first conduction level. The pull-down circuit has a second conduction level controlled by the second control signal and controls the output common-mode voltage to be negatively correlated with the second conduction level.

[0004] This disclosure provides a signal processing system including an input amplification stage, a low-pass filter, and a trigonometric integrator. The low-pass filter filters the output of the input amplification stage. The trigonometric integrator includes an integrator stage, an adder, a quantizer, and a feedback circuit. The integrator stage integrates the outputs of the low-pass filter and the feedback circuit, and includes multiple integrator stages. The adder sums the output of the low-pass filter with the outputs of each integrator stage. The quantizer generates a digital signal based on the output of the adder. The feedback circuit feeds the digital signal back to the integrator stage. One or more of the input amplification stage, integrator stage, and adder include a signal amplification circuit. The signal amplification circuit includes an amplifier and a common-mode feedback circuit. The amplifier generates a first output and a second output to correspondingly form the output of the input amplification stage, the output of each integrator stage, or the output of the adder. The common-mode feedback circuit receives the first and second outputs and controls the common-mode voltages of the first and second outputs to be substantially the same as a first reference voltage. The common-mode feedback circuit includes an output common-mode voltage detection circuit, a pull-up circuit, and a pull-down circuit. The output common-mode voltage detection circuit generates a first control signal and a second control signal based on the value of the output common-mode voltage. The pull-up circuit has a first conduction level controlled by the first control signal and is used to control the output common-mode voltage to be positively correlated with the first conduction level. The pull-down circuit has a second conduction level controlled by the second control signal and is used to control the output common-mode voltage to be negatively correlated with the second conduction level.

[0005] This disclosure provides an analog-to-digital conversion system including an input amplification stage, a low-pass filter, and an analog-to-digital converter. The low-pass filter filters the output of the input amplification stage. The analog-to-digital converter samples the output of the low-pass filter to generate a digital signal. The input amplification stage includes a signal amplification circuit. The signal amplification circuit includes an amplifier and a common-mode feedback circuit. The amplifier generates a first output and a second output to form the output of the input amplification stage. The common-mode feedback circuit receives the first and second outputs and controls the common-mode voltage of the first and second outputs to be substantially the same as a first reference voltage. The common-mode feedback circuit includes an output common-mode voltage detection circuit, a pull-up circuit, and a pull-down circuit. The output common-mode voltage detection circuit generates a first control signal and a second control signal based on the value of the output common-mode voltage. The pull-up circuit has a first conduction level controlled by the first control signal and controls the output common-mode voltage to be positively correlated with the first conduction level. The pull-down circuit has a second conduction level controlled by the second control signal and controls the output common-mode voltage to be negatively correlated with the second conduction level.

[0006] The advantages of the aforementioned signal amplification circuit, signal processing system, and analog-to-digital conversion system lie in their ability to effectively control the output common-mode voltage and their excellent driving capability. Attached Figure Description

[0007] Figure 1 This is a simplified functional block diagram of a signal amplification circuit according to one embodiment of this disclosure.

[0008] Figure 2 This is a circuit diagram of an output common-mode voltage detection circuit according to one embodiment of this disclosure.

[0009] Figure 3 This is a circuit diagram of an output common-mode voltage detection circuit according to another embodiment of this disclosure.

[0010] Figure 4 This is a circuit diagram of an amplifier according to one embodiment of the present disclosure.

[0011] Figure 5 This is a circuit diagram of an amplifier according to another embodiment of this disclosure.

[0012] Figure 6 This is a simplified functional block diagram of a signal processing system according to one embodiment of this disclosure.

[0013] Figure 7 This is a simplified functional block diagram of an analog-to-digital conversion system according to one embodiment of this disclosure. Detailed Implementation

[0014] The embodiments of this disclosure will be described below with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same or similar components or method flows.

[0015] Figure 1 This is a simplified functional block diagram of a signal amplification circuit 100 according to an embodiment of this disclosure. The signal amplification circuit 100 includes an amplifier 110 and a common-mode feedback circuit 120. The amplifier 110 includes a first input (e.g., a non-inverting input) and a second input (e.g., an inverting input), and includes a first output (e.g., a non-inverting output) and a second output (e.g., an inverting output). The first input of the amplifier 110 is used to receive a first input Vip, and the second input is used to receive a second input Vin. The amplifier 110 amplifies the difference between the first input Vip and the second input Vin to generate a first output Vop and a second output Von at its first and second outputs, respectively.

[0016] In some embodiments, amplifier 110 belongs to one of the following categories: Class A amplifier, Class B amplifier, and Class AB amplifier.

[0017] A common-mode feedback circuit 120 is coupled to the first and second output terminals of amplifier 110 to receive the first output Vop and the second output Von. The common-mode feedback circuit 120 is used to control the output common-mode voltage of the first output Vop and the second output Von. In some embodiments, the output common-mode voltage can be defined as the average voltage of the first output Vop and the second output Von, i.e., the output common-mode voltage can be...

[0018] In some embodiments, the common-mode feedback circuit 120 is used to receive a first reference voltage Vcm. The common-mode feedback circuit 120 controls the output common-mode voltage to be substantially the same as the first reference voltage Vcm. For example, the output common-mode voltage may be within the range of the first reference voltage Vcm ± 10%, or the output common-mode voltage may be within the range of the first reference voltage Vcm ± 5%.

[0019] In some embodiments, to achieve the above control, the common-mode feedback circuit 120 includes an output common-mode voltage detection circuit 122, a pull-up circuit 124, and a pull-down circuit 126. The output common-mode voltage detection circuit 122 is coupled to a first output terminal and a second output terminal of the amplifier 110, and is used to receive a first output Vop and a second output Von. The output common-mode voltage detection circuit 122 calculates the value of the output common-mode voltage and generates a first control signal Vbpc and a second control signal Vbnc based on the value of the output common-mode voltage. The pull-up circuit 124 has a first conduction level controlled by the first control signal Vbpc, and is used to control the output common-mode voltage to be positively correlated with the first conduction level. The pull-down circuit 126 has a second conduction level controlled by the second control signal Vbnc, and is used to control the output common-mode voltage to be negatively correlated with the second conduction level. For example, if the output common-mode voltage is higher than the first reference voltage Vcm, the first control signal Vbpc will decrease the first conduction level of the pull-up circuit 124, and the second control signal Vbnc will increase the second conduction level of the pull-down circuit 126, thereby reducing the output common-mode voltage. As another example, if the output common-mode voltage is lower than the first reference voltage Vcm, the first control signal Vbpc will increase the first conduction level of the pull-up circuit 124, and the second control signal Vbnc will decrease the second conduction level of the pull-down circuit 126, thereby increasing the output common-mode voltage.

[0020] like Figure 1As shown, in some embodiments, the pull-up circuit 124 includes a first pull-up transistor MP1 and a second pull-up transistor MP2. The aforementioned first conduction level may include the conduction level of the first pull-up transistor MP1 and the conduction level of the second pull-up transistor MP2. The first pull-up transistor MP1 is coupled between the first power supply terminal VA and the first output terminal of the amplifier 110. The second pull-up transistor MP2 is coupled between the first power supply terminal VA and the second output terminal of the amplifier 110. In some embodiments, the pull-down circuit 126 includes a first pull-down transistor MN1 and a second pull-down transistor MN2. The aforementioned second conduction level may include the conduction level of the first pull-down transistor MN1 and the conduction level of the second pull-down transistor MN2. One end of the first pull-down transistor MN1 is coupled to the second power supply terminal GA, and the other end is directly or indirectly coupled to the first output terminal of the amplifier 110. One end of the second pull-down transistor MN2 is coupled to the second power supply terminal GA, and the other end is directly or indirectly coupled to the second output terminal of the amplifier 110.

[0021] In some embodiments, the voltage level of the first power supply terminal VA is higher than the voltage level of the second power supply terminal GA. In some embodiments, the first power supply terminal VA is a high operating voltage (e.g., 1.8V), while the second power supply terminal GA is a low operating voltage (e.g., ground).

[0022] In some embodiments, the first pull-up transistor MP1 and the second pull-up transistor MP2 are P-type transistors, and the first pull-down transistor MN1 and the second pull-down transistor MN2 are N-type transistors. When the output common-mode voltage is too high (higher than the first reference voltage Vcm), the output common-mode voltage detection circuit 122 increases the voltage levels of the first control signal Vbpc and the second control signal Vbnc, thereby reducing the conduction level of the first pull-up transistor MP1 and the second pull-up transistor MP2, and increasing the conduction level of the first pull-down transistor MN1 and the second pull-down transistor MN2. On the other hand, when the output common-mode voltage is too low (lower than the first reference voltage Vcm), the output common-mode voltage detection circuit 122 decreases the voltage levels of the first control signal Vbpc and the second control signal Vbnc, thereby increasing the conduction level of the first pull-up transistor MP1 and the second pull-up transistor MP2, and decreasing the conduction level of the first pull-down transistor MN1 and the second pull-down transistor MN2.

[0023] In other words, the voltage levels of the first control signal Vbpc and the second control signal Vbnc are positively correlated with the output common-mode voltage. The voltage levels of the first control signal Vbpc and the second control signal Vbnc are positively correlated with each other.

[0024] Figure 2This is a circuit diagram of an output common-mode voltage detection circuit 200 according to an embodiment of this disclosure. The output common-mode voltage detection circuit 200 can be used to implement... Figure 1 The output common-mode voltage detection circuit 122 includes a voltage divider circuit 210, a differential input pair 220, a first load circuit 230, a current mirror circuit 240, and a second load circuit 250. The voltage divider circuit 210 receives a first output Vop and a second output Von, and divides the first output Vop and the second output Von to obtain the output common-mode voltage. The differential input pair 220 includes a first input terminal and a second input terminal, which respectively receive a first reference voltage Vcm and the output common-mode voltage. Based on the first reference voltage Vcm and the output common-mode voltage, the differential input pair 220 generates a first current Ia on one side of its first input terminal and a second current Ib on one side of its second input terminal.

[0025] A first load circuit 230 is coupled to a differential input pair 220 to generate a first control signal Vbpc based on a first current Ia, for example, a first control signal Vbpc that converts the first current Ia into a voltage signal. A current mirror circuit 240 is coupled to the differential input pair 220 to generate a third current Ic based on a second current Ib. A second load circuit 250 is coupled to the current mirror circuit 240 to generate a second control signal Vbnc based on the third current Ic, for example, a second control signal Vbnc that converts the third current Ic into a voltage signal.

[0026] In some embodiments, the voltage divider circuit 210 includes a first resistor R1 and a second resistor R2 coupled in series. One end of the first resistor R1 is used to receive a first output Vop, and the other end is coupled to the second resistor R2. One end of the second resistor R2 is used to receive a second output Von, and the other end is coupled to the first resistor R1. The node between the first resistor R1 and the second resistor R2 is used to provide an output common-mode voltage to the second input terminal of the differential input pair 220.

[0027] In some embodiments, the differential input pair 220 includes transistor M1, transistor M2, and current source CS1. Transistor M1 is coupled between the first load circuit 230 and the current source CS1, and its control terminal serves as the first input terminal of the differential input pair 220. Transistor M2 is coupled between the current mirror circuit 240 and the current source CS1, and its control terminal serves as the second input terminal of the differential input pair 220.

[0028] In some embodiments, the first load circuit 230 includes a transistor M3. A first terminal of the transistor M3 is coupled to a first power supply terminal VA, and a second terminal is used to receive a first current Ia from the differential input pair 220. The control terminal and the second terminal of the transistor M3 are coupled to each other to generate a first control signal Vbpc.

[0029] In some embodiments, the current mirror circuit 240 includes transistors M4 and M5. A first terminal of transistor M4 is coupled to a first power supply terminal VA, and a second terminal is used to receive a second current Ib from the differential input pair 220. Its control terminal and second terminal are coupled to each other. A first terminal of transistor M5 is coupled to the first power supply terminal VA, and a second terminal is used to provide a third current Ic to the second load circuit 250. The control terminal of transistor M4 is coupled to the control terminal of transistor M5.

[0030] In some embodiments, the second load circuit 250 includes a transistor M6. A first terminal of the transistor M6 is used to receive a third current Ic from the current mirror circuit 240, and a second terminal is coupled to a second power supply terminal GA. The control terminal of the transistor M6 is coupled to the first terminal to generate a second control signal Vbnc.

[0031] Figure 3 This is a circuit diagram of an output common-mode voltage detection circuit 300 according to another embodiment of this disclosure. The output common-mode voltage detection circuit 300 can be used to implement... Figure 1 The output common-mode voltage detection circuit 122 includes a first switching capacitor circuit 310 and a second switching capacitor circuit 320. The first capacitor switching circuit 310 receives a first output Vop, a second output Von, a first reference voltage Vcm, and a second reference voltage Vbiasp to generate a first control signal Vbpc. The second capacitor switching circuit 320 receives the first output Vop, the second output Von, the first reference voltage Vcm, and a third reference voltage Vbiasn to generate a second control signal Vbnc. In some embodiments, the second reference voltage Vbiasp is higher than the third reference voltage Vbiasn.

[0032] The first capacitor switching circuit 310 includes capacitors C1 to C4 and multiple switches. Capacitors C1 and C2 are coupled in parallel through some switches, and capacitors C3 and C4 are coupled in parallel through other switches. These switches are controlled by a non-overlapping first frequency signal CK1 and a second frequency signal CK2. First, the switch controlled by the first frequency signal CK1 is turned on, and the switch controlled by the second frequency signal CK2 is turned off. A first reference voltage Vcm and a second reference voltage Vbiasp are transmitted to the two ends of capacitor C1 and capacitor C3, a first output Vop is transmitted to the first end of capacitor C2, and a second output Von is transmitted to the first end of capacitor C4. Next, the switch controlled by the first frequency signal CK1 is turned off, and the switch controlled by the second frequency signal CK2 is turned on, so that capacitors C1 and C2 are connected in parallel, and capacitors C3 and C4 are connected in parallel. Therefore, the first control signal Vbpc generated by the second ends of capacitors C2 and C4 can be expressed as:

[0033] The second capacitor switching circuit 320 includes capacitors C5 to C8 and multiple switches. Capacitors C5 and C6 are coupled in parallel through some switches, and capacitors C7 and C8 are coupled in parallel through other switches. The components, connections, and operation of the second capacitor switching circuit 320 are similar to those of the first capacitor switching circuit 310. That is, the first capacitor switching circuit 310 has a first circuit topology, and the second capacitor switching circuit 320 has a second circuit topology. The first circuit topology is substantially the same as the second circuit topology. The second control signal Vbnc can be expressed as...

[0034] Figure 4 This is a circuit diagram of an amplifier 400 according to one embodiment of this disclosure. Amplifier 400 is a Class AB amplifier and can be used to implement... Figure 1 Amplifier 110 in the middle. The following will be used in conjunction with... Figure 1 and Figure 4 This describes an embodiment of applying the common-mode feedback circuit 120 to a Class AB amplifier.

[0035] Amplifier 400 receives operating voltages from a first power supply terminal VA and a second power supply terminal GA, and amplifies the difference between a first input Vip and a second input Vin to generate a first output Vop and a second output Von. Amplifier 400 includes a differential input pair, multiple current mirror circuits, a non-inverting output stage, and an inverting output stage. The differential input pair includes transistors M7 and M8 and a current source CS2. The control terminal of transistor M7 is used to receive the first input Vip. The control terminal of transistor M8 is used to receive the second input Vin. The multiple current mirror circuits are formed by (1) a combination of transistors M9, M10, and M18, (2) a combination of transistors M11 and M12, (3) a combination of transistors M14, M15, and M13, and (4) a combination of transistors M16 and M17, respectively. The non-inverting output stage includes transistors M18 and M17. The inverting output stage includes transistors M13 and M12.

[0036] The circuitry of amplifier 400 that generates the first output Vop includes the following structure: transistors M8 and M14 are coupled in series; transistors M15 and M16 are coupled in series; transistors M17 and M18 are coupled in series; and the control terminal of transistor M18 is coupled between transistors M7 and M9. Therefore, the first output terminal (e.g., the non-inverting output terminal) Nop between transistors M17 and M18 will generate the first output Vop.

[0037] The circuitry of amplifier 400 that generates the second output Von includes the following structure: transistors M7 and M9 are coupled in series; transistors M10 and M11 are coupled in series; transistors M12 and M13 are coupled in series; and the control terminal of transistor M13 is coupled between transistors M8 and M14. Therefore, the second output terminal (e.g., the inverting output terminal) Non between transistors M12 and M13 will generate the second output Von.

[0038] Depend on Figure 4 It can be seen that, in the future Figure 1 In an embodiment of the Class AB amplifier 400, the common-mode feedback circuit 120 is applied. The pull-up circuit 124 is coupled in series to the pull-down circuit 126 through the first output terminal Nop and the second output terminal Non. Specifically, the first pull-up transistor MP1 is coupled in series to the first pull-down transistor MN1 through the first output terminal Nop, while the second pull-up transistor MP2 is coupled in series to the second pull-down transistor MN2 through the second output terminal Non.

[0039] In some embodiments, Figure 1 The common-mode feedback circuit 120 can be applied to Class B amplifiers, i.e. Figure 1 Amplifier 110 can be a Class B amplifier. Those skilled in the art will understand that Class B amplifiers have similar output stage structures to Class AB amplifiers. For example, a Class B amplifier may have a first output terminal Nop to provide a first output Vop, and may have a second output terminal Non to provide a second output Von. In these embodiments of the Class B amplifier, pull-up circuit 124 is coupled in series to pull-down circuit 126 via the first output terminal Nop and the second output terminal Non. Specifically, a first pull-up transistor MP1 is coupled in series to a first pull-down transistor MN1 via the first output terminal Nop, while a second pull-up transistor MP2 is coupled in series to a second pull-down transistor MN2 via the second output terminal Non.

[0040] Figure 5 This is a circuit diagram of an amplifier 500 according to another embodiment of this disclosure. Amplifier 500 is a Class A amplifier and can be used to implement... Figure 1 Amplifier 110 in the middle. The following will be used in conjunction with... Figure 1 and Figure 5 This describes an embodiment of applying the common-mode feedback circuit 120 to a Class A amplifier.

[0041] Amplifier 500 receives operating voltages from a first power supply terminal VA and a second power supply terminal GA, and amplifies the difference between a first input Vip and a second input Vin to generate a first output Vop and a second output Von. Amplifier 500 includes transistors M19-M22 and a current source CS3, wherein transistors M19, M20, and CS3 form a differential input pair. The control terminal of transistor M19 receives the first input Vip. The control terminal of transistor M20 receives the second input Vin. Transistor M22 is connected in series with transistor M20. A first output terminal (e.g., a non-inverting output terminal) Nop of amplifier 500 is located between transistors M20 and M22 and generates the first output Vop. Transistor M21 is connected in series with transistor M19. A second output terminal (e.g., an inverting output terminal) Non of amplifier 500 is located between transistors M19 and M21 and generates the second output Von. The control terminals of transistors M21 and M22 receive a second reference voltage Vbiasp, but this disclosure is not limited thereto.

[0042] Depend on Figure 5 It can be seen that, in the future Figure 1 In an embodiment of the Class A amplifier 500, the common-mode feedback circuit 120 is applied. Pull-up circuit 124 is coupled to the first output terminal Nop and the second output terminal Non, while pull-down circuit 126 is coupled in parallel to the current source CS3 of the differential input pair. Specifically, the first pull-up transistor MP1 is coupled to the first output terminal Nop, and the second pull-up transistor MP2 is coupled to the second output terminal Non. The first terminal of current source CS3 is coupled to transistors M19 and M20, and its second terminal is coupled to the second power supply terminal GA. The first pull-down transistor MN1 is coupled between the first terminal of current source CS3 and the second power supply terminal GA, and the second pull-down transistor MN2 is also coupled between the first terminal of current source CS3 and the second power supply terminal GA.

[0043] In some embodiments, the common-mode feedback circuit includes only pull-up transistors. To ensure its control over the output common-mode voltage, the pull-up transistors in this common-mode feedback circuit need to have a large aspect ratio. However, such a design may affect the amplifier's drive capability for power saving considerations, as explained below. Assume that in an amplifier circuit design without common-mode feedback, both the pull-up and pull-down transistors at the non-inverting output have an aspect ratio of 100, and the same applies to the inverting output. If a common-mode feedback circuit with only pull-up transistors is applied to this amplifier circuit design, to maintain approximately the same output current as before application to avoid additional power consumption, when the pull-up transistors in the common-mode feedback circuit have an aspect ratio of 50, the aspect ratios of the pull-up and pull-down transistors at the non-inverting output must be 50 and 100, respectively, and the same applies to the inverting output. However, the above design may excessively shrink the amplifier's pull-up transistors, resulting in insufficient pull-up capability.

[0044] In comparison, Figure 1 The common-mode feedback circuit 120 uses pull-up transistors MP1-MP2 and pull-down transistors MN1-MN2 to jointly control the output common-mode voltage, instead of using only pull-up transistors MP1-MP2 or only pull-down transistors MN1-MN2. Therefore, the dimensions (width-to-length ratio) of pull-up transistors MP1-MP2 and pull-down transistors MN1-MN2 can be designed to be smaller, for example, both 25. Thus, when the common-mode feedback circuit 120 is applied to an amplifier, the amplifier can have good pull-up and pull-down capabilities while maintaining approximately the same output current as before application. In some embodiments, please refer to... Figure 4 The aspect ratio of transistors M12-M13 and M17-18 can both be 75, while the aspect ratio of pull-up transistors MP1-MP2 and pull-down transistors MN1-MN2 can both be 25.

[0045] Figure 6 This is a simplified functional block diagram of a signal processing system 600 according to one embodiment of this disclosure. The signal processing system 600 includes an input amplification stage 610, a low-pass filter 620, and a trigonometric integrator modulation circuit 630. The input amplification stage 610 includes a signal amplification circuit 612 and a plurality of feedback resistors. In some embodiments, the signal amplification circuit 612 may be composed of… Figure 1The signal amplification circuit 100 is used to implement this. The input amplification stage 610 is used to generate a first output Vop and a second output Von based on the first input Vip and the second input Vin. In some embodiments, the first input Vip and the second input Vin can be audio signals generated after a microphone receives sound. A low-pass filter 620 is used to filter the outputs of the input amplification stage 610 (i.e., the first output Vop and the second output Von). In some embodiments, the low-pass filter 620 can be implemented by a resistor-capacitor low-pass filter. For simplicity, Figure 6 The label "X" is used to represent the differential output of the low-pass filter 620.

[0046] The trigonometric modulation circuit 630 includes an integrator stage 632, an adder 634, a quantizer 636, and a feedback circuit 638. The integrator stage 632 includes multi-stage integrators Iga to Igb, a unit buffer Bf, and multiple weighting units Wa to Wc. The multi-stage integrators Iga to Igb integrate the output X of the low-pass filter 620 and the output of the feedback circuit 638. The output X of the low-pass filter 620 also passes through the unit buffer Bf. Next, the adder 634 sums the output X of the low-pass filter 620 with the integration results of each integrator Iga to Igb (with specific weights assigned via the weighting units Wa to Wc). The quantizer 636 generates a first digital signal Do1 based on the output of the adder 634. The feedback circuit 638 feeds the first digital signal Do1 back to the integrator stage 632. In some embodiments, the feedback circuit 638 can be implemented using a digital-to-analog converter (DAC).

[0047] In some embodiments, one or more of the input amplification stage 610, integration stage 632, and adder 634 include Figure 1 The signal amplification circuit 100. For example, the fully differential amplifiers in each integrator stage Iga to Igb can be implemented using the signal amplification circuit 100. The fully differential amplifiers in adder 634 can also be implemented using the signal amplification circuit 100. The differential output generated by the signal amplification circuit 100 can correspondingly form the output of input amplification stage 610, the output of each integrator stage Iga to Igb, or the output of adder 634.

[0048] Figure 7 This is a simplified functional block diagram of an analog-to-digital converter system 700 according to an embodiment of this disclosure. The analog-to-digital converter system 700 includes an input amplifier stage 710, a low-pass filter 720, and an analog-to-digital converter (ADC) 730. The input amplifier stage 710 is similar to... Figure 6 The input amplification stage 610, i.e., the input amplification stage 710, includes Figure 1The signal amplification circuit 110 includes multiple feedback resistors. An input amplification stage 710 generates a first output Vop and a second output Von based on a first input Vip and a second input Vin. In some embodiments, the first input Vip and the second input Vin can be audio signals generated after a microphone receives sound. A low-pass filter 720 filters the outputs of the input amplification stage 710 (i.e., the first output Vop and the second output Von). In some embodiments, the low-pass filter 720 can be implemented using a resistive-capacitive low-pass filter. An analog-to-digital converter 730 samples the filtered first output Vop and the filtered second output Von from the low-pass filter 720 to generate a second digital signal Do2.

[0049] Certain terms are used in the specification and claims to refer to specific components. However, those skilled in the art will understand that the same component may be referred to by different names. The specification and claims do not distinguish components by differences in name, but by differences in function. The term "comprising" in the specification and claims is an open-ended term and should be interpreted as "including but not limited to". Furthermore, "coupled" here includes any direct and indirect connection means. Therefore, if the text describes a first component coupled to a second component, it means that the first component can be directly connected to the second component via electrical connection or signal connection methods such as wireless transmission or optical transmission, or indirectly electrically or signalally connected to the second component via other components or connection means.

[0050] In addition, unless otherwise specified in the instructions, any singular case usage also includes the meaning of the plural case.

[0051] The above are merely preferred embodiments of this disclosure. Various modifications and equivalent changes can be made to the structure of this disclosure without departing from its scope or spirit. In summary, all modifications and equivalent changes made to this disclosure within the scope of the following claims are within the scope of this disclosure.

Claims

1. A signal amplification circuit, comprising: An amplifier used to generate a first output and a second output; as well as A common-mode feedback circuit, used to receive the first output and the second output, used to control the common-mode voltage of the first output and the second output to be substantially the same as the first reference voltage, and includes: An output common-mode voltage detection circuit is used to generate a first control signal and a second control signal based on the value of the output common-mode voltage. A pull-up circuit, having a first conduction level controlled by the first control signal, and configured to control the output common-mode voltage to be positively correlated with the first conduction level; and The pull-down circuit has a second conduction level controlled by the second control signal and is used to control the output common-mode voltage to be negatively correlated with the second conduction level.

2. The signal amplification circuit according to claim 1, wherein, The pull-up circuit includes a first pull-up transistor and a second pull-up transistor. The first pull-up transistor and the second pull-up transistor are coupled between the amplifier and the first power supply terminal. The pull-down circuit includes a first pull-down transistor and a second pull-down transistor. The first pull-down transistor and the second pull-down transistor are coupled between the amplifier and the second power supply terminal.

3. The signal amplification circuit according to claim 1, wherein, The voltage levels of the first control signal and the second control signal are positively correlated with the value of the output common-mode voltage.

4. The signal amplification circuit according to claim 1, wherein, The output common-mode voltage detection circuit includes: A voltage divider circuit is used to divide the voltages of the first output and the second output to generate the output common-mode voltage; A differential input pair is used to generate a first current and a second current based on the first reference voltage and the output common-mode voltage; A first load circuit is used to generate the first control signal based on the first current. A current mirror circuit is used to generate a third current based on the second current; and The second load circuit is used to generate the second control signal based on the third current.

5. The signal amplification circuit according to claim 4, wherein, The voltage divider circuit includes: A first resistor is used to receive the first output; and A second resistor is used to receive the second output, wherein the first resistor is coupled in series with the second resistor to divide the voltages of the first output and the second output to generate the output common-mode voltage.

6. The signal amplification circuit according to claim 1, wherein, The output common-mode voltage detection circuit includes: A first switching capacitor circuit is configured to generate the first control signal based on the first output, the second output, the first reference voltage, and the second reference voltage; and The second switching capacitor circuit is used to generate the second control signal based on the first output, the second output, the first reference voltage, and the third reference voltage. The second reference voltage is higher than the third reference voltage.

7. The signal amplification circuit according to claim 1, wherein, The amplifier is either a Class B amplifier or a Class AB amplifier. The amplifier includes a first output terminal and a second output terminal, which are used to output the first output and the second output, respectively. The pull-up circuit is coupled to the pull-down circuit in series through the first output terminal and the second output terminal.

8. The signal amplification circuit according to claim 1, wherein, The amplifier is a Class A amplifier. The amplifier includes a first output terminal, a second output terminal, and a differential input pair. The first output terminal and the second output terminal are used to output the first output and the second output, respectively. The pull-up circuit is coupled to the first output terminal and the second output terminal, and the pull-down circuit is coupled in parallel to the current source of the differential input pair.

9. A signal processing system, comprising: Input amplification level; A low-pass filter is used to filter the output of the input amplification stage; as well as The triangular integral modulator includes: An integrating stage is used to integrate the output of the low-pass filter, and includes multiple integrator stages; An adder is used to sum the output of the low-pass filter with the output of each integrator stage; A quantizer for generating a digital signal based on the output of the adder; and A feedback circuit is used to feed the digital signal back to the integrating stage. Wherein, one or more of the input amplification stage, the integrator stage, and the adder include a signal amplification circuit, the signal amplification circuit comprising: An amplifier for generating a first output and a second output to correspondingly form the output of the input amplification stage, the output of each integrator stage, or the output of the adder; and A common-mode feedback circuit, used to receive the first output and the second output, used to control the common-mode voltage of the first output and the second output to be substantially the same as the first reference voltage, and includes: An output common-mode voltage detection circuit is used to generate a first control signal and a second control signal based on the value of the output common-mode voltage. A pull-up circuit, having a first conduction level controlled by the first control signal, and configured to control the output common-mode voltage to be positively correlated with the first conduction level; and The pull-down circuit has a second conduction level controlled by the second control signal and is used to control the output common-mode voltage to be negatively correlated with the second conduction level.

10. An analog-to-digital conversion system, comprising: Input amplification level; A low-pass filter is used to filter the output of the input amplification stage; as well as An analog-to-digital converter is used to sample the output of the low-pass filter to generate a digital signal. The input amplification stage includes a signal amplification circuit, which includes: Amplifiers for generating a first output and a second output to form the output of the input amplification stage; and A common-mode feedback circuit, used to receive the first output and the second output, used to control the common-mode voltage of the first output and the second output to be substantially the same as the first reference voltage, and includes: An output common-mode voltage detection circuit is used to generate a first control signal and a second control signal based on the value of the output common-mode voltage. A pull-up circuit, having a first conduction level controlled by the first control signal, and configured to control the output common-mode voltage to be positively correlated with the first conduction level; and The pull-down circuit has a second conduction level controlled by the second control signal and is used to control the output common-mode voltage to be negatively correlated with the second conduction level.

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