A data processing method and apparatus

Abstract

This application provides a data processing method and apparatus, relating to the field of computers. The method includes: acquiring a first code block encoded using a Solomon RS code; calculating the syndrome of the first code block; starting from p=1, sequentially calculating the error position polynomial of the first code block under the condition of p symbol errors, and searching for whether there are p error positions satisfying the error position polynomial of the first code block, until M error positions satisfying the first error position polynomial are found, wherein the first error position polynomial is the error position polynomial of the first code block under the condition of M symbol errors; calculating the error values ​​corresponding to the M error positions based on the M error positions and the syndrome; and correcting the values ​​of the M error positions in the first code block using the error values ​​corresponding to the M error positions. This application aims to shorten the delay of the decoding process and reduce the power consumption of the decoding process.

Description

Technical Field

[0001] This application relates to the field of computers, and more particularly to a data processing method and apparatus. Background Technology

[0002] As Ethernet capacity demands increase, the required speed of Ethernet links also rises, leading to a corresponding increase in the bit error rate. To ensure service stability, there is an urgent need for an error-correcting code technology capable of correcting link errors.

[0003] Reed-Solomon codes forward error correction (RSFEC) is a forward error correction technique that is widely used in Ethernet link error correction due to its excellent error correction capability and link gain capability.

[0004] Therefore, in the process of encoding and decoding using RSFEC technology, how to shorten the delay of the decoding process and reduce the power consumption of the decoding process is a problem that needs to be solved. Summary of the Invention

[0005] This application provides a data processing method and apparatus for shortening the decoding delay of RS codes and reducing the power consumption during the decoding process.

[0006] A first aspect provides a data processing method, the method comprising: acquiring a first code block encoded using a Solomon RS code; calculating the syndrome of the first code block; starting from p=1, sequentially calculating the error position polynomial of the first code block in the case of p symbol errors, and searching for whether there are p error positions that satisfy the error position polynomial of the first code block, until M error positions that satisfy the first error position polynomial are found, wherein the first error position polynomial is the error position polynomial of the first code block in the case of M symbol errors; calculating the error values ​​corresponding to the M error positions according to the M error positions and the syndrome; and correcting the values ​​of the M error positions in the first code block using the error values ​​corresponding to the M error positions.

[0007] The data processing method provided in this embodiment starts with a symbol error and, for different numbers of errors, employs different error location polynomial calculation processes, different error location search processes, and different error value calculation and correction processes. Compared with existing technologies, this method can achieve the effects of saving circuit resources, speeding up the calculation process, and reducing power consumption.

[0008] Optionally, when p≥2, the calculation of the error position polynomial of the first code block with p symbol errors includes: based on the previously calculated formula for p-1 symbol errors, the error position polynomial of the first code block corresponding to p symbol errors is obtained through algorithm iteration.

[0009] Optionally, the step of finding the error position polynomial of the first code block corresponding to p symbol errors through algorithm iteration includes: finding the error position polynomial of the first code block corresponding to p symbol errors using any one of the Camp Massey BM algorithm, IBM algorithm, RIBM algorithm or Euclidean algorithm.

[0010] Optionally, when p=1, calculating the error position polynomial of the first code block in the case of p symbol errors, and searching for whether there are p error positions that satisfy the error position polynomial of the first code block, includes: calculating the second error position polynomial of the first code block in the case of one symbol error, wherein the second error position polynomial satisfies the following formula:

[0011] Formula 1: σ(x) = σ1x + σ0

[0012] Where σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block.

[0013] Search for the value of σ1 that satisfies the following formula:

[0014]

[0015] Where S1, S2, ..., S t This represents the first to tth synastry among the 2t synastry patterns of the first code block, where t is the maximum number of symbols that the first code block can correct.

[0016] If a value of σ1 satisfying Formula 2 is found, the error location in the first code block is determined based on the value of σ1 and Formula 1. If a value of σ1 satisfying Formula 2 cannot be found, it is determined that there is no error location satisfying the error location polynomial of the first code block.

[0017] Optionally, the step of calculating the error value corresponding to each of the M error positions based on the M error positions and the syndrome includes: substituting the error position in the first code block determined based on the value of σ1 and the first formula into the syndrome to calculate the error value corresponding to the error position.

[0018] Optionally, after failing to find a value of σ1 that satisfies Formula 2, the calculation of the error position polynomial of the first code block with p symbol errors, and the search for whether there are p error positions that satisfy the error position polynomial of the first code block, further includes: calculating the third error position polynomial of the first code block with two symbol errors, wherein the third error position polynomial satisfies the following Formula 3:

[0019] σ(x)=σ2x 2 Formula 3: +σ1x+σ0

[0020] Where σ2 represents the coefficient of the quadratic term in the error polynomial of the first code block, σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block.

[0021] Search for the values ​​of σ1 and σ2 that satisfy the following formula four:

[0022]

[0023] Where S1, S2, ..., S t ,S t+1 ,S t+2 This represents the first to the (t+2)th of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct.

[0024] If values ​​of σ1 and σ2 that satisfy Formula 2 are found, then the two error locations in the first code block are determined according to the values ​​of σ1 and σ2 and Formula 1.

[0025] If the values ​​of σ1 and σ2 that satisfy Formula 2 cannot be found, then it is determined that there are no two error positions that satisfy the error position polynomial of the first code block.

[0026] Optionally, the step of calculating the error value corresponding to each of the M error positions based on the M error positions and the syntactic equation includes: substituting the two error positions in the first code block determined based on the values ​​of σ1 and σ2 and the first formula into the syntactic equation to calculate the error value corresponding to each of the two error positions.

[0027] Optionally, p is not greater than the maximum number of symbols that the first code block can correct.

[0028] In a second aspect, a data processing apparatus is provided, comprising: an acquisition unit for acquiring a first code block encoded using a Solomon RS code; a syndrome calculation unit for calculating the syndrome of the first code block; an error location search unit for sequentially calculating, starting from p=1, the error location polynomial of the first code block under the condition of p symbol errors, and searching for whether there are p error locations that satisfy the error location polynomial of the first code block, until M error locations that satisfy the first error location polynomial are found, wherein the first error location polynomial is the error location polynomial of the first code block under the condition of M symbol errors; an error correction unit for calculating the error values ​​corresponding to the M error locations respectively based on the M error locations and the syndrome; and an error correction unit for correcting the values ​​of the M error locations in the first code block using the error values ​​corresponding to the M error locations respectively.

[0029] Optionally, the error location search unit is used to calculate the error location polynomial of the first code block in the case of p symbol errors, starting from p=1, including: in the case of p≥2, the error location search unit is used to calculate the error location polynomial of the first code block corresponding to p symbol errors through algorithm iteration based on the formula calculated previously in the case of p-1 symbol errors.

[0030] Optionally, the step of finding the error position polynomial of the first code block corresponding to p symbol errors through algorithm iteration includes: finding the error position polynomial of the first code block corresponding to p symbol errors using any one of the Camp Massey BM algorithm, IBM algorithm, RIBM algorithm or Euclidean algorithm.

[0031] Optionally, when p=1, the error location search unit is specifically used to calculate the second error location polynomial of the first code block in the case of one symbol error, wherein the second error location polynomial satisfies the following formula:

[0032] Formula 1: σ(x) = σ1x + σ0

[0033] Where σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block;

[0034] The error location search unit is also specifically used to search for a value of σ1 that satisfies the following formula:

[0035]

[0036] Where S1, S2, ..., S tThis represents the first to tth of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct.

[0037] If a value of σ1 satisfying Formula 2 is found, the error location search unit is specifically used to determine the error location in the first code block based on the value of σ1 and Formula 1; if a value of σ1 satisfying Formula 2 cannot be found, the error location search unit is specifically used to determine that there is no error location that satisfies the error location polynomial of the first code block.

[0038] Optionally, the error correction unit is used to calculate the error value corresponding to each of the M error positions based on the M error positions and the syndrome, including: the error correction unit is specifically used to substitute the error position in the first code block determined according to the value of σ1 and the first formula into the syndrome to calculate the error value corresponding to the error position.

[0039] Optionally, the error location search unit is further configured to calculate the third error location polynomial of the first code block in the case of two symbol errors, wherein the third error location polynomial satisfies the following formula three:

[0040] σ(x)=σ2x 2 Formula 3: +σ1x+σ0

[0041] Where σ2 represents the coefficient of the quadratic term in the error polynomial of the first code block, σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block.

[0042] The error location search unit is also specifically used to search for values ​​of σ1 and σ2 that satisfy the following formula four:

[0043]

[0044] Where S1, S2, ..., S t ,S t+1 ,S t+2 This represents the first to the (t+2)th of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct.

[0045] If values ​​of σ1 and σ2 satisfying Formula 2 are found, the error location search unit is further specifically used to determine two error locations in the first code block based on the values ​​of σ1 and σ2 and Formula 1; if values ​​of σ1 and σ2 satisfying Formula 2 cannot be found, the error location search unit is further specifically used to determine that there are no two error locations satisfying the error location polynomial of the first code block.

[0046] Optionally, the error correction unit is used to calculate the error value corresponding to each of the M error positions based on the M error positions and the syndrome, including: the error correction unit is specifically used to substitute the two error positions in the first code block determined based on the values ​​of σ1 and σ2 and the first formula into the syndrome to calculate the error value corresponding to each of the two error positions.

[0047] Optionally, p is not greater than the maximum number of symbols that the first code block can correct.

[0048] Thirdly, a data processing apparatus is provided, including a processor and an interface, wherein the processor receives or transmits data through the interface, and the processor is configured to implement the method as described in any one of the first aspects.

[0049] Fourthly, a computer-readable storage medium is provided, wherein instructions are stored therein, which, when executed on a processor, implement the method as described in any one of the first aspects.

[0050] Fifthly, a computer program product is provided, the computer program product including instructions that, when executed on a processor, implement the method as described in any one of the first aspects. Attached Figure Description

[0051] Figure 1 A schematic diagram of the structure of a computer system provided in this application;

[0052] Figure 2 A schematic diagram of the structure of a data decoding device provided in this application;

[0053] Figure 3 One of the flowcharts illustrating a data processing method provided in this application;

[0054] Figure 4 A second flowchart illustrating a data processing method provided in this application;

[0055] Figure 5 This is one of the structural schematic diagrams of a data processing device provided in this application;

[0056] Figure 6 This is a second schematic diagram of the structure of a data processing device provided in this application. Detailed Implementation

[0057] The technical solutions of this embodiment will now be described with reference to the accompanying drawings. To facilitate a clear description of the technical solutions of this embodiment, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different. Furthermore, in this embodiment, the terms "exemplary" or "for example" are used to indicate that something is being used as an example, illustration, or explanation. Any embodiment or design scheme described as "exemplary" or "for example" in this embodiment should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner for ease of understanding.

[0058] To facilitate understanding of the technical solution provided in this embodiment, the relevant technologies involved in this embodiment will first be introduced:

[0059] Forward error correction (FEC) is a data encoding and error correction technique. In communication transmission with FEC, the transmitting end completes data encoding, and the receiving end performs error detection and error location calculation according to a specified algorithm, thereby correcting the erroneous data.

[0060] Reed-Solomon (RS) codes are a type of channel coding based on forward error correction within the Galois finite field. The forward error correction technique based on Reed-Solomon (RS) codes can be called RSFEC.

[0061] In practical applications, RS codes can be expressed in the form RS(N, K, T, M). Where: N represents a code block length of N symbols; K represents a code block payload length of K symbols; T represents the number of error-correcting symbols; and M represents the symbol width.

[0062] Since the length of the check code in the code block is twice the length of the error-correcting symbol data T, that is, the length of the check code in the code block is 2T, N = K + 2T is satisfied in the RS code.

[0063] For example, consider the RS(544,514,15) protocol defined in the Ethernet protocol. In RS(544,514,15), the default symbol width is 10 bits. Therefore, the block length is 544 symbols, corresponding to 5440 bits; one block carries 514 symbols of information, corresponding to 5140 bits; and the number of error-correcting symbols is 15 symbols, corresponding to 150 bits. In other words, the checksum length in one block is 30 symbols, corresponding to 300 bits.

[0064] The Berlekamp-Massey (BM) algorithm is an algorithm that finds the shortest linear feedback shift register (LFSR) for a given binary output sequence. This algorithm is commonly used for decoding RS codes.

[0065] The BM algorithm can be divided into the traditional BM algorithm and the improved RIBM algorithm. The traditional BM algorithm is an inverse-based algorithm, which involves deep logic levels and is therefore primarily used for high-performance bandwidth processing. The RIBM algorithm is an inverse-free algorithm, thus eliminating the need for inversion and enabling parallel iterative processing, significantly simplifying the logic levels. Therefore, compared to the traditional BM algorithm, the RIBM algorithm has lower processing latency.

[0066] The application scenarios of the technical solution provided in this embodiment will be described below with reference to the accompanying drawings:

[0067] Figure 1 The diagram shown is a structural schematic of a computer system provided in this embodiment. The computer system 10 includes a data encoding device ETH 11 and a data decoding device ETH 12.

[0068] In the ETH 11 data encoding device, user data is processed through the Media Access Control (MAC) and Physical Coding (PCS) sublayers before being encoded using RSFEC technology. This encoded data is then stored or transmitted. However, noise can be introduced into the encoded data during storage or transmission, leading to errors. In the ETH 12 data decoding device, RSFEC technology is first used to correct errors in the encoded data. Then, the user data is processed through the PCS and MAC layers to obtain the final user data.

[0069] For example, in practical applications, the data encoding device ETH 11 and data decoding device ETH 12 mentioned above in this embodiment can be devices that can encode and decode user data, such as mobile phones, tablets, desktops, laptops, handheld computers, laptops, ultra-mobile personal computers (UMPCs), netbooks, and servers. This embodiment does not limit the specific form of the data encoding device ETH 11 and the data decoding device ETH 12.

[0070] In addition, in some application scenarios, in this embodiment, the data encoding device ETH 11 and the data decoding device ETH 12 can be the same device. That is, this device first encodes and stores the user data according to the processing flow of the data encoding device ETH 11, and then decodes the encoded data according to the processing flow of the data decoding device ETH 12 for subsequent processing.

[0071] In related technologies, the decoding process of the ETH 12 data decoding device using RSFEC technology can be referenced. Figure 2 As shown. The data decoding device ETH 12 may include a companion computation module 121, a key equation solver (KES) 122, a search circuit 123, an error correction circuit 124, and a cache 125.

[0072] In this process, after acquiring the RSFEC-encoded code block, the data decoding device ETH 12 first calculates the syndrome of the code block through the syndrome calculation module 121 to complete the error detection calculation and determine whether the code block needs to be decoded. When it is determined that there is an error in the code block, i.e., when decoding is required, the syndrome calculation module 121 writes the code block into the buffer 125.

[0073] After the synergistic computation module 121 determines that an error exists in the code block, the critical equation solver 122 completes the calculation of the error location polynomial. In calculating the error location polynomial, the critical equation solver 122 can employ algorithms such as the Berlekamp-Massey (BM) algorithm or the Euclidean algorithm.

[0074] After the critical equation solver 122 calculates the error location polynomial, the search circuit 123 searches for potentially valid roots, i.e., error locations, based on the error location polynomial. Specifically, the search circuit 123 can use Chien search or a simplified error location polynomial equation circuit to directly solve the equation. The search method for different numbers of error locations is based on the simplification.

[0075] After the search circuit 123 locates the error, the error correction circuit 124 calculates the error value based on the error location and corrects the erroneous symbols in the code block in the buffer 125. Specifically, the error correction circuit 124 can use the Forney algorithm to calculate the error value or directly solve it using equation 2-22, which combines the error value, error location, and syndrome. The error value calculation circuit is simplified for different types of errors. Furthermore, if the storage is uncorrectable, i.e., the number of errors is greater than T, the error correction circuit 124 indicates a correction failure.

[0076] In the aforementioned related technologies, during RS decoding, for any errors in the code block, regardless of the number of errors, decoding is performed according to the maximum number of error symbols that can be corrected.

[0077] Taking RS(544,514,15) as an example, regardless of the actual number of symbol errors in a code block, decoding is performed as if there were 15 symbol errors. Specifically, the key equation solver 122 first calculates the corresponding error position polynomial for 15 symbol errors; then the search circuit 123 calculates the error position based on the error position polynomial for 15 symbol errors; and finally, the error correction circuit 124 calculates the error value and corrects the code block.

[0078] In response to the aforementioned related technologies, this embodiment provides a data processing method. In this method, when an error is determined to exist in a code block, it is first assumed that there is a sign error in the code block. An error location polynomial is calculated for the case of a single sign error, and based on the error location polynomial, possible valid roots are searched (i.e., possible error locations are found).

[0079] If a valid root is found, it means that there is indeed only one incorrect symbol in the code block. Therefore, the error value can be calculated based on the error location, and the symbol at the error location in the code block can be corrected.

[0080] If no valid root is found, it means that the code block contains more than one symbol error. Then, assuming there are two symbol errors in the code block, we calculate the error location polynomial for the case of two symbol errors, and search for possible valid roots based on the error location polynomial (i.e., find the two possible error locations).

[0081] If a valid root is found, it indicates that there are indeed two symbol errors in the code block. Therefore, the error value can be calculated based on the two error locations, and the symbols at the two error locations in the code block can be corrected.

[0082] If no valid root is found, it means the code block contains more than two symbol errors. Then, assume the code block contains three symbol errors, and so on, until the actual number, location, and value of the erroneous symbols in the code block are determined.

[0083] In the data processing method provided in this embodiment, on the one hand, it is considered that when there are erroneous symbols in a code block, the number of erroneous symbols in a code block is often not exactly T (T is the number of symbols in the code block that can be corrected). Specifically, the number of erroneous symbols in a code block follows a normal distribution, and usually more than 95% of the errors in a code block are concentrated in 3 or fewer symbols. On the other hand, compared with the scheme that calculates based on T erroneous symbols regardless of the actual number of erroneous symbols in a code block, it uses less circuit resources and is faster in calculating the corresponding error position polynomial and searching for possible roots for a small number of erroneous symbols.

[0084] Specifically, taking the calculation of the error location polynomial by the critical equation solver 122 as an example, if there are T error symbols, it would require 2T / 4T cycles to complete the calculation, where the cycle refers to the clock toggle period of the circuit. For example, for RS(544, 514, 15), it would require 30 or 60 cycles to complete the processing. However, the method provided in this embodiment can reduce the processing delay of the critical solver 122 to 1-2 cycles.

[0085] Furthermore, taking the search circuit 123 searching for the error location as an example, for the maximum number of error symbols T, the number of circuit flips may be tens of times that of the minimum single error symbol. If it is uniformly implemented according to the maximum number of error symbols, the delay and power consumption will be relatively large.

[0086] Furthermore, when the error correction circuit 124 calculates the error value, the number of circuit flips from one error symbol to T error symbols is T times, which will also increase the delay and power consumption.

[0087] Therefore, the data processing method provided in this embodiment can save decoding delay and reduce circuit power consumption.

[0088] The following is based on Figure 1 Taking the computer system shown as an example, the data processing method provided in this embodiment will be introduced. Specifically, after the data encoding device ETH 11 encodes the user data using RS code to obtain encoded data, as follows... Figure 3 As shown, the process by which the data decoding device ETH 12 decodes encoded data may include:

[0089] S201. Obtain the code block encoded using RS code (hereinafter referred to as the first code block).

[0090] The first code block can be represented as an information sequence. The following explanation uses the information sequence R(x) as the first code block. R(x) can be represented by the polynomial shown in Equation 2-1 below:

[0091] R(x)=r n-1 x n-1 +r n-2 x n-2 +...+r1 x 1 +r0 2-1

[0092] Where x represents the position in the polynomial, r n-1 ,r n-2 ,...,r1,r0 represent the received symbols, and n represents the number of symbols included in the first code block.

[0093] For example, taking a code block with the first code block being RS(544, 514, 15) as an example, n is 544, meaning the first code block includes 544 symbols, with each symbol corresponding to 10 bits. Among the 544 symbols included in the first code block, there are 514 symbols of user data and 30 symbols of check codes, resulting in 15 symbols that can correct errors.

[0094] S202. Calculate the syndrome of the first code block.

[0095] According to the encoding principle, R(x) has 2T roots, for a 0 ,a 1 ,...,a 2T-1 :

[0096] x = a 0 Substituting into R(x) yields S1;

[0097] x = a 1 Substituting into R(x) yields S2;

[0098] …

[0099] x = a 2T-1 Substituting into R(x) yields S 2T .

[0100] The syndrome of the first code block can be expressed as the polynomial shown in Equation 2-2:

[0101] S(x)=S 2t x 2t-1 +S 2t-1 x 2t-2 +...+S3x 2 +S2x+S1 2-2

[0102] Where x represents the position in the polynomial, S2t ,S 2t-1 S1, ..., S2, S1 represent the 2t syndromes of the first code block. Here, 2t is the number of check codes in the first code block, and t is the maximum number of symbols that can be corrected.

[0103] Suppose the positions of the t errors are β1...β t Error values ​​correspond to E1…Et;

[0104] The relationship between the corrector (adjoint result) and the error location of the received sequence R(x) and the error value is as follows:

[0105] Formula 2-22:

[0106]

[0107] S203. Determine whether there is an error in the first code block based on the syntactic expression of the first code block.

[0108] If it is determined that there are no errors in the first code block, then there is no need to decode the first code block.

[0109] If an error is found in the first code block, then proceed to S204.

[0110] The specific process of determining whether there is an error in the first code block based on the syntactic expression of the first code block can be referred to relevant existing technologies.

[0111] S204. Calculate the error position polynomial of the first code block when there is only one symbol error.

[0112] Specifically, when there are t erroneous symbols in the first code block, where t is the maximum number of symbols that the first code block can correct, the error position polynomial of the first code block can be expressed as Equation 2-2:

[0113] σ(x)=σ t x t +σ t-1 x t-1 +...+σ2x 2 +σ1x+σ0=(1-β1x)*(1-β2x)*...*(1-β t x) 2-2

[0114] Where, σ t σ0 represents the coefficients of the term from degree t to the constant term in the error polynomial of the first code block, and σ0 is usually taken as 1.

[0115] Therefore, in the case of only one symbol error, the error position polynomial corresponding to the first code block can be expressed as Equation 2-3:

[0116] σ(x)=σ1x+σ0 2-3

[0117] S205. Search for whether there exists an error position x0 that satisfies the error position polynomial 2-3.

[0118] Specifically, according to Newton's identity, if a codeword has T error symbols, then the syndrome of its first codeword and the polynomial of the error location have the following correspondence as shown in Equation 2-4:

[0119]

[0120] When there is only one error symbol, Equation 2-4 can be transformed into Equation 2-5:

[0121]

[0122] Therefore, if an error position x0 is satisfied in the error position polynomial 2-3, the value of σ1 can be quickly calculated according to equation 2-5.

[0123] Furthermore, after calculating the value of σ1 according to Equation 2-5, substituting the value of σ1 into Equation 2-3, the error position x0 can be obtained.

[0124] After obtaining the error position x0, execute S206 to calculate the error value y0 corresponding to the error position x0 and correct the first code block.

[0125] If the value of σ1 cannot be calculated according to Equation 2-5, it means that there is more than one erroneous symbol in the first code block, and then S207 is executed.

[0126] S206. Calculate the error value y0 corresponding to the error position x0 and correct the first code block.

[0127] According to Formula 2-22, when there is only one error in the link.

[0128] Therefore, E1 = S1. Thus, the corresponding error value y0 can be calculated directly and quickly.

[0129] Specifically, after determining the error location x0, the error location x0 and the associated results S1 to S2 can be used to determine the error location x0 and the associated results S1 to S2. 2T Substitute the values ​​into formula 2-22 to obtain the error value y0, and correct the value of the error position x0 in the first code block based on the error value y0 to complete the decoding process.

[0130] S207. Calculate the error position polynomial corresponding to the first code block when there are two symbol errors.

[0131] According to Equation 2-3 above, in the case of two sign errors, the error position polynomial corresponding to the first code block can be expressed as Equation 2-6:

[0132] σ(x)=σ2x 2 +σ1x+σ0 2-6

[0133] S208. Search for whether there exist two error positions x0 and x1 that satisfy the error position polynomial 2-3.

[0134] Based on Equation 2-4 above, in the case of two incorrect symbols, Equation 2-4 can be transformed into Equation 2-7:

[0135]

[0136] Therefore, if there are two error locations that satisfy the error location polynomial 2-3, the values ​​of σ1 and σ2 can be calculated according to equation 2-7.

[0137] Furthermore, after calculating the values ​​of σ1 and σ2 according to Equation 2-7, substituting the values ​​of σ1 and σ2 into Equation 2-6, we can obtain two error positions x0 and x1.

[0138] After obtaining the error positions x0 and x1, S209 is executed to calculate the error values ​​y0 and y1 corresponding to the error positions x0 and x1 respectively, and to correct the first code block.

[0139] If the values ​​of σ1 and σ2 cannot be calculated according to Equation 2-7, it means that there are more than two erroneous symbols in the first code block, and then S210 is executed.

[0140] S209. Calculate the error values ​​y0 and y1 corresponding to the error positions x0 and x1 respectively, and correct the first code block.

[0141] Based on the known error locations x0, x1, and the associated results S1~S 2T Substituting into formula 2-22, we obtain the error values ​​y0 and y1.

[0142] Specifically, after determining the error positions x0 and x1, the error positions x0 and x1 can be substituted into the syntactic equation 2-2 to obtain the error values ​​y0 and y1. The values ​​of the error positions x0 and x1 in the first code block are then corrected based on the error values ​​y0 and y1 to complete the decoding process.

[0143] S210. Calculate the error position polynomial corresponding to the first code block when there are three symbol errors.

[0144] According to Equation 2-2 above, in the case of three symbol errors, the error position polynomial corresponding to the first code block can be expressed as Equation 2-8:

[0145] σ(x)=σ3x 3 +σ2x 2 +σ1x+σ0 2-8

[0146] S211. Search for whether there exist three error positions x0, x1 and x2 that satisfy the error position polynomial 2-8.

[0147] Specifically, similar to S205 and S208, we can simplify using Equation 2-4 and calculate the values ​​of σ1, σ2, and σ3 corresponding to the three error positions. After calculating the values ​​of σ1, σ2, and σ3, we can substitute these values ​​into Equation 2-8 to obtain the three error positions x0, x1, and x2.

[0148] After obtaining the three error locations x0, x1, and x2, referring to the content of S206 and S209 above, we can obtain the three error locations x0, x1, x2, and the adjoint results S1 to S209. 2T Substituting these values ​​into Equation 2-22, we obtain the error values ​​y0, y1, and y2. Based on these error values ​​y0, y1, and y2, we correct the values ​​of the three error positions x0, x1, and x2 in the first code block, thus completing the decoding process.

[0149] S212. If three error positions satisfying the error position polynomial 2-8 cannot be found, then for four-symbol errors, five-symbol errors, and so on, calculate the error position polynomial corresponding to the first code block and search for error positions. Continue until a valid error position and its count are found. Then, based on the found error positions and their counts, calculate the error value and correct the first code block. Repeated symbols are not discussed further.

[0150] Specifically, when calculating the error position polynomial for the first code block in the case of more than M symbols (where M≥2), the formula for the case of M-1 symbol errors can be used as a basis. Through algorithm iteration (specifically, it can be achieved by using the BM algorithm, IBM algorithm, RIBM algorithm, or direct circuit solution), the error position polynomial for the first code block with M symbol errors can be obtained. This can reduce the number of circuits for parallel processing and save circuit power consumption.

[0151] The data processing method described above in this embodiment will be explained below in conjunction with the structure of the ETH 12 data decoding device. Specifically, as... Figure 4 The method includes:

[0152] S301. Input the first code block into the syntactic calculation module 121.

[0153] S302, the synergy calculation module 121 calculates the synergy of the first code block.

[0154] If the syndrome of the first code block determines that there are no errors in the first code block, then the user data in the first code block is output.

[0155] If an error is determined in the first code block based on the syndrome of the first code block, then execute S303.

[0156] S303, the key equation solver 122 calculates the error location polynomial corresponding to a sign error, and the search circuit 123 searches for possible valid and legal error locations.

[0157] If a valid error location is found, then S304 is executed.

[0158] If no valid error location is found, execute S305.

[0159] S304. The error correction circuit 124 calculates the corresponding error value and corrects the first code block in the buffer 125.

[0160] After correcting the error in the first code block using S304, the user data in the first code block is output.

[0161] S305, the key equation solver 122 calculates the error position polynomials corresponding to the two symbol errors, and the search circuit 123 searches for two possible valid error positions.

[0162] If two valid and valid error locations are found, then execute S306.

[0163] If no two valid error locations are found, then execute S307.

[0164] S306. The error correction circuit 124 calculates the two corresponding error values ​​and corrects the first code block in the buffer 125.

[0165] After correcting the error in the first code block using S306, the user data in the first code block is output.

[0166] S307, the key equation solver 122 calculates the error position polynomials corresponding to the three sign errors, and the search circuit 123 searches for three possible valid error positions.

[0167] If three valid and valid error locations are found, then execute S308.

[0168] If no three valid error locations are found, then execute S309.

[0169] S308. The error correction circuit 124 calculates the three corresponding error values ​​and corrects the first code block in the buffer 125.

[0170] After correcting the errors in the first code block via S308, the user data in the first code block is output.

[0171] S309, the key equation solver 122 calculates the error position polynomials corresponding to the four symbol errors, and the search circuit 123 searches for the four possible valid error positions.

[0172] If four valid and valid error locations are found, then execute S310.

[0173] If no four valid error positions are found, the error position polynomials corresponding to the five symbol errors are calculated, and the search circuit 123 searches for the five possible valid error positions. This process continues until t symbol errors are encountered (t is the maximum number of symbols that can be corrected in the first code block), at which point S311 below is executed.

[0174] S310, The error correction circuit 124 calculates the four corresponding error values ​​and corrects the first code block in the buffer 125.

[0175] After correcting the error in the first code block via S309, the user data in the first code block is output.

[0176] S311, the key equation solver 122 calculates the error position polynomials corresponding to t symbol errors, and the search circuit 123 searches for t possible valid and legal error positions.

[0177] If t valid and valid error locations are found, then execute S312.

[0178] If no valid and legal error positions are found (t), it means that the number of error symbols in the first code block is greater than t, i.e., the data cannot be corrected, and a correction failure indication is output.

[0179] S312. The error correction circuit 124 calculates the corresponding t error values ​​and corrects the first code block in the buffer 125.

[0180] After correcting the errors in the first code block via S308, the user data in the first code block is output.

[0181] The data processing method provided in this embodiment starts with a symbol error and, for different numbers of errors, employs different error location polynomial calculation processes, different error location search processes, and different error value calculation and correction processes. Compared with existing technologies, this method can achieve the effects of saving circuit resources, speeding up the calculation process, and reducing power consumption.

[0182] The above text combines Figures 3-4The data processing method provided according to this embodiment has been described in detail. The various devices corresponding to the data processing method provided in this embodiment will be described below.

[0183] like Figure 5 The diagram shown is a structural schematic of a data processing apparatus provided in this embodiment. The data processing apparatus includes:

[0184] Acquisition unit 401 is used to acquire the first code block encoded using the Solomon RS code.

[0185] The syndication calculation unit 402 is used to calculate the syndication of the first code block.

[0186] The error location search unit 403 is used to calculate the error location polynomial of the first code block in the case of p symbol errors, starting from p=1, and search for whether there are p error locations that satisfy the error location polynomial of the first code block, until M error locations that satisfy the first error location polynomial are found, where the first error location polynomial is the error location polynomial of the first code block in the case of M symbol errors.

[0187] The error correction unit 404 is used to calculate the error value corresponding to each of the M error locations based on the M error locations and the syndrome.

[0188] Error correction unit 404 is used to correct the values ​​of the M error positions in the first code block using the error values ​​corresponding to the M error positions respectively.

[0189] Optionally, the error location search unit 403 is used to sequentially calculate the error location polynomial of the first code block in the case of p symbol errors, starting from p=1, including:

[0190] When p≥2, the error location search unit 403 is used to calculate the error location polynomial of the first code block corresponding to p symbol errors through algorithm iteration based on the formula calculated previously for the case of p-1 symbol errors.

[0191] Optionally, the error position polynomial of the first code block corresponding to p symbol errors can be obtained through algorithm iteration, including: obtaining the error position polynomial of the first code block corresponding to p symbol errors through any one of the BM algorithm, RIBM algorithm or Euclidean algorithm.

[0192] Optionally, when p=1, the error location search unit 403 is specifically used to calculate the second error location polynomial of the first code block in the case of one symbol error, wherein the second error location polynomial satisfies the following formula:

[0193] Formula 1: σ(x) = σ1x + σ0

[0194] Where σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block;

[0195] The error location search unit 403 is also specifically used to search for the value of σ1 that satisfies the following formula two:

[0196]

[0197] Where S1, S2, ..., S t This represents the first to tth of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct.

[0198] If a value of σ1 that satisfies Formula 2 is found, then the error location search unit 403 is specifically used to determine the error location in the first code block based on the value of σ1 and Formula 1.

[0199] If a value of σ1 satisfying Formula 2 cannot be found, then the error location search unit 403 is specifically used to determine that there exists an error location that satisfies the error location polynomial of the first code block.

[0200] Optionally, the error correction unit 404 is used to calculate the error value corresponding to each of the M error positions based on the M error positions and the syndrome. Specifically, the error correction unit 404 is used to substitute the error position in the first code block determined according to the value of σ1 and Formula 1 into the syndrome to calculate the error value corresponding to the error position.

[0201] Optionally, the error location search unit 403 is also specifically used to calculate the third error location polynomial of the first code block in the case of two symbol errors, wherein the third error location polynomial satisfies the following formula three:

[0202] σ(x)=σ2x 2 Formula 3: +σ1x+σ0

[0203] Where σ2 represents the coefficient of the quadratic term in the erroneous polynomial of the first code block, σ1 represents the coefficient of the linear term in the erroneous polynomial of the first code block, and σ0 represents the constant term in the erroneous polynomial of the first code block.

[0204] The error location search unit 403 is also specifically used to search for the values ​​of σ1 and σ2 that satisfy the following formula four:

[0205]

[0206] Where S1, S2, ..., S t ,S t+1 ,S t+2This represents the first to the (t+2)th of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct.

[0207] If the values ​​of σ1 and σ2 that satisfy Formula 2 are found, the error location search unit 403 is also specifically used to determine the two error locations in the first code block based on the values ​​of σ1 and σ2 and Formula 1.

[0208] If the values ​​of σ1 and σ2 that satisfy Formula 2 cannot be found, the error position search unit 403 is also specifically used to determine that there are no two error positions that satisfy the error position polynomial of the first code block.

[0209] Optionally, the error correction unit 404 is used to calculate the error value corresponding to each of the M error locations based on the M error locations and the syndrome, including:

[0210] The error correction unit 404 is specifically used to substitute the two error positions in the first code block determined according to the values ​​of σ1 and σ2 and Formula 1 into the syndrome to calculate the error values ​​corresponding to the two error positions respectively.

[0211] Optional, where p is not greater than the maximum number of symbols that the first code block can correct.

[0212] For a more detailed description of the acquisition unit 404, the accompanying calculation unit 402, the error location search unit 403, and the error correction unit 404, please refer to [the relevant documentation]. Figure 3 and Figure 4 The relevant descriptions of the methods shown will not be repeated here.

[0213] Figure 6 This is a schematic diagram of another data processing device provided in this embodiment. The data processing device 50 can be a chip or a system-on-a-chip.

[0214] The data processing device 50 may include some or all of the following components: processor 501, communication line 508, memory 503, and at least one communication interface 502.

[0215] The processor 501 is used to execute all or part of the steps performed by the data decoding device ETH12 in the data processing method provided in this embodiment.

[0216] Specifically, processor 501 may include a general-purpose central processing unit (CPU), and processor 401 may also include a microprocessor, a field-programmable gate array (FPGA), a digital signal processor (DSP), or an application-specific integrated circuit (ASIC), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0217] In a specific implementation, as one example, the processor 501 may include one or more CPUs, for example... Figure 6 CPU0 and CPU1 in the CPU.

[0218] In a specific implementation, as one embodiment, the data processing device 50 may include multiple processors, such as... Figure 6 Processors 501 and 507 are mentioned. Each of these processors can be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. A processor here can refer to one or more devices, circuits, and / or processing cores used to process, for example, data (computer program instructions).

[0219] Additionally, memory 503 can be volatile memory or non-volatile memory, or may include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). Memory 503 may exist independently and be connected to processor 501 via communication line 508. Memory 503 may also be integrated with processor 501.

[0220] The memory 503 stores computer instructions. The processor 501 can execute all or part of the steps in the data processing method provided in this embodiment by executing the computer instructions stored in the memory 503.

[0221] Optionally, the computer execution instructions in this embodiment may also be referred to as application code, and this embodiment does not specifically limit this.

[0222] In addition, the communication interface 502 uses any transceiver-like device for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), etc.

[0223] In addition, communication line 508 is used to connect the various components in data processing device 50. Specifically, communication line 508 may include data bus, power bus, control bus, and status signal bus, etc. However, for clarity, all buses are labeled as communication line 508 in the figure.

[0224] It should be understood that the data processing apparatus 50 according to this embodiment may correspond to the data processing apparatus 40 in this embodiment, and may correspond to the corresponding entity executing the data processing method according to this embodiment, and the above and other operations and / or functions of each module in the data processing apparatus 50 are respectively for implementing Figure 3 or Figure 4 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0225] The method steps in this embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in RAM, flash memory, ROM, PROM, EPROM, EEPROM, registers, hard disk, portable hard disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in a data processing device or terminal device. Of course, the processor and storage medium can also exist as discrete components in the data processing device or terminal device.

[0226] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in this embodiment are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a data processing device, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); or it can be a semiconductor medium, such as an SSD.

[0227] In this embodiment, unless otherwise specified or there is a logical conflict, the terms and / or descriptions of different implementations are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0228] In this embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. Other quantifiers are similar. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Furthermore, for elements appearing in the singular forms "a," "an," and "the," unless explicitly specified by the context, it does not mean "one or only one," but rather "one or more than one." For example, "a device" means one or more such devices. Moreover, "at least one of..." means one or any combination of subsequent related objects. For example, "at least one of A, B, and C" includes A, B, C, AB, AC, BC, or ABC. In the textual description of this embodiment, the character " / " generally indicates an "or" relationship between the preceding and following related objects; in the formula of this embodiment, the character " / " indicates a "division" relationship between the preceding and following related objects.

[0229] It is understood that the various numerical designations used in this embodiment are merely for descriptive convenience and are not intended to limit the scope of this embodiment. The order of the process numbers does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

Claims

1. A data processing method, characterized in that, The method includes: Obtain the first code block encoded using the Solomon RS code; Calculate the syndrome of the first code block; Starting from p=1, the error position polynomial of the first code block is calculated sequentially when there are p symbol errors, and the existence of p error positions that satisfy the error position polynomial of the first code block is searched until M error positions that satisfy the first error position polynomial are found. The first error position polynomial is the error position polynomial of the first code block when there are M symbol errors, p is not greater than the maximum number of symbols that the first code block can correct, and M≥2. Based on the M error locations and the syndrome, calculate the error value corresponding to each of the M error locations; The values ​​of the M error positions in the first code block are corrected using the error values ​​corresponding to the M error positions.

2. The method according to claim 1, characterized in that, When p ≥ 2, the calculation of the error position polynomial of the first code block with p symbol errors includes: Based on the previously calculated formula for the case of p-1 symbol errors, the error position polynomial of the first code block corresponding to p symbol errors is obtained through algorithm iteration.

3. The method according to claim 2, characterized in that, The process of iterating through the algorithm to find the error position polynomial of the first code block corresponding to p symbol errors includes: Find the error position polynomial of the first code block corresponding to p symbol errors using any one of the Camp Massey BM algorithm, IBM algorithm, RIBM algorithm, or Euclidean algorithm.

4. The method according to any one of claims 1-3, characterized in that, When p = 1, the calculation of the error position polynomial of the first code block under the condition of p symbol errors, and the search for whether there are p error positions that satisfy the error position polynomial of the first code block, includes: Calculate the second error position polynomial of the first code block in the case of one sign error, wherein the second error position polynomial satisfies the following formula: Formula 1: σ(x) = σ1x + σ0 Where σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block; Search for the value of σ1 that satisfies the following formula: Where S1, S2, ..., S t This represents the first to tth of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct. If a value of σ1 that satisfies Formula 2 is found, then the error location in the first code block is determined according to the value of σ1 and Formula 1. If a value of σ1 satisfying Formula 2 cannot be found, then it is determined that there is no error position that satisfies the error position polynomial of the first code block.

5. The method according to claim 4, characterized in that, The step of calculating the error value corresponding to each of the M error locations based on the M error locations and the syndrome includes: The error value corresponding to the error position is calculated by substituting the value of σ1 and the error position in the first code block determined by Formula 1 into the syndrome.

6. The method according to claim 4, characterized in that, After failing to find a value of σ1 that satisfies Formula 2, the calculation of the error position polynomial of the first code block in the case of p symbol errors, and the search for whether there are p error positions that satisfy the error position polynomial of the first code block, further includes: Calculate the third error position polynomial of the first code block in the case of two symbol errors, wherein the third error position polynomial satisfies the following formula: σ(x) = σ2x 2 + σ1x + σ0 Equation 3 Where σ2 represents the coefficient of the quadratic term in the error polynomial of the first code block, σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block. Search for values ​​of σ1 and σ2 that satisfy the following formula four: Where S1, S2, ..., S t ,S t+1 ,S t+2 This represents the first to the (t+2)th of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct. If values ​​of σ1 and σ2 that satisfy Formula 2 are found, then the two error locations in the first code block are determined according to the values ​​of σ1 and σ2 and Formula 1. If the values ​​of σ1 and σ2 satisfying Formula 2 cannot be found, it is determined that there are no two error positions that satisfy the error position polynomial of the first code block. The error position polynomial of the first code block in the case of three symbol errors is calculated, and the search continues until the M error positions that satisfy the first error position polynomial are found.

7. The method according to claim 6, characterized in that, The step of calculating the error value corresponding to each of the M error locations based on the M error locations and the syndrome includes: The error values ​​corresponding to the two error positions in the first code block, determined based on the values ​​of σ1 and σ2 and the formula, are substituted into the syntactic equation to calculate the error values ​​corresponding to the two error positions.

8. A data processing apparatus, characterized in that, The data processing device includes: The acquisition unit is used to acquire the first code block encoded using the Solomon RS code. A syntactic calculation unit is used to calculate the syntactic of the first code block; The error location search unit is used to calculate the error location polynomial of the first code block with p symbol errors, starting from p=1, and search for whether there are p error locations that satisfy the error location polynomial of the first code block, until M error locations that satisfy the first error location polynomial are found, wherein the first error location polynomial is the error location polynomial of the first code block with M symbol errors, p is not greater than the maximum number of symbols that the first code block can correct, and M≥2; The error correction unit is used to calculate the error value corresponding to each of the M error locations based on the M error locations and the syndrome. The error correction unit is used to correct the values ​​of the M error positions in the first code block using the error values ​​corresponding to the M error positions respectively.

9. The data processing apparatus according to claim 8, characterized in that, The error location search unit is used to calculate the error location polynomial of the first code block in the case of p symbol errors, starting from p=1, including: When p≥2, the error location search unit is used to calculate the error location polynomial of the first code block corresponding to p symbol errors by iterating the algorithm based on the formula calculated previously for the case of p-1 symbol errors.

10. The data processing apparatus according to claim 9, characterized in that, The process of iterating through the algorithm to find the error position polynomial of the first code block corresponding to p symbol errors includes: Find the error position polynomial of the first code block corresponding to p symbol errors using any one of the Camp Massey BM algorithm, IBM algorithm, RIBM algorithm, or Euclidean algorithm.

11. The data processing apparatus according to any one of claims 8-10, characterized in that, When p=1, the error location search unit is specifically used to calculate the second error location polynomial of the first code block in the case of one symbol error, wherein the second error location polynomial satisfies the following formula: Formula 1: σ(x) = σ1x + σ0 Where σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block; The error location search unit is also specifically used to search for a value of σ1 that satisfies the following formula: Where S1, S2, ..., S t This represents the first to tth of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct. If a value of σ1 satisfying Formula 2 is found, the error location search unit is specifically used to determine the error location in the first code block based on the value of σ1 and Formula 1. If a value of σ1 satisfying Formula 2 cannot be found, the error location search unit is specifically used to determine that there exists an error location that satisfies the error location polynomial of the first code block.

12. The data processing apparatus according to claim 11, characterized in that, The error correction unit is configured to calculate the error value corresponding to each of the M error locations based on the M error locations and the syndrome, including: The error correction unit is specifically used to substitute the error position in the first code block determined according to the value of σ1 and the formula into the syntactic expression to calculate the error value corresponding to the error position.

13. The data processing apparatus according to claim 11, characterized in that, The error location search unit is further specifically used to calculate the third error location polynomial of the first code block in the case of two symbol errors, wherein the third error location polynomial satisfies the following formula three: σ(x) = σ2x 2 + σ1x + σ0 Equation 3 Where σ2 represents the coefficient of the quadratic term in the error polynomial of the first code block, σ1 represents the coefficient of the linear term in the error polynomial of the first code block, and σ0 represents the constant term in the error polynomial of the first code block. The error location search unit is also specifically used to search for values ​​of σ1 and σ2 that satisfy the following formula four: Where S1, S2, ..., S t ,S t+1 ,S t+2 This represents the first to the (t+2)th of the 2t syndromes in the first code block, where t is the maximum number of symbols that the first code block can correct. If the values ​​of σ1 and σ2 that satisfy Formula 2 are found, the error location search unit is further specifically used to determine two error locations in the first code block based on the values ​​of σ1 and σ2 and Formula 1. If the values ​​of σ1 and σ2 that satisfy Formula 2 cannot be found, the error location search unit is further used to determine that there are no two error locations that satisfy the error location polynomial of the first code block.

14. The data processing apparatus according to claim 13, characterized in that, The error correction unit is configured to calculate the error value corresponding to each of the M error locations based on the M error locations and the syndrome, including: The error correction unit is specifically used to substitute the two error positions in the first code block determined according to the values ​​of σ1 and σ2 and the formula into the syntactic equation to calculate the error values ​​corresponding to the two error positions respectively.

15. A data processing apparatus, characterized in that, It includes a processor and an interface, the processor receiving or sending data through the interface, and the processor being used to implement the method as described in any one of claims 1-7.

16. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed on a processor, implement the method as described in any one of claims 1-7.

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