Automobile electronic and electrical architecture pre-evaluation system based on virtualization technology

Abstract

The application discloses a kind of based on virtualization technology's automobile electronic and electrical architecture early evaluation system, including computing unit, upper layer communication network, virtual area control unit, controller bus, virtual bottom control unit, high-speed real-time communication network, object model unit, time synchronization network. By virtualizing area controller, bottom controller into virtual area control unit and virtual bottom control unit, the optimization of automobile electronic development process is realized, the performance of MCU is fully evaluated and exerted, the development cycle is shortened, the development cost is reduced, and the product competitiveness is improved. High-speed real-time communication network is used as the interaction mode with object model. By virtualizing peripheral circuit, the electrical signal is converted into communication message, which bridges the differences between different controllers / object models, realizes the networking of vehicle-level object model and controller, and thus realizes the testing of vehicle-level electronic and electrical architecture.

Description

Technical Field

[0001] This invention belongs to the field of automotive electronics technology, and in particular relates to a preliminary evaluation system for automotive electronic and electrical architecture based on virtualization technology. Background Technology

[0002] Energy efficiency is driving the development of traditional powertrain systems towards high-voltage hybrid and electric engines, with increasing system integration. Autonomous driving demands the fusion of multiple sensors scattered across functionally isolated control units. Network connectivity and infotainment have transformed the car into a distributed IT system: capable of accessing the cloud, OTA upgrades, high-speed access to map services, multimedia content, and interaction with other vehicles and surrounding infrastructure. This has led to rapid changes in automotive electronic architecture, causing it to evolve towards a centrally integrated solution, gradually based on a unified hardware abstraction model, achieving SOA (Service-Oriented Architecture) architecture and service-based communication.

[0003] However, the hundreds of ECUs (Electronic Control Units) and MCUs (Microcontroller Units) in today's automobiles, along with the large amount of embedded software code running on them and the complex vehicle communication networks such as CAN and FlexRay, make every upgrade to the electronic and electrical architecture a huge challenge for OEMs / suppliers. If they cannot accurately assess the impact of changes to the control scheme (such as chip replacement selection, peripheral circuit optimization, and communication network upgrades) on the original control system (whether computing power, storage area, I / O resources are sufficient, whether the communication load is acceptable, whether the system real-time performance can be guaranteed, how much the system cost will decrease, how much the wiring harness weight will be reduced, etc.), they will not be able to effectively cope with the various new electrification and intelligence demands caused by market evolution.

[0004] In the traditional V-type controller development process, methods such as SIL (software in loop), PIL (processor in loop), and HIL (hardware in loop) are used to ensure the development quality of controller software and hardware. However, when faced with an electronic and electrical network composed of multiple controllers at different levels, the existing testing methods all have their limitations.

[0005] The purpose of SIL testing is to verify errors in automated code generation tools or handwritten code; it is simply a check for bugs in the code itself.

[0006] PIL testing is conducted on a development board / prototype system equipped with the target MCU. Its main purpose is to verify computational load, system real-time performance, storage resource usage, and correctness of the compilation toolchain. It targets a single controller scenario and lacks an object model, so the test cases are relatively simple.

[0007] HIL testing often integrates a relatively complete object model, which can fully test the MCU and peripheral circuits. However, this is already the late stage of controller development, with little room for optimization, and it is also limited to scenarios involving a single controller or a small number of controllers.

[0008] As can be seen, the current automotive control system development process lacks a testing method that can comprehensively evaluate the various performance aspects of the controller in the early stages of controller development.

[0009] The following are examples of publicly available technical solutions.

[0010] The technical solution of existing technology 1:

[0011] The patent application with publication number CN115617009A, entitled "Virtual Development Environment Apparatus, Method and Recording Medium", mentions a scheme to use a virtual ECU to replace the real ECU and perform joint simulation with the object model in the computer. The purpose is to verify the performance of the real ECU through virtual means before the real ECU is developed, so as to predict whether the performance of the real ECU can be achieved, and ultimately reduce changes in the hardware development process and shorten the R&D cycle.

[0012] Disadvantages of existing technology 1:

[0013] Regarding the development of vehicle-level electronic and electrical architecture, this patent has the following drawbacks:

[0014] 1) Evaluating the performance of a single ECU only makes it impossible to perform global optimization from the perspective of multiple controllers and communication networks at the overall architecture level;

[0015] 2) It cannot guarantee real-time performance and does not have time synchronization function, which makes it unable to achieve synchronous simulation of multiple object models, and also limits its performance optimization capabilities to a single ECU.

[0016] Technical solution of existing technology 2:

[0017] The patent application CN114459770A, entitled "Automotive Electronic and Electrical Architecture Test Bench", mentions a test bench that allows vehicle controllers to be no longer limited by their installation location, thereby enabling more flexible system-level testing.

[0018] Disadvantages of existing technology 2:

[0019] This test bench is designed for the late-stage verification phase of electronic and electrical architecture development. At this stage, all controllers are already in the integration testing phase, and optimization can only be made in terms of wiring harness routing and electromagnetic interference resistance from the perspective of spatial layout, but not in terms of control performance (chip utilization efficiency, communication network utilization efficiency, etc.). Summary of the Invention

[0020] Based on the problems and defects of existing technologies, this invention proposes a pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology. This system can simulate and test the key controller network of the whole vehicle, thereby achieving accurate evaluation of various indicators of the proposed automotive electronic and electrical architecture. This helps OEMs / suppliers to optimize the electronic and electrical architecture, communication schemes, and controller schemes in advance during the R&D process.

[0021] To achieve the above objectives, the present invention provides the following technical solution:

[0022] A preliminary evaluation system for automotive electronic and electrical architecture based on virtualization technology includes a computing unit, an upper-layer communication network, a virtual area control unit, a controller bus, a virtual lower-layer control unit, a high-speed real-time communication network, an object model unit, and a time synchronization network; wherein:

[0023] The computing unit is used to simulate the top-level control system of the vehicle to calculate the top-level vehicle control requirements and send them to the various virtual area control units through the upper-level communication network.

[0024] The virtual area control unit is used to decompose the top-level vehicle control requirements into the control requirements of each underlying subsystem, receive the subsystem information fed back by the virtual underlying control unit, calculate the control commands of the subsystem, and send them to the virtual underlying control unit through the controller bus, or directly send the control commands to a specific object model unit through the high-speed real-time communication network, and receive the sensor information returned by the specific object model unit as the control input through the high-speed real-time communication network.

[0025] The virtual low-level control unit is used to calculate the control commands of the object model unit based on the control commands of the subsystem and the sensor information returned by the specific object model unit through the high-speed real-time communication network. The control commands are then sent to the specific object model unit through the high-speed real-time communication network to implement the control behavior.

[0026] The object model unit is used to run the object model in real time and uses a time synchronization network to synchronize the simulation of the model.

[0027] As a further embodiment of the present invention, the computing unit is a vehicle-mounted high-performance central computing unit, or a computing platform composed of one or more high-performance computers.

[0028] As a further aspect of the present invention, the computing unit communicates with a high-speed real-time communication network via Ethernet and interacts directly with a specific object model unit.

[0029] As a further embodiment of the present invention, the upper-layer communication network is implemented through Ethernet or high-speed CAN network, and the topology is bus, ring or mesh. At the same time, the upper-layer communication network has a redundant structure, consisting of two or more identical CAN networks, or each virtual area control unit is connected to an Ethernet network through two or more ports.

[0030] As a further aspect of the present invention, before the area controller to be tested is developed, a virtual area control unit is used to simulate a real area controller in order to achieve testing of the electronic and electrical architecture.

[0031] As a further embodiment of the present invention, the virtual area control unit includes a controller virtualization module, a system management and signal processing module, and a communication module. The controller virtualization module is used to virtualize the area controller to be tested. The system management and signal processing module is used to manage the working status of the controller virtualization module and the communication module. The communication module is used to realize communication functions with the outside world. The virtualization module is selected to be implemented using an FPGA module equipped with the target MCU chip design file or a real MCU chip.

[0032] As a further embodiment of the present invention, the controller bus is a subordinate sub-network of the virtual region control unit, used to transmit the control commands of the subsystem calculated by the virtual region control unit to each virtual lower-level control unit, and to transmit the subsystem information fed back by the virtual lower-level control unit back to the virtual region control unit.

[0033] As a further aspect of the present invention, before the underlying controller to be tested is developed, a virtual underlying control unit is used to simulate the real underlying controller in order to achieve the testing of the electronic and electrical architecture.

[0034] As a further embodiment of the present invention, the high-speed real-time communication network is a real-time high-speed Ethernet.

[0035] As a further aspect of the present invention, in the time synchronization network, a certain object model unit is selected as the master node, providing a time scale as the simulation benchmark; other object model units are slave nodes, which only use the time scale provided by the master node to trigger simulation tasks at specific time intervals.

[0036] By adopting the above technical solutions, this invention can provide the following beneficial effects in the development of automotive electronic and electrical architecture:

[0037] (1) By virtualizing the regional controller and the underlying controller into virtual regional control unit and virtual underlying control unit, the automotive electronics development process can be optimized, the performance of MCU can be fully evaluated and utilized, the R&D cycle can be shortened, the R&D cost can be reduced, and the product competitiveness can be enhanced.

[0038] (2) High-speed real-time communication network is used as the way to interact with the object model. By virtualizing the peripheral circuits and converting electrical signals into communication messages, the differences between different controllers / object models are bridged, and the networking of the vehicle-level object model and the controller is realized, thereby realizing the testing of the vehicle-level electronic and electrical architecture. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of a pre-evaluation system architecture for automotive electronic and electrical architecture based on virtualization technology, provided for an embodiment of the present invention.

[0041] Figure 2 This is a schematic diagram of a virtual region control unit provided in an embodiment of the present invention.

[0042] Figure 3 This is a schematic diagram of a virtual underlying control unit provided in an embodiment of the present invention. Detailed Implementation

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0044] This invention proposes a preliminary evaluation system for automotive electronic and electrical architecture based on virtualization technology. Its main structure and working principle are as follows:

[0045] The system consists of several parts, such as a computing unit, an upper-layer communication network, a virtual area control unit, a controller bus, a virtual lower-layer control unit, a high-speed real-time communication network, an object model unit, and a time synchronization network. Figure 1 As shown.

[0046] The computing unit simulates the vehicle's top-level control systems, such as the automatic driving controller, intelligent cockpit controller, and infotainment controller, to calculate the top-level vehicle control requirements. These requirements are then sent to various virtual area control units via an upper-level communication network. The virtual area control units decompose the top-level vehicle control requirements into control requirements for each lower-level subsystem. They receive subsystem information from the virtual lower-level control units, calculate the subsystem control commands, and send them to the virtual lower-level control units via the controller bus. Alternatively, they can directly send the control commands to specific object model units via a high-speed real-time communication network and receive sensor information returned by these specific object model units as control input. Based on the subsystem control commands and the sensor information received from the specific object model units via the high-speed real-time communication network, the virtual lower-level control units calculate the object model unit's control commands and send them to the specific object model units via the high-speed real-time communication network to implement the control behavior. All object model units can run their object models in real-time and utilize a time synchronization network for model simulation synchronization.

[0047] In this system, the upper-level communication network, virtual area control unit, controller bus, and virtual lower-level control unit constitute the electronic and electrical architecture that meets the functional requirements of a specific vehicle model, i.e., the object under test. The computing unit and object model unit provide control commands and signal feedback from the top and bottom levels, respectively, and can be considered as test stimuli for the object under test. By conducting online testing and recording of indicators such as communication load, reliability, chip computing load, storage space utilization, I / O and other control resource utilization, and task real-time performance, the design rationality of the object under test can be effectively evaluated, and modification schemes can be proposed.

[0048] Specifically, the various parts of this system are described below:

[0049] I. Calculation Unit

[0050] The computing unit performs large-scale computations and data processing to simulate the control functions of vehicle autonomous driving systems, smart cockpit systems, and infotainment systems, outputting top-level vehicle control requirements for overall vehicle control. It can take the form of a high-performance central computing unit at the vehicle level, or a computing platform composed of one or more high-performance computers. It has multiple Ethernet ports or high-speed CAN interfaces, allowing simultaneous access to upper-layer communication networks via multiple channels, thus achieving signal transmission redundancy; additionally, it can communicate with high-speed real-time communication networks via Ethernet and directly interact with specific object model units.

[0051] II. Upper-layer communication network

[0052] The upper-layer communication network described in this invention primarily facilitates communication between the computing unit and the virtual area control unit. On one hand, it transmits the vehicle's top-level control requirements output by the computing unit to the virtual area control unit; on the other hand, it transmits the feedback information collected and processed by the virtual area control unit to the computing unit. This upper-layer communication network is implemented via Ethernet or a high-speed CAN network. The specific topology can be bus (Ethernet / CAN), ring (Ethernet), or mesh (Ethernet). For the upper-layer communication network implemented via a high-speed CAN network, it can consist of two or more identical CAN networks to achieve mutual redundancy in communication, with the computing unit and each virtual area control unit connected to each CAN network. For the upper-layer communication network implemented via Ethernet, the computing unit and each virtual area control unit connect to the network through two or more ports to achieve communication redundancy.

[0053] III. Virtual Area Control Unit

[0054] A typical automotive electrical and electronic architecture (i.e., the object under test) contains 2 to 4 area controllers. In this system, corresponding virtual area control units are used to replace them. That is, before the area controller under test is developed, the virtual area control unit simulates the real area controller to achieve the testing of the electrical and electronic architecture. This virtual area control unit mainly performs three functions:

[0055] It receives the top-level vehicle control requirements from the computing unit and decomposes them into control requirements for each subsystem through internal logic calculation.

[0056] Receive subsystem information from the virtual underlying control unit, combine it with the subsystem control requirements, calculate the subsystem control commands, and send them to the virtual underlying control unit;

[0057] If some control functions are implemented by the virtual area control unit directly controlling the object model, then it is necessary to interact directly with the specific object model unit through a high-speed real-time communication network.

[0058] To achieve the above functions, the virtual area control unit mainly consists of Figure 2 The structure shown consists of:

[0059] The controller virtualization module is the core of the virtual area control unit, and its function is to virtualize the area controller to be tested. This virtualization module can be implemented using an FPGA module with the target MCU chip design file installed, or a real MCU chip. In other words, the MCU on the controller (which can be a real MCU or a virtual MCU) and its peripheral circuits are virtualized using an FPGA or a computing server. This controller virtualization module can run the loaded software in real time. The software architecture is divided into three layers: the upper layer contains control algorithms that meet automotive-grade requirements; the middle layer contains basic software that meets the AUTOSAR standard; and the lower layer contains chip drivers that meet the AUTOSAR standard, i.e., MCAL. Through this virtualization scheme, the operating state of the selected MCU in the area controller can be simulated.

[0060] Depending on whether or not MCU virtualization is chosen, different optimization effects can be achieved in automotive electronics R&D processes:

[0061] Virtualizing the MCU allows for testing of the selected chip model's design files into the FPGA as early as the design and development stage. This provides the test results as a basis for chip design verification and a source of requirements, enabling the chip to be integrated into an electronic and electrical architecture that fully utilizes its capabilities during mass production. This shortens the development cycle, reduces costs, and enhances product competitiveness.

[0062] Using a real MCU allows for thorough verification of various chip combinations during the early stages of controller development, thereby reducing controller development costs, shortening the development cycle, and enhancing product competitiveness.

[0063] The system management and signal processing module is the system control module of the virtual area control unit. It is responsible for managing the working status of the controller virtualization module, various communication modules, and other modules. It is also responsible for converting the virtual electrical signals output by the controller virtualization module into CAN / Ethernet messages for output, and converting the received CAN / Ethernet messages into virtual electrical signals for input to the controller virtualization module.

[0064] The communication module includes a CAN / CANFD communication module, an Ethernet communication module, and other communication modules, mainly to realize communication functions with the outside world.

[0065] IV. Controller Bus

[0066] The controller bus is similar to traditional vehicle communication networks, mainly composed of CAN / CANFD and LIN buses. The difference lies in the fact that, in this invention, the controller bus acts as a subordinate sub-network of the virtual area control unit. Its function is to transmit the control commands of the subsystems calculated by the virtual area control unit to each virtual lower-level control unit, and to transmit the subsystem information fed back by the virtual lower-level control units back to the virtual area control unit.

[0067] V. Virtual Underlying Control Unit

[0068] In a typical automotive electrical and electronic architecture (i.e., the object under test), each area controller oversees multiple lower-level controllers to execute control commands for various subsystems. This system uses a virtual lower-level control unit (VLU) to replace the actual VLU, simulating the real VLU before the actual VLU is developed, thus enabling the testing of the electrical and electronic architecture. This VLU simulates specific vehicle control behaviors through interaction with specific object model units.

[0069] The structure of the virtual underlying control unit is similar to that of the virtual region control unit, such as... Figure 3 As shown, the difference is:

[0070] 1) The virtual underlying control unit has lower computing power requirements, and the virtualized MCU model level is lower;

[0071] 2) The virtualized communication interface of the virtualized underlying control unit is less than that of the virtualized regional control unit, but there are more peripheral chips and peripheral circuits with special characteristics, which require special handling during the virtualization process.

[0072] VI. High-speed real-time communication network

[0073] This network is a high-speed Ethernet network with high real-time performance. Its main function is to transmit control commands and status information between computing / control units and object model units at various levels, serving as a key interface connecting the control system and the controlled object.

[0074] VII. Object Model Unit

[0075] The object model unit is a module used to run the object models of various subsystems. It is not limited to a single or multiple computers, high-performance controllers, etc. Its key feature is its ability to run object models that meet simulation requirements in real time, and it possesses the following functions:

[0076] 1) Equipped with an Ethernet port, enabling interaction with computing / control units at various levels via a high-speed real-time communication network;

[0077] 2) It has a time synchronization interface, which can realize time synchronization between various object model units through a network with specific time synchronization.

[0078] 8. Time Synchronization Network

[0079] The purpose of this network is to enable all object model units to run simulation tasks according to the same time steps. In this network, one object model unit needs to be selected as the master node, providing a time scale as the simulation reference; other object model units act as slave nodes, using only this time scale to trigger simulation tasks at specific time intervals.

[0080] The system of this invention can provide the following beneficial effects during the development of automotive electronic and electrical architecture:

[0081] In the early stages of project development, it provides quantifiable and important references for OEMs / suppliers in electronic and electrical architecture design and chip selection, thereby enabling OEMs / suppliers to make more accurate development decisions, reduce R&D costs, BOM costs, and R&D cycles, and enhance product competitiveness.

[0082] At the same time, it can also quantify and transmit the technical requirements of OEMs / suppliers to chip design companies, enabling them to design chip models that better meet market development needs, thereby enhancing the product competitiveness of chip design companies.

[0083] Although embodiments of the present invention have been shown and described, these specific embodiments are merely explanations of the invention and are not intended to limit it. The specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. After reading this specification, those skilled in the art may make modifications, substitutions, and variations to the embodiments as needed without departing from the principles and spirit of the invention, but such modifications, substitutions, and variations are protected by patent law as long as they are within the scope of the claims of the present invention.

Claims

1. A preliminary evaluation system for automotive electronic and electrical architecture based on virtualization technology, characterized in that, It includes computing units, upper-layer communication networks, virtual region control units, controller buses, virtual lower-layer control units, high-speed real-time communication networks, object model units, and time synchronization networks; among which: The computing unit is used to simulate the top-level control system of the vehicle to calculate the top-level vehicle control requirements and send them to the various virtual area control units through the upper-level communication network. The virtual area control unit is used to decompose the top-level vehicle control requirements into the control requirements of each underlying subsystem, receive the subsystem information fed back by the virtual underlying control unit, calculate the control commands of the subsystem, and send them to the virtual underlying control unit through the controller bus, or directly send the control commands to a specific object model unit through the high-speed real-time communication network, and receive the sensor information returned by the specific object model unit as the control input through the high-speed real-time communication network. The virtual low-level control unit is used to calculate the control commands of the object model unit based on the control commands of the subsystem and the sensor information returned by the specific object model unit through the high-speed real-time communication network. The control commands are then sent to the specific object model unit through the high-speed real-time communication network to implement the control behavior. The object model unit is used to run the object model in real time and uses a time synchronization network to synchronize the simulation of the model.

2. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, The computing unit is a vehicle-mounted high-performance central computing unit, or a computing platform consisting of one or more high-performance computers.

3. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, The computing unit communicates with a high-speed real-time communication network via Ethernet and interacts directly with the specific object model unit.

4. The automotive electronic and electrical architecture pre-evaluation system based on virtualization technology as described in claim 1, characterized in that, The upper-layer communication network is implemented through Ethernet or high-speed CAN network, and the topology is bus, ring or mesh. At the same time, the upper-layer communication network has a redundant structure, consisting of two or more identical CAN networks, or each virtual area control unit is connected to an Ethernet network through two or more ports.

5. The automotive electronic and electrical architecture pre-evaluation system based on virtualization technology as described in claim 1, characterized in that, Before the area controller under test is developed, a virtual area control unit is used to simulate the real area controller in order to test the electronic and electrical architecture.

6. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, The virtual area control unit includes a controller virtualization module, a system management and signal processing module, and a communication module. The controller virtualization module is used to virtualize the area controller to be tested. The system management and signal processing module is used to manage the working status of the controller virtualization module and the communication module. The communication module is used to realize communication with the outside world. The virtualization module is implemented using an FPGA module with the target MCU chip design file or a real MCU chip.

7. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, The controller bus is a sub-network of the virtual region control unit, used to transmit the control commands of the subsystems calculated by the virtual region control unit to each virtual lower-level control unit, and to transmit the subsystem information fed back by the virtual lower-level control unit to the virtual region control unit.

8. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, Before the underlying controller to be tested is developed, a virtual underlying control unit is used to simulate the real underlying controller in order to test the electronic and electrical architecture.

9. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, The high-speed real-time communication network is a real-time high-speed Ethernet.

10. The pre-evaluation system for automotive electronic and electrical architecture based on virtualization technology as described in claim 1, characterized in that, In the time synchronization network, a certain object model unit is selected as the master node, which provides a time scale as the simulation reference; other object model units are slave nodes, which only use the time scale provided by the master node to trigger simulation tasks at specific time intervals.

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