Pixel driving circuit, array driving circuit, driving method and display panel

Abstract

The application provides a pixel driving circuit, an array driving circuit and a driving method thereof. A current mirror is based on a multiplexing current mirror mode, and a current mirror of an external reference current source is provided. A part of the current is provided to a light emitting device through the mirror. A power tube provides a required voltage and current for the light emitting device. A P-type MOS tube of an inverter is turned on, and the light emitting device works normally. When the circuit is in an off state, an N-type MOS tube of the inverter is turned on, thereby conducting a reverse current of the light emitting device. A signal processing circuit is mainly composed of a transmission gate. The part can ensure that continuous signals can quickly charge and discharge a storage capacitor, thereby ensuring that the circuit works normally. Meanwhile, a corresponding display panel is provided. The application can provide a pixel driving circuit which is not affected by temperature and device characteristics, and provide a stable driving current for the light emitting device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit design, in particular, to a pixel driving circuit, an array driving circuit, a driving method and a display panel. BACKGROUND

[0002] With the pursuit of high contrast, high color gamut and ultra-thin appearance, various light-emitting diodes are continuously applied to various displays, but there are various problems, for example: organic photodiodes have problems such as light decay, compared with organic photodiodes, diodes made of inorganic materials have high brightness, high luminous efficiency, low power consumption and other characteristics.

[0003] In recent years, with the development of the semiconductor industry, in the display field, with the continuous improvement of display resolution, analog pixel driving, digital pixel driving and other technologies have been widely applied. Traditional pixel driving mostly uses direct driving, but direct driving will be affected by the characteristics of semiconductor materials, especially the uniformity of light emission will be greatly affected by factors such as temperature and light-emitting time. On the other hand, due to the influence of reverse current of the light-emitting device, it has a great influence on the overall life of the panel. In addition, due to the influence of device process and aging, the electrical parameters change greatly, which is not conducive to the long-term stable operation of the light-emitting device.

[0004] After searching, it is found that:

[0005] The Chinese utility model patent with the authorized announcement number CN218996332U "pixel driving circuit, electronic chip and display device", the pixel driving circuit, the electronic chip and the display device, the circuit comprises: a current reference circuit, a signal generation circuit and a current driving circuit. The current reference circuit and the current driving circuit constitute a current mirror circuit; the input end of the signal generation circuit is electrically connected with a data signal line, the output end of the signal generation circuit is electrically connected with the second control end of the current driving circuit, and the signal generation circuit is used for generating a pulse width modulation signal according to a data signal output by the data signal line; the input end of the current driving circuit is electrically connected with a first power supply, the output end of the current driving circuit is electrically connected with the anode of a light-emitting device, the cathode of the light-emitting device is electrically connected with a second power supply, and the voltage of the second power supply is a negative voltage. The circuit still has the following technical problems:

[0006] The LED reverse current cannot be discharged, which is not conducive to the long-term work of the circuit, and the circuit stability is poor. The control signal uses an additional control circuit, which will sacrifice most of the area of the chip for large array display panel circuits, and the control circuit is too complex, and each LED needs a corresponding gray scale generation unit.

[0007] The Chinese invention patent "A gate control type MOS light-emitting LED pixel driving circuit" with the authorization publication number CN113380182B adopts a constant current control light-emitting unit mode, and improves display stability. In the circuit of the present application, due to the setting of the negative feedback loop, the current of the common source common gate current source plays a regulating role, so that the grayscale adjustment of light-emitting display can be realized by the gate voltage or external resistance. By inserting an inverter in the pixel unit and connecting the inverter with the driving transistor, the row line and each pixel in the integrated driving circuit form an independent scan buffer, enhancing the pixel driving capability and improving the reliability of the integrated device display. The circuit still has the following technical problems:

[0008] The circuit is too complex, has a large number of peripheral circuits, and it is difficult to improve the pixel density for high-density display panel driving circuits. The compensation circuit also uses an external adjustable resistance. The manufacturing process of the resistance leads to difficulty in ensuring uniformity, which leads to difficulty in ensuring the integrity of the signal. Especially for the control of the micro display area, it directly affects the final resolution. The complexity of the circuit is too high, which inevitably leads to difficulty in improving the resolution and also increases the power consumption. SUMMARY

[0009] The present application provides a pixel driving circuit, array driving circuit, driving method and display panel to solve the above problems in the prior art.

[0010] According to one aspect of the present application, a pixel driving circuit is provided, characterized by comprising: a current mirror, a storage capacitor C, a third PMOS power tube P3, an inverter and a signal processing circuit; wherein:

[0011] The current mirror is connected with the storage capacitor C and the third POMS power tube P3 respectively, for providing a constant bias current for the light-emitting device;

[0012] The third PMOS power tube P3 is connected with the inverter, for providing a driving voltage and a current mirror mirror current for the light-emitting device;

[0013] The storage capacitor C is connected with the signal processing circuit and the inverter respectively, for charging and discharging and voltage maintenance of the light-emitting device;

[0014] The inverter is connected with the signal processing circuit, the current mirror, the third PMOS power tube P3 and the light-emitting device respectively, for serving as a switch of the light-emitting device;

[0015] The signal processing circuit is connected with the storage capacitor C and the inverter respectively, for serving as a transmission gate circuit of the inverter, and controlling the on-off of the inverter.

[0016] Preferably, the current mirror comprises a third NMOS tube N3, a fourth NMOS tube N4 and a fourth PMOS tube P4; wherein the drain of the fourth NMOS tube N4 is connected to a reference current source, the source of the fourth NMOS tube is common with the source of the third NMOS tube N3, the gate of the third NMOS tube N3 is connected to the gate of the fourth NMOS tube N4, and the gate of the fourth NMOS tube N4 is short-circuited with the drain, and the drain of the third NMOS tube N3 is connected to the drain of the fourth PMOS tube P4.

[0017] Preferably, the inverter comprises a second PMOS tube P2 and a second NMOS tube N2; wherein the source of the second PMOS tube P2 is connected to the drain of the third PMOS tube P3, the gate of the second PMOS tube P2 is connected to the gate of the second NMOS tube N2, the drain of the second PMOS tube P2 is connected to the drain of the second NMOS tube N2 and the anode of the LED, and the source of the second NMOS tube N2 is grounded.

[0018] Preferably, the signal processing circuit comprises a first PMOS tube P1 and a first NMOS tube N1; wherein the gate of the first PMOS tube P1 is inputted with a control signal, the gate of the first NMOS tube N1 is inputted with an inverted control signal opposite to the control signal of the first PMOS tube P1, the source of the first PMOS tube P1 is connected to the drain of the first NMOS tube N1 to input a data signal, the drain of the first PMOS tube P1 is connected to the source of the first NMOS tube N1 to output a data signal, and one end of a storage capacitor C and the gates of the second PMOS tube P2 and the second NMOS tube N2 are connected.

[0019] Preferably, the width-length ratio of the MOS tubes of the third NMOS tube N3 and the fourth NMOS tube N4 of the current mirror is adjusted according to actual current demand.

[0020] Preferably, in the signal processing circuit, the SCAN end and the -SCAN end are pulse signals with opposite high and low levels, and the DATA end is a data signal.

[0021] Preferably, the bias reference current sequentially passes through the fourth NMOS tube N4 and the third NMOS tube N3, the current passing through the third NMOS tube N3 is mirrored by the fourth PMOS tube P4, and then the current mirror is given to the third PMOS power tube P3, thereby providing a constant bias current for the light-emitting device.

[0022] Preferably, the second PMOS transistor P2 and the second NMOS transistor N2 serve as switches of the light emitting device, when the second PMOS transistor P2 is turned on, the light emitting device works normally, when the second NMOS transistor N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, so that the reverse current of the light emitting device flows into the ground.

[0023] Preferably, the on-off of the inverter is controlled by the signal processing circuit:

[0024] When the SCAN end of the signal processing circuit is low and the DATA end is low, the second PMOS transistor P2 of the inverter is turned on, and the light emitting device works normally;

[0025] When the SCAN end of the signal processing circuit is low and the DATA end is high, the storage capacitor C is charged and the second NMOS transistor N2 of the inverter is turned on, the positive and negative electrodes of the light emitting device are grounded, and the reverse current of the light emitting device is grounded to be excluded;

[0026] When the SCAN end and the -SCAN end of the signal processing circuit remain in the current state, the state of the light emitting device does not change.

[0027] According to another aspect of the present application, there is provided an array driving circuit, comprising: a plurality of pixel driving circuits as described in any one of the above; wherein:

[0028] All the pixel driving circuits in each column share the current mirror circuit, the data signal DATA end in each column is shared and connected, the data control signal SCAN and -SCAN end in each row is shared and connected, and the inverter circuit in each of the pixel driving circuits is independently connected; the array driving circuit shares the VDD end and the GND end;

[0029] Specifically, the drain of the fourth NMOS transistor N4 is connected with a reference current source, the source of the fourth NMOS transistor N4 is connected with the source of the third NMOS transistor N3, the gate of the third NMOS transistor N3 is connected with the gate of the fourth NMOS transistor N4, and the gate of the fourth NMOS transistor N4 is short-circuited with the drain of the fourth NMOS transistor N4, the drain of the third NMOS transistor N3 is connected with the drain of the fourth PMOS transistor P4, the source of the third PMOS transistor P3 is connected with the source of the fourth PMOS transistor P4 and one end of a storage capacitor C, the gate of the fourth PMOS transistor P4 is short-circuited with the drain of the fourth PMOS transistor P4, the gate of the third PMOS transistor P3 is connected with the gate of the fourth PMOS transistor P4, the source of the second PMOS transistor P2 is connected with the drain of the third PMOS transistor P3, the gate of the second PMOS transistor P2 is connected with the gate of the second NMOS transistor N2, the drain of the second PMOS transistor P2 is connected with the drain of the second NMOS transistor N2 and the anode of an LED, the source of the second NMOS transistor N2 is connected with the ground, the gate of the first PMOS transistor P1 is inputted with a control signal, the gate of the first NMOS transistor N1 is inputted with a reverse control signal opposite to the control signal of the first PMOS transistor P1, the source of the first PMOS transistor P1 is connected with the drain of the first NMOS transistor N1, the drain of the first PMOS transistor P1 is connected with the source of the first NMOS transistor N1 to output a data signal, and the data signal is connected with the other end of the capacitor and the gates of the second PMOS transistor P2 and the second NMOS transistor N2;

[0030] A current mirror is used as a multiplexing unit in each column to provide a constant bias current for the light emitting device, thereby ensuring consistency of the driving current;

[0031] All the transmission gate signals of the signal processing circuit in each column are DATA[n], and all the gate selection signals of the signal processing circuit in each row are SCAN[n], so that one light emitting device is selected to work normally.

[0032] According to a third aspect of the present application, a driving method of a pixel driving circuit is provided, comprising:

[0033] A current mirror, a storage capacitor C, a third PMOS power transistor P3, an inverter and a signal processing circuit are constructed respectively, the current mirror is connected with the storage capacitor C and the third PMOS power transistor P3 circuit respectively, the storage capacitor C is connected with the signal processing circuit, the third PMOS power transistor P3 is connected with the inverter, the signal processing circuit is connected with the inverter, and the inverter is connected with the light emitting device.

[0034] The obtained current mirror provides a constant bias current for the light emitting device;

[0035] The third PMOS power tube P3 is used to provide a driving voltage and a mirror current for the light emitting device;

[0036] The storage capacitor C is used to charge and discharge the light emitting device and maintain the voltage of the light emitting device;

[0037] The inverter is used to control the working state of the light emitting device;

[0038] The signal processing circuit is used to control the on-off of the inverter.

[0039] Preferably, the current mirror is used to provide a constant bias current for the light emitting device, comprising:

[0040] The bias reference current sequentially passes through the fourth NMOS tube N4 and the third NMOS tube N3 of the current mirror, the current passing through the third NMOS tube N3 is mirrored by the fourth PMOS tube P4, and then the mirrored current is provided to the third PMOS power tube P3, thereby providing a constant bias current for the light emitting device.

[0041] Preferably, the inverter is used to control the working state of the light emitting device, comprising:

[0042] The second PMOS tube P2 and the second NMOS tube N2 of the inverter are used as switches of the light emitting device, when the second PMOS tube P2 is turned on, the light emitting device works normally, and when the second NMOS tube N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, thereby making the reverse current of the light emitting device flow into the ground.

[0043] Preferably, the signal processing circuit is used to control the on-off of the inverter, comprising:

[0044] When the SCAN end of the signal processing circuit is low and the DATA end is low, the second PMOS tube P2 of the inverter is turned on, and the light emitting device works normally.

[0045] When the SCAN end of the signal processing circuit is low and the DATA end is high, the storage capacitor C is charged and the second NMOS tube N2 of the inverter is turned on, the positive and negative electrodes of the light emitting device are grounded, and the reverse current of the light emitting device is grounded and excluded.

[0046] When the SCAN end and the -SCAN end of the signal processing circuit remain in the current state, the state of the light emitting device does not change.

[0047] According to a fourth aspect of the present application, a display panel is provided, comprising the pixel driving circuit of any one of the above or the array driving circuit of any one of the above.

[0048] Compared with the prior art, the application has at least one of the following beneficial effects:

[0049] The pixel driving circuit, array driving circuit, driving method and display panel provided by the application can be free from the influence of CMOS process and temperature, and the reference current source is provided by the periphery and the current mirror provides the power tube P3, so that the current is not changed with the threshold voltage of the internal device, the current is latched, and even if the threshold voltage is changed, the output electrical parameter of the light emitting device is not affected, and the electrical parameter stability of the light emitting device is ensured.

[0050] The pixel driving circuit, array driving circuit, driving method and display panel provided by the application adopt the combination of digital and analog to control the light emitting device, the storage capacitor is charged and discharged in a short time by the on-off of the transmission gate, so that the signal input circuit is prevented from working for a long time, the working time of the pixel circuit in the data transmission is further shortened, and the power consumption of the circuit is reduced.

[0051] The pixel driving circuit, array driving circuit, driving method and display panel provided by the application introduce the inverter at the output end, the circuit normally works at the low level, and the reverse current of the light emitting device is smoothly released at the high level, so that the damage to the device is avoided, the service life and stability of the device are prolonged. BRIEF DESCRIPTION OF DRAWINGS

[0052] Other features, objects and advantages of the application will become more apparent from the following detailed description of non-limiting embodiments with reference to the attached drawings:

[0053] Figure 1 The figure is a structure schematic diagram of the pixel driving circuit in a preferred embodiment of the application.

[0054] Figure 2 The figure is a timing diagram in a preferred embodiment of the application.

[0055] Figure 3 The figure is a structure schematic diagram of the array driving circuit in a preferred embodiment of the application.

[0056] In the figure, 1 is a current mirror circuit, 2 is a storage capacitor, 3 is a third PMOS power tube, 4 is an inverter circuit, 5 is a signal processing circuit, and 6 is a light emitting device. DETAILED DESCRIPTION

[0057] The following will be described in detail: the embodiment is implemented on the premise of the technical scheme of the present application, and detailed implementation modes and specific operation processes are given. It should be pointed out that, for those skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application.

[0058] An embodiment of the present application provides a pixel driving circuit, which mainly comprises a current mirror, a storage capacitor, a power tube, an inverter and a signal processing circuit part, is a simple and effective pixel driving circuit which can be arrayed, compared with a traditional pixel driving technology, not only considers the stability of the pixel driving circuit itself, but also considers how to ensure the display area brightness consistency problem, ensures the output stability of the electrical parameter, thereby solving the problem of uneven light emission of the light emitting device.

[0059] As shown in Figure 1 The pixel driving circuit provided by the embodiment comprises a current mirror circuit 1, a storage capacitor C2, a third PMOS (P-type metal-oxide-semiconductor device, PMOS) power tube P33, an inverter circuit 4 and a signal processing circuit 5, wherein:

[0060] The current mirror is connected with the storage capacitor C and the third PMOS power tube P3 respectively, and is used for providing a constant bias current for the light emitting device;

[0061] The third PMOS power tube P3 is connected with the inverter, and is used for providing a driving voltage and a mirror current of the current mirror for the light emitting device;

[0062] The storage capacitor C is connected with the signal processing circuit and the inverter respectively, and is used for charging and discharging and voltage maintaining of the light emitting device;

[0063] The inverter is connected with the signal processing circuit, the current mirror, the third PMOS power tube P3 and the light emitting device 6 respectively, and is used as a switch of the light emitting device;

[0064] The signal processing circuit is connected with the storage capacitor C and the inverter respectively, and is used as a transmission gate circuit of the inverter, and controls the on-off of the inverter.

[0065] In a preferred embodiment, the current mirror comprises a third NMOS tube N3, a fourth NMOS tube N4 and a fourth PMOS tube P4, wherein the drain of N4 is connected with a reference current source, the source is grounded with the source of N3, the gate of N3 is connected with the gate of N4, the gate of N4 is short-circuited with the drain of N4, and the drain of N3 is connected with the drain of P4.

[0066] In a preferred embodiment, the bias reference current sequentially passes through the fourth NMOS transistor N4 and the third NMOS transistor N3, the current passing through the third NMOS transistor N3 is mirrored by the fourth PMOS transistor P4, and then the current is mirrored to the third PMOS power transistor P3, thereby providing a constant bias current for the light emitting device.

[0067] In a preferred embodiment, the width-length ratio of the MOS transistors of the third NMOS transistor N3 and the fourth NMOS transistor N4 is adjusted according to actual current requirements.

[0068] In a preferred embodiment, the inverter includes a second PMOS transistor P2 and a second NMOS transistor N2; wherein the source of P2 is connected to the drain of P3, the gates of P2 and N2 are connected, the drain of P2 is connected to the drain of N2 and the positive electrode of the LED, and the source of N2 is grounded.

[0069] In a preferred embodiment, the second PMOS transistor P2 and the second NMOS transistor N2 serve as switches for the light emitting device; when the second PMOS transistor P2 is turned on, the light emitting device works normally; and when the second NMOS transistor N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, thereby causing the reverse current of the light emitting device to flow into the ground.

[0070] In a preferred embodiment, the signal processing circuit includes a first PMOS transistor P1 and a first NMOS transistor N1; wherein the gate of P1 inputs a control signal, the gate of N1 inputs a reverse control signal opposite to P1, the source of P1, and the drain of N1 connect to input a data signal, the drain of P1 and the source of N1 connect to output a data signal, and one end of a capacitor and the gates of P2 and N2 are connected.

[0071] In a preferred embodiment, the on-off of the inverter is controlled by the signal processing circuit.

[0072] When the SCAN end of the signal processing circuit is at a low level and the DATA end is at a low level, the second power transistor P2 of the inverter is turned on, and the light emitting device works normally.

[0073] When the SCAN end of the signal processing circuit is at a low level and the DATA end is at a high level, the storage capacitor C is charged and the second NMOS transistor N2 of the inverter is turned on, the positive and negative electrodes of the light emitting device are grounded, and the reverse current of the light emitting device is excluded by grounding.

[0074] When the SCAN end and the -SCAN end of the signal processing circuit remain at the current state, the state of the light emitting device does not change.

[0075] In a preferred embodiment, in the signal processing circuit, the SCAN end and the -SCAN end are high-low level opposite pulse signals, and the DATA end is a data signal. For example,Figure 2 Fig. 1 is a schematic diagram of input signal timing of a signal processing circuit.

[0076] The embodiment of the present application provides a driving method of a pixel driving circuit, comprising the following steps:

[0077] The current mirror, the storage capacitor C, the third PMOS power tube P3, the inverter and the signal processing circuit are constructed respectively, the current mirror is connected with the storage capacitor C and the third PMOS power tube P3 circuit respectively, the storage capacitor C is connected with the signal processing circuit, the third PMOS power tube P3 is connected with the inverter, the signal processing circuit is connected with the inverter, and the inverter is connected with the light emitting device.

[0078] The obtained current mirror provides a constant bias current for the light emitting device;

[0079] The obtained third PMOS power tube P3 provides a driving voltage and a mirror current for the light emitting device;

[0080] The obtained storage capacitor C charges and discharges and maintains voltage for the light emitting device;

[0081] The obtained inverter controls the working state of the light emitting device;

[0082] The obtained signal processing circuit controls the on-off of the inverter.

[0083] In a preferred embodiment, the obtained current mirror provides a constant bias current for the light emitting device, comprising:

[0084] The bias reference current sequentially passes through the fourth NMOS tube N4 and the third NMOS tube N3 of the current mirror, the current passing through the third NMOS tube N3 is mirrored through the fourth PMOS tube P4, and then the mirror current is provided to the third PMOS tube P3, thereby providing a constant bias current for the light emitting device.

[0085] In a preferred embodiment, the obtained inverter controls the working state of the light emitting device, comprising:

[0086] The second PMOS tube P2 and the second NMOS tube N2 of the inverter are used as switches of the light emitting device, when the second PMOS tube P2 is turned on, the light emitting device normally works, and when the second NMOS tube N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, so that the reverse current of the light emitting device flows into the ground.

[0087] In a preferred embodiment, the obtained signal processing circuit controls the on-off of the inverter, comprising:

[0088] When the SCAN terminal and DATA terminal of the signal processing circuit are at low level, the second power transistor P2 of the inverter is turned on, and the light-emitting device works normally.

[0089] When the SCAN terminal of the signal processing circuit is low and the DATA terminal is high, the storage capacitor C is charged and the second NMOS transistor N2 of the inverter is turned on, and both the positive and negative terminals of the light-emitting device are grounded, thus eliminating the reverse current of the light-emitting device by grounding.

[0090] When the SCAN and -SCAN terminals of the signal processing circuit remain in their current states, the state of the light-emitting device does not change.

[0091] It should be noted that the steps in the method provided by the present invention can be implemented using corresponding components in a circuit. Those skilled in the art can refer to the technical solution of the circuit to implement the steps of the method. That is, the embodiments in the circuit can be understood as preferred examples of the method, and will not be elaborated here.

[0092] One embodiment of the present invention provides an array driving circuit, which is implemented based on the pixel driving circuit provided in the above embodiments of the present invention.

[0093] like Figure 3 As shown, the array driving circuit provided in this embodiment includes: multiple pixel driving circuits provided in the above embodiments of the present invention; wherein: each column of pixel circuits shares a current mirror circuit, each column of data signal DATA terminals shares and is connected, each row of data control signals SCAN and -SCAN terminals shares and is connected, the inverter circuits inside each pixel driving circuit are connected according to the inverter connection method in each pixel driving circuit in the above embodiments of the present invention, the array driving circuits share a VDD portion, the entire array driving circuit is connected to the VDD signal, the array driving circuits share a GND portion, the entire array driving circuit is connected to the GND signal.

[0094] Specifically, the drain of the fourth NMOS transistor N4 is connected with a reference current source, the source of the fourth NMOS transistor N4 is connected with the source of the third NMOS transistor N3, the gate of the third NMOS transistor N3 is connected with the gate of the fourth NMOS transistor N4, and the gate of the fourth NMOS transistor N4 is short-circuited with the drain of the fourth NMOS transistor N4; the drain of the third NMOS transistor N3 is connected with the drain of the fourth PMOS transistor P4, the source of the third PMOS transistor P3 is connected with the source of the fourth PMOS transistor P4 and one end of a storage capacitor C, the gate of the fourth PMOS transistor P4 is short-circuited with the drain of the fourth PMOS transistor P4, the gate of the third PMOS transistor P3 is connected with the gate of the fourth PMOS transistor P4, the source of the second PMOS transistor P2 is connected with the drain of the third PMOS transistor P3, the gate of the second PMOS transistor P2 is connected with the gate of the second NMOS transistor N2, the drain of the second PMOS transistor P2 is connected with the drain of the second NMOS transistor N2 and the anode of an LED, the source of the second NMOS transistor N2 is connected with the ground, the gate of the first PMOS transistor P1 is inputted with a control signal, the gate of the first NMOS transistor N1 is inputted with a reverse control signal opposite to the control signal of the first PMOS transistor P1, the source of the first PMOS transistor P1 is connected with the drain of the first NMOS transistor N1, the drain of the first PMOS transistor P1 is connected with the source of the first NMOS transistor N1 to output a data signal, and the data signal is connected with the other end of the capacitor and the gates of the second PMOS transistor P2 and the second NMOS transistor N2.

[0095] A current mirror is used as a multiplexing unit in each column to provide a constant bias current for the light emitting device, and to ensure consistency of the driving current.

[0096] All the transmission gate signals of the signal processing circuit in each column are DATA[n], and all the gate selection signals of the signal processing circuit in each row are SCAN[n], so that one light emitting device is selected to work normally.

[0097] It should be noted that the composition structure of the array driving circuit provided by the present application can be realized by corresponding elements in the pixel driving circuit, and the skilled in the art can refer to the technical solution of the pixel driving circuit to realize the step process of the array driving circuit, that is, the embodiments in the pixel driving circuit can be understood as preferred examples of realizing the array driving circuit, which will not be described here.

[0098] An embodiment of the present application provides a display panel, comprising the pixel driving circuit in any one of the above-mentioned embodiments of the present application, or the array driving circuit in any one of the above-mentioned embodiments of the present application.

[0099] The technical solutions provided by the above-mentioned embodiments of the present application will be further described below with reference to the drawings:

[0100] The pixel driving circuit provided by the above embodiment of the present application adopts a single pixel structure (i.e. a circuit composed of an inverter, a transmission part of a signal processing circuit and a storage capacitor) for multiplexing, as shown in the figure. Figure 1 As shown in the figure, the operation of the pixel driving circuit mainly includes the following three stages:

[0101] The programming stage: the SCAN is at low level and the DATA is at high level, the storage capacitor C is charged, the N2 tube normally works to exclude the reverse current of the light emitting device, and the light emitting device is in an extinguished state;

[0102] The reset stage: the SCAN is at high level and the DATA is at low level, the storage capacitor C is charged, the N2 tube continuously works to continue to exclude the reverse current of the light emitting device, and the light emitting device continuously is in an extinguished state;

[0103] The working stage: the SCAN is at low level and the DATA is at low level, the storage capacitor is discharged, the gate of the inverter is at low level, the P2 tube normally works, and the light emitting device is normally lighted.

[0104] Further, the pixel driving circuit provided by the above embodiment of the present application mainly includes a current mirror (N3, N4, P4), a storage capacitor (C), a power tube P3, an inverter (P2, N2) and a transmission gate signal processing circuit (P1, N1) part, the current mirror circuit mainly provides a constant bias current for the light emitting device, the power tube mainly provides an LED driving voltage and a mirror current of the current mirror, the storage capacitor mainly performs charging and discharging and voltage maintaining, and the inverter mainly serves as a switch.

[0105] As shown in the figure, Figure 1 As shown in the figure, Figure 1 The Iref provides a basic bias current for power supply, the current is mirrored through N4 and N3, this part can be scaled according to actual demand, the current through N3 is mirrored through P4, thereby mirroring the current to the P3 power tube, this part can also be adjusted according to the actual current demand to adjust the width-length ratio of the CMOS tube, but since the pixel driving circuit occupies as small area as possible, the width-length ratio of the MOS tube of N3 and N4 can be adjusted to adjust the current size, thereby supplying power for the light emitting device. The inverter circuit P2 and N2 mainly serve as a switch, when P2 is turned on, the light emitting device normally works, and when N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, thereby making the reverse current flow into the ground. The on-off of the inverter is controlled by the transmission gate circuit, when the SCAN is low and the DATA is low, the P2 tube normally works, when the SCAN is low and the DATA is high, the storage capacitor is charged and the N2 is turned on to ground the reverse current of the light emitting device. The rest of the SCAN and -SCAN keeps the current state, and the state of the light emitting device does not change.

[0106] In some embodiments of the present invention, the current mirror section uses three complementary metal-oxide-semiconductor (CMOS) transistors to perform current mirroring, and this section is a multiplexed section.

[0107] The pixel driving circuit provided in the above embodiments of the present invention mainly introduces a current mirror for reference current control. Even if the threshold voltage of the power transistor changes, the gate-source voltage of the power transistor will be dynamically adjusted adaptively. The difference between the gate-source voltage and the threshold voltage of the power transistor can be kept constant, thereby avoiding changes in the luminous intensity of the light-emitting device caused by changes in the threshold voltage due to external factors such as temperature. Figure 2 This indicates the timing of the input signals to the circuit. SCAN and -SCAN are signals with opposite high and low levels, and DATA is the data signal.

[0108] The array driving circuit provided in the above embodiments of the present invention is a large-area array multiplexing of the pixel driving circuit, such as... Figure 3 As shown, each column uses a current mirror structure to replicate the current for power supply. The data signal of all transmission gates in the column is DATA[n], and the row selection signal is SCAN[n], to select one of the light-emitting devices to light up. One column of the current mirror section is used as a basic unit for multiplexing power supply. In this embodiment, the current mirror section multiplexes the current, thereby further reducing the area occupied by the actual pixel. The pixel part mainly consists of an inverter, transmission gate, and storage capacitor. The current mirror section multiplexes this structure in each column to ensure the consistency of the driving current.

[0109] The reference current source Iref provides the basic bias current for power supply. This current is current-mirrored through N4 and N3. This part of the circuit can be scaled according to actual needs. The current through N3 is current-mirrored through P4, thus mirroring the current to the P3 power transistor. This part can also adjust the aspect ratio of the CMOS transistors according to actual current requirements. However, since the pixel driving circuit should occupy as little area as possible, adjusting the aspect ratio of the CMOS transistors N3 and N4 adjusts the current magnitude, thereby powering the light-emitting device. This part provides a stable voltage and current to the light-emitting device, and the output current of the power transistor is not affected by other factors.

[0110] In the inverter circuit, P2 and N2 mainly function as switches. When P2 is on, the light-emitting device works normally. When N2 is on, both the positive and negative terminals of the light-emitting device are grounded, thus allowing reverse current to flow into the ground.

[0111] The on-off of the reverser is controlled by the transmission gate circuit. When SCAN is low and DATA is low, P2 normally works. When SCAN is low and DATA is high, the storage capacitor is charged and N2 is turned on, so that the reverse current of the light emitting device is grounded.

[0112] The pixel driving circuit, array driving circuit, driving method and display panel provided by the above embodiments of the present application are designed based on the multiplexing current mirror mode. The current mirror mainly uses an external reference current source for current mirroring, and the part of current is provided to the light emitting device through the mirroring. The power tube P3 mainly provides the required voltage and current for the light emitting device. In normal operation, the inverter mainly functions as a switch. The P-type metal-oxide-semiconductor (PMOS) of the inverter is turned on, and the light emitting device normally works. When the circuit is in the off state, the N-type metal-oxide-semiconductor (NMOS) of the inverter is turned on, thereby unloading the reverse current of the light emitting device. The signal input part is mainly composed of a transmission gate, which can ensure that the continuous signal can quickly charge and discharge the storage capacitor, thereby ensuring the normal operation of the circuit. The circuit design can provide a pixel driving circuit that is not affected by temperature and device characteristics, and provide stable driving current for the light emitting device.

[0113] The above embodiments of the present application are described. It should be understood that the present application is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or changes within the scope of the claims, which does not affect the essential content of the present application.

[0114] The above describes specific embodiments of the present application. It should be understood that the present application is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or changes within the scope of the claims, which does not affect the essential content of the present application.

Claims

1. A pixel driving circuit, characterized in that, The current mirror, the storage capacitor C, the third PMOS power tube P3, the inverter and the signal processing circuit are connected; wherein: The current mirror is connected with the storage capacitor C and the third PMOS power tube P3 respectively, and is used for providing a constant bias current for the light emitting device; The third PMOS power tube P3 is connected with the inverter, and is used for providing a driving voltage and a mirror current for the light emitting device; The storage capacitor C is connected with the signal processing circuit and the inverter respectively, and is used for charging and discharging and voltage maintaining for the light emitting device; The inverter is connected with the signal processing circuit, the current mirror, the third PMOS power tube P3 and the light emitting device respectively, and is used as a switch of the light emitting device; The signal processing circuit is connected with the storage capacitor C and the inverter respectively, and is used as a transmission gate circuit of the inverter, and controls the on-off of the inverter; The current mirror comprises a third NMOS tube N3, a fourth NMOS tube N4 and a fourth PMOS tube P4; wherein, the drain of the fourth NMOS tube N4 is connected with a reference current source, the source of the fourth NMOS tube is grounded with the source of the third NMOS tube N3, the gate of the third NMOS tube N3 is connected with the gate of the fourth NMOS tube N4, the gate and the drain of the fourth NMOS tube N4 are short-circuited, and the drain of the third NMOS tube N3 is connected with the drain of the fourth PMOS tube P4; The inverter comprises a second PMOS tube P2 and a second NMOS tube N2; wherein, the source of the second PMOS tube P2 is connected with the drain of the third PMOS tube P3, the gate of the second PMOS tube P2 is connected with the gate of the second NMOS tube N2, the drain of the second PMOS tube P2 is connected with the drain of the second NMOS tube N2 and the anode of the light emitting device, and the source of the second NMOS tube N2 is grounded; The signal processing circuit comprises a first PMOS tube P1 and a first NMOS tube N1; wherein, the gate of the first PMOS tube P1 inputs a control signal, the gate of the first NMOS tube N1 inputs a reverse control signal opposite to the first PMOS tube P1, the source of the first PMOS tube P1 is connected with the drain of the first NMOS tube N1 to input a data signal, and the drain of the first PMOS tube P1 is connected with the source of the first NMOS tube N1 to output a data signal, and is connected with one end of the storage capacitor C and the gates of the second PMOS tube P2 and the second NMOS tube N2; The width-length ratio of the MOS tubes of the third NMOS tube N3 and the fourth NMOS tube N4 of the current mirror is adjusted according to actual current demand; In the signal processing circuit, the SCAN end and the -SCAN end are pulse signals with opposite high and low levels, and the DATA end is a data signal. ​ ​ 2. The pixel driving circuit according to claim 1, wherein The bias reference current sequentially passes through the fourth NMOS tube N4 and the third NMOS tube N3, the current passing through the third NMOS tube N3 is current-mirrored by the fourth PMOS tube P4, and then the current mirror is provided to the third PMOS power tube P3, thereby providing a constant bias current for the light emitting device; and / or The second PMOS tube P2 and the second NMOS tube N2 serve as switches of the light emitting device, when the second PMOS tube P2 is turned on, the light emitting device normally works, and when the second NMOS tube N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, thereby making the reverse current of the light emitting device flow into the ground.

3. The pixel driving circuit of claim 1, wherein, The on-off of the inverter is controlled by the signal processing circuit: When the SCAN end of the signal processing circuit is low and the DATA end is low, the second PMOS tube P2 of the inverter is turned on, and the light emitting device normally works; When the SCAN end of the signal processing circuit is low and the DATA end is high, the storage capacitor C is charged and the second NMOS tube N2 of the inverter is turned on, the positive and negative electrodes of the light emitting device are grounded, and the reverse current of the light emitting device is grounded and excluded; When the SCAN end and the -SCAN end of the signal processing circuit remain in the current state, the state of the light emitting device does not change.

4. An array driving circuit, characterized in that, It comprises: A plurality of pixel driving circuits according to any one of claims 1-3; wherein: all pixel driving circuits in each column share a current mirror circuit, the data signal DATA end in each column is shared and connected, the data control signal SCAN and -SCAN end in each row is shared and connected, and the inverter circuit in each of the pixel driving circuits is independently connected; the array driving circuit shares the VDD end and the GND end; One current mirror is used as a multiplexing unit in each column to provide a constant bias current for the light emitting device and ensure the consistency of the driving current; All transmission gate signals of the signal processing circuit in each column are DATA[n], and all strobe signals of the signal processing circuit in each row are SCAN[n], so as to realize the selection of one light emitting device to normally work.

5. A driving method of the pixel driving circuit according to any one of claims 1 to 3, characterized by, It comprises: A current mirror, a storage capacitor C, a third PMOS power tube P3, an inverter, and a signal processing circuit are respectively constructed, the current mirror is connected with the storage capacitor C and the third PMOS power tube P3 circuit respectively, the storage capacitor C is connected with the signal processing circuit, the third PMOS power tube P3 is connected with the inverter, the signal processing circuit is connected with the inverter, and the inverter is connected with the light emitting device; The obtained current mirror is used to provide a constant bias current for the light emitting device; The obtained third PMOS power tube P3 is used to provide a driving voltage and a current mirror mirror current for the light emitting device; The obtained storage capacitor C is used for charging and discharging and voltage maintenance of the light emitting device; The obtained inverter is used to control the working state of the light emitting device; The obtained signal processing circuit is used to control the on-off of the inverter.

6. The driving method of the pixel driving circuit according to claim 5, wherein The obtained current mirror is used to provide a constant bias current for the light emitting device, which comprises: The bias reference current sequentially passes through the fourth NMOS tube N4 and the third NMOS tube N3 of the current mirror, the current passing through the third NMOS tube N3 is mirrored by the fourth PMOS tube P4, and then the current mirror is provided to the third PMOS power tube P3, thereby providing a constant bias current for the light emitting device.

7. The driving method of the pixel driving circuit according to claim 5, wherein The obtained inverter is used to control the working state of the light emitting device, including: The second PMOS tube P2 and the second NMOS tube N2 of the inverter are used as switches of the light emitting device, when the second PMOS tube P2 is turned on, the light emitting device works normally, and when the second NMOS tube N2 is turned on, the positive and negative electrodes of the light emitting device are grounded, thereby making the reverse current of the light emitting device flow into the ground. 8.The driving method of the pixel driving circuit according to claim 5, characterized in that, The obtained signal processing circuit is used to control the on-off of the inverter, including: When the SCAN end of the signal processing circuit is low and the DATA end is low, the second PMOS tube P2 of the inverter is turned on, and the light emitting device works normally; When the SCAN end of the signal processing circuit is low and the DATA end is high, the storage capacitor C is charged and the second NMOS tube N2 of the inverter is turned on, the positive and negative electrodes of the light emitting device are grounded, and the reverse current of the light emitting device is grounded and excluded; When the SCAN end and the -SCAN end of the signal processing circuit remain in the current state, the state of the light emitting device does not change.

9. A display panel, characterized by, The pixel driving circuit of any one of claims 1-3, or the array driving circuit of claim 4.

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