A wideband voltage-controlled oscillator based on magnetic coupling

Abstract

This invention discloses a broadband voltage-controlled oscillator (VCO) based on magnetic coupling, comprising: a negative resistance circuit, a switched-shielded transformer, a switched capacitor circuit, a varactor circuit, an LC resonant cavity circuit, a mode switching switch circuit, and an output buffer circuit. The LC resonant cavity circuit includes a switched-shielded transformer, a tuning capacitor CT, and a fixed capacitor Cfix. There are two LC resonant cavities: one LC resonant cavity, named L1C1, consists of L11, L12, two sets of switched capacitors, two sets of Cfix, and one varactor connected in parallel; the other LC resonant cavity, named L2C2, consists of L21, L22, two sets of switched capacitors, and one varactor connected in parallel. A wide tuning range is achieved through two magnetic coupling methods: a mode switching switch and a switched-shielded transformer. This invention provides a broadband VCO based on magnetic coupling, aiming to solve the technical problem of achieving a wide frequency tuning range without degrading phase noise.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, and specifically to a broadband voltage-controlled oscillator based on magnetic coupling. Background Technology

[0002] With the continuous emergence of concepts such as high-speed communication, mobile internet, and AI chips in recent years, mobile communication terminals are becoming increasingly widely used, which places many demands on radio frequency (RF) communication chips and requires higher performance. Researchers have conducted extensive studies on the circuit modules within RF communication chips, including RF power amplifiers, low-noise amplifiers, filters, mixers, and phase-locked loops (PLLs). Among these, the design of the PLL used to generate local oscillation signals is the most challenging. And within PLLs, the VCO (Voltage Control Unit) design is the most complex. Tuning range is one of the most important indicators of a VCO. As the transmission rate of communication systems increases, the bandwidth of the transmitted signal must also increase; furthermore, due to increased integration, the number of communication standards that a single circuit can support must also increase accordingly. All of these factors necessitate that the VCO's tuning range be as large as possible, further increasing the design difficulty. Therefore, the research and design of wide-tuning-range VCOs has become extremely important.

[0003] Wide-tuning-range VCOs for multi-mode, multi-band transceivers require VCOs with a very wide tuning range. However, the tuning range of on-chip LC converters is limited. Therefore, researching wide-tuning-range VCOs is of great significance. Generally, the simplest technical method to implement a wide-range VCO is to integrate two or more VCOs on the same chip and use a multiplexer to select one VCO output. However, this requires multiple on-chip inductors, resulting in a large chip area, which is not suitable for engineering applications. Furthermore, increasing the VCO's voltage gain K... VCO While this method can achieve a relatively large bandwidth to some extent, it has two limitations: first, for commonly used capacitor-tuned VCOs, the adjustable ratio of the capacitor is limited due to the inherent characteristics of the device; second, the K of the VCO... VCO If the voltage is too high, the gain from the noise in the control voltage to the frequency output also increases, thus worsening the phase noise. Currently, the two most common types of broadband VCOs are capacitor-switched and inductive-switched. There is also a mode-switching VCO.

[0004] The advantage of using a switching inductor in a broadband VCO is that it allows for a wide tuning range. However, the switching inductor also has a significant impact on circuit performance because, at low frequencies, the Q value of an inductor is typically below 10, much smaller than that of a capacitor. Furthermore, the on-resistance of the MOSFET used as a switch further reduces the inductor's Q value, leading to increased power consumption and worsened phase noise.

[0005] Using switched capacitors as a broadband VCO can achieve a relatively wide tuning range. However, when the number of switched capacitors is large, the parasitic capacitance introduced by the switched capacitors also increases accordingly, thereby reducing the frequency tuning range. Simultaneously, the Q value of the on-chip inductor varies significantly with frequency; therefore, the value of the switched capacitors is limited by the on-chip inductor. Furthermore, with a large number of switched capacitors, the on-resistance of the switching MOSFETs reduces the equivalent Q value of the switched capacitors, leading to deterioration of phase noise. Summary of the Invention

[0006] The purpose of this invention is to provide a broadband voltage-controlled oscillator based on magnetic coupling to solve the technical problem of achieving a wide frequency tuning range without deteriorating phase noise.

[0007] To this end, the present invention discloses a broadband voltage-controlled oscillator based on magnetic coupling, comprising: a negative resistance circuit, a switch-shielded transformer, a mode switching switch circuit, an LC resonant cavity circuit, and an output buffer circuit, wherein: the negative resistance circuit includes four pairs of NMOS transistors MN1 and MN2, MN3 and MN4, MN5 and MN6, MN7 and MN8, which are cross-coupled to generate active negative resistance; the active negative resistance generated by the NMOS transistors is -Gmn, and when the active negative resistance is greater than the loss generated by the resistance of the resonant circuit, the VCO satisfies the oscillation condition;

[0008] The LC resonant cavity circuit includes a switched shielded transformer, a tuning capacitor CT, and a fixed capacitor Cf ix. There are two LC resonant cavities. One LC resonant cavity is composed of L11, L12, two sets of switched capacitors, two sets of Cfix, and one set of varactor connected in parallel, and is called the L1C1 resonant cavity. The other LC resonant cavity is composed of L21, L22, two sets of switched capacitors, and one set of varactor connected in parallel, and is called the L2C2 resonant cavity.

[0009] The switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, LC2;

[0010] LA1, LB1, and LC1 are placed in the middle, left, and right of inductors L11 and L21, respectively, along with series MOSFETs MA1, MB1, and MC1. When MA1 is turned on, the current i11 in L11 induces a current iA1 in LA1 and another current i21 in L21. At the same time, iA1 also induces another current iA21 in L21. It tends to cancel i21 and reduce the total induced current in L21. The equivalent coupling coefficient k12 between L11 and L21 is changed by controlling the on and off states of MA1, MB1, and MC1.

[0011] LA2, LB2, and LC2 are connected in series with MOSFETs MA2, MB2, and MC2, respectively, and placed in the middle, to the left, and to the right of inductors L12 and L22. When MA2 is turned on, the current i12 in L12 induces a current iA2 in LA2 and another current i22 in L22. Simultaneously, iA2 also induces another current iA22 in L22, which tends to cancel out i22 and reduce the total induced current in L22. The equivalent coupling coefficient k12' between L12 and L22 is changed by controlling the on and off states of MA2, MB2, and MC2.

[0012] When SW_FH1 is high and SW_FL1 is low, VO1_P1 / 2 and VO1_N1 / 2 are out of phase. VO1_P1 is the positive output port of the upper half of the L1C1 resonant cavity, VO1_N1 is the negative output port of the upper half of the L1C1 resonant cavity, VO1_P2 is the positive output port of the lower half of the L1C1 resonant cavity, and VO1_N2 is the negative output port of the lower half of the L1C1 resonant cavity. Assuming the original equivalent inductance of the L1C1 resonant cavity is L01, the equivalent inductance of this resonant cavity is L01-M1, where M1 is the mutual inductance. The resonant frequency of the L1C1 resonant cavity increases. SW_FH1 is the gate voltage of MP5 and MP8; SW_FL1 is the gate voltage of MP6 and MP7; SW_FH2 is the gate voltage of MP9 and MP12; and SW_FL2 is the gate voltage of MP10 and MP1.

[0013] When SW_FH1 is low and SW_FL1 is high, VO1_P1 / 2 and VO1_N1 / 2 are in phase. VO2_P1 is the positive output port of the upper half of the L2C2 resonant cavity, VO2_N1 is the negative output port of the upper half of the L2C2 resonant cavity, VO2_P2 is the positive output port of the lower half of the L2C2 resonant cavity, and VO2_N2 is the negative output port of the lower half of the L2C2 resonant cavity. At this time, the L1C1 resonant cavity is equivalent to... The inductance is L01+M1+2LCM1, where LCM1 is the common-mode inductance seen from the taps of inductors L11 and L12. The resonant frequency of the L1C1 resonant cavity decreases. When SW_FH2 is high and SW_FL2 is low, VO2_P1 / 2 and VO2_N1 / 2 are out of phase. Assuming the original equivalent inductance of the L2C2 resonant cavity is L02, the equivalent inductance of the L2C2 resonant cavity is L02-M2, where M2 is the mutual inductance. The resonant frequency of the L2C2 resonant cavity increases.

[0014] When SW_FH2 is low and SW_FL2 is high, VO2_P1 / 2 and VO2_N1 / 2 are in phase. At this time, the equivalent inductance of the L2C2 resonant cavity is L02+M2+2LCM2, where LCM2 is the common-mode inductance seen from the L21 and L22 taps. The resonant frequency of the L2C2 resonant cavity becomes lower.

[0015] Preferably, the switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, and LC2. The drain of MA1 is connected to the n5 terminal of LA1, the source of MA1 is connected to the n6 terminal of LA1, the gate of MA1 is connected to VA, and the tap of LA1 is connected to the reverse potential of VA. The drain of MB1 is connected to the n1 terminal of LB1, the source of MB1 is connected to the n2 terminal of LB1, the gate of MB1 is connected to VB, and the tap of LB1 is connected to the reverse potential of VB. The drain of MC1 is connected to the n9 terminal of LC1, the source of MC1 is connected to the n10 terminal of LC1, the gate of MC1 is connected to VC, and the tap of LC1 is connected to the reverse potential of VC. L11's n3 terminal is connected to VO1_P1, L11's n4 terminal is connected to VO1_N1, L11's tap is connected to the drain of MP1, MP1's source is connected to power supply VDD, and MP1's gate is connected to SW_L1; L21's n7 terminal is connected to VO2_P1, L21's n8 terminal is connected to VO2_N1, L21's tap is connected to the drain of MP2, MP2's source is connected to power supply VDD, and MP2's gate is connected to SW_L2; MA2's drain is connected to LA2's n15 terminal, MA2's source is connected to LA2's n16 terminal, MA2's gate is connected to VA, and LA2's tap is connected to the reverse potential of VA. The drain of MB2 is connected to terminal n11 of LB2, the source of MB2 is connected to terminal n12 of LB2, the gate of MB2 is connected to VB, and the tap of LB2 is connected to the reverse potential of VB. The drain of MC2 is connected to terminal n19 of LC2, the source of MC2 is connected to terminal n20 of LC2, the gate of MC2 is connected to VC, and the tap of LC2 is connected to the reverse potential of VC. The n13 terminal of L12 is connected to VO1_P2, the n14 terminal of L12 is connected to VO1_N2, the tap of L12 is connected to the drain of MP3, the source of MP3 is connected to the power supply VDD, and the gate of MP3 is connected to SW_L3; the n17 terminal of L22 is connected to VO2_P2, the n18 terminal of L22 is connected to VO2_N2, the tap of L22 is connected to the drain of MP4, the source of MP4 is connected to the power supply VDD, and the gate of MP4 is connected to SW_L4.

[0016] Preferably, the mode switching circuit includes MOSFETs MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12; wherein the gate of MP5 is connected to SW_FH1, the drain of MP5 is connected to the drain of MP7, the source of MP5 is connected to the drain of MP6, and connected to VO1_P1; the gate of MP6 is connected to SW_FL1, the source of MP6 is connected to the drain of MP8, and connected to VO1_N1; the gate of MP7 is connected to SW_FL1, the source of MP7 is connected to the source of MP8, and connected to... The gate of MP8 is connected to SW_FH1; the gate of MP9 is connected to SW_FH2, the drain of MP9 is connected to the drain of MP11, the source of MP9 is connected to the drain of MP10, and connected to VO2_P1; the gate of MP10 is connected to SW_FL2, the source of MP10 is connected to the drain of MP12, and connected to VO2_N1; the gate of MP11 is connected to SW_FL2, the source of MP11 is connected to the source of MP12, and connected to VO2_N2; the gate of MP12 is connected to SW_FH2.

[0017] Preferably, the switched capacitor circuit has four pairs of differential output ports. For one pair of differential outputs, the P and N terminals are connected to the upper plates of capacitors Cn in the two unit switched capacitor circuits, respectively. The other input of the unit switched capacitor circuit is bit B0 / 1 / 2 / 3. When the bit input is low, the inverter output is high, the NMOS is turned on, and Cn is connected to the LC resonant cavity, increasing the equivalent capacitance in the resonant circuit and thus lowering the resonant frequency. When the bit input is high, the inverter output is low, the NMOS is turned off, Cn is not connected to the LC resonant cavity, and the equivalent capacitance in the resonant circuit remains unchanged, so the resonant frequency remains constant.

[0018] Preferably, there are four groups of switched capacitor circuits, each with the same structure, connected to four pairs of differential output ports: VO1_P1 and VO1_N1, VO2_N1 and VO2_P1, VO1_P2 and VO1_N2, and VO2_N2 and VO2_P2. Each group of switched capacitors has 60 units. 30 of these units are connected to the P port of the differential output port, and the other 30 units are connected to the N port of the differential output port. Specifically, each unit includes a capacitor Cn, a resistor R, an inverter, and a MOSFET MN. The upper plate of Cn is connected to the differential output terminal, the lower plate of Cn is connected to one end of R and the drain of MN, the other end of R is connected to bits B0 / 1 / 2 / 3 and the input of the inverter, the output of the inverter is connected to the gate of MN, and the source of MN is grounded.

[0019] Preferably, the capacitance value of the two sets of varactor capacitors is continuously changed by changing the control voltages VCTL1 and VCTL2; thereby continuously changing the equivalent capacitance value in the LC resonant cavity.

[0020] Preferably, there are two groups of varactor circuits, connected to two pairs of differential output ports: VO1_P1 and VO1_N2, and VO2_P and VO2_N2. Each group of varactor circuits has two NMOS varactor transistors, where the gate of MVP1 is connected to VO1_P1, the gate of MVN1 is connected to VO1_N2, and the source and drain of MVP1 and MVN1 are connected together and connected to VCTL1; the gate of MVP2 is connected to VO2_P1, the gate of MVN2 is connected to VO2_N2, and the source and drain of MVP2 and MVN2 are connected together and connected to VCTL2.

[0021] Preferably, the output buffer circuit includes MOSFETs Mbuf1, Mbuf2, Mbuf3, Mbuf4, Mbuf5, Mbuf6, Mbuf7, and Mbuf8, and eight 50-ohm resistors. Specifically, a 50-ohm resistor is connected across the source and drain of Mbuf1, and its gate is connected to VO1_P1; a 50-ohm resistor is connected across the source and drain of Mbuf2, and its gate is connected to VO1_N1; a 50-ohm resistor is connected across the source and drain of Mbuf3, and its gate is connected to VO2_N1; a 50-ohm resistor is connected across the source and drain of Mbuf4, and its gate is connected to VO2_P1; a 50-ohm resistor is connected across the source and drain of Mbuf5. A 0-ohm resistor is used. The source of Mbuf5 is connected to PAD1, and the gate of Mbuf5 is connected to VO1_P2. A 50-ohm resistor is connected across the source and drain of Mbuf6, and the gate of Mbuf6 is connected to VO1_N2. A 50-ohm resistor is connected across the source and drain of Mbuf7, and the gate of Mbuf7 is connected to VO2_N2. A 50-ohm resistor is connected across the source and drain of Mbuf8, and the source of Mbuf8 is connected to PAD2, and the gate of Mbuf8 is connected to VO2_N2. There are two LC resonant cavities, so only two output buffer circuits are needed. The other six are pseudo-output buffer circuits, used for symmetry at the differential output port. The MOS transistors at PAD1 and PAD2 adopt a common-source amplifier structure.

[0022] Preferably, the gate of MN1 is connected to the drain of MN2; the drain of MN1 is connected to the gate of MN2; the source of MN1 is connected to the source of MN2 and ground; the gate of MN3 is connected to the drain of MN4; the drain of MN3 is connected to the gate of MN4; the source of MN3 is connected to the source of MN4 and ground; the gate of MN5 is connected to the drain of MN6; the drain of MN5 is connected to the gate of MN6; the source of MN5 is connected to the source of MN6 and ground; the gate of MN7 is connected to the drain of MN8; the drain of MN7 is connected to the gate of MN8; the source of MN7 is connected to the source of MN8 and ground.

[0023] The VCO circuit switch-shielded transformer of this invention includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, and LC2. Compared to the original transformer without LA1, the effective coupling coefficient k12 between L11 and L21 is actually lower. LB1 and LC1 function the same as LA1. The equivalent coupling coefficient k12 between L11 and L21 is changed by controlling the on and off states of MA1, MB1, and MC1. Compared to the original transformer without LA2, the effective coupling coefficient k12' between L12 and L22 is actually lower. LB2 and LC2 function the same as LA2, changing the equivalent coupling coefficient k12' between L12 and L22 by controlling the conduction and cutoff of MA2, MB2 and MC2. The mode switching switch is divided into four groups of switches, with two groups of switches for each of the two LC resonant cavities. A wide tuning range is achieved by using two magnetic coupling methods: switching mode switches and switch-shielded transformers. That is, the frequency tuning range is expanded by using two magnetic coupling methods: positive and negative magnetic coupling and switching to control the coupling coefficient. The advantage is that neither of these coupling methods will degrade phase noise, and the magnetic coupling coefficient can achieve a wider tuning range than that of a capacitor. Attached Figure Description

[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of a broadband voltage-controlled oscillator based on magnetic coupling.

[0027] Figure 2This is a circuit diagram of a switch-shielded transformer.

[0028] Figure 3 This is a schematic diagram of a mode switching switch circuit.

[0029] Figure 4 These are simulation results of the frequency tuning range in the embodiments of the present invention;

[0030] Figure 5 The simulation results for phase noise in this embodiment of the invention are shown. Detailed Implementation

[0031] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0032] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0033] Furthermore, the use of terms such as "first" and "second" in this invention is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0034] This invention discloses a broadband voltage-controlled oscillator (VCO) based on magnetic coupling, comprising: a negative resistance circuit, a switch-shielded transformer, a mode switching circuit, an LC resonant cavity circuit, and an output buffer circuit. The negative resistance circuit includes four pairs of NMOS transistors MN1 and MN2, MN3 and MN4, MN5 and MN6, and MN7 and MN8, which are cross-coupled to generate an active negative resistance. The active negative resistance generated by the NMOS transistors is -Gmn. When the active negative resistance is greater than the loss generated by the resistance of the resonant circuit, the VCO satisfies the oscillation condition.

[0035] The LC resonant cavity circuit includes a switched shielded transformer, a tuning capacitor CT, and a fixed capacitor Cfix. There are two LC resonant cavities. One LC resonant cavity is composed of L11, L12, two sets of switched capacitors, two sets of Cfix, and one set of varactor connected in parallel, and is called the L1C1 resonant cavity. The other LC resonant cavity is composed of L21, L22, two sets of switched capacitors, and one set of varactor connected in parallel, and is called the L2C2 resonant cavity.

[0036] The switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, LC2;

[0037] LA1, LB1, and LC1 are placed in the middle, left, and right of inductors L11 and L21, respectively, along with series MOSFETs MA1, MB1, and MC1. When MA1 is turned on, the current i11 in L11 induces a current iA1 in LA1 and another current i21 in L21. At the same time, iA1 also induces another current iA21 in L21. It tends to cancel i21 and reduce the total induced current in L21. The equivalent coupling coefficient k12 between L11 and L21 is changed by controlling the on and off states of MA1, MB1, and MC1.

[0038] LA2, LB2, and LC2 are connected in series with MOSFETs MA2, MB2, and MC2, respectively, and placed in the middle, to the left, and to the right of inductors L12 and L22. When MA2 is turned on, the current i12 in L12 induces a current iA2 in LA2 and another current i22 in L22. Simultaneously, iA2 also induces another current iA22 in L22, which tends to cancel out i22 and reduce the total induced current in L22. The equivalent coupling coefficient k12' between L12 and L22 is changed by controlling the on and off states of MA2, MB2, and MC2.

[0039] When SW_FH1 is high and SW_FL1 is low, VO1_P1 / 2 and VO1_N1 / 2 are out of phase. VO1_P1 is the positive output port of the upper half of the L1C1 resonant cavity, VO1_N1 is the negative output port of the upper half of the L1C1 resonant cavity, VO1_P2 is the positive output port of the lower half of the L1C1 resonant cavity, and VO1_N2 is the negative output port of the lower half of the L1C1 resonant cavity. Assuming the original equivalent inductance of the L1C1 resonant cavity is L01, the equivalent inductance of this resonant cavity is L01-M1, where M1 is the mutual inductance. The resonant frequency of the L1C1 resonant cavity increases. SW_FH1 is the gate voltage of MP5 and MP8; SW_FL1 is the gate voltage of MP6 and MP7; SW_FH2 is the gate voltage of MP9 and MP12; and SW_FL2 is the gate voltage of MP10 and MP1.

[0040] When SW_FH1 is low and SW_FL1 is high, VO1_P1 / 2 and VO1_N1 / 2 are in phase. VO2_P1 is the positive output port of the upper half of the L2C2 resonant cavity, VO2_N1 is the negative output port of the upper half of the L2C2 resonant cavity, VO2_P2 is the positive output port of the lower half of the L2C2 resonant cavity, and VO2_N2 is the negative output port of the lower half of the L2C2 resonant cavity. At this time, the equivalent inductance of the L1C1 resonant cavity is L01+M1+2LCM1, where LCM1 is the common-mode inductance seen from the L11 and L12 taps. The resonant frequency of the L1C1 resonant cavity decreases. When SW_FH2 is high and SW_FL2 is low, VO2_P1 / 2 and VO2_N1 / 2 are out of phase. Assuming the original equivalent inductance of the L2C2 resonant cavity is L02, the equivalent inductance of the L2C2 resonant cavity is L02-M2, where M2 is the mutual inductance, and the resonant frequency of the L2C2 resonant cavity increases. When SW_FH2 is low and SW_FL2 is high, VO2_P1 / 2 and VO2_N1 / 2 are in phase. At this time, the equivalent inductance of the L2C2 resonant cavity is L02+M2+2LCM2, where LCM2 is the common-mode inductance seen from the taps L21 and L22, and the resonant frequency of the L2C2 resonant cavity decreases.

[0041] The VCO circuit switch-shielded transformer of this invention includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, and LC2. Compared to the original transformer without LA1, the effective coupling coefficient k12 between L11 and L21 is actually lower. LB1 and LC1 function the same as LA1. The equivalent coupling coefficient k12 between L11 and L21 is changed by controlling the on and off states of MA1, MB1, and MC1. Compared to the original transformer without LA2, the effective coupling coefficient k12' between L12 and L22 is actually lower. LB2 and LC2 function the same as LA2, changing the equivalent coupling coefficient k12' between L12 and L22 by controlling the conduction and cutoff of MA2, MB2 and MC2; achieving a wide tuning range through two magnetic coupling methods: switching mode switch and switch-shielded transformer; that is, expanding the frequency tuning range by using two magnetic coupling methods: positive and negative magnetic coupling and switching control of the coupling coefficient. The advantage is that neither of these couplings will degrade phase noise, and the magnetic coupling coefficient can achieve a wider tuning range than the capacitor.

[0042] Preferably, the switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, and LC2. The drain of MA1 is connected to the n5 terminal of LA1, the source of MA1 is connected to the n6 terminal of LA1, the gate of MA1 is connected to VA, and the tap of LA1 is connected to the reverse potential of VA. The drain of MB1 is connected to the n1 terminal of LB1, the source of MB1 is connected to the n2 terminal of LB1, the gate of MB1 is connected to VB, and the tap of LB1 is connected to the reverse potential of VB. The drain of MC1 is connected to the n9 terminal of LC1, the source of MC1 is connected to the n10 terminal of LC1, the gate of MC1 is connected to VC, and the tap of LC1 is connected to the reverse potential of VC. L11's n3 terminal is connected to VO1_P1, L11's n4 terminal is connected to VO1_N1, L11's tap is connected to the drain of MP1, MP1's source is connected to power supply VDD, and MP1's gate is connected to SW_L1; L21's n7 terminal is connected to VO2_P1, L21's n8 terminal is connected to VO2_N1, L21's tap is connected to the drain of MP2, MP2's source is connected to power supply VDD, and MP2's gate is connected to SW_L2; MA2's drain is connected to LA2's n15 terminal, MA2's source is connected to LA2's n16 terminal, MA2's gate is connected to VA, and LA2's tap is connected to the reverse potential of VA. The drain of MB2 is connected to terminal n11 of LB2, the source of MB2 is connected to terminal n12 of LB2, the gate of MB2 is connected to VB, and the tap of LB2 is connected to the reverse potential of VB. The drain of MC2 is connected to terminal n19 of LC2, the source of MC2 is connected to terminal n20 of LC2, the gate of MC2 is connected to VC, and the tap of LC2 is connected to the reverse potential of VC. The n13 terminal of L12 is connected to VO1_P2, the n14 terminal of L12 is connected to VO1_N2, the tap of L12 is connected to the drain of MP3, the source of MP3 is connected to the power supply VDD, and the gate of MP3 is connected to SW_L3; the n17 terminal of L22 is connected to VO2_P2, the n18 terminal of L22 is connected to VO2_N2, the tap of L22 is connected to the drain of MP4, the source of MP4 is connected to the power supply VDD, and the gate of MP4 is connected to SW_L4.

[0043] Preferably, the mode switching circuit includes MOSFETs MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12; wherein the gate of MP5 is connected to SW_FH1, the drain of MP5 is connected to the drain of MP7, the source of MP5 is connected to the drain of MP6, and connected to VO1_P1; the gate of MP6 is connected to SW_FL1, the source of MP6 is connected to the drain of MP8, and connected to VO1_N1; the gate of MP7 is connected to SW_FL1, the source of MP7 is connected to the source of MP8, and connected to... The gate of MP8 is connected to SW_FH1; the gate of MP9 is connected to SW_FH2, the drain of MP9 is connected to the drain of MP11, the source of MP9 is connected to the drain of MP10, and connected to VO2_P1; the gate of MP10 is connected to SW_FL2, the source of MP10 is connected to the drain of MP12, and connected to VO2_N1; the gate of MP11 is connected to SW_FL2, the source of MP11 is connected to the source of MP12, and connected to VO2_N2; the gate of MP12 is connected to SW_FH2.

[0044] Preferably, the switched capacitor circuit has four pairs of differential output ports. For one pair of differential outputs, the P and N terminals are connected to the upper plates of capacitors Cn in the two unit switched capacitor circuits, respectively. The other input of the unit switched capacitor circuit is bit B0 / 1 / 2 / 3. When the bit input is low, the inverter output is high, the NMOS is turned on, and Cn is connected to the LC resonant cavity, increasing the equivalent capacitance in the resonant circuit and thus lowering the resonant frequency. When the bit input is high, the inverter output is low, the NMOS is turned off, Cn is not connected to the LC resonant cavity, and the equivalent capacitance in the resonant circuit remains unchanged, so the resonant frequency remains constant.

[0045] The switched capacitor circuit of this invention is improved from the structure of parallel connection to LC resonant cavity to a structure in which differential signal can flow from capacitor to ground. It is applicable to both in-phase and out-of-phase cases, and can effectively change the equivalent capacitance of LC resonant cavity, thereby achieving the effect of changing the resonant frequency.

[0046] Preferably, there are four groups of switched capacitor circuits, each with the same structure, connected to four pairs of differential output ports: VO1_P1 and VO1_N1, VO2_N1 and VO2_P1, VO1_P2 and VO1_N2, and VO2_N2 and VO2_P2. Each group of switched capacitors has 60 units. 30 of these units are connected to the P port of the differential output port, and the other 30 units are connected to the N port of the differential output port. Specifically, each unit includes a capacitor Cn, a resistor R, an inverter, and a MOSFET MN. The upper plate of Cn is connected to the differential output terminal, the lower plate of Cn is connected to one end of R and the drain of MN, the other end of R is connected to bits B0 / 1 / 2 / 3 and the input of the inverter, the output of the inverter is connected to the gate of MN, and the source of MN is grounded.

[0047] Specifically, the capacitance values ​​of the two varactor capacitors are continuously changed by altering the control voltages VCTL1 and VCTL2; thus, the equivalent capacitance value within the LC resonant cavity can be continuously changed, achieving continuous tuning. This invention improves upon the traditional magnetically tuned VCO structure by creating a dual-core connected magnetically tuned structure, increasing the frequency peak and expanding the frequency tuning range.

[0048] Preferably, there are two groups of varactor circuits, which are connected to two pairs of differential output ports: VO1_P1 and VO1_N2, and VO2_P and VO2_N2 respectively. Each group of varactor circuits has two NMOS varactors, wherein the gate of MVP1 is connected to VO1_P1, the gate of MVN1 is connected to VO1_N2, and the source and drain of MVP1 and MVN1 are connected together and connected to VCTL1; the gate of MVP2 is connected to VO2_P1, the gate of MVN2 is connected to VO2_N2, and the source and drain of MVP2 and MVN2 are connected together and connected to VCTL2.

[0049] Preferably, the output buffer circuit includes MOSFETs Mbuf1, Mbuf2, Mbuf3, Mbuf4, Mbuf5, Mbuf6, Mbuf7, and Mbuf8, and eight 50-ohm resistors. Specifically, a 50-ohm resistor is connected across the source and drain of Mbuf1, and its gate is connected to VO1_P1; a 50-ohm resistor is connected across the source and drain of Mbuf2, and its gate is connected to VO1_N1; a 50-ohm resistor is connected across the source and drain of Mbuf3, and its gate is connected to VO2_N1; a 50-ohm resistor is connected across the source and drain of Mbuf4, and its gate is connected to VO2_P1; a 50-ohm resistor is connected across the source and drain of Mbuf5. A 0-ohm resistor is used. The source of Mbuf5 is connected to PAD1, and the gate of Mbuf5 is connected to VO1_P2. A 50-ohm resistor is connected across the source and drain of Mbuf6, and the gate of Mbuf6 is connected to VO1_N2. A 50-ohm resistor is connected across the source and drain of Mbuf7, and the gate of Mbuf7 is connected to VO2_N2. A 50-ohm resistor is connected across the source and drain of Mbuf8, and the source of Mbuf8 is connected to PAD2, and the gate of Mbuf8 is connected to VO2_N2. There are two LC resonant cavities, so only two output buffer circuits are needed. The other six are pseudo-output buffer circuits, used for symmetry at the differential output port. The MOS transistors at PAD1 and PAD2 adopt a common-source amplifier structure.

[0050] Preferably, the negative resistance circuit includes four pairs of cross-coupled MOS transistors MN1 and MN2, MN3 and MN4, MN5 and MN6, and MN7 and MN8, wherein the gate of MN1 is connected to the drain of MN2; the drain of MN1 is connected to the gate of MN2; the source of MN1 is connected to the source of MN2 and then to ground; the gate of MN3 is connected to the drain of MN4; the drain of MN3 is connected to the gate of MN4; the source of MN3 is connected to the source of MN4 and then to ground; the gate of MN5 is connected to the drain of MN6; the drain of MN5 is connected to the gate of MN6; the source of MN5 is connected to the source of MN6 and then to ground; the gate of MN7 is connected to the drain of MN8; the drain of MN7 is connected to the gate of MN8; and the source of MN7 is connected to the source of MN8 and then to ground.

[0051] This invention used Cadence software for circuit design and simulation, employing TSMC 65nm CMOS technology. The circuit schematic is shown below. Figure 1 , 2 As shown in Figure 3, the circuit includes a negative resistance circuit, a switched shielded transformer, a switched capacitor circuit, a varactor circuit, a mode switching switch circuit, and an output buffer circuit. A mode switching switch is added to the switched shielded transformer, forming a dual-core structure that expands the frequency tuning range of the VCO.

[0052] The following details how a wide frequency tuning range is achieved by using SW_L1, SW_L2, SW_L3, and SW_L4 to switch the operating resonant cavities. When SW_L1 and SW_L3 are low and SW_L2 and SW_L4 are high, the L1C1 resonant cavity operates; when SW_L1 and SW_L3 are high and SW_L2 and SW_L4 are low, the L2C2 resonant cavity operates. Because these two resonant cavities have different inductance values ​​but the same capacitance value, switching the operating resonant cavity allows for frequency switching. By changing the levels of VA, VB, and VC, the effective coupling coefficient of the transformer is altered, thereby changing the equivalent inductance of the LC resonant cavity. When VA = VB = VC = 1.2V, the equivalent inductance of the LC resonant cavity is minimum, and the resonant frequency is highest; when VA = VB = VC = 0V, the equivalent inductance of the LC resonant cavity is maximum, and the resonant frequency is lowest. Simultaneously, by utilizing a mode switching switch, in-phase and out-of-phase inputs are implemented at the VCO differential output port, thereby changing the equivalent inductance of the LC resonant cavity. When SW_FH1 is high and SW_FL1 is low, VO1_P1 / 2 and VO1_N1 / 2 are out of phase. Assuming the original equivalent inductance of the L1C1 resonant cavity is L01, then the equivalent inductance of this resonant cavity is L01-M1, where M1 is the mutual inductance. Therefore, the resonant frequency of the L1C1 resonant cavity increases. When SW_FH1 is low and SW_FL1 is high, VO1_P1 / 2 and VO1_N1 / 2 are in phase. At this time, the equivalent inductance of the L1C1 resonant cavity is L01+M1+2LCM1, where LCM1 is the inductance. (See taps L11 and L12 for details.) The common-mode inductance is obtained, so the resonant frequency of the L1C1 resonant cavity decreases; when SW_FH2 is high and SW_FL2 is low, VO2_P1 / 2 and VO2_N1 / 2 are out of phase. Assuming the original equivalent inductance of the L2C2 resonant cavity is L02, then the equivalent inductance of the L2C2 resonant cavity is L02-M2, where M2 is the mutual inductance, so the resonant frequency of the L2C2 resonant cavity increases; when SW_FH2 is low and SW_FL2 is high, VO2_P1 / 2 and VO2_N1 / 2 are in phase, so the equivalent inductance of the L2C2 resonant cavity is L02+M2+2LCM2, where LCM2 is the common-mode inductance seen from the taps of inductors L21 and L22, so the resonant frequency of the L2C2 resonant cavity decreases.

[0053] Because the capacitance variation range of a variable capacitor is limited, a combination of a switched capacitor circuit and a varactor circuit is used to further expand the variation range of the equivalent capacitance of the LC resonant cavity. By changing the control bits B0 / 1 / 2 / 3 of the switched capacitor circuit, coarse adjustment of the equivalent capacitance of the LC resonant cavity is achieved, and fine adjustment is achieved by controlling voltages VCTL1 and VCTL2. By changing the equivalent inductance and equivalent capacitance of the LC resonant cavity in the above way, a wide frequency tuning range can be achieved, resulting in... Figure 4 The simulation results shown depict a frequency range from 25.23 GHz to 8.32 GHz, with a center frequency of 16.775 GHz. The calculated frequency tuning range is 100.8%, and the phase noise at the highest frequency is as follows: Figure 5 As shown.

[0054] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A broadband voltage-controlled oscillator based on magnetic coupling, characterized in that, include: The circuit includes a negative resistance circuit, a switch-shielded transformer, a mode switching switch circuit, an LC resonant cavity circuit, and an output buffer circuit. The negative resistance circuit consists of four pairs of NMOS transistors MN1 and MN2, MN3 and MN4, MN5 and MN6, and MN7 and MN8, which are cross-coupled to generate active negative resistance. The active negative resistance generated by the NMOS transistors is -Gmn. When the active negative resistance is greater than the loss generated by the resistance of the resonant circuit, the VCO satisfies the oscillation condition. The LC resonant cavity circuit includes a switched shielded transformer, a tuning capacitor CT, and a fixed capacitor Cfix. There are two LC resonant cavities. One LC resonant cavity is composed of L11, L12, two sets of switched capacitors, two sets of Cfix, and one set of varactor connected in parallel, and is called the L1C1 resonant cavity. The other LC resonant cavity is composed of L21, L22, two sets of switched capacitors, and one set of varactor connected in parallel, and is called the L2C2 resonant cavity. The switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, LC2; Tap inductors LA1, LB1, and LC1 are positioned in the middle, to the left, and to the right of tap inductors L11 and L21, respectively, in series with MOSFETs MA1, MB1, and MC1. When MOSFET MA1 is turned on, the current i11 in tap inductor L11 induces a current iA1 in tap inductor LA1 and another current i21 in tap inductor L21. Simultaneously, iA1 also induces another current iA21 in L21. This current tends to cancel i21 and reduce the total induced current in L21. The equivalent coupling coefficient k12 between L11 and L21 is changed by controlling the on and off states of MA1, MB1, and MC1. LA2, LB2, and LC2 are connected in series with MOSFETs MA2, MB2, and MC2, respectively, and placed in the middle, left, and right of inductors L12 and L22. When MA2 is turned on, the current i12 in L12 induces a current iA2 in LA2 and another current i22 in L22. At the same time, iA2 also induces another current iA22 in L22. It tends to cancel i22 and reduce the total induced current in L22. The equivalent coupling coefficient k12' between L12 and L22 is changed by controlling the on and off states of MA2, MB2, and MC2. When SW_FH1 is high and SW_FL1 is low, VO1_P1 / 2 and VO1_N1 / 2 are out of phase. VO1_P1 is the positive output port of the upper half of the L1C1 resonant cavity, VO1_N1 is the negative output port of the upper half of the L1C1 resonant cavity, VO1_P2 is the positive output port of the lower half of the L1C1 resonant cavity, and VO1_N2 is the negative output port of the lower half of the L1C1 resonant cavity. Assuming the original equivalent inductance of the L1C1 resonant cavity is L01, the equivalent inductance of this resonant cavity is L01-M1, where M1 is the mutual inductance. The resonant frequency of the L1C1 resonant cavity increases. SW_FH1 is the gate voltage of MP5 and MP8; SW_FL1 is the gate voltage of MP6 and MP7; SW_FH2 is the gate voltage of MP9 and MP12; and SW_FL2 is the gate voltage of MP10 and MP1. When SW_FH1 is low and SW_FL1 is high, VO1_P1 / 2 and VO1_N1 / 2 are in phase. VO2_P1 is the positive output port of the upper half of the L2C2 resonant cavity, VO2_N1 is the negative output port of the upper half of the L2C2 resonant cavity, VO2_P2 is the positive output port of the lower half of the L2C2 resonant cavity, and VO2_N2 is the negative output port of the lower half of the L2C2 resonant cavity. At this time, the L1C1 resonant cavity is equivalent to... The inductance is L01+M1+2LCM1, where LCM1 is the common-mode inductance seen from the taps of inductors L11 and L12. The resonant frequency of the L1C1 resonant cavity decreases. When SW_FH2 is high and SW_FL2 is low, VO2_P1 / 2 and VO2_N1 / 2 are out of phase. Assuming the original equivalent inductance of the L2C2 resonant cavity is L02, the equivalent inductance of the L2C2 resonant cavity is L02-M2, where M2 is the mutual inductance. The resonant frequency of the L2C2 resonant cavity increases. When SW_FH2 is low and SW_FL2 is high, VO2_P1 / 2 and VO2_N1 / 2 are in phase. At this time, the equivalent inductance of the L2C2 resonant cavity is L02+M2+2LCM2, where LCM2 is the common-mode inductance seen from the L21 and L22 taps. The resonant frequency of the L2C2 resonant cavity becomes lower.

2. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 1, characterized in that, include: The switch-shielded transformer includes MOSFETs MA1, MB1, MC1, MA2, MB2, MC2, and tapped inductors L11, L21, LA1, LB1, LC1, L12, L22, LA2, LB2, and LC2. The drain of MA1 is connected to terminal n5 of LA1, the source of MA1 is connected to terminal n6 of LA1, the gate of MA1 is connected to VA, and the tap of LA1 is connected to the reverse potential of VA. The drain of MB1 is connected to the n1 terminal of LB1, the source of MB1 is connected to the n2 terminal of LB1, the gate of MB1 is connected to VB, and the tap of LB1 is connected to the reverse potential of VB. The drain of MC1 is connected to the n9 terminal of LC1, the source of MC1 is connected to the n10 terminal of LC1, the gate of MC1 is connected to VC, and the tap of LC1 is connected to the reverse potential of VC. L11's n3 terminal is connected to VO1_P1, L11's n4 terminal is connected to VO1_N1, L11's tap is connected to the drain of MP1, MP1's source is connected to power supply VDD, and MP1's gate is connected to SW_L1; L21's n7 terminal is connected to VO2_P1, L21's n8 terminal is connected to VO2_N1, L21's tap is connected to the drain of MP2, MP2's source is connected to power supply VDD, and MP2's gate is connected to SW_L2; MA2's drain is connected to LA2's n15 terminal, MA2's source is connected to LA2's n16 terminal, MA2's gate is connected to VA, and LA2's tap is connected to the reverse potential of VA. The drain of MB2 is connected to terminal n11 of LB2, the source of MB2 is connected to terminal n12 of LB2, the gate of MB2 is connected to VB, and the tap of LB2 is connected to the reverse potential of VB. The drain of MC2 is connected to terminal n19 of LC2, the source of MC2 is connected to terminal n20 of LC2, the gate of MC2 is connected to VC, and the tap of LC2 is connected to the reverse potential of VC. The n13 terminal of L12 is connected to VO1_P2, the n14 terminal of L12 is connected to VO1_N2, the tap of L12 is connected to the drain of MP3, the source of MP3 is connected to the power supply VDD, and the gate of MP3 is connected to SW_L3; the n17 terminal of L22 is connected to VO2_P2, the n18 terminal of L22 is connected to VO2_N2, the tap of L22 is connected to the drain of MP4, the source of MP4 is connected to the power supply VDD, and the gate of MP4 is connected to SW_L4.

3. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 2, characterized in that, include: The mode switching circuit includes MOSFETs MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12. The gate of MP5 is connected to SW_FH1, the drain of MP5 is connected to the drain of MP7, and the source of MP5 is connected to the drain of MP6 and then to VO1_P1. The gate of MP6 is connected to SW_FL1, the source of MP6 is connected to the drain of MP8 and then to VO1_N1. The gate of MP7 is connected to SW_FL1, the source of MP7 is connected to the source of MP8 and then to V... O1_N2; MP8's gate is connected to SW_FH1; MP9's gate is connected to SW_FH2, MP9's drain is connected to MP11's drain, MP9's source is connected to MP10's drain, and connected to VO2_P1; MP10's gate is connected to SW_FL2, MP10's source is connected to MP12's drain, and connected to VO2_N1; MP11's gate is connected to SW_FL2, MP11's source is connected to MP12's source, and connected to VO2_N2; MP12's gate is connected to SW_FH2.

4. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 1, characterized in that, include: The switched capacitor circuit has four pairs of differential output ports. For one pair of differential outputs, the P and N terminals are connected to the upper plates of capacitors Cn in the two unit switched capacitor circuits, respectively. The other input to the unit switched capacitor circuit is bit B0 / 1 / 2 / 3. When the bit input is low, the inverter output is high, the NMOS is turned on, and Cn is connected to the LC resonant cavity, increasing the equivalent capacitance in the resonant circuit and thus lowering the resonant frequency. When the bit input is high, the inverter output is low, the NMOS is turned off, Cn is not connected to the LC resonant cavity, and the equivalent capacitance in the resonant circuit remains unchanged, so the resonant frequency remains constant.

5. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 4, characterized in that, include: There are four groups of switched capacitor circuits, each with the same structure, connected to four pairs of differential output ports: VO1_P1 and VO1_N1, VO2_N1 and VO2_P1, VO1_P2 and VO1_N2, and VO2_N2 and VO2_P2. Each group of switched capacitors has 60 units. 30 of these units are connected to the P port of the differential output port, and the other 30 units are connected to the N port of the differential output port. Each unit includes a capacitor Cn, a resistor R, an inverter, and a MOSFET MN. The upper plate of Cn is connected to the differential output terminal, and the lower plate of Cn is connected to one end of R and the drain of MN. The other end of R is connected to bits B0 / 1 / 2 / 3 and the input of the inverter. The output of the inverter is connected to the gate of MN, and the source of MN is grounded.

6. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 5, characterized in that, include: Two sets of varactor capacitors are used to continuously change the capacitance value of the varactor by changing the control voltages VCTL1 and VCTL2; thus continuously changing the equivalent capacitance value in the LC resonant cavity.

7. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 6, characterized in that, include: There are two groups of varactor circuits, connected to two pairs of differential output ports: VO1_P1 and VO1_N2, and VO2_P and VO2_N2. Each group of varactor circuits has two NMOS varactors. The gate of MVP1 is connected to VO1_P1, and the gate of MVN1 is connected to VO1_N2. The source and drain of MVP1 and MVN1 are connected together and then connected to VCTL1. The gate of MVP2 is connected to VO2_P1, and the gate of MVN2 is connected to VO2_N2. The source and drain of MVP2 and MVN2 are connected together and then connected to VCTL2.

8. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 1, characterized in that, include: The output buffer circuit includes MOSFETs Mbuf1, Mbuf2, Mbuf3, Mbuf4, Mbuf5, Mbuf6, Mbuf7, and Mbuf8, and eight 50-ohm resistors. Specifically, a 50-ohm resistor is connected across the source and drain of Mbuf1, and its gate is connected to VO1_P1; a 50-ohm resistor is connected across the source and drain of Mbuf2, and its gate is connected to VO1_N1; a 50-ohm resistor is connected across the source and drain of Mbuf3, and its gate is connected to VO2_N1; a 50-ohm resistor is connected across the source and drain of Mbuf4, and its gate is connected to VO2_P1; a 50-ohm resistor is connected across the source and drain of Mbuf5. A 50-ohm resistor is connected across the source and drain of Mbuf5 to PAD1, and the gate of Mbuf5 is connected to VO1_P2; a 50-ohm resistor is connected across the source and drain of Mbuf6, and the gate of Mbuf6 is connected to VO1_N2; a 50-ohm resistor is connected across the source and drain of Mbuf7, and the gate of Mbuf7 is connected to VO2_N2; a 50-ohm resistor is connected across the source and drain of Mbuf8, and the source of Mbuf8 is connected to PAD2, and the gate of Mbuf8 is connected to VO2_N2; there are two LC resonant cavities, so only two output buffer circuits are needed, and the remaining six are pseudo-output buffer circuits, used for symmetry at the differential output port. The MOS transistors at PAD1 and PAD2 adopt a common-source amplifier structure.

9. The broadband voltage-controlled oscillator based on magnetic coupling according to claim 1, characterized in that, include: The gate of MN1 is connected to the drain of MN2; the drain of MN1 is connected to the gate of MN2; the source of MN1 is connected to the source of MN2 and then to ground; the gate of MN3 is connected to the drain of MN4; the drain of MN3 is connected to the gate of MN4; the source of MN3 is connected to the source of MN4 and then to ground; the gate of MN5 is connected to the drain of MN6; the drain of MN5 is connected to the gate of MN6; the source of MN5 is connected to the source of MN6 and then to ground; the gate of MN7 is connected to the drain of MN8; the drain of MN7 is connected to the gate of MN8; the source of MN7 is connected to the source of MN8 and then to ground.

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