Microelectrode array, method for manufacturing microelectrode array, brain organoid detection device
Patent Information
- Application Number
- CN202310898087.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-20
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2043-07-20
AI Technical Summary
现有的多电极阵列无法有效检测悬浮培养的脑类器官表面信号,且三维MEA检测范围有限,无法满足高拉伸性和柔韧性的需求。
A microelectrode array with high tensile strength and flexibility was fabricated by using liquid metal polymer as the conductor layer material, combined with an elastic substrate layer and a mesh-like encapsulation layer. The conductor layer, substrate layer and encapsulation layer were fabricated by photolithography and microfluidic technology to ensure the exposure and support of the electrodes and wires.
It enables the extensive detection of signals on the surface of brain organoids. The electrode array can be stretched by 500% and can be freely folded and bent to adapt to the growth and metabolic needs of brain organoids, thereby improving the detection range and sensitivity.
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Figure CN117017307B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electrophysiology, and in particular to a microelectrode array, a method for preparing the microelectrode array, and a brain organoid detection device. Background Technology
[0002] Currently, by detecting neurophysiological activity, it is possible to understand the electrical signal transmission of brain organoids, thus contributing to the study of brain organoid function. In related technologies, traditional multi-electrode arrays (MEAs) are two-dimensional planar electrodes, therefore, the multi-electrode array is fixedly distributed on a rigid plane. However, brain organoids are in a suspended culture state, so multi-electrode arrays cannot be applied to the detection of brain organoid signals. Furthermore, three-dimensional MEAs can only detect local signals within brain organoids. Therefore, how to provide a microelectrode array to improve the detection range of signals on the surface of brain organoids has become an urgent technical problem to be solved. Summary of the Invention
[0003] The main objective of this application is to provide a microelectrode array, a method for preparing the microelectrode array, and a brain organoid detection device, with the aim of improving the detection range of signals on the surface of brain organoids.
[0004] To achieve the above objectives, a first aspect of this application provides a microelectrode array, the microelectrode array comprising:
[0005] A conductor layer comprising electrodes and wires, the electrodes being arranged in an array and connected to the wires, the conductor layer being made of a liquid metal polymer;
[0006] A base layer, the base layer being in a mesh-like shape, the base layer serving to support one side of the conductor layer, the base layer being made of an elastic material;
[0007] The encapsulation layer is in the form of a mesh and is used to cover the wires on the other side of the conductor layer. The encapsulation layer has an exposed area that corresponds to the electrode.
[0008] In some embodiments, the conductor layer further includes a flexible flat cable connector that is connected to the conductor.
[0009] In some embodiments, the number of electrodes is greater than or equal to 64.
[0010] To achieve the above objectives, a second aspect of this application provides a method for fabricating a microelectrode array, the method being used to fabricate the microelectrode array as described in the first aspect, the method comprising:
[0011] A conductor layer film mask, a substrate layer film mask, and an encapsulation layer film mask are fabricated. The conductor layer film mask includes electrode exposure sections and conductor exposure sections, which are connected and arranged in an array. The substrate layer film mask includes substrate layer exposure sections arranged in a grid pattern. The encapsulation layer film mask includes encapsulation layer exposure sections arranged in a grid pattern, with non-exposed areas corresponding to the positions of the electrode exposure sections.
[0012] A photolithography operation is performed on the conductor layer film mask to obtain a conductor layer template; wherein, the conductor layer template includes electrode microchannels corresponding to the electrode exposure section and wire microchannels corresponding to the wire exposure section;
[0013] A photolithography operation is performed on the substrate film mask to obtain a substrate template; wherein, the substrate template includes a first grid-shaped microchannel corresponding to the substrate exposure section;
[0014] A photolithography operation is performed on the encapsulation layer film mask to obtain an encapsulation layer template; wherein, the encapsulation layer template includes a second mesh-like microchannel corresponding to the exposure portion of the encapsulation layer;
[0015] Liquid metal ink is injected into the wire microchannel and the electrode microchannel respectively to prepare a conductor layer;
[0016] Align the substrate template with the conductor template, inject an elastic material solution into the substrate microchannels, and dry to obtain the substrate layer;
[0017] The conductor layer template is peeled off, the encapsulation layer template is aligned with the substrate layer template, and an encapsulation solution is injected into the encapsulation layer template to prepare the encapsulation layer.
[0018] The microelectrode array is obtained by peeling off the substrate template and the encapsulation template.
[0019] In some embodiments, the conductor layer film mask further includes a ribbon cable connection exposure section, and the conductor layer template further includes a ribbon cable connection microchannel corresponding to the ribbon cable connection exposure section; the conductor layer includes electrodes, wires, and ribbon cable connections;
[0020] In some embodiments, the conductor layer film mask further includes a flexible flat cable connected to the exposure section, and the conductor layer template further includes a flexible flat cable connected microchannel corresponding to the flexible flat cable connected to the exposure section; the conductor layer includes electrodes, wires, and flexible flat cable connections;
[0021] The process of injecting liquid metal ink into the microchannels of the conductive wires and the microchannels of the electrodes to prepare a conductor layer includes:
[0022] The liquid metal ink is injected into the microchannel of the conductor to obtain the conductor;
[0023] The liquid metal ink is injected into the electrode microchannel to obtain the electrode;
[0024] The liquid metal ink is injected into the microchannel of the flexible flat cable connection to obtain the flexible flat cable connection part.
[0025] In some embodiments, the method for fabricating the microelectrode array further includes:
[0026] The flexible flat cable connector is connected to the flexible flat cable using anisotropic conductive adhesive.
[0027] In some embodiments, the method for fabricating the microelectrode array further includes:
[0028] The microelectrode array is subjected to PEDOT electroplating treatment.
[0029] In some embodiments, the electroplating of the microelectrode array with PEDOT includes:
[0030] The microelectrode array is subjected to plasma treatment to improve its hydrophilicity;
[0031] The microelectrode array after plasma treatment is subjected to PEDOT electroplating.
[0032] To achieve the above objectives, a third aspect of this application provides a brain organoid detection device, the brain organoid detection device comprising:
[0033] A brain organoid culture chamber, wherein the brain organoid culture chamber is used to culture brain organoids to be tested;
[0034] A cover is disposed inside the brain organoid culture chamber, and the opening side of the cover forms a closed space with the inner bottom surface of the brain organoid culture chamber; wherein the brain organoid to be tested is disposed within the closed space;
[0035] The first microelectrode array prepared according to the microelectrode array preparation method of the second aspect includes a first encapsulation layer disposed within the enclosed space, and the first encapsulation layer is used to contact the surface of the brain organoid to be tested.
[0036] In some embodiments, the brain organoid detection device further includes:
[0037] The second microelectrode array prepared according to the microelectrode array preparation method described in the second aspect includes a second encapsulation layer disposed within the enclosed space;
[0038] The first microelectrode array and the second microelectrode array are arranged alternately, and the brain organoid to be tested is disposed between the second encapsulation layer and the first encapsulation layer. The second encapsulation layer is used to contact the surface of the brain organoid to be tested.
[0039] The microelectrode array, its fabrication method, and brain organoid detection device proposed in this application, based on the tensile properties of liquid metal polymers and the mesh-like structure of the base layer and encapsulation layer, give the microelectrode array provided in this application high tensile strength and high flexibility. In practical applications, the microelectrode array provided in this application can achieve a tensile strength of up to 500%, and high flexibility refers to arbitrary deformation, free folding, bending, and twisting. Therefore, the microelectrode array provided in this application can improve the detection range of signals on the surface of brain organoids. Attached Figure Description
[0040] Figure 1 This is a schematic diagram of the conductor layer provided in an embodiment of this application;
[0041] Figure 2 yes Figure 1 An enlarged schematic diagram of part A in the middle;
[0042] Figure 3 This is a schematic diagram of the base layer provided in the embodiments of this application;
[0043] Figure 4 This is a schematic diagram of the alignment of the substrate layer and the conductor layer provided in an embodiment of this application;
[0044] Figure 5 This is a partial schematic diagram of the encapsulation layer provided in an embodiment of this application;
[0045] Figure 6 This is a schematic diagram showing the alignment of the encapsulation layer and the base layer according to an embodiment of this application;
[0046] Figures 7 to 9 This is a schematic diagram of the brain organoid detection device provided in the embodiments of this application;
[0047] Figure 10 This is a flowchart of the fabrication method of the microelectrode array provided in the embodiments of this application;
[0048] Figure 11 This is a schematic diagram of the pattern corresponding to the film mask for fabricating the conductor layer provided in the embodiments of this application;
[0049] Figure 12This is a schematic diagram of the pattern corresponding to the substrate film mask provided in the embodiments of this application;
[0050] Figure 13 This is a schematic diagram of the pattern corresponding to the film mask for fabricating the encapsulation layer provided in the embodiments of this application;
[0051] Figure 14 This is a schematic diagram of the fabrication of the conductor layer provided in the embodiments of this application;
[0052] Figure 15 This is a schematic diagram showing the alignment of the substrate microchannel and the electrode microchannel provided in an embodiment of this application;
[0053] Figure 16 This is a schematic diagram of the preparation of the substrate layer provided in the embodiments of this application;
[0054] Figure 17 This is a schematic diagram showing the alignment of the encapsulation layer microchannels with the substrate layer microchannels provided in an embodiment of this application;
[0055] Figures 18 to 19 This is a schematic diagram of the microelectrode array formed after removing all microchannel templates, as provided in the embodiments of this application;
[0056] Figure 20 This is a flowchart of another embodiment of the fabrication method of the microelectrode array provided in this application;
[0057] Figure 21 This is a schematic diagram of the microelectrode array provided in the embodiments of this application;
[0058] Figure 22 This is a schematic diagram of the stretching effect of the microelectrode array provided in the embodiments of this application;
[0059] Figure 23 This is a schematic diagram of the microelectrode array with 0% stretching provided in the embodiments of this application;
[0060] Figure 24 This is a schematic diagram of the electrodes of the microelectrode array provided in the embodiments of this application, stretched by 400%.
[0061] Figure 25 This is a schematic diagram of the conductor of the microelectrode array with 0% stretch provided in the embodiments of this application;
[0062] Figure 26 This is a schematic diagram of the wires of the microelectrode array stretched by 400% according to an embodiment of this application;
[0063] Figure 27 This is an impedance test statistical graph of the microelectrode array provided in the embodiments of this application;
[0064] Figure 28This is a current-time curve during the electroplating process of the microelectrode array provided in the embodiments of this application;
[0065] Figures 29 to 31 This is a schematic diagram of the co-culture of microelectrode arrays and brain organoids provided in the embodiments of this application;
[0066] Figures 32 to 33 This is an experimental result diagram showing the detection of continuous signals by the microelectrode array provided in the embodiments of this application;
[0067] Figure 34 This is a waveform diagram of spontaneous neural discharge detected by one electrode in the microelectrode array provided in the embodiments of this application;
[0068] Figure 35 This is an experimental result diagram showing the detection of two different neural signals by the same electrode (such as the 32nd electrode) in the microelectrode array provided in the embodiments of this application;
[0069] Figure 36 This is an experimental result diagram of the neural signals detected by the first microelectrode array provided in the embodiments of this application;
[0070] Figure 37 This is an experimental result diagram of the neural signals detected by the second microelectrode array provided in the embodiments of this application.
[0071] Figure label:
[0072] Conductor layer 100, electrode 101, wire 102, flexible flat cable connector 103, base layer 200, encapsulation layer 300, exposed area 301, brain organoid culture chamber 400, cover 401, first microelectrode array 402, brain organoid to be tested 403, second microelectrode array 404, non-exposed area 500, flexible flat cable connector to exposure part 501, column group 600, first column 601, second column 602, third column 603. Detailed Implementation
[0073] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0074] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0075] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.
[0076] Currently, by detecting neurophysiological activity, it is possible to understand the signals transmitted by brain organoids, thus contributing to the study of brain organoid function. In related technologies, multi-electrode arrays (MEAs) are two-dimensional planar electrodes, therefore, they are fixedly distributed on a rigid plane. However, brain organoids are cultured in suspension, so multi-electrode arrays cannot be applied to detect brain organoid signals. Furthermore, three-dimensional MEAs can only detect local signals within brain organoids. Therefore, how to provide a microelectrode array to improve the detection range of signals on the surface of brain organoids has become an urgent technical problem to be solved.
[0077] The nervous system is the most intricate and structurally and functionally complex system in the human body, directly or indirectly regulating and controlling various organs and systems. A large number of nerve cells gather in the central nervous system, forming specific networks for the transmission, storage, and processing of information, inducing various psychological activities and governing all bodily behaviors. Due to technological and ethical limitations, direct neuroscience research, especially in deep brain regions, cannot be conducted on humans. Furthermore, the nervous systems of different species vary significantly, and commonly used laboratory models such as zebrafish and mice cannot completely replace the human nervous system. Therefore, various in vitro models have been established to simulate and study the nervous system. Among these, brain organoids are one of the most popular research areas. Brain organoids can, to a certain extent, replicate the brain's growth and development process in vitro, generating cell types and structural tissues similar to the brain.
[0078] However, there is still a significant gap in high-precision, non-invasive neural interfaces for acquiring signals from brain organoids. Neural interfaces connect computer detection instruments to neurobiological tissues, such as in vivo animal brain-computer interfaces, and are a primary means of acquiring neural signals in related technologies. Various neural interfaces have been developed, such as sheet-like or insertable electrodes implanted in the animal brain and multi-electrode arrays for in vitro detection of brain slices or neurons. However, the former is too bulky, and the latter, due to its two-dimensional planar distribution, cannot be applied to brain organoids. Therefore, research on neural interfaces suitable for brain organoids is still in its initial stages.
[0079] In related technologies, electrodes applied to brain organoids mainly fall into two categories: (1) mesh electrodes, which are co-cultured with brain organoids. The electrodes are encapsulated within the brain organoid tissue and grow alongside it, detecting neural signals within and on the surface of the brain organoid; (2) encapsulated electrodes, which are formed into a "bowl" shape by deforming the electrode material to partially encapsulate the brain organoid, enabling the detection of neural signals at local locations within mature brain organoids. Currently, the electrode fabrication techniques developed are all based on photolithography and etching, and the materials used are mostly: (1) conductive layers, including wires and electrodes, using gold, platinum, or the conductive polymer PEDOT; (2) encapsulation layers, using photoresist SU-8 or other photosensitive polymer materials.
[0080] All related technologies suffer from two major shortcomings: mechanical properties and the number of electrodes. Firstly, regarding mechanical properties, existing 3D MEAs lack sufficient stretchability and flexibility. Brain organoids are highly flexible three-dimensional biological tissue structures, requiring 3D MEAs to possess high stretchability and flexibility to avoid affecting the growth of brain organoids and causing no damage to their structure during use. Materials suitable for photolithography and etching techniques typically lack stretchability, such as solid metals like gold and platinum, and photosensitive materials like SU-8. A small number of stretchable conductive polymers have a stretchability of less than 50%. Of the four currently developed 3D MEAs, only two mesh-like 3D MEAs possess stretchability, with stretchability of 30% and 50% respectively. The other two encapsulated electrode designs lack stretchability and flexibility. The second major drawback is the limited number of electrodes in current 3D MEAs, ranging from a maximum of 25 electrodes to a minimum of only 3. A small number of electrodes means that the MEA can only detect a very limited number of neural signals, impacting research on neural pathways.
[0081] Based on this, embodiments of this application provide a microelectrode array, a method for preparing the microelectrode array, and a brain organoid detection device, aiming to improve the detection range of brain organoid surface signals.
[0082] The microelectrode array, the method for preparing the microelectrode array, and the brain organoid detection device provided in this application are specifically described through the following embodiments. First, the microelectrode array in the embodiments of this application is described.
[0083] Reference Figures 1 to 6This application provides a microelectrode array. The microelectrode array includes a conductor layer 100, a substrate layer 200, and an encapsulation layer 300. The conductor layer 100 includes electrodes 101 and wires 102, arranged in an array and connected to the wires 102. The conductor layer 100 is made of a liquid metal polymer. The substrate layer 200 is mesh-shaped and disposed on one side of the conductor layer 100, supporting the conductor layer 100. The substrate layer 200 is made of an elastic material. The encapsulation layer 300 is mesh-shaped and disposed on the other side of the conductor layer 100, covering the wires 102 within the conductor layer 100. The encapsulation layer 300 has exposed areas 301 corresponding to the electrodes 101.
[0084] Specifically, such as Figure 1 and Figure 2 As shown, the conductor layer 100 includes electrodes 101 and wires 102. The electrodes 101 are arranged in an array, and the number of electrodes 101 can be adaptively set according to actual needs. The wires 102 are connected to the electrodes 101. Figure 3 As shown, the substrate 200 has a mesh-like structure. The substrate 200 is aligned with one side of the conductor layer 100, allowing the substrate 200 to support the conductor layer 100. The alignment of the substrate 200 and the conductor layer 100 is as follows: Figure 4 As shown, the electrodes 101 are all covered by the grid lines of the substrate layer 200, and the portion of the wires 102 near the electrodes 101 is also covered by the substrate layer 200. Therefore, the extent of the covered wires 102 is related to the size of the substrate layer 200. The width of the grid lines in the substrate layer 200 and the spacing between adjacent grid lines are related to the diameter of the electrodes 101 and the linewidth of the wires 102. Assuming the diameter of the electrodes 101 is 20 micrometers and the linewidth of the wires 102 is 15 micrometers, the width of the grid lines can be set to 50 micrometers, and the spacing between adjacent grid lines can be set to 150 micrometers. Figure 5 As shown, the encapsulation layer 300 is the same size as the substrate layer 200. The encapsulation layer 300 is disposed on the other side of the conductor layer 100, that is, the encapsulation layer 300 and the substrate layer 200 are disposed opposite each other, and the conductor layer 100 is disposed between the encapsulation layer 300 and the substrate layer 200. The encapsulation layer 300 has an exposed area 301, and the location of the exposed area 301 is related to the arrangement of the electrode 101. It can be understood that... Figure 5 The location of the exposed area 301 shown is merely exemplary. When the encapsulation layer 300 is aligned with the substrate layer 200, as... Figure 6As shown, the wires in the conductor layer 100 can be covered by the grid lines of the encapsulation layer 300, and the electrode 101 can be exposed within the exposed area 301. When the microelectrode array comes into contact with the brain organoid, the electrode 101 can contact the surface of the brain organoid through the exposed area 301, thereby enabling the recording of electrical signals generated by the brain organoid. By analyzing this electrical signal, research on neural signal transmission in the brain organoid can be achieved.
[0085] In this embodiment, both the electrode 101 and the wire 102 are made of liquid metal-polymer conductor (MPC), while the substrate layer 200 is made of an elastic material, such as thermoplastic polyurethane (TPU). Based on the tensile properties of the liquid metal-polymer and the mesh structure of the substrate layer 200 and the encapsulation layer 300, the microelectrode array provided in this application embodiment possesses high tensile strength and high flexibility. In practical applications, the microelectrode array provided in this application embodiment can achieve a tensile strength of up to 500%, and high flexibility refers to arbitrary deformation, free folding, bending, and twisting. Therefore, the microelectrode array provided in this application embodiment can improve the detection range of signals on the surface of brain organoids.
[0086] The advantage of designing the base layer 200 and the encapsulation layer 300 as a grid in this embodiment is that the culture medium can make normal contact with the brain organoids through the grid without affecting the growth and metabolism of the brain organoids.
[0087] Reference Figure 1 In some embodiments, the conductor layer 100 further includes a flexible flat cable connector 103, which is used to connect to the end of the wire 102 away from the electrode 101. The flexible flat cable connector 103 is used to connect to a flexible flat cable, through which the electrical signals recorded by the microelectrode array are transmitted to an external analysis system, such as a three-dimensional neural model, enabling the three-dimensional neural model to perform analyses of neural pathways, neural signal transmission, and neurodegenerative diseases based on the electrical signals.
[0088] In some embodiments, to improve the detection range of signals on the surface of brain organoids, the number of electrodes 101 in the conductor layer 100 should be greater than or equal to 64. It is understood that as the number of electrodes 101 increases, the sizes of the base layer 200 and the encapsulation layer 300 should also be adjusted accordingly. Secondly, to reduce the overall volume of the microelectrode array, the width of the wires 102 in the conductor layer 100 can be reduced.
[0089] Reference Figure 7 and Figure 8This application also provides a brain organoid detection device. The brain organoid detection device includes a brain organoid culture chamber 400, a cover 401, and a first microelectrode array 402. The brain organoid culture chamber 400 is used to culture brain organoids 403 to be tested. The cover 401 is disposed inside the brain organoid culture chamber 400, and the opening side of the cover 401 forms a closed space with the inner bottom surface of the brain organoid culture chamber 400, within which the brain organoid 403 to be tested is disposed. The first microelectrode array 402 includes a first encapsulation layer, which is disposed within the closed space and is used to contact the surface of the brain organoid 403 to be tested.
[0090] Specifically, in this embodiment, the brain organoid culture chamber 400 and the cover 401 constitute a brain organoid culture device. The cover 401 has a receiving space and an opening on one side. Therefore, when the opening side of the cover 401 faces the bottom surface of the brain organoid culture chamber 400 and the cover 401 is placed over the bottom surface of the brain organoid culture chamber 400, the receiving space of the cover 401 and the bottom surface of the brain organoid culture chamber 400 form a closed space. The brain organoid 403 to be tested is placed in this closed space. For example, the brain organoid culture chamber 400 is a culture dish, and the cover 401 is a confocal microplate with a diameter of 35 mm. The glass bottom of the confocal microplate is removed to form the opening side of the cover 401. The confocal microplate with the glass bottom removed is placed over the bottom surface of the culture dish. The structure of the first microelectrode array 402 is the same as the structure of the microelectrode array described in the above embodiment, that is, the first microelectrode array 402 also includes a conductor layer, a substrate layer, and an encapsulation layer. For ease of distinction, the conductor layer of the first microelectrode array 402 is referred to as the first conductor layer, the base layer of the first microelectrode array 402 as the first base layer, and the encapsulation layer of the first microelectrode array 402 as the first encapsulation layer. The first microelectrode array 402 is placed inside the brain organoid culture cavity 400, with the surface of the first encapsulation layer parallel to the bottom surface of the brain organoid culture cavity 400. The first encapsulation layer is disposed within a closed space. By analogy with the description of the microelectrode array in the above embodiments, the first encapsulation layer is aligned with the first base layer, and the first base layer is used to cover the electrodes in the first conductor layer, as well as the wires near the electrodes. Therefore, the first base layer, the electrodes covered by the first base layer, and the wires are also disposed within a closed space. Thus, it can be seen that when the surface of the opening side of the cover 401 is circular, the diameter of the opening side of the cover 401 is also related to the size of the first encapsulation layer. Within the enclosed space, the first encapsulation layer contacts the surface of the brain organoid 403 to be tested, allowing electrodes to acquire electrical signals from the brain organoid 403 through the exposed area on the first encapsulation layer. This enables the analysis and detection of neural pathways, neural signal transmission, and neurodegenerative diseases of the brain organoid 403. It is understandable that the structure of the brain organoid culture chamber 400 and the cover 401 facilitates the assembly and contact between the microelectrode array and the brain organoid 403.
[0091] Reference Figure 9 In some embodiments, the brain organoid detection device further includes a second microelectrode array 404, which includes a second encapsulation layer disposed within a closed space. The first microelectrode array 402 and the second microelectrode array 404 are arranged intersectingly, and the brain organoid 403 to be tested is disposed between the first and second encapsulation layers.
[0092] Specifically, the structure of the second microelectrode array 404 is the same as that of the microelectrode array described in the above embodiments, that is, the second microelectrode array 404 also includes a conductor layer, a substrate layer, and an encapsulation layer. However, for ease of distinction, the conductor layer of the second microelectrode array 404 is referred to as the second conductor layer, the substrate layer of the second microelectrode array 404 is referred to as the second substrate layer, and the encapsulation layer of the second microelectrode array 404 is referred to as the second encapsulation layer. The second microelectrode array 404 is placed inside the brain organoid culture cavity 400, and the surface of the second encapsulation layer is parallel to the bottom surface of the brain organoid culture cavity 400. The second encapsulation layer is disposed within a closed space. By analogy with the description of the microelectrode array in the above embodiments, the second encapsulation layer is aligned with the second substrate layer, and the second substrate layer is used to cover the electrodes in the second conductor layer, as well as the wires near the electrodes. Therefore, the second substrate layer, the electrodes covered by the second substrate layer, and the wires are also disposed within a closed space. The first microelectrode array 402 and the second microelectrode array 404 are arranged intersectingly, such as orthogonally or at other angles. The brain organoid 403 to be tested is disposed between the first encapsulation layer and the second encapsulation layer, so that the first microelectrode array 402 and the second microelectrode array 404 can completely cover the surface of the brain organoid 403 to be tested, thereby achieving comprehensive detection of the brain organoid 403 to be tested and improving the detection range of the surface signal of the brain organoid 403 to be tested.
[0093] Reference Figure 10 This application also provides a method for fabricating a microelectrode array. This method is used to fabricate microelectrode arrays as described in any of the above embodiments, that is, to fabricate a first microelectrode array and a second microelectrode array. The method for fabricating the microelectrode array includes, but is not limited to, steps S1001 to S1008.
[0094] Step S1001: Prepare a conductor layer film mask, a substrate layer film mask, and an encapsulation layer film mask; wherein, the conductor layer film mask includes an electrode exposure section and a wire exposure section, the wire exposure section is connected to the electrode exposure section, and the electrode exposure section is arranged in an array; the substrate layer film mask includes a substrate layer exposure section, the substrate layer exposure section is in a grid shape; the encapsulation layer film mask includes an encapsulation layer exposure section, the encapsulation layer exposure section is in a grid shape, and non-exposed areas are provided on the encapsulation layer exposure sections, the positions of the non-exposed areas corresponding to the electrode exposure sections;
[0095] Step S1002: Perform photolithography on the conductor layer film mask to obtain the conductor layer template; wherein, the conductor layer template includes electrode microchannels corresponding to the electrode exposure section and wire microchannels corresponding to the wire exposure section;
[0096] Step S1003: Perform photolithography on the substrate film mask to obtain the substrate template; wherein, the substrate template includes a first grid-like microchannel corresponding to the substrate exposure area;
[0097] Step S1004: Perform photolithography on the encapsulation layer film mask to obtain the encapsulation layer template; wherein, the encapsulation layer template includes a second mesh-like microchannel corresponding to the exposure section of the encapsulation layer;
[0098] Step S1005: Liquid metal ink is injected into the wire microchannel and the electrode microchannel respectively to prepare the conductor layer;
[0099] Step S1006: Align the substrate template with the conductor template, inject an elastic material solution into the substrate microchannels, and dry to obtain the substrate layer;
[0100] Step S1007: The conductor layer template is peeled off, the encapsulation layer template is aligned with the base layer template, and the encapsulation material solution is injected into the microchannels of the encapsulation layer and dried to prepare the encapsulation layer;
[0101] Step S1008: The substrate template and the encapsulation template are peeled off to obtain the microelectrode array.
[0102] In step S1001 of some embodiments, in related technologies, microelectrode arrays are typically fabricated by spin-coating a material onto a substrate. Microelectrode arrays fabricated in this way are usually sheet-like, meaning there is additional encapsulation material between the wires. However, the microelectrode arrays of this application require the removal of excess encapsulation material to expose the electrodes. Therefore, the methods for fabricating microelectrode arrays in related technologies are not applicable to the microelectrode arrays of this application. This application employs microfluidic technology, designing microchannel templates for the conductor layer, substrate layer, and encapsulation layer respectively, and then assembling the conductor layer, substrate layer, and encapsulation layer sequentially to obtain the microelectrode array. Specifically, the microelectrode array is drawn using AutoCAD or similar methods. Figures 11 to 13 The diagram shown. According to... Figure 11 The pattern shown is used to create a conductor layer film mask, which includes electrode exposure areas and conductor exposure areas (such as...). Figure 11 (As shown in the white area). The wire exposure section is connected to the electrode exposure section, and the electrode exposure sections are arranged in an array. According to Figure 12 The pattern shown is used to create a base layer film mask, which includes a base layer exposure section (such as...). Figure 12 (As shown in the white area), the exposed portion of the substrate layer has a grid-like structure. According to... Figure 13 The pattern shown is used to create an encapsulation layer film mask. The encapsulation layer film mask includes an encapsulation layer exposure section (such as...). Figure 13(As shown in the white area), the encapsulation layer exposure section is grid-shaped, and a non-exposure area 500 is provided on the encapsulation layer exposure section. When the substrate layer film mask is aligned with the conductor layer film mask, and the encapsulation layer film mask is aligned with the substrate layer film mask, the non-exposure area 500 corresponds to the electrode exposure section.
[0103] In step S1002 of some embodiments, photolithography is performed based on the conductor layer film mask. The photolithography operation typically includes steps such as substrate preparation, photoresist coating, photoresist curing, pattern exposure, and photoresist development. For example, SU-8 photoresist is spin-coated onto a clean substrate (such as a silicon wafer) at 3000 rpm for 30 seconds, and then cured using an oven or UV irradiator at a preset temperature (such as 60°C and 90°C) to improve the stability and corrosion resistance of the photoresist. The conductor film mask is placed on the photoresist surface, and the pattern on the conductor layer film mask is transferred to the photoresist surface by UV irradiation (such as 365nm UV, exposure power of 140mJ / cm²). Development is performed with SU-8 developer for 3 minutes to remove the unexposed areas of photoresist. The film is then hardened at 150°C for 30 minutes to obtain the conductor mold. Polydimethylsiloxane (PDMS) base liquid and curing agent were mixed at a mass ratio of 10:1 and then degassed under vacuum. The PDMS mixture was poured onto a conductor mold and baked at 80°C for 1 hour to form solid PDMS. The solid PDMS was then peeled off from the conductor mold to obtain the conductor layer template. Since the conductor layer film mask includes conductive line exposure sections and electrode exposure sections, and the photoresist corresponding to these sections is not dissolved by the developer, the resulting conductor layer template includes electrode microchannels corresponding to the electrode exposure sections and conductive line microchannels corresponding to the conductive line exposure sections.
[0104] In step S1003 of some embodiments, a substrate layer template is obtained by photolithography based on the substrate layer film mask. The process of obtaining the substrate layer template is similar to the process of obtaining the conductor layer template in step S1002, and will not be described again in this embodiment. Similarly, the substrate layer template includes a first mesh-like microchannel corresponding to the substrate layer exposure area. It can be understood that, with Figure 3 The substrate layer 200 shown is the same, and the first mesh-like microchannel is mesh-like.
[0105] In step S1004 of some embodiments, a photolithography operation is performed on the encapsulation layer film mask to obtain an encapsulation layer template. The process of obtaining the encapsulation layer template is similar to the process of obtaining the conductor layer template in step S1002, and will not be described again in this embodiment. Similarly, the encapsulation layer template includes a second mesh-like microchannel corresponding to the exposure portion of the encapsulation layer, and the second mesh-like microchannel has an exposed area corresponding to the non-exposed area. It can be understood that, with Figure 5The encapsulation layer 300 shown is the same, and the second mesh-like microchannel is mesh-like.
[0106] In step S1005 of some embodiments, referring to Figure 14 Liquid metal polymer material (such as MPC ink) is injected into the microchannels for wires and electrodes of the conductor layer template to obtain electrodes and wires, respectively, thereby preparing the conductor layer. Specifically, taking MPC ink as an example, the MPC ink is obtained as follows: 6g of gallium-indium (GaIn, 75wt% Ga and 25wt% In) liquid metal is added to 1mL of n-decanol, and the mixture is ultrasonically treated for 1 minute at a power of 300W. The MPC ink is then injected into the microchannels for wires and electrodes, and any remaining MPC ink on the surface of the conductor layer template is removed with adhesive tape. The conductor layer template is then baked at 80°C for 5 minutes to allow the n-decanol to completely evaporate.
[0107] In step S1006 of some embodiments, the conductor layer template after MPC ink injection is immersed in a 3wt% TPU solution (solvent: dimethylformamide, DMF) and placed in a vacuum pump for 30 minutes. The conductor layer template is then removed, and the TPU solution drips completely from the template surface, remaining only in the gaps between the GaIn particles due to affinity. The conductor layer template is then baked at 60°C for 20 minutes to completely evaporate the DMF. At this point, the GaIn particles are embedded in the structure of the TPU polymer. In practical applications, when the tensile stress of the TPU breaks the oxide layer on the surface of the GaIn particles, the liquid metal flows and interconnects, and the conductor layer begins to conduct electricity. (Refer to...) Figure 14 and Figure 15 The substrate template and the conductor template are aligned, that is, the first mesh-like microchannels are aligned with the electrode microchannels. This alignment means that the first mesh-like microchannels can cover the electrode and the portion of the wire close to the electrode. (Refer to...) Figure 16 An elastic solution (such as a TPU solution) is injected from one side of the substrate template into the first mesh-like microchannel to prepare a mesh-like substrate layer, which covers one side of the electrode and one side of the wires near the electrode.
[0108] In step S1007 of some embodiments, after the DMF in the substrate template has completely evaporated, the conductor layer template is peeled off to obtain a preliminary electrode array, which includes a conductor layer, TPU, and a conductor layer template. (Refer to...) Figure 17The encapsulation layer template is aligned with the substrate layer template, i.e., the encapsulation layer is placed on the other side of the electrode. The second mesh-like microchannel is aligned with the first mesh-like microchannel, where the alignment means that the second mesh-like microchannel can cover the first mesh-like microchannel, and the exposed area on the second mesh-like microchannel corresponds to the electrode in the conductor layer. An encapsulation solution (such as PU solution, 5wt%, dissolved in ethanol or n-decanol) is injected into the second mesh-like microchannel from one side of the encapsulation layer template. After evaporating the solvent, a mesh-like encapsulation layer is prepared.
[0109] In step S1008 of some embodiments, such as Figure 18 and Figure 19 As shown, the substrate template and the encapsulation template are peeled off to obtain a microelectrode array. As can be seen from the figure, the microelectrode array provided in this embodiment is a "sandwich" encapsulation structure of TPU-electrode-PU.
[0110] Reference Figure 11 , Figure 18 , Figure 20 In some embodiments, the conductor layer film mask further includes a flexible flat cable connection exposure section 501, and the conductor layer template further includes a flexible flat cable connection microchannel corresponding to the flexible flat cable connection exposure section. The conductor layer includes electrodes, wires, and flexible flat cable connections. Step S1005 includes, but is not limited to, steps S2001 to S2003.
[0111] Step S2001: Liquid metal ink is injected into the microchannel of the wire to obtain the wire;
[0112] Step S2002: Liquid metal ink is injected into the electrode microchannel to obtain the electrode;
[0113] Step S2003: Inject liquid metal ink into the microchannel of the ribbon cable connection to obtain the ribbon cable connection part.
[0114] In some embodiments, to facilitate connection with external analysis systems, the conductor layer film mask may further include a flexible flat cable connection exposure section 501. The method for obtaining the flexible flat cable connection microchannel based on the flexible flat cable connection exposure section is similar to the method for obtaining the wire microchannel, and will not be described again in this embodiment. Liquid metal ink is injected into the wire microchannel, liquid metal ink is injected into the electrode microchannel, and liquid metal ink is injected into the flexible flat cable connection microchannel to prepare a conductor layer including electrodes, wires, and flexible flat cable connection sections.
[0115] Reference Figure 21In some embodiments, the flexible flat cable is connected to the flexible flat cable connector with anisotropic conductive adhesive. The flexible flat cable is used to connect to an external analysis system. That is, the electrical signals of the brain organoid collected by the electrodes are sent to the external analysis system in sequence through the wire, the flexible flat cable connector and the flexible flat cable. The external analysis system analyzes and detects the neural pathways, neural signal transmission and neurodegenerative diseases of the brain organoid based on the electrical signals.
[0116] In some embodiments, the method for fabricating a microelectrode array further includes the step of:
[0117] The microelectrode array is electroplated with PEDOT.
[0118] Specifically, it includes the following two steps:
[0119] Plasma treatment is applied to the microelectrode array to improve its hydrophilicity;
[0120] The microelectrode array after plasma treatment was subjected to PEDOT electroplating.
[0121] Specifically, to improve the stability of the microelectrode array, a highly stable electroplating solution, such as the conductive polymers poly(3,4-ethylenedioxythiophene) (PEDOT) and poly(styrene sulfonic acid) (PSS), can be electroplated onto the microelectrode array. The conductive polymer formulation is: 0.1M sodium sulfate, 15mM PEDOT, and 0.315mM PSS. Before electroplating, the microelectrode array needs to be pretreated to improve its hydrophilicity. Then, the microelectrode array is plasma-treated for 1 minute, followed by immersion in phosphate-buffered saline (PBS) under vacuum for several minutes to remove air bubbles that easily form on the electrodes in the solution and improve their contact with the liquid. Finally, the PBS is poured out, and the electroplating solution is added to begin electroplating the PEDOT:PSS. The electroplating uses a constant voltage method with a voltage of 1.2V and a plating time of 5 minutes. After electroplating, the microelectrode array is cleaned with PBS.
[0122] In some specific embodiments, refer to Figure 22 The microelectrode array provided in this embodiment can be stretched to five times its original length, i.e., a stretch of 400%. (Refer to...) Figure 23 and 25 This is a microelectrode array in a 0% stretched state. (Refer to...) Figure 24 and Figure 26 This is a microelectrode array under 400% stretching. Figure 23 and Figure 24 The comparison Figure 25 and Figure 26The comparison shows that the electrode microarray of this application exhibits no electrode damage under 400% stretching, and the mesh structure remains intact. Both the electrode portion and the wire portion are completely encapsulated within the TPU-PU structure. Under 400% stretching, there is no leakage of liquid metal, and the TPU structure and PU structure are tightly bonded without peeling.
[0123] In some specific embodiments, refer to Figure 27 The impedance of the microelectrode array was characterized using an electrochemical workstation. Nine measurement points were used, ranging from 1 kHz to 100 kHz. Each measurement point included a set of columns 600. Each column set 600 included a first column 601, a second column 602, and a third column 603. The first column represented the impedance of the microelectrode array before electroplating (0% stretching), the second column represented the impedance after electroplating (0% stretching), and the third column represented the impedance after electroplating (100% stretching). Figure 27 By comparing the changes in impedance before and after electroplating, and before and after stretching, it can be seen that the microelectrode array provided in this embodiment has relatively low impedance. The reason why electroplating increases impedance is that the conductivity of the conductive polymer material PEDOT is generally lower than that of liquid metal, which is reflected in the rapid decrease of the current-time curve in the initial stage of the electroplating process. Figure 28 As shown, the resistance of the microelectrode array increases after electroplating. The reason for the decrease in impedance after stretching is that stretching causes more oxide layers on the surface of the liquid metal particles to break, resulting in more liquid metal connections forming a conductive layer, thereby reducing the resistance. The resistance level of the microelectrode array provided in this application embodiment is close to that of commercial two-dimensional and three-dimensional electrodes, indicating that the microelectrode array provided in this application embodiment can serve as a neural interface to detect neural signals.
[0124] In one specific embodiment, a brain organoid is used as an example. (Refer to...) Figures 29 to 31 Microelectrode arrays were co-cultured with brain organoids. In this case, the morphology of the brain organoids encapsulated by the microelectrode arrays was characterized using fluorescence immunoassay. Normal expression of hippocampal neuronal markers PROX1 and MAP2, and glial cell marker GFAP was observed. Furthermore, the microelectrode arrays conformally adhered to the surface of the brain organoids without significant damage.
[0125] In one specific embodiment, refer to Figure 32 and Figure 33 This represents the continuous signal detected by the microelectrode array. (Refer to...) Figure 34 This is a waveform diagram of spontaneous neural discharge detected by one electrode in a microelectrode array. (Refer to...) Figure 35 This demonstrates the detection of two distinct neural signals on the same electrode (e.g., the 35th electrode) within a microelectrode array. When brain organoids are detected using a method that alternates between the first and second microelectrode arrays... Figure 36 This indicates that 29 electrodes in the microelectrode array (such as the first microelectrode array) that are in contact with the lower surface of the brain organoid are capable of detecting neural signals. Figure 37 This indicates that the microelectrode array (such as the second microelectrode array) in contact with the surface of the brain organoid has 25 electrodes capable of detecting neural signals. The detected signals have an amplitude range of 50-1501V, similar to spontaneously generated neural signals. If the brain organoid grows to a larger size, more electrodes will be used. A single electrode can detect 2-4 different neural signals, which can be displayed after signal processing and sorting.
[0126] This application utilizes the excellent stretchability of MPC electrodes to fabricate a three-dimensional microelectrode array suitable for brain organoids. A mesh-like base layer and encapsulation layer are fabricated to ensure normal contact between the brain organoid and the culture medium, without affecting its growth and metabolism. Based on microfluidic and MPC technologies, this application selects highly stretchable and biocompatible polymer materials to fabricate a stretchable, high-electrode-count flexible microelectrode array, which can be uniformly attached to the surface of brain organoids to detect neural signals. The fusion of the microelectrode array and brain organoids provides a usable and efficient platform for signal detection in in vitro three-dimensional neural models, which can be used to study complex neural pathways, neural signal transmission, and neurodegenerative diseases.
[0127] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.
[0128] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0129] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.
[0130] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.
[0131] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0132] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0133] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.
Claims
1. A method for fabricating a microelectrode array, characterized in that, The preparation method is used to prepare the following microelectrode array: A conductor layer comprising electrodes and wires, the electrodes being arranged in an array and connected to the wires, the conductor layer being made of a liquid metal polymer; A base layer, which is mesh-shaped, is disposed on one side of the conductor layer and serves to support the conductor layer. The base layer is made of an elastic material. An encapsulation layer, which is in the form of a mesh, is disposed on the other side of the conductor layer and is aligned with the substrate layer. The encapsulation layer is used to cover the wires of the conductor layer and has an exposed area corresponding to the electrode. In this configuration, the base layer and the conductor layer are aligned on one side, meaning that the electrodes can be covered by the grid lines of the base layer. When the encapsulation layer is aligned with the base layer, the wires in the conductor layer can be covered by the grid lines of the encapsulation layer, and the electrodes can be exposed in the exposed area. When the microelectrode array comes into contact with the suspended brain organoids, the culture medium comes into contact with the brain organoids through the grids of the base layer and the encapsulation layer, and the electrodes come into contact with the surface of the brain organoids through the exposed area. The method for fabricating the microelectrode array includes: A conductor layer film mask, a substrate layer film mask, and an encapsulation layer film mask are fabricated. The conductor layer film mask includes electrode exposure sections and conductor exposure sections, which are connected and arranged in an array. The substrate layer film mask includes substrate layer exposure sections arranged in a grid pattern. The encapsulation layer film mask includes encapsulation layer exposure sections arranged in a grid pattern, with non-exposed areas corresponding to the positions of the electrode exposure sections. A photolithography operation is performed on the conductor layer film mask to obtain a conductor layer template; wherein, the conductor layer template includes electrode microchannels corresponding to the electrode exposure section and wire microchannels corresponding to the wire exposure section; A photolithography operation is performed on the substrate film mask to obtain a substrate template; wherein, the substrate template includes a first grid-shaped microchannel corresponding to the substrate exposure section; A photolithography operation is performed on the encapsulation layer film mask to obtain an encapsulation layer template; wherein, the encapsulation layer template includes a second mesh-like microchannel corresponding to the exposure portion of the encapsulation layer; Liquid metal ink is injected into the wire microchannel and the electrode microchannel respectively to prepare a conductor layer; Align the substrate template with the conductor template, inject an elastic material solution into the first mesh-like microchannel, and dry to obtain the substrate layer; The conductor layer template is peeled off, the encapsulation layer template is aligned with the base layer template, and an encapsulation material solution is injected into the second mesh-like microchannels. The encapsulation layer is then dried to obtain the encapsulation layer. The microelectrode array is obtained by peeling off the substrate template and the encapsulation template.
2. The method for fabricating a microelectrode array according to claim 1, characterized in that, The conductor layer also includes a flexible flat cable connector, which is connected to the conductor.
3. The method for fabricating a microelectrode array according to claim 2, characterized in that, The number of electrodes is greater than or equal to 64.
4. The method for fabricating a microelectrode array according to claim 1, characterized in that, The conductor layer film mask further includes a flexible flat cable connection to the exposure section, and the conductor layer template further includes a flexible flat cable connection microchannel corresponding to the flexible flat cable connection to the exposure section; the conductor layer includes electrodes, wires, and flexible flat cable connections; The process of injecting liquid metal ink into the microchannels of the conductive wires and the microchannels of the electrodes to prepare a conductor layer includes: The liquid metal ink is injected into the microchannel of the conductor to obtain the conductor; The liquid metal ink is injected into the electrode microchannel to obtain the electrode; The liquid metal ink is injected into the microchannel of the flexible flat cable connection to obtain the flexible flat cable connection part.
5. The method for fabricating a microelectrode array according to claim 4, characterized in that, The method for fabricating the microelectrode array further includes: The flexible flat cable connector is connected to the flexible flat cable using anisotropic conductive adhesive.
6. The method for fabricating a microelectrode array according to claim 1, characterized in that, The method for fabricating the microelectrode array further includes: The microelectrode array is subjected to PEDOT electroplating treatment.
7. The method for fabricating a microelectrode array according to claim 6, characterized in that, The process of electroplating the microelectrode array with PEDOT includes: The microelectrode array is subjected to plasma treatment to improve its hydrophilicity; The microelectrode array after plasma treatment is subjected to PEDOT electroplating.
8. A brain organoid detection device, characterized in that, The brain organoid detection device includes: A brain organoid culture chamber, wherein the brain organoid culture chamber is used to culture brain organoids to be tested; A cover is disposed inside the brain organoid culture chamber, and the opening side of the cover forms a closed space with the inner bottom surface of the brain organoid culture chamber; wherein the brain organoid to be tested is disposed within the closed space; The first microelectrode array prepared by the method of preparing a microelectrode array according to any one of claims 1 to 7 includes a first encapsulation layer disposed within the enclosed space, and the first encapsulation layer is used to contact the surface of the brain organoid to be tested.
9. The brain organoid detection device according to claim 8, characterized in that, The brain organoid detection device also includes: The second microelectrode array prepared by the method of preparing a microelectrode array according to any one of claims 1 to 7 has the same structure as the first microelectrode array, and the second microelectrode array includes a second encapsulation layer disposed within the enclosed space; The first microelectrode array and the second microelectrode array are arranged alternately, and the brain organoid to be tested is disposed between the second encapsulation layer and the first encapsulation layer. The second encapsulation layer is used to contact the surface of the brain organoid to be tested.
Citation Information
Patent Citations
Flexible microelectrode array and preparation method and application thereof
CN111920404A
Flexible electrode and preparation method and application thereof
CN113133770A
KR20220111139A
