Micro-architecture design space exploration method, apparatus and computer device

Abstract

The application relates to a micro-architecture design space exploration method and device, computer equipment, a storage medium and a computer program product, and relates to the technical field of Internet. The method comprises the following steps: obtaining design parameters in a micro-architecture design space of a target microprocessor; inputting the design parameters into a first model corresponding to each configuration dimension to obtain initial configuration parameters of the target microprocessor under each configuration dimension; inputting each initial configuration parameter into a task attention model to output corresponding parameter weights; fusing each parameter weight and each initial configuration parameter to obtain a correlation feature vector; and predicting target configuration parameters of the target microprocessor under each configuration dimension according to the correlation feature vector. The method can improve the accuracy of micro-architecture design space configuration prediction.

Description

Technical Field

[0001] This application relates to the field of Internet technology, and in particular to a method, apparatus, computer device, storage medium and computer program product for exploring microarchitecture design space. Background Technology

[0002] With the rapid development of Internet technology, microprocessors now have increasingly complex architectures. When developing microprocessors, the industry needs to find excellent architectural parameter configurations in the microprocessor's architecture design space in order to improve the microprocessor's performance.

[0003] In existing technologies, machine learning techniques are typically used to find the optimal parameter configuration in the architecture design space of a microprocessor. This involves building machine learning models to predict the optimal spatial parameter configuration in the architecture design space. However, current machine learning models are built separately for each configuration dimension, which leads to the predicted configuration parameters being isolated from each other, resulting in low accuracy in spatial configuration prediction. Summary of the Invention

[0004] Based on this, it is necessary to provide a method, apparatus, computer device, computer-readable storage medium, and computer program product for exploring microarchitecture design space that can improve the accuracy of microarchitecture design space configuration prediction, in order to address the above-mentioned technical problems.

[0005] Firstly, this application provides a method for exploring microarchitecture design space. The method includes:

[0006] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0007] In one embodiment, the configuration dimensions include performance, power consumption, and area; the first model includes a performance dimension model, a power consumption dimension model, and an area dimension model; and the initial configuration parameters include initial performance parameters, initial power consumption parameters, and initial area parameters.

[0008] The step of inputting the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the design parameters under each configuration dimension includes: inputting the design parameters into the fully connected layer of the performance dimension model and outputting the initial performance parameters of the design parameters under the performance dimension; inputting the design parameters into the fully connected layer of the area dimension model and outputting the initial power consumption parameters of the design parameters under the power consumption dimension; and inputting the design parameters into the fully connected layer of the power consumption dimension model and outputting the initial area parameters of the design parameters under the area dimension.

[0009] In one embodiment, the method further includes: collecting design parameter samples in the microarchitecture design space of a sample microprocessor; performing simulation on the design parameter samples to obtain simulated labeled samples and simulation results corresponding to the labeled samples; training a first initial model corresponding to each configuration dimension based on the labeled samples and the simulation results to obtain a first model; inputting the labeled samples into the first model to obtain corresponding initial sample configuration parameters; training a second initial model based on the initial sample configuration parameters and the simulation results until the training rounds of the second initial model reach a preset number of rounds, and ending the model training to obtain a task attention model, wherein the second initial model is a model built based on task attention.

[0010] In one embodiment, the task attention model includes a first sub-model and a second sub-model; after the step of obtaining the task attention model, the method further includes: inputting unlabeled samples from the design parameter sample into the first model to obtain unlabeled sample configuration parameters; inputting the unlabeled sample configuration parameters into the first sub-model and the second sub-model respectively to obtain corresponding first sub-output results and second sub-output results; performing a divergence test on the first sub-output results and the second sub-output results to obtain a divergence test result; based on the divergence test result, selecting a first unlabeled sample from the unlabeled samples; performing simulation on the first unlabeled sample to obtain a first target sample, and placing the first target sample into the labeled samples; and ending model training when the training rounds corresponding to the first sub-model and the second sub-model respectively reach a preset number of rounds to obtain a first target model and a second target model, and using the first target model and the second target model together as the task attention model.

[0011] In one embodiment, the task attention model includes a first sub-model and a second sub-model; the step of training the second initial model based on the initial sample configuration parameters and the simulation results until the training rounds of the second initial model reach a preset number of rounds, and then ending the model training to obtain the task attention model, further includes: inputting unlabeled samples from the design parameter samples into the first model to obtain unlabeled sample configuration parameters; inputting the unlabeled sample configuration parameters into the first sub-model and the second sub-model respectively to obtain corresponding first sub-output results and second sub-output results; and calculating the prediction Pa corresponding to the unlabeled sample based on the first sub-output results and the second sub-output results. Pareto volume, wherein the predicted Pareto volume refers to the Pareto volume of the unlabeled sample after adding the labeled sample; the true Pareto volume corresponding to the labeled sample is obtained, and based on the predicted Pareto volume and the true Pareto volume, a second unlabeled sample is selected from the unlabeled samples; the second unlabeled sample is simulated to obtain a second target sample, and the second target sample is placed into the labeled sample; the model training ends when the training rounds corresponding to the first sub-model and the second sub-model respectively reach a preset number of rounds, and a first target model and a second target model are obtained, and the first target model and the second target model are used together as the task attention model.

[0012] In one embodiment, the step of simulating the design parameter samples to obtain simulated labeled samples includes: simulating the design parameter samples to obtain a first labeled sample; calculating the shortest distance between the unlabeled samples in the design parameter samples that have not been simulated and the first labeled sample, and determining the longest distance among the shortest distances; selecting a target sample corresponding to the longest distance from the unlabeled samples, simulating the target sample to obtain a second labeled sample; adding the second labeled sample to the first labeled sample to obtain a target labeled sample, until the number of target labeled samples reaches a preset number of samples, and then using the target labeled sample as the labeled sample.

[0013] In one embodiment, the simulation results include performance simulation results, power consumption simulation results, and area simulation results; the simulation of the design parameter sample includes: inputting the design parameter sample into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample; inputting the performance simulation results into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample, wherein the preset combined simulator integrates power consumption and area simulation functions.

[0014] Secondly, this application also provides a microarchitecture design space exploration device. The device includes:

[0015] The design parameter acquisition module is used to acquire design parameters in the microarchitecture design space of the target microprocessor; the initial configuration parameter acquisition module is used to input the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the weight calculation module is used to input each initial configuration parameter into the task attention model and output the corresponding parameter weights; the correlation analysis module is used to fuse each parameter weight and each initial configuration parameter to obtain a correlation feature vector; and the prediction module is used to predict the target configuration parameters of the target microprocessor under each configuration dimension based on the correlation feature vector.

[0016] Thirdly, this application also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the following steps:

[0017] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0018] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, performs the following steps:

[0019] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0020] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, performs the following steps:

[0021] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0022] The aforementioned microarchitecture design space index prediction method, apparatus, computer device, storage medium, and computer program product first obtain the design parameters in the microarchitecture design space of the target microprocessor. Then, the design parameters are input into a first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension. At this point, the initial configuration parameters are still independent. Directly using these initial configuration parameters for the microarchitecture design space configuration of the target microprocessor would be inaccurate. Therefore, this method inputs each initial configuration parameter into a task attention model, outputting corresponding parameter weights. The parameter weights and initial configuration parameters are then fused to obtain a correlation feature vector. Based on this correlation feature vector, the target configuration parameters of the target microprocessor under each configuration dimension are predicted. By utilizing the task attention model, the correlation between the initial configuration parameters is considered, thereby generating target configuration parameters that incorporate the correlation between the initial configuration parameters. This overcomes the technical deficiency of current methods that rely on separate machine learning models for each configuration dimension to predict isolated configuration parameters, resulting in low accuracy in space configuration prediction. Therefore, this method can effectively improve the accuracy of space configuration prediction. Attached Figure Description

[0023] Figure 1 This is a diagram illustrating an application scenario of the microarchitecture design space exploration method in one embodiment.

[0024] Figure 2 This is a flowchart illustrating a microarchitecture design space exploration method in one embodiment;

[0025] Figure 3 This is a schematic diagram of the model training process in one embodiment;

[0026] Figure 4 This is a schematic diagram of the sample update process in one embodiment;

[0027] Figure 5 This is a flowchart illustrating the divergence test in one embodiment;

[0028] Figure 6 This is a schematic diagram of the Pareto volume calculation process in one embodiment;

[0029] Figure 7 This is a schematic diagram of the initial sampling process in one embodiment;

[0030] Figure 8 This is a schematic diagram of the performance evaluation results in one embodiment;

[0031] Figure 9 This is a schematic diagram of power consumption evaluation results in one embodiment;

[0032] Figure 10 This is a schematic diagram of the area assessment results in one embodiment;

[0033] Figure 11 This is a schematic diagram of the Pareto volume assessment results in one embodiment;

[0034] Figure 12 A structural block diagram of a microarchitecture design spatial index prediction device in one embodiment;

[0035] Figure 13 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0037] A central processing unit (CPU) is the component inside a computer that processes data and controls the processing. With the rapid development of large-scale integrated circuit (LSI) technology, chip integration density is increasing, and a CPU can be integrated onto a single semiconductor chip. These large-scale integrated circuit devices with CPU functionality are collectively referred to as microprocessors. With the rapid development of internet technology, in order to meet the ever-increasing demands for performance, power consumption, and area within a limited budget, microprocessors now possess increasingly complex architectures. When the industry develops a new microprocessor, the main challenge is finding promising architectural parameter configurations within the microprocessor's architecture design space to meet different performance, power consumption, and area requirements.

[0038] Currently, the industry primarily seeks optimal architectural parameter configurations by exploring the microprocessor design space—that is, predicting the optimal parameter configuration in the early stages of microprocessor design. However, with the increasing complexity of high-performance microprocessor architectures, the explorable design space continues to expand, drastically increasing the difficulty of microarchitecture design space exploration. Therefore, quickly obtaining the optimal design parameter configuration that meets performance and other requirements is a primary goal pursued by designers. Existing technologies typically employ machine learning techniques to predict the parameter configurations of the microprocessor's microarchitecture design space, mainly by constructing regression models to predict unknown architectural responses within the microarchitecture design space. Many machine learning methods have been applied to microarchitecture design space exploration, such as artificial neural networks, iterative algorithms (AdaBoost), and spline regression models. While machine learning-based methods can effectively predict unknown architectural responses within the microarchitecture design space, they still have significant drawbacks. Existing microarchitecture design space configuration prediction methods construct independent regression models for each configuration dimension, often ignoring the interdependencies between dimensions, thus reducing model prediction accuracy and resulting in low accuracy in microarchitecture design space exploration.

[0039] The microarchitecture design space index prediction method provided in this disclosure can be applied to, for example... Figure 1 The application environment shown. (Refer to...) Figure 1 This microarchitecture design space metric prediction is applied to a microarchitecture design space metric prediction system. The system includes a client 102 and a server 104, which are connected via a network. The server 104 is used to train a first model and a task attention model, and to receive design parameters from the microarchitecture design space of the target microprocessor sent by the client 102 and predict the target configuration parameters. The client 102 is used to obtain the design parameters from the microarchitecture design space of the target microprocessor input by the user and display the corresponding target configuration parameters. The client 102 can be, but is not limited to, various smartphones, computers, tablets, and other terminal devices. The server 104 can be implemented using a standalone server or a server cluster consisting of multiple servers.

[0040] In one embodiment, such as Figure 2 As shown, a method for exploring microarchitecture design space is provided. This embodiment mainly applies this method to the above-mentioned... Figure 1 Let's take server 104 as an example. (Refer to...) Figure 2 The microarchitecture design space exploration method specifically includes the following steps:

[0041] Step S202: Obtain the design parameters in the microarchitecture design space of the target microprocessor.

[0042] The target microprocessor refers to the microprocessor whose microarchitecture design space configuration needs to be predicted. This can include, but is not limited to, Intel processors, AMD (Advanced Micro Devices) processors, and ARM (Advanced RISC Machine) processors. Microarchitecture, also known as microprocessor architecture, refers to the microprocessor architecture space. The microarchitecture design space is composed of many design parameters of the microprocessor, which can include, but are not limited to, parameters such as fetchWidth, decodeWidth, and ROB (Re-Order Buffer).

[0043] Specifically, the system obtains design parameters such as fetchWidth, decodeWidth, and ROB from the microarchitecture design space of the target microprocessor, which are input by the user on the client side. These design parameters can be used as input for subsequent models to predict the initial configuration parameters of the target microprocessor.

[0044] Step S204: Input the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension.

[0045] The configuration dimension refers to the various metrics used to evaluate the configuration quality of a microprocessor, including performance, power consumption, and area. These three metrics are crucial indicators for evaluating the quality level of a microprocessor. The first model is used to predict the microprocessor's values ​​in each of the three metric dimensions: performance, power consumption, and area. While the first model can predict the spatial configuration parameters of the target microprocessor, it comprises three independent performance, power consumption, and area dimension models. This means the values ​​predicted by the first model are isolated initial area, initial power consumption, and initial area parameters. These three values ​​are the initial configuration parameters, and there is no correlation between them. Therefore, the initial configuration parameters predicted by the first model cannot be used as the target configuration parameters for the target microprocessor.

[0046] As an example, power consumption can refer to the energy consumed by a microprocessor per unit of time, area can refer to the physical area of ​​a microprocessor, and performance can have two meanings. One is to refer to how many standard test programs a microprocessor can run in front-end design. Benchmarking means testing a terminal device or processor with relevant benchmarking software to evaluate its performance. The higher the benchmark score, the better the performance. The other meaning is the highest frequency. The higher the frequency, the higher the overall performance when the benchmark score per hertz is fixed.

[0047] Specifically, the design parameters are input into the performance dimension model, and the initial performance parameters of the target microprocessor in the performance dimension are output. The design parameters are input into the power consumption dimension model, and the initial power consumption parameters of the target microprocessor in the power consumption dimension are output. The design parameters are input into the area dimension model, and the initial area parameters of the target microprocessor in the area dimension are output. The initial performance parameters, the initial power consumption parameters, and the initial area parameters are used together as the initial configuration parameters.

[0048] Step S206: Input the initial configuration parameters into the task attention model and output the corresponding parameter weights.

[0049] Among them, the task attention model refers to a multi-objective regression prediction model based on task attention. Task attention can focus on the mutual influence between various configuration dimensions, thereby obtaining the correlation feature vector between the initial configuration parameters under each configuration dimension, and then predicting the target configuration parameters based on the correlation feature vector, thereby improving the prediction accuracy of microprocessor design space configuration.

[0050] Furthermore, in task attention models, the output of each neuron depends not only on the outputs of all neurons in the previous layer, but also on different parts of the input data, assigning different weights to different components. This allows the model to focus more on the key information in the input data, thereby improving the accuracy and efficiency of the model's predictions.

[0051] Parameter weights refer to the weights corresponding to each initial configuration parameter, that is, the weights corresponding to each configuration dimension.

[0052] Specifically, the initial configuration parameters are first concatenated and combined to obtain the combined configuration parameters, which include relevant parameters corresponding to the performance, power consumption, and area dimensions. These combined configuration parameters are then input into the channel attention layer of the task attention model. The essence of the channel attention layer is to learn the weight distribution of the relevant feature maps of the combined configuration parameters, apply the learned weights to the original feature maps, and finally perform a weighted summation. In this embodiment, the channel attention layer first uses global pooling to compress the input features corresponding to the combined configuration parameters, turning each two-dimensional feature channel into a real number. This real number, to some extent, has a global receptive field. Then, the channel domains of the compressed features are weighted, that is, a weight is added to the signal in each channel of the feature, modeling the correlation between different channels. The larger this weight, the higher the correlation.

[0053] As an example, the channel attention layer can use two fully connected layers and activation functions to obtain weights for each configuration dimension. The two fully connected layers refer to two fully connected neural networks with different neurons, and the activation function can be the sigmoid function.

[0054] As an example, the channel attention layer first performs global average pooling on the original feature map H*W*C of the input features corresponding to the combined configuration parameters, and then obtains a feature map of size 1*1*C. This feature map has a global receptive field, where C is the channel, which also represents the number of convolution kernels and the number of features. H and W are the height and width of the compressed original feature map.

[0055] Step S208: The weights of each parameter and the initial configuration parameters are fused to obtain the correlation feature vector.

[0056] Among them, the correlation feature vector is used to characterize the correlation between each initial configuration parameter.

[0057] Specifically, after the channel attention layer calculates the parameter weights, these weights are fused with the original features (i.e., the combined configuration parameters obtained by concatenating and combining the initial configuration parameters). This fusion of weights can be achieved by multiplying them across the C channels of the combined configuration parameters, thus recalibrating the original feature map in the channel domain. The fused features are then tiled using a view function to obtain tiled fused features. Tiling aims to reduce the dimensionality of the features, decreasing their spatial complexity and improving model computational efficiency. Finally, the tiled fused features undergo dimensionality reduction processing and an upsampling layer for dimensionality increase, expanding the receptive field and learning more global information, ultimately outputting the correlation feature vectors between the initial configuration parameters.

[0058] Step S210: Based on the correlation feature vector, predict the target configuration parameters of the target microprocessor under each configuration dimension.

[0059] The target configuration parameters are predicted parameters for the microprocessor space configuration generated by combining the correlations between the initial configuration parameters, and may include target area parameters, target performance parameters, and target power consumption parameters. The task attention model may also include a prediction layer used to predict the target configuration parameters.

[0060] Specifically, the correlation feature vector is used as the input of the prediction model, and the target configuration parameters of the target microprocessor under each configuration dimension are output. The target configuration parameters obtained at this time are calculated based on the correlation feature vector between each initial configuration parameter, and are no longer isolated configuration parameters. The correlation between each initial configuration parameter is fully analyzed, thereby characterizing the correlation between each configuration dimension of the target microprocessor, and thus improving the prediction accuracy of the microprocessor space configuration.

[0061] As an example, a task attention model can include a first sub-model and a second sub-model. These are two pre-trained regression models with the same network structure but different hidden neurons. Both sub-models contain task attention layers and prediction layers. Understandably, since the two sub-models differ only in hidden neurons, their prediction performance will differ, and the relevance feature vectors output by the task attention layer may also differ. The mean of the prediction results from each of the two sub-models is taken as the target configuration parameter. Establishing two regression models with the same network structure but different hidden neurons can reduce random errors, thereby ensuring prediction accuracy.

[0062] This embodiment first obtains the design parameters in the microarchitecture design space of the target microprocessor, and then inputs the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension. At this time, the initial configuration parameters are still independent of each other. If the initial configuration parameters are directly used for the microarchitecture design space configuration of the target microprocessor, it will be inaccurate. Therefore, this method inputs the initial configuration parameters into a task attention model and outputs the corresponding parameter weights. The parameter weights and the initial configuration parameters are fused to obtain a correlation feature vector. Based on the correlation feature vector, the target configuration parameters of the target microprocessor under each configuration dimension are predicted. By using the task attention model, the correlation between the initial configuration parameters is considered, thereby generating target configuration parameters that combine the correlation between the initial configuration parameters. This overcomes the technical defect of the current method, which predicts isolated configuration parameters by building machine learning models for each configuration dimension separately, resulting in low accuracy of spatial configuration prediction results. Therefore, this embodiment can effectively improve the accuracy of spatial configuration prediction.

[0063] In one embodiment, the step of inputting the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the design parameters under each configuration dimension includes: inputting the design parameters into the fully connected layer of the performance dimension model and outputting the initial performance parameters of the design parameters under the performance dimension; inputting the design parameters into the fully connected layer of the area dimension model and outputting the initial power consumption parameters of the design parameters under the power consumption dimension; and inputting the design parameters into the fully connected layer of the power consumption dimension model and outputting the initial area parameters of the design parameters under the area dimension.

[0064] Among them, the performance dimension model, power consumption dimension model, and area dimension model can all be single-objective regression models, which predict the configuration parameters of the microprocessor in the performance dimension, power consumption dimension, and area dimension, respectively.

[0065] Specifically, the design parameters are input into the fully connected layer of the performance dimension model to output the initial performance parameters of the design parameters in the performance dimension; the design parameters are input into the fully connected layer of the area dimension model to output the initial power consumption parameters of the design parameters in the power consumption dimension; and the design parameters are input into the fully connected layer of the power consumption dimension model to output the initial area parameters of the design parameters in the area dimension.

[0066] As an example, the order in which design parameters are input into the three models can be set by the user. That is, design parameters can be input into the performance dimension model, power consumption dimension model, and area dimension model at the same time, or they can be input in sequence. The specific input order is not limited here.

[0067] In one embodiment, such as Figure 3 As shown, the process of establishing a microarchitecture design space exploration model includes the following steps:

[0068] Step S302: Collect design parameter samples in the microarchitecture design space of the sample microprocessor, perform simulation on the design parameter samples, and obtain the simulated labeled samples and the simulation results corresponding to the labeled samples.

[0069] Here, design parameter samples refer to the design parameters used to build the first model and the task attention model in the microarchitecture design space of the sample microprocessor. Simulation refers to simulating the real function of the microprocessor, that is, its real performance, real area, and real power consumption. The simulation results can be used as a validation set for model training. Labeled samples are design parameter samples that have undergone simulation; similarly, the unlabeled samples below are design parameter samples that have not undergone simulation.

[0070] Specifically, design parameter samples are collected from the microarchitecture design space of the sample microprocessor. Using a pre-set simulator, these design parameter samples are simulated to obtain simulation results, which are then used as labeled samples. Since there are many selectable values ​​for the design parameters in the microprocessor architecture space in practical applications, sampling from a single location could result in highly similar samples. To overcome this limitation, the design parameter samples collected in this embodiment are uniformly covered and representative. Uniform coverage means selecting selectable values ​​for each design parameter as fairly as possible, ensuring that all selected samples are evenly distributed. Representativeness means that the selected samples can well reflect the distribution of the entire design space. This overcomes the limitations of sample collection and improves the accuracy of subsequent model building.

[0071] Step S304: Based on the labeled samples and the simulation results, train the first initial model corresponding to each configuration dimension to obtain the first model.

[0072] The first initial model refers to the initial single-objective regression model, which can also include the initial performance dimension model, the initial power consumption dimension model, and the initial area dimension model.

[0073] Specifically, the labeled samples are used as the training set, and the model simulation results, i.e. the true values ​​of the design parameter samples, including performance simulation results, power consumption simulation results, and area simulation results, are used as the validation set to iteratively train the initial performance dimension model, initial power consumption dimension model, and initial area dimension model respectively, thereby obtaining independent performance dimension model, power consumption dimension model, and area dimension model.

[0074] Step S306: Input the labeled sample into the first model to obtain the corresponding initial sample configuration parameters.

[0075] The initial sample configuration parameters refer to the configuration parameters of the labeled samples in terms of performance, power consumption, and area.

[0076] Specifically, each labeled sample is input into the trained performance dimension model, power consumption dimension model, and area dimension model to obtain the corresponding prediction results, that is, the configuration parameters of each labeled sample in the performance dimension, power consumption dimension, and area dimension. These configuration parameters are then used as target features to establish a task attention model.

[0077] Step S308: Based on the initial sample configuration parameters and the simulation results, train the second initial model until the training rounds of the second initial model reach the preset number of rounds, then end the model training and obtain the task attention model.

[0078] The second model is a multi-objective regression model based on task attention.

[0079] Specifically, the initial sample configuration parameters are concatenated and combined to obtain the combined sample configuration parameters. The combined sample configuration parameters are then input into a multi-objective regression model based on task attention for model training. The training continues until the preset number of training rounds is reached, at which point the model training is stopped, and the trained task attention model is obtained.

[0080] As an example, the mean squared error can be used as the loss function to iteratively train this multi-objective regression model. The expression for the loss function can be:

[0081]

[0082] Among them, y i For the true value, This is the predicted value from the second initial model.

[0083] In this embodiment, by simulating the design parameter samples, labeled samples after simulation and simulation results corresponding to the labeled samples are obtained. Then, based on the labeled samples and simulation results, the first initial model corresponding to each configuration dimension is trained to obtain the first model. The labeled samples are then input into the first model to obtain the corresponding initial sample configuration parameters. Finally, based on the initial sample configuration parameters and simulation results, the second initial model, a multi-objective regression model based on task attention, is trained to obtain the task attention model. This model can focus on the correlation between each configuration dimension in the microarchitecture design space of the microprocessor, thereby predicting more accurate target configuration parameters.

[0084] To ensure that all collected samples have good performance, power consumption, and area, this embodiment uses active learning sampling to update the labeled samples, such as... Figure 4 As shown, by performing a divergence test and calculating the Pareto volume on the prediction results output by the unlabeled samples in the task attention model, a sample to be labeled is selected, and the sample to be labeled is simulated to obtain a target sample, which is then placed into the labeled sample.

[0085] In one embodiment, such as Figure 5 As shown, the task attention model includes a first sub-model and a second sub-model; after the step of obtaining the task attention model, it further includes:

[0086] Step S502: Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0087] Step S504: Input the configuration parameters of the unlabeled samples into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result.

[0088] In this model, the configuration parameters corresponding to the unlabeled samples are used as the training set for the second initial model. The first sub-model and the second sub-model are two regression models with the same network structure but different hidden neurons. Both the first sub-model and the second sub-model are models built based on task attention. The first sub-output result is the prediction result obtained by the first sub-model based on the configuration parameters corresponding to the unlabeled samples, and the second sub-output result is the prediction result obtained by the second sub-model based on the configuration parameters corresponding to the unlabeled samples.

[0089] Specifically, the unlabeled samples in the design parameter sample are first input into the first model to obtain the configuration parameters of the unlabeled samples. Then, the configuration parameters corresponding to the unlabeled samples are input into the first sub-model. The task attention layer in the first sub-model performs weighted processing on the configuration parameters to obtain the corresponding relevance feature vector. Based on the relevance feature vector, the first sub-output result is obtained. Similarly, the configuration parameters corresponding to the unlabeled samples are input into the second sub-model. The task attention layer in the second sub-model performs weighted processing on the configuration parameters to obtain the corresponding relevance feature vector. Based on the relevance feature vector, the second sub-output result is obtained.

[0090] Since the hidden neurons of the two sub-models are different, the final prediction results are also different. Training both sub-models to obtain the corresponding target models together serves as the task attention model for spatial configuration prediction of the target microprocessor. This can avoid random errors and thus improve the accuracy of the task attention model.

[0091] Step S506: Perform a divergence test on the first sub-output result and the second sub-output result to obtain the divergence test result.

[0092] The degree of divergence refers to the difference between the first sub-output and the second sub-output. The degree of divergence can characterize the degree of influence on the model. The greater the degree of divergence, the greater the influence on the model. When the results of the same sample on two models with the same network structure but different hidden neurons differ greatly on the same configuration dimension, it indicates that adding labeled samples to update the model can improve the prediction accuracy of the model.

[0093] Specifically, the first and second sub-output results are input into a preset divergence calculation function for divergence testing, which detects the divergence value between the first and second sub-output results. Each unlabeled sample corresponds to a divergence value. If the divergence value is greater than a preset divergence threshold, the divergence test result is judged to be large. The preset divergence threshold is a critical value for divergence; exceeding this threshold indicates large divergence. If the divergence value is not greater than the preset divergence threshold, the divergence test result is judged to be small divergence. If the divergence between the first and second sub-output results is too large, it indicates that the prediction effects of the first and second sub-models are significantly different. In other words, the unlabeled samples corresponding to both the first and second sub-output results have a significant impact on the model. Therefore, adding the unlabeled sample to the labeled sample for model updates can improve the accuracy of the final task attention model prediction.

[0094] In one example, the sample with the greatest divergence among the unlabeled samples is selected as the first sample to be labeled to improve the model's prediction accuracy.

[0095] In one example, the expression for the divergence calculation function can be:

[0096]

[0097]

[0098]

[0099] Wherein, cv(x) i ) represents the divergence value; h1 and h2 are the first and second sub-models; x i For the i-th unlabeled sample, h1(x) i ) is the first sub-model for x i The predicted value, h2(x) i ) is the second sub-model for x i The predicted value; σ i μ represents the standard deviation of the predictions from the two sub-models for the i-th unlabeled sample. i This represents the average of the predictions from the two sub-models for the i-th unlabeled sample.

[0100] Step S508: Based on the divergence test results, select the first sample to be labeled from the unlabeled samples.

[0101] The first unlabeled sample refers to the new sample selected from the unlabeled samples through the divergence test and to be simulated.

[0102] Specifically, if the divergence test result is large, it means that adding the unlabeled sample to the labeled sample for model update can greatly improve the prediction accuracy of the model. In this case, the unlabeled sample corresponding to the divergence test result is used as the first sample to be labeled, and a labeled sample is formed after simulation. If the divergence test result is small, it means that the unlabeled sample has little impact on the model and there is no need to add it to the labeled sample for model update.

[0103] Step S510: Simulate the first sample to be labeled to obtain a first target sample, and put the first target sample into the labeled sample.

[0104] The first target sample refers to the labeled sample obtained after simulating the first sample to be labeled.

[0105] Specifically, the first sample to be labeled is simulated to obtain the first target sample after model simulation and the corresponding simulation results. The first target sample is then placed into the labeled sample, and the current labeled sample is updated.

[0106] In this embodiment, unlabeled samples are placed into two sub-models to obtain two prediction results, and the degree of divergence between the two prediction results is calculated. Each unlabeled sample will have a corresponding degree of divergence. The unlabeled sample with the largest degree of divergence is selected for labeling, thereby completing an active learning sampling process.

[0107] In one embodiment, such as Figure 6 As shown, after the step of obtaining the task attention model, the following steps are also included:

[0108] Step S602: Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0109] Step S604: Input the configuration parameters of the unlabeled samples into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result.

[0110] In order to complete active learning sampling, in addition to performing divergence tests, this embodiment also uses Pareto volume. Pareto volume is a comprehensive indicator that combines performance, power consumption and area. Calculating Pareto volume to update labeled samples can ensure that the final collected samples have good performance in terms of performance, power consumption and area.

[0111] Pareto is typically used for multi-objective optimization problems, where a set of feasible solutions is found that satisfies or closely approximates the optimal solution for all objective functions. This set of feasible solutions is the Pareto optimal solution. The Pareto volume is a Lebesgue measure composed of the Pareto front and the reference point. The process of obtaining the first and second sub-output results in this embodiment can be referred to steps S502 and S504, and will not be repeated here.

[0112] Step S606: Based on the first sub-output result and the second sub-output result, calculate the predicted Pareto volume corresponding to the unlabeled sample.

[0113] The predicted Pareto volume refers to the Pareto volume after the unlabeled sample is added to the labeled sample.

[0114] Specifically, by combining the first and second sub-output results of the current unlabeled sample with the true value of the labeled sample, the predicted Pareto of the current unlabeled sample is calculated, as well as the true Pareto volume corresponding to the labeled sample, which is the predicted Pareto volume of all labeled samples after the current unlabeled sample is added to the labeled sample.

[0115] Step S608: Obtain the true Pareto volume corresponding to the labeled sample, and based on the predicted Pareto volume and the true Pareto volume, select a second sample to be labeled from the unlabeled samples.

[0116] The true Pareto volume refers to the Pareto volume of all currently labeled samples; the second unlabeled sample refers to a new sample selected from the unlabeled samples based on the Pareto volume, to be simulated.

[0117] Specifically, the Pareto volume of each unlabeled sample after being added to the labeled sample is compared with the Pareto volume of all current labeled samples. The predicted Pareto volume that increases the Pareto volume of all current labeled samples the most is collected, and the unlabeled sample corresponding to the predicted Pareto volume is used as the second unlabeled sample to be labeled for simulation.

[0118] Step S610: Simulate the second sample to be labeled to obtain the second target sample, and put the second target sample into the labeled sample.

[0119] The second target sample refers to the labeled sample obtained after simulating the second sample to be labeled.

[0120] Specifically, the process of step S610 can be referred to step S510 above, and will not be repeated here.

[0121] In this embodiment, the Pareto volume that maximizes the improvement of the current real Pareto volume is obtained, and the unlabeled sample corresponding to the Pareto volume is simulated to become a new labeled sample. The sample is then updated to complete active learning sampling, so that the final collected samples can have a good performance in terms of performance, power consumption, and area.

[0122] In one embodiment, such as Figure 7 As shown, the process of simulating the design parameter samples to obtain simulated labeled samples includes:

[0123] Step S702: Simulate the design parameter sample to obtain the first labeled sample.

[0124] The first labeled sample refers to the sample in the design parameter sample that has been simulated and labeled. Based on the first labeled sample, samples are selected from the remaining unlabeled samples for simulation.

[0125] Step S704: Calculate the shortest distance between the unlabeled sample that has not been simulated in the design parameter sample and the first labeled sample, and determine the longest distance among the shortest distances.

[0126] The shortest distance refers to the shortest distance between each unlabeled sample and all first-labeled samples, which can be calculated using the sample distance formula.

[0127] Specifically, to ensure that the acquired labeled samples are uniformly distributed, it is necessary to ensure that the distances between each labeled sample are similar or even the same. Therefore, in this embodiment, the sample distances from each unlabeled sample to all first labeled samples (i.e., labeled samples) are first calculated, and the shortest distance is selected from these sample distances. At this time, each unlabeled sample has one and only one shortest distance. Then, the longest distance is selected from these shortest distances, and the unlabeled sample corresponding to the longest distance is used as the target sample for labeling. This ensures that the finally acquired labeled samples are uniformly distributed in the microarchitecture space, making the samples balanced and thus improving the model prediction accuracy.

[0128] As an example, the sample distance formula can be as follows:

[0129]

[0130] m = 1, ..., k; n = k+1, ..., N

[0131]

[0132] in, Let n be the distance from unlabeled sample n to labeled sample m. Let x be the shortest distance between unlabeled sample n and labeled sample m, k be the number of labeled samples, N be the total number of design parameter samples in the microarchitecture design space, and x be the shortest distance between unlabeled sample n and labeled sample m. i Let i be the i-th sample.

[0133] Step S706: Select the target sample corresponding to the longest distance from the unlabeled samples, and perform simulation on the target sample to obtain the second labeled sample.

[0134] Specifically, after selecting the longest distance from the shortest distances, the target sample corresponding to the longest distance is determined, and the target sample is used as the sample for the next simulation to obtain the second labeled sample.

[0135] Step S708: Add the second labeled sample to the first labeled sample to obtain the target labeled sample. When the number of the target labeled samples reaches the preset number of samples, the target labeled sample is used as the labeled sample.

[0136] The preset sample size refers to the number of samples required for model training.

[0137] Specifically, the second labeled sample is added to the first labeled sample to obtain the target labeled sample. Step S706 is repeated continuously until the number of target labeled samples reaches the number of samples required for model training. Then, sample sampling is stopped, thereby generating the final labeled samples for model training.

[0138] In this embodiment, by calculating the sample distance between unlabeled samples and labeled samples, uniformly distributed target samples are continuously screened out, and these target samples are simulated to obtain the final labeled samples, which ensures that the distribution of labeled samples is balanced, thereby improving the accuracy of model training and thus improving the prediction accuracy of microprocessor spatial configuration.

[0139] In one embodiment, the simulation results include performance simulation results, power consumption simulation results, and area simulation results; the simulation of the design parameter sample includes: inputting the design parameter sample into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample; inputting the performance simulation results into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample.

[0140] Among them, the preset performance simulator refers to a simulator that simulates the performance of design parameters, such as the gem5 simulator. The preset combined simulator integrates power consumption and area simulation functions, and can simulate the power consumption and area of ​​design parameters based on the performance simulation results, such as the mcpat simulator.

[0141] Specifically, the design parameter samples obtained from the initial sampling are simulated in the gem5 simulator to obtain the corresponding performance simulation results for each design parameter sample. The performance simulation results are then input into the MCPAT simulator, which integrates the performance simulation results to obtain the corresponding power consumption and area for each design parameter sample.

[0142] By using a simulator to simulate design parameter samples, there is no need to verify the true value of each design parameter sample online, which improves the efficiency of model validation, thereby improving the efficiency of model training and ultimately improving the efficiency of model prediction.

[0143] In one embodiment, under the Ubuntu 18.04 operating system, the target microprocessor can be an Intel(R) Xeon(R) Silver4110 with 16GB DDR4 memory, and the server is a server deployed with PyTorch programming. Specifically, the design parameters in the microarchitecture design space of the Intel(R) Xeon(R) Silver4110 are obtained, and the design parameters are simulated in gem5 to obtain the corresponding performance simulation results for each design parameter. Then, mcpat integrates the performance simulation results to obtain the corresponding power consumption simulation results and area simulation results for each design parameter. All microarchitecture design parameters and their corresponding performance, power consumption, and area simulation results constitute the training set of the model. Based on this training set, the initial performance dimension model, initial power consumption dimension model, and initial area dimension model corresponding to the performance dimension, power consumption dimension, and area dimension are trained to obtain independent performance dimension models, power consumption dimension models, and area dimension models, respectively. The design parameters are input into the performance dimension model, power consumption dimension model, and area dimension model, and the corresponding initial sample parameters are output. The initial configuration parameters are used as target features to train a task attention model. This task attention model can analyze the correlation feature vectors between each configuration dimension, thereby predicting more accurate configuration parameters.

[0144] To verify the model accuracy in this embodiment, the prediction results obtained in this embodiment are compared with those obtained by commonly used methods, namely ANN (Artificial Neural Network) and SST (Stacked Single-Target). The performance evaluation results are as follows: Figure 8 As shown, the power consumption performance evaluation results are as follows: Figure 9 As shown, the area assessment results are as follows: Figure 10 As shown, the Pareto volume assessment results are as follows: Figure 11 As shown, it can be understood that the curves corresponding to the arcs in the four figures represent the evaluation results under different methods. Figure 8 For example, the curve corresponding to the bottommost arc represents the performance evaluation result of this invention, the curve corresponding to the middle arc represents the performance evaluation result of the SST method, and the curve corresponding to the topmost arc represents the performance evaluation result of the ANN method. It can be seen that the task attention model established in this embodiment outperforms existing methods in terms of prediction mean square error in terms of performance, power consumption, and area, and the Pareto volume of the task attention model established in this embodiment is also superior to existing methods. That is, the microarchitecture design space exploration method in this embodiment has higher accuracy.

[0145] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0146] Based on the same inventive concept, this application also provides a microarchitecture design space exploration device for implementing the microarchitecture design space exploration method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more embodiments of the microarchitecture design space exploration device provided below can be found in the limitations of the microarchitecture design space exploration method described above, and will not be repeated here.

[0147] In one embodiment, such as Figure 12 As shown, a microarchitecture design space exploration device is provided, including a design parameter acquisition module 1202, an initial configuration parameter acquisition module 1204, a weight calculation module 1206, a correlation analysis module 1208, and a prediction module 1210, wherein:

[0148] The design parameter acquisition module 1202 is used to acquire design parameters in the microarchitecture design space of the target microprocessor;

[0149] The initial configuration parameter acquisition module 1204 is used to input the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension.

[0150] The weight calculation module 1206 is used to input the initial configuration parameters into the task attention model and output the corresponding parameter weights.

[0151] The correlation analysis module 1208 is used to fuse the weights of each parameter and the initial configuration parameters to obtain a correlation feature vector;

[0152] The prediction module 1210 is used to predict the target configuration parameters of the target microprocessor in each of the configuration dimensions based on the correlation feature vector.

[0153] In one embodiment, the initial configuration parameter acquisition module 1204 is further configured to: input the design parameters into the fully connected layer of the performance dimension model and output the initial performance parameters of the design parameters in the performance dimension; input the design parameters into the fully connected layer of the area dimension model and output the initial power consumption parameters of the design parameters in the power consumption dimension; and input the design parameters into the fully connected layer of the power consumption dimension model and output the initial area parameters of the design parameters in the area dimension.

[0154] In one embodiment, the microarchitecture design space exploration device further includes:

[0155] The simulation module is used to collect design parameter samples in the microarchitecture design space of the sample microprocessor, simulate the design parameter samples, obtain the simulated labeled samples, and the simulation results corresponding to the labeled samples; the first model training module is used to train the first initial model corresponding to each configuration dimension based on the labeled samples and the simulation results to obtain the first model; the parameter output module is used to input the labeled samples into the first model to obtain the corresponding initial sample configuration parameters; the second model training module is used to train the second initial model based on the initial sample configuration parameters and the simulation results until the training rounds of the second initial model reach a preset number of rounds, and then end the model training to obtain the task attention model, wherein the second initial model is a model built based on task attention.

[0156] In one embodiment, the second model training module is further configured to: input unlabeled samples from the design parameter samples into the first model to obtain unlabeled sample configuration parameters;

[0157] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result; the first sub-output result and the second sub-output result are subjected to a divergence test to obtain a divergence test result; based on the divergence test result, a first unlabeled sample is selected from the unlabeled samples; the first unlabeled sample is simulated to obtain a first target sample, and the first target sample is placed into the labeled samples; the model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0158] In one embodiment, the second model training module is further configured to: input unlabeled samples from the design parameter samples into the first model to obtain unlabeled sample configuration parameters;

[0159] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result. Based on the first sub-output result and the second sub-output result, the predicted Pareto volume corresponding to the unlabeled sample is calculated, wherein the predicted Pareto volume refers to the Pareto volume of the unlabeled sample after adding the labeled sample. The true Pareto volume corresponding to the labeled sample is obtained. Based on the predicted Pareto volume and the true Pareto volume, a second unlabeled sample is selected from the unlabeled samples. The second unlabeled sample is simulated to obtain a second target sample, and the second target sample is placed into the labeled sample. The model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset number of rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0160] In one embodiment, the simulation module is further configured to: perform simulation on the design parameter samples to obtain a first labeled sample; calculate the shortest distance between the unlabeled samples in the design parameter samples that have not been simulated and the first labeled sample, and determine the longest distance among the shortest distances; filter out the target sample corresponding to the longest distance from the unlabeled samples, perform simulation on the target sample to obtain a second labeled sample; add the second labeled sample to the first labeled sample to obtain a target labeled sample, until the number of target labeled samples reaches a preset number of samples, and then use the target labeled sample as the labeled sample.

[0161] In one embodiment, the simulation module is further configured to: input the design parameter sample into a preset performance simulator to perform performance simulation and obtain the performance simulation result corresponding to the design parameter sample; input the performance simulation result into a preset combined simulator to obtain the power consumption simulation result and area simulation result corresponding to the design parameter sample, wherein the preset combined simulator integrates power consumption and area simulation functions.

[0162] Each module in the aforementioned microarchitecture design spatial index prediction device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0163] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 13As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database stores item recommendation data. The network interface communicates with external terminals via a network connection. When executed by the processor, the computer program implements a microarchitecture design space index prediction method.

[0164] Those skilled in the art will understand that Figure 13 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0165] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0166] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0167] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0168] The design parameters are input into the fully connected layer of the performance dimension model, and the initial performance parameters of the design parameters in the performance dimension are output; the design parameters are input into the fully connected layer of the area dimension model, and the initial power consumption parameters of the design parameters in the power consumption dimension are output; the design parameters are input into the fully connected layer of the power consumption dimension model, and the initial area parameters of the design parameters in the area dimension are output.

[0169] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0170] Design parameter samples are collected from the microarchitecture design space of the sample microprocessor. The design parameter samples are simulated to obtain labeled samples after simulation and simulation results corresponding to the labeled samples. Based on the labeled samples and the simulation results, a first initial model corresponding to each configuration dimension is trained to obtain a first model. The labeled samples are input into the first model to obtain the corresponding initial sample configuration parameters. Based on the initial sample configuration parameters and the simulation results, a second initial model is trained until the training rounds of the second initial model reach a preset number of rounds, at which point the model training ends to obtain a task attention model. The second initial model is a model built based on task attention.

[0171] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0172] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0173] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result; the first sub-output result and the second sub-output result are subjected to a divergence test to obtain a divergence test result; based on the divergence test result, a first unlabeled sample is selected from the unlabeled samples; the first unlabeled sample is simulated to obtain a first target sample, and the first target sample is placed into the labeled samples; the model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0174] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0175] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0176] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result. Based on the first sub-output result and the second sub-output result, the predicted Pareto volume corresponding to the unlabeled sample is calculated, wherein the predicted Pareto volume refers to the Pareto volume of the unlabeled sample after adding the labeled sample. The true Pareto volume corresponding to the labeled sample is obtained. Based on the predicted Pareto volume and the true Pareto volume, a second unlabeled sample is selected from the unlabeled samples. The second unlabeled sample is simulated to obtain a second target sample, and the second target sample is placed into the labeled sample. The model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset number of rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0177] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0178] The design parameter samples are simulated to obtain a first labeled sample; the shortest distance between the unlabeled samples in the design parameter samples that have not been simulated and the first labeled sample is calculated, and the longest distance among the shortest distances is determined; a target sample corresponding to the longest distance is selected from the unlabeled samples, and the target sample is simulated to obtain a second labeled sample; the second labeled sample is added to the first labeled sample to obtain a target labeled sample, until the number of target labeled samples reaches a preset number of samples, and then the target labeled sample is used as the labeled sample.

[0179] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0180] The design parameter sample is input into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample; the performance simulation results are input into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample, wherein the preset combined simulator integrates power consumption and area simulation functions.

[0181] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0182] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0183] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0184] The design parameters are input into the fully connected layer of the performance dimension model, and the initial performance parameters of the design parameters in the performance dimension are output; the design parameters are input into the fully connected layer of the area dimension model, and the initial power consumption parameters of the design parameters in the power consumption dimension are output; the design parameters are input into the fully connected layer of the power consumption dimension model, and the initial area parameters of the design parameters in the area dimension are output.

[0185] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0186] Design parameter samples are collected from the microarchitecture design space of the sample microprocessor. The design parameter samples are simulated to obtain labeled samples after simulation and simulation results corresponding to the labeled samples. Based on the labeled samples and the simulation results, a first initial model corresponding to each configuration dimension is trained to obtain a first model. The labeled samples are input into the first model to obtain the corresponding initial sample configuration parameters. Based on the initial sample configuration parameters and the simulation results, a second initial model is trained until the training rounds of the second initial model reach a preset number of rounds, at which point the model training ends to obtain a task attention model. The second initial model is a model built based on task attention.

[0187] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0188] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0189] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result; the first sub-output result and the second sub-output result are subjected to a divergence test to obtain a divergence test result; based on the divergence test result, a first unlabeled sample is selected from the unlabeled samples; the first unlabeled sample is simulated to obtain a first target sample, and the first target sample is placed into the labeled samples; the model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0190] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0191] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0192] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result. Based on the first sub-output result and the second sub-output result, the predicted Pareto volume corresponding to the unlabeled sample is calculated, wherein the predicted Pareto volume refers to the Pareto volume of the unlabeled sample after adding the labeled sample. The true Pareto volume corresponding to the labeled sample is obtained. Based on the predicted Pareto volume and the true Pareto volume, a second unlabeled sample is selected from the unlabeled samples. The second unlabeled sample is simulated to obtain a second target sample, and the second target sample is placed into the labeled sample. The model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset number of rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0193] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0194] The design parameter samples are simulated to obtain a first labeled sample; the shortest distance between the unlabeled samples in the design parameter samples that have not been simulated and the first labeled sample is calculated, and the longest distance among the shortest distances is determined; a target sample corresponding to the longest distance is selected from the unlabeled samples, and the target sample is simulated to obtain a second labeled sample; the second labeled sample is added to the first labeled sample to obtain a target labeled sample, until the number of target labeled samples reaches a preset number of samples, and then the target labeled sample is used as the labeled sample.

[0195] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0196] The design parameter sample is input into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample; the performance simulation results are input into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample, wherein the preset combined simulator integrates power consumption and area simulation functions.

[0197] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps:

[0198] The design parameters in the microarchitecture design space of the target microprocessor are obtained; the design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the initial configuration parameters are input into the task attention model to output the corresponding parameter weights; the parameter weights and the initial configuration parameters are fused to obtain the correlation feature vector; and the target configuration parameters of the target microprocessor under each configuration dimension are predicted based on the correlation feature vector.

[0199] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0200] The design parameters are input into the fully connected layer of the performance dimension model, and the initial performance parameters of the design parameters in the performance dimension are output; the design parameters are input into the fully connected layer of the area dimension model, and the initial power consumption parameters of the design parameters in the power consumption dimension are output; the design parameters are input into the fully connected layer of the power consumption dimension model, and the initial area parameters of the design parameters in the area dimension are output.

[0201] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0202] Design parameter samples are collected from the microarchitecture design space of the sample microprocessor. The design parameter samples are simulated to obtain labeled samples after simulation and simulation results corresponding to the labeled samples. Based on the labeled samples and the simulation results, a first initial model corresponding to each configuration dimension is trained to obtain a first model. The labeled samples are input into the first model to obtain the corresponding initial sample configuration parameters. Based on the initial sample configuration parameters and the simulation results, a second initial model is trained until the training rounds of the second initial model reach a preset number of rounds, at which point the model training ends to obtain a task attention model. The second initial model is a model built based on task attention.

[0203] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0204] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0205] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result; the first sub-output result and the second sub-output result are subjected to a divergence test to obtain a divergence test result; based on the divergence test result, a first unlabeled sample is selected from the unlabeled samples; the first unlabeled sample is simulated to obtain a first target sample, and the first target sample is placed into the labeled samples; the model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0206] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0207] Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters;

[0208] The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output result and second sub-output result. Based on the first sub-output result and the second sub-output result, the predicted Pareto volume corresponding to the unlabeled sample is calculated, wherein the predicted Pareto volume refers to the Pareto volume of the unlabeled sample after adding the labeled sample. The true Pareto volume corresponding to the labeled sample is obtained. Based on the predicted Pareto volume and the true Pareto volume, a second unlabeled sample is selected from the unlabeled samples. The second unlabeled sample is simulated to obtain a second target sample, and the second target sample is placed into the labeled sample. The model training ends when the training rounds corresponding to the first sub-model and the second sub-model have reached the preset number of rounds, and the first target model and the second target model are obtained. The first target model and the second target model are used together as the task attention model.

[0209] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0210] The design parameter samples are simulated to obtain a first labeled sample; the shortest distance between the unlabeled samples in the design parameter samples that have not been simulated and the first labeled sample is calculated, and the longest distance among the shortest distances is determined; a target sample corresponding to the longest distance is selected from the unlabeled samples, and the target sample is simulated to obtain a second labeled sample; the second labeled sample is added to the first labeled sample to obtain a target labeled sample, until the number of target labeled samples reaches a preset number of samples, and then the target labeled sample is used as the labeled sample.

[0211] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0212] The design parameter sample is input into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample; the performance simulation results are input into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample, wherein the preset combined simulator integrates power consumption and area simulation functions.

[0213] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0214] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0215] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0216] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for exploring microarchitecture design space, characterized in that, The method includes: The design parameter samples in the microarchitecture design space of the sample microprocessor are collected, and the design parameter samples are simulated to obtain the simulated labeled samples and the simulation results corresponding to the labeled samples. Based on the labeled samples and the simulation results, the first initial model corresponding to each configuration dimension is trained to obtain the first model; The labeled samples are input into the first model to obtain the corresponding initial sample configuration parameters; Based on the initial sample configuration parameters and the simulation results, the second initial model is trained until the training rounds of the second initial model reach a preset number of rounds, at which point the model training ends and a task attention model is obtained. The second initial model is a model built based on task attention. Obtain design parameters from the microarchitecture design space of the target microprocessor; wherein, the design parameters include extraction width, decoding width, and reordering buffer; The design parameters are input into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the configuration dimension includes performance, power consumption and area, the first model includes a performance dimension model, a power consumption dimension model and an area dimension model, and the initial configuration parameters include initial performance parameters, initial power consumption parameters and initial area parameters; Input the initial configuration parameters into the task attention model and output the corresponding parameter weights; The weights of each parameter and the initial configuration parameters are fused to obtain a correlation feature vector; Based on the correlation feature vector, the target configuration parameters of the target microprocessor under each configuration dimension are predicted.

2. The method as described in claim 1, characterized in that, The step of inputting the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the design parameters under each configuration dimension includes: The design parameters are input into the fully connected layer of the performance dimension model, and the initial performance parameters of the design parameters under the performance dimension are output. The design parameters are input into the fully connected layer of the area dimension model, and the initial power consumption parameters of the design parameters in the power consumption dimension are output. The design parameters are input into the fully connected layer of the power consumption dimension model, and the initial area parameters of the design parameters in the area dimension are output.

3. The method as described in claim 1, characterized in that, The task attention model includes a first sub-model and a second sub-model; after the step of obtaining the task attention model, it further includes: Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters; The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output results and second sub-output results; Perform a divergence test on the first sub-output result and the second sub-output result to obtain the divergence test result; Based on the divergence test results, the first sample to be labeled is selected from the unlabeled samples; The first sample to be labeled is simulated to obtain the first target sample, and the first target sample is placed into the labeled sample.

4. The method as described in claim 1, characterized in that, The task attention model includes a first sub-model and a second sub-model; after the step of obtaining the task attention model, it further includes: Input the unlabeled samples from the design parameter sample into the first model to obtain the unlabeled sample configuration parameters; The configuration parameters of the unlabeled samples are input into the first sub-model and the second sub-model respectively to obtain the corresponding first sub-output results and second sub-output results; Based on the first sub-output result and the second sub-output result, the predicted Pareto volume corresponding to the unlabeled sample is calculated, wherein the predicted Pareto volume refers to the Pareto volume after the unlabeled sample is added to the labeled sample; Obtain the true Pareto volume corresponding to the labeled sample, and based on the predicted Pareto volume and the true Pareto volume, select a second sample to be labeled from the unlabeled samples; The second sample to be labeled is simulated to obtain the second target sample, and the second target sample is placed into the labeled sample.

5. The method as described in claim 1, characterized in that, The process of simulating the design parameter samples to obtain simulated labeled samples includes: The design parameter sample was simulated to obtain the first labeled sample; Calculate the shortest distance between the unlabeled sample that was not simulated in the design parameter sample and the first labeled sample, and determine the longest distance among the shortest distances; Target samples corresponding to the longest distance are selected from the unlabeled samples, and simulation is performed on the target samples to obtain the second labeled samples; The second labeled sample is added to the first labeled sample to obtain the target labeled sample. When the number of the target labeled samples reaches the preset number of samples, the target labeled sample is used as the labeled sample.

6. The method as described in claim 1, characterized in that, The simulation results include performance simulation results, power consumption simulation results, and area simulation results; The simulation of the design parameter sample includes: The design parameter sample is input into a preset performance simulator to perform performance simulation and obtain the performance simulation results corresponding to the design parameter sample. The performance simulation results are input into a preset combined simulator to obtain the power consumption simulation results and area simulation results corresponding to the design parameter sample. The preset combined simulator integrates power consumption and area simulation functions.

7. A microarchitecture-designed space exploration device, characterized in that, The device includes: The simulation module is used to collect design parameter samples from the microarchitecture design space of the sample microprocessor, simulate the design parameter samples to obtain simulated labeled samples and simulation results corresponding to the labeled samples; based on the labeled samples and the simulation results, train a first initial model corresponding to each configuration dimension to obtain a first model; input the labeled samples into the first model to obtain the corresponding initial sample configuration parameters; based on the initial sample configuration parameters and the simulation results, train a second initial model until the training rounds of the second initial model reach a preset number of rounds, then end the model training to obtain a task attention model, wherein the second initial model is a model built based on task attention; The design parameter acquisition module is used to acquire design parameters in the microarchitecture design space of the target microprocessor; wherein, the design parameters include extraction width, decoding width, and reordering buffer; The initial configuration parameter acquisition module is used to input the design parameters into the first model corresponding to each configuration dimension to obtain the initial configuration parameters of the target microprocessor under each configuration dimension; the configuration dimension includes performance, power consumption and area, the first model includes a performance dimension model, a power consumption dimension model and an area dimension model, and the initial configuration parameters include initial performance parameters, initial power consumption parameters and initial area parameters; The weight calculation module is used to input the initial configuration parameters into the task attention model and output the corresponding parameter weights. The correlation analysis module is used to fuse the weights of each parameter and the initial configuration parameters to obtain a correlation feature vector; The prediction module is used to predict the target configuration parameters of the target microprocessor under each of the configuration dimensions based on the correlation feature vector.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

10. A computer product comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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