Light-emitting substrate, display panel, display device, and display method

Abstract

A light-emitting substrate is provided. The light-emitting substrate includes a plurality of subpixels. Each of the plurality of subpixels includes: n1 main light-emitting elements; n1 main pixel driving circuits configured to drive the n1 main light-emitting elements to emit light; n2 auxiliary light-emitting elements; n2 auxiliary pixel driving circuits configured to drive the n2 auxiliary light-emitting elements to emit light; n1 ≥ 1, and n2 ≥ 1. Each of the n1 main pixel driving circuits includes a first driving transistor. Each of the n2 auxiliary pixel driving circuits includes a second driving transistor. Threshold voltage levels of the first driving transistor and the second driving transistor are substantially the same.

Description

Technical Field

[0001] This invention relates to display technology, and more particularly to a light-emitting substrate, a display panel, a display device, and a display method. Background Technology

[0002] Organic light-emitting diode (OLED) displays are currently a hot topic in flat panel display research. Unlike thin-film transistor-liquid crystal displays (TFT-LCDs), which use a stable voltage to control brightness, OLEDs are driven by a driving current that needs to be kept constant to control brightness. An OLED display panel includes multiple pixel units configured with pixel driving circuits arranged in multiple rows and columns. Each pixel driving circuit includes a driving transistor with a gate terminal connected to a gate line in each row and a drain terminal connected to a data line in each column. When the selected row of a pixel unit is turned on, a switching transistor connected to the driving transistor is turned on, and a data voltage is applied from the data line through the switching transistor to the driving transistor, causing the driving transistor to output a current corresponding to the data voltage to the OLED device. The OLED device is then driven to emit light at a corresponding brightness. Summary of the Invention

[0003] In one aspect, this disclosure provides a light-emitting substrate comprising a plurality of sub-pixels; wherein each of the plurality of sub-pixels comprises: n1 main light-emitting elements; n1 main pixel driving circuits configured to drive the n1 main light-emitting elements to emit light; n2 auxiliary light-emitting elements; n2 auxiliary pixel driving circuits configured to drive the n2 auxiliary light-emitting elements to emit light; n1≥1 and n2≥1; wherein each of the n1 main pixel driving circuits comprises a first storage capacitor, a first driving transistor, a first light-emitting control transistor, and a compensation sub-circuit; wherein each of the n2 auxiliary pixel driving circuits comprises a second storage capacitor, a second driving transistor, a second light-emitting control transistor, and a selection sub-circuit; wherein the threshold voltage levels of the first driving transistor and the second driving transistor are substantially the same.

[0004] Optionally, the compensation sub-circuit includes: a first transistor having a gate coupled to a reset control signal line, a source coupled to the drain of the first driving transistor, and a drain coupled to the gate of the first driving transistor and a first capacitor electrode of the first storage capacitor; a second transistor having a gate coupled to a gate line, a source coupled to a data line, and a drain coupled to a second capacitor electrode of the first storage capacitor; a third transistor having a gate coupled to a light emission control signal line, a source coupled to a constant voltage power supply line, and a drain coupled to the second capacitor electrode of the first storage capacitor and the drain of the second transistor; and a fourth transistor having a gate coupled to a reset control signal line, a source coupled to the constant voltage power supply line, and a drain coupled to the anode of a corresponding main light emission element among the n1 main light emission elements.

[0005] Optionally, the selector circuit includes: a switching transistor having a source of a first capacitor electrode coupled to a first driving transistor of the corresponding main pixel driving circuit and a first storage capacitor of the corresponding main pixel driving circuit, and a drain of a second driving transistor coupled to the gate of the corresponding auxiliary pixel driving circuit; and a control transistor having a gate coupled to a gate line, a source coupled to a control signal line, and a drain coupled to the gate of the switching transistor.

[0006] Optionally, the gate of the first driving transistor and the first capacitor electrode of the first storage capacitor are connected to the first node; and the gate of the second driving transistor and the first capacitor electrode of the second storage capacitor are connected to the first node through the switching transistor.

[0007] Optionally, the n1 main light-emitting elements and the n2 auxiliary light-emitting elements are configured to emit light of the same color.

[0008] Optionally, the wavelength of light of the same color is in the range of 435nm to 480nm.

[0009] Optionally, each of the n1 main light-emitting elements has a first light-emitting region; each of the n2 auxiliary light-emitting elements has a second light-emitting region; and the first light-emitting region is larger than the second light-emitting region.

[0010] Optionally, the source of the control transistor in the corresponding auxiliary pixel driving circuit is coupled to a control signal line; the drain of the control transistor in the corresponding auxiliary pixel driving circuit is coupled to the gate of the switching transistor in the corresponding auxiliary pixel driving circuit; the gate of the control transistor in the corresponding auxiliary pixel driving circuit is coupled to a gate line; and the gate of the control transistor in the corresponding auxiliary pixel driving circuit is provided with the same gate scan signal, which is provided to the data write transistor in the corresponding main pixel driving circuit.

[0011] Optionally, the control signal line is configured to provide a control signal; wherein, when the control signal is an on signal, the switching transistor is turned on, such that the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit and the gate of the first driving transistor in the corresponding main pixel driving circuit receive the same voltage signal at the same node; and wherein, when the control signal is an off signal, the switching transistor is turned off, so as to disconnect the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit from the same node.

[0012] Optionally, the second storage capacitor of the corresponding auxiliary pixel driving circuit includes a first capacitor electrode and a second capacitor electrode; the first capacitor electrode of the second storage capacitor is coupled to the gate of the switching transistor and the drain of the control transistor; and the second capacitor electrode of the second storage capacitor is coupled to a constant voltage power supply line.

[0013] In another aspect, this disclosure provides a display panel including the light-emitting substrate and color filter described herein; wherein the color filter includes a plurality of color filter blocks respectively disposed in a plurality of light-transmitting regions; wherein each of the plurality of light-transmitting regions at least partially overlaps with the light-emitting regions of the n1 main light-emitting elements and at least partially overlaps with the light-emitting regions of the n2 auxiliary light-emitting elements.

[0014] Optionally, the orthographic projection of each of the multiple color filter blocks on the substrate completely covers the orthographic projection of the n1 main light-emitting elements on the substrate, and at least partially overlaps with the orthographic projection of the n2 auxiliary light-emitting elements on the substrate.

[0015] Optionally, the display panel further includes: a first cladding layer located on the light-emitting substrate; a color conversion layer located on the side of the first cladding layer away from the light-emitting substrate; and a second cladding layer located on the side of the color conversion layer away from the first cladding layer; wherein the color filter is located on the side of the second cladding layer away from the color conversion layer; and the color conversion layer includes a plurality of color conversion blocks of a first color, a plurality of color conversion blocks of a second color, and a plurality of light-transmitting blocks.

[0016] Optionally, the center of the orthographic projection of the n1 main light-emitting elements on the substrate substantially overlaps with the center of the orthographic projection of each of the plurality of color filter blocks on the substrate.

[0017] In another aspect, this disclosure provides a display device including the light-emitting substrate described herein and one or more integrated circuits connected to the light-emitting substrate.

[0018] In another aspect, this disclosure provides a display method, comprising: providing a display panel, the display panel including a plurality of sub-pixels, each of the plurality of sub-pixels including n1 main light-emitting elements and n2 auxiliary light-emitting elements, n1≥1 and n2≥1; for displaying a first frame image, controlling the light emission of each sub-pixel to be limited to m auxiliary light-emitting elements among the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, 0≤m≤n2; and for displaying a second frame image, controlling the light emission of each sub-pixel to be limited to m' auxiliary light-emitting elements among the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, 0≤m'≤n2, and m≠m'.

[0019] Optionally, in order to display the first frame image in the first mode, the light emission of each sub-pixel is restricted to the n1 main light-emitting elements, m = 0; and wherein, in order to display the second frame image in the second mode, the light emission of each sub-pixel is restricted to the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, m' = n2.

[0020] Optionally, in the first mode, at least a portion of the display panel including the respective sub-pixels is configured to display a monochrome image, or the first frame image has high contrast compared to a frame image among adjacent sub-pixels; and in the second mode, at least a portion of the display panel including the respective sub-pixels is configured to display a color image.

[0021] Optionally, the display method further includes, in order to display the third frame image in the third mode, controlling the light emission of each sub-pixel to be limited to m” auxiliary light emission elements among the n1 main light emission elements and the n2 auxiliary light emission elements, where 1 < m” < n2 and m < m” < m'.

[0022] Optionally, the display method includes: driving a corresponding main light-emitting element among the n1 main light-emitting elements to emit light through each main pixel driving circuit; and driving a corresponding auxiliary light-emitting element among the n2 auxiliary light-emitting elements to emit light through a corresponding auxiliary pixel driving circuit coupled to each main pixel driving circuit.

[0023] Optionally, driving the corresponding auxiliary light-emitting element and the corresponding main light-emitting element to emit light includes: providing the same voltage signal to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit and the gate of the first driving transistor in the corresponding main pixel driving circuit.

[0024] Optionally, the display method further includes providing a control signal to the corresponding auxiliary pixel driving circuit to control the transmission of the same voltage signal to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit; wherein, when the control signal is an on signal, the same voltage signal is transmitted to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit, thereby turning on the second driving transistor; and wherein, when the control signal is an off signal, the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit is configured not to receive the same voltage signal, and the second driving transistor is turned off.

[0025] Optionally, the display method includes providing a data signal to a corresponding main pixel driving circuit configured to drive the corresponding main light-emitting element to emit light, but not to a corresponding auxiliary pixel driving circuit configured to drive the corresponding auxiliary light-emitting element to emit light.

[0026] Optionally, the display method includes providing the same light-emitting control signal to the first light-emitting control transistor in the corresponding main pixel driving circuit and the second light-emitting control transistor in the corresponding auxiliary pixel driving circuit.

[0027] Optionally, the display method includes providing the same gate scan signal to the data writing transistor in the corresponding main pixel driving circuit and the control transistor in the corresponding auxiliary pixel driving circuit. Attached Figure Description

[0028] The following figures are merely illustrative examples based on various disclosed embodiments and are not intended to limit the scope of the invention.

[0029] Figure 1 This is a schematic diagram illustrating the structure of a light-emitting substrate according to some embodiments of the present disclosure.

[0030] Figure 2 This is a circuit diagram of a light-emitting substrate according to some embodiments of the present disclosure.

[0031] Figure 3 This is a cross-sectional view of a light-emitting substrate according to some embodiments of the present disclosure.

[0032] Figure 4 This is a cross-sectional view of a light-emitting substrate according to some embodiments of the present disclosure.

[0033] Figure 5A An image display in a first mode is shown in some embodiments of the present disclosure of a light-emitting substrate.

[0034] Figure 5B An image display in a second mode is shown in some embodiments of the present disclosure of a light-emitting substrate.

[0035] Figure 6 This is a cross-sectional view of a light-emitting substrate according to some embodiments of the present disclosure.

[0036] Figure 7 This is a circuit diagram illustrating the structure of the main pixel driving circuit, the auxiliary pixel driving circuit, the main light-emitting element, and the auxiliary light-emitting element according to some embodiments of the present disclosure.

[0037] Figure 8 This is a timing diagram of operating the light-emitting substrate according to some embodiments of this disclosure.

[0038] Figure 9 This is a circuit diagram illustrating the structure of a main pixel driving circuit, an auxiliary pixel driving circuit, a second auxiliary pixel driving circuit, a main light-emitting element, an auxiliary light-emitting element, and a second auxiliary light-emitting element according to some embodiments of the present disclosure.

[0039] Figure 10 This is a cross-sectional view of a light-emitting substrate according to some embodiments of the present disclosure.

[0040] Figure 11 This is a schematic diagram illustrating the structure of a display panel according to some embodiments of the present disclosure.

[0041] Figure 12A This is a plan view of the color filter and light-emitting element according to some embodiments of the present disclosure.

[0042] Figure 12B This is a plan view of the color filter and light-emitting element according to some embodiments of the present disclosure.

[0043] Figure 12C This is a plan view of the color filter and light-emitting element according to some embodiments of the present disclosure. Detailed Implementation

[0044] This disclosure will now be described in more detail with reference to the following embodiments. It should be noted that the following description of some embodiments presented herein is for illustrative and descriptive purposes only. It is not exhaustive or limited to the precise forms disclosed.

[0045] This disclosure provides, in particular, a light-emitting substrate, a display panel, a display device, and a display method that substantially eliminate one or more problems caused by the limitations and disadvantages of the prior art. In one aspect, this disclosure provides a display method. In some embodiments, the display method includes: providing a display panel comprising a plurality of sub-pixels, each sub-pixel comprising n1 main light-emitting elements and n2 auxiliary light-emitting elements, n1≥1 and n2≥1; for displaying a first frame image, controlling the light emission of the sub-pixels to be limited to m auxiliary light-emitting elements among the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, 0≤m≤n2; and for displaying a second frame image, controlling the light emission of the sub-pixels to be limited to m' auxiliary light-emitting elements among the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, 0≤m'≤n2, and m≠m'.

[0046] Figure 1 This is a schematic diagram illustrating the structure of a light-emitting substrate according to some embodiments of the present disclosure. (Refer to...) Figure 1 In some embodiments, the light-emitting substrate includes a display area DA and a peripheral area PA. As used herein, the term "display area" refers to the area of ​​the light-emitting substrate in a display panel that actually displays an image. Optionally, the display area may include subpixel areas and inter-subpixel areas. A subpixel area refers to the light-emitting area of ​​a subpixel, for example, the area corresponding to a pixel electrode in a liquid crystal display or the area corresponding to a light-emitting layer in an organic light-emitting diode display panel. An inter-subpixel area refers to the area between adjacent subpixel areas, for example, the area corresponding to a black matrix in a liquid crystal display or the area corresponding to a pixel defining layer in an organic light-emitting diode display panel. Optionally, the inter-subpixel area is the area between adjacent subpixel areas within the same pixel. Optionally, the inter-subpixel area is the area between two adjacent subpixel areas of two adjacent pixels. As used herein, the term "peripheral area" refers to the area of ​​the light-emitting substrate in a display panel, in which various circuits and wiring are provided to transmit signals to the display substrate. To increase the transparency of the display device, non-transparent or opaque components of the display device (e.g., batteries, printed circuit boards, metal frames) may be arranged in the peripheral area instead of the display area.

[0047] Figure 2 This is a circuit diagram of a light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 2The light-emitting substrate includes a sub-pixel array. Each sub-pixel includes an electronic component, such as a light-emitting element. In some embodiments, the light-emitting substrate further includes multiple light-emitting elements driven by multiple pixel driving circuits. In one example, the light-emitting elements are driven by corresponding pixel driving circuits. The light-emitting substrate includes multiple gate lines GL, multiple data lines DL, and multiple power supply voltage lines Vdd. The emission of light from each sub-pixel Sp is driven by a corresponding pixel driving circuit PDC. In one example, a high-voltage signal is input to a corresponding pixel driving circuit PDC connected to the anode of the light-emitting element through a corresponding one of the multiple power supply voltage lines Vdd; a low-voltage signal (constant voltage power supply line) is input to the cathode of the light-emitting element. The voltage difference between the high-voltage signal (e.g., the VDD signal) and the low-voltage signal (e.g., the VSS signal) is a driving voltage ΔV, which drives the light-emitting element to emit light.

[0048] In some embodiments, the light-emitting substrate includes a plurality of sub-pixels. In some embodiments, the plurality of sub-pixels includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. Optionally, each pixel of the light-emitting substrate includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The plurality of sub-pixels in the light-emitting substrate are arranged in an array. In one example, the array of the plurality of sub-pixels includes a repeating array in the format S1-S2-S3-S4, wherein S1 represents a first sub-pixel, S2 represents a second sub-pixel, S3 represents a third sub-pixel, and S4 represents a fourth sub-pixel. In another example, the S1-S2-S3-S4 format is a C1-C2-C3-C4 format, wherein C1 represents a first sub-pixel of a first color, C2 represents a second sub-pixel of a second color, C3 represents a third sub-pixel of a third color, and C4 represents a fourth sub-pixel of a fourth color. In another example, the S1-S2-S3-S4 format is the C1-C2-C3-C2' format, where C1 represents the first sub-pixel of the first color, C2 represents the second sub-pixel of the second color, C3 represents the third sub-pixel of the third color, and C2' represents the fourth sub-pixel of the second color. In yet another example, the C1-C2-C3-C2' format is the RGBG format, where each first sub-pixel is a red sub-pixel, each second sub-pixel is a green sub-pixel, each third sub-pixel is a blue sub-pixel, and each fourth sub-pixel is a green sub-pixel.

[0049] Various suitable pixel driving circuits can be used in this light-emitting substrate. Examples of suitable driving circuits include 3T1C, 2T1C, 4T1C, 4T2C, 5T2C, 6T1C, 7T1C, 7T2C, 8T1C, and 8T2C. Various suitable light-emitting elements can be used in this light-emitting substrate. Examples of suitable light-emitting elements include organic light-emitting diodes (OLEDs), quantum dot OLEDs, and micro-LEDs. Optionally, the light-emitting element is a micro-LED. Optionally, the light-emitting element is an organic light-emitting diode including an organic light-emitting layer.

[0050] Figure 3 This is a cross-sectional view of a light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 3 In some embodiments, the display panel includes a plurality of sub-pixels. In some embodiments, each sub-pixel Sp among the plurality of sub-pixels includes n1 main light-emitting elements and n2 auxiliary light-emitting elements, where n1≥1 and n2≥1. Optionally, n1 is an integer. Optionally, n2 is an integer.

[0051] In this light-emitting substrate, the term "sub-pixel" refers to a pixel element, which may include multiple pixel driving circuits and multiple light-emitting elements. However, the multiple light-emitting elements in a sub-pixel emit light to achieve the desired grayscale of the pixel element. For example, a pixel may include three sub-pixels: a red sub-pixel, a green sub-pixel, and a blue sub-pixel. To display an image, the red sub-pixel emits light to achieve a first grayscale, the green sub-pixel emits light to achieve a second grayscale, and the blue sub-pixel emits light to achieve a third grayscale. The light emitted from the multiple light-emitting elements in the red sub-pixel together achieves the first grayscale. The light emitted from the multiple light-emitting elements in the green sub-pixel together achieves the second grayscale. The light emitted from the multiple light-emitting elements in the blue sub-pixel together achieves the third grayscale. Therefore, the multiple pixel driving circuits are controlled by at least one identical control signal. For example, a signal from a light-emitting control signal line can be transmitted in phase to the multiple pixel driving circuits as a light-emitting control signal for each of the multiple pixel driving circuits. In another example, a signal from a gate line can be transmitted in phase to the multiple pixel driving circuits as a gate scan signal for each of the multiple pixel driving circuits. In another example, only one data signal is transmitted to multiple pixel driving circuits; for example, the data signal is transmitted to only one or two of the multiple pixel driving circuits.

[0052] Refer again Figure 3 The light-emitting substrate further includes a pixel driving layer (DVL), which includes n1 main pixel driving circuits and n2 auxiliary pixel driving circuits, where n1 ≥ 1 and n2 ≥ 1. Optionally, n1 is an integer. Optionally, n2 is an integer. Each of the n1 main pixel driving circuits is configured to drive each of the n1 main light-emitting elements to emit light. Each of the n2 auxiliary pixel driving circuits is configured to drive each of the n2 auxiliary light-emitting elements to emit light.

[0053] Figure 4 This is a cross-sectional view of a light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 4 The pixel on the light-emitting substrate comprises three sub-pixels Sp1, Sp2, and Sp3. Each sub-pixel includes a single light-emitting element and a single pixel driving circuit in the pixel driving layer (DVL). Figure 4The diagram shows three light-emitting elements, LE1, LE2, and LE3. The inventors of this disclosure discovered that crosstalk occurs between adjacent sub-pixels. For example, light emitted from the first light-emitting element LE1 may enter the second sub-pixel Sp2. To reduce crosstalk, the light-emitting substrate includes a black matrix BM in the inter-sub-pixel region between adjacent sub-pixels. However, the inventors of this disclosure found that the black matrix BM typically absorbs light, reducing the light utilization efficiency in the light-emitting substrate. When all light-emitting elements are blue light-emitting elements, the crosstalk problem is particularly pronounced due to the wider angle of light emitted from the blue light-emitting elements.

[0054] The inventors of this disclosure have discovered that the display method and complex structure of the light-emitting substrate according to this disclosure can effectively prevent crosstalk between sub-pixels while maintaining excellent light utilization efficiency. This display method includes multiple display modes, wherein different numbers of light-emitting elements in the same sub-pixel are configured to emit light. In some embodiments, for displaying a first frame image, the method includes controlling the light emission of each sub-pixel to be limited to m auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, where 0 ≤ m ≤ n2. For displaying a second frame image, the light emission of each sub-pixel is controlled to be limited to m' auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, where 0 ≤ m' ≤ n2, and m ≠ m'.

[0055] In one example, to display the first frame image in the first mode, the emission of each sub-pixel is restricted to n1 main light-emitting elements, where m = 0. To display the second frame image in the second mode, the emission of each sub-pixel is restricted to n1 main light-emitting elements and n2 auxiliary light-emitting elements, where m' = n2.

[0056] Figure 5A An image display in a first mode is shown on a light-emitting substrate according to some embodiments of the present disclosure. Figure 5A In the example shown, n1 = 1, n2 = 3. (Refer to...) Figure 5A In the first mode, only n1 main light-emitting elements are configured to emit light, while n2 auxiliary light-emitting elements are configured not to emit light. Figure 5B An image display in a second mode is shown on a light-emitting substrate according to some embodiments of the present disclosure. (Refer to...) Figure 5B In the second mode, n1 main light-emitting elements and n2 auxiliary light-emitting elements are both configured to emit light.

[0057] This display method can be used in different scenarios depending on the display mode. In one example, the first mode is used when at least a portion of the display panel, including each sub-pixel, is configured to display a monochrome image. (See reference...) Figure 5A and Figure 5BThe n1 main light-emitting elements are adjacent to the black matrix BM, which prevents crosstalk between the corresponding sub-pixel and the adjacent first sub-pixel on the first side (left side) of the corresponding sub-pixel. Because the n2 auxiliary light-emitting elements do not emit light, and the n1 main light-emitting elements are spaced apart from the adjacent second sub-pixel on the second side (right side), crosstalk between the corresponding sub-pixel and the adjacent second sub-pixel on the second side of the corresponding sub-pixel is also prevented.

[0058] Similarly, the first mode can be used when the first frame of each sub-pixel has high contrast compared to a frame of its neighboring sub-pixels. In one example, the first mode is used when the grayscale of a frame of its neighboring sub-pixels is lower than the grayscale of the first frame of each sub-pixel.

[0059] In another example, when at least a portion of the display panel, including the individual sub-pixels, is configured to display a color image, a second mode is used, for which light utilization efficiency becomes more important. For example, to achieve a brightness of 80 nits in each sub-pixel, n1 main light-emitting elements can be configured to contribute 65 nits, while n2 auxiliary light-emitting elements contribute 15 nits, which can significantly improve the light utilization efficiency in the light-emitting substrate.

[0060] The display mode is not limited to the first mode and the second mode. A total of n2 modes can be implemented in this display method. In some embodiments, a third mode is used. In order to display a third frame image in the third mode, the method includes controlling the emission of each sub-pixel to be limited to m” auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, 1 < m” < n2, and m < m” < m'.

[0061] In one example, n1 = 1 and n2 = 1. Figure 6 This is a cross-sectional view of a light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 6 In some embodiments, the n1 main light-emitting elements are composed of a single main light-emitting element, the n2 auxiliary light-emitting elements are composed of a single auxiliary light-emitting element, the n1 main pixel driving circuits in the pixel driving layer DVL are composed of a single main pixel driving circuit, and the n2 auxiliary pixel driving circuits are composed of a single auxiliary pixel driving circuit.

[0062] Various suitable implementations can be used to implement this display method. In some embodiments, each of the n2 modes can be implemented by controlling n1 main pixel driving circuits and n2 auxiliary pixel driving circuits. In some embodiments, the method includes driving a corresponding main light-emitting element among the n1 main light-emitting elements to emit light through each main pixel driving circuit; and driving a corresponding auxiliary light-emitting element among the n2 auxiliary light-emitting elements to emit light through a corresponding auxiliary pixel driving circuit coupled to each main pixel driving circuit.

[0063] Figure 7 This is a circuit diagram illustrating the structure of a main pixel driving circuit, an auxiliary pixel driving circuit, a main light-emitting element, and an auxiliary light-emitting element according to some embodiments of the present disclosure. Various suitable pixel driving circuits can be used in this light-emitting substrate. Examples of suitable driving circuits for the various main pixel driving circuits and the various auxiliary pixel driving circuits include 3T1C, 2T1C, 4T1C, 4T2C, 5T2C, 6T1C, 7T1C, 7T2C, 8T1C, and 8T2C. In one example, the various auxiliary pixel driving circuits have a simpler circuit structure compared to the various main pixel driving circuits. In another example, the total number of transistors in the various main pixel driving circuits is greater than the total number of transistors in the various auxiliary pixel driving circuits.

[0064] Reference Figure 7 In one example, each main pixel driving circuit rmp is a 6T1C driving circuit. In some embodiments, each main pixel driving circuit rmp includes a first storage capacitor Cst, which includes a first capacitor electrode Ce1 and a second capacitor electrode Ce2; a first driving transistor Td, which has a gate coupled to the first capacitor electrode Ce1 and a source coupled to the power supply voltage signal line Vdd; a first transistor T1, which has a gate coupled to the reset control signal line rst(n), a source coupled to the drain of the first driving transistor Td, and a drain coupled to the gate of the first driving transistor Td and the first capacitor electrode Ce1; a second transistor T2, which has a gate coupled to the gate line GL(n), a source coupled to the data line DL(n), and a drain coupled to the second capacitor electrode Ce2; a third Transistor T3 has a gate coupled to the light-emitting control signal line em(n), a source coupled to the constant voltage power supply line Vss, and a drain coupled to the second capacitor electrode Ce2 and the drain of the second transistor T2; fourth transistor T4 has a gate coupled to the reset control signal line rst(n), a source coupled to the constant voltage power supply line Vss, and a drain coupled to the anode of the corresponding main light-emitting element LE among n1 main light-emitting elements; and first light-emitting control transistor Te has a gate coupled to the light-emitting control signal line em(n), a source coupled to the drain of the first driving transistor Td and the source of the first transistor T1, and a drain coupled to the anode of the corresponding main light-emitting element LE and the drain of the fourth transistor T4.

[0065] Reference Figure 7In one example, each auxiliary pixel driving circuit rap is a 4T1C driving circuit. In some embodiments, each auxiliary pixel driving circuit rap includes a second driving transistor Td' having a source coupled to a power supply voltage signal line Vdd; a second light-emitting control transistor Te' having a gate coupled to a light-emitting control signal line em(n), a source coupled to the drain of the second driving transistor Td', and a drain coupled to the anode of a corresponding auxiliary light-emitting element LE' among n2 auxiliary light-emitting elements; and a switching transistor Ts having a first driving transistor Td coupled to a first driving transistor Td of the corresponding main pixel driving circuit rmp and a first switching transistor Ts of the corresponding main pixel driving circuit rmp. The storage capacitor Cst has a source of a first capacitor electrode Ce1 and a drain of a second driving transistor Td' coupled to the gate of the corresponding auxiliary pixel driving circuit rap; a control transistor Tc has a gate coupled to the gate line GL(n), a source coupled to the control signal line CSL, and a drain coupled to the gate of the switching transistor Ts; and a second storage capacitor Cst' has a first capacitor electrode Ce1' coupled to the gate of the switching transistor Ts and the drain of the control transistor Tc, and a second capacitor electrode Ce2' coupled to the constant voltage supply line Vss.

[0066] Figure 8 This is a timing diagram of operating the light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 8 In some embodiments, the image display phase for each sub-pixel includes a first sub-phase t1 and a second sub-phase t2. In the first sub-phase T1, the reset control signal line rst(n) is configured to provide a low voltage signal to the gates of the first transistor T1 and the fourth transistor T4 in each main pixel driving circuit, thereby turning on the first transistor T1 and the fourth transistor T4. The light emission control signal line em(n) is configured to provide a low voltage signal to the gates of the third transistor T3 and the first light emission control transistor Te in each main pixel driving circuit, thereby turning on the third transistor T3 and the first light emission control transistor Te. The light emission control signal line em(n) is configured to provide the same low voltage signal to the gate of the second light emission control transistor Te' in each auxiliary pixel driving circuit, thereby turning on the second light emission control transistor Te' in each auxiliary pixel driving circuit rap. In the first sub-phase t1, the switching transistor Ts in each auxiliary pixel driving circuit rap is turned off. The voltage levels at nodes N1 and N2 are reset to the low voltage level of the constant voltage power supply line Vss.

[0067] In the second sub-stage t2, the reset control signal line rst(n) is configured to provide a low voltage signal to the gates of the first transistor T1 and the fourth transistor T4 in each main pixel driving circuit, thereby turning on the first transistor T1 and the fourth transistor T4. The light emission control signal line em(n) is configured to provide a high voltage signal to the gates of the third transistor T3 and the first light emission control transistor Te in each main pixel driving circuit rmp, thereby turning off the third transistor T3 and the first light emission control transistor Te. The light emission control signal line em(n) is configured to provide the same high voltage signal to the gate of the second light emission control transistor Te' in each auxiliary pixel driving circuit, thereby turning off the second light emission control transistor Te' in each auxiliary pixel driving circuit rap. The gate line GL(n) is configured to provide a low voltage signal to the gate of the second transistor T2 in each main pixel driving circuit rmp, thereby turning on the second transistor T2 in each main pixel driving circuit rmp. The gate line GL(n) is configured to provide the same low voltage signal to the gate of the control transistor Tc in each auxiliary pixel driving circuit rap, thereby turning on the control transistor Tc in each auxiliary pixel driving circuit rap. In the second sub-stage t2, the third transistor T3 in the main pixel driving circuit rmp is turned off. The first transistor T1 and the second transistor T2 in each main pixel driving circuit rmp are turned on. The first light-emitting control transistor Te in each main pixel driving circuit rmp is turned off. Node N1 charges the gate of the first driving transistor Td until the voltage level at the gate of the first driving transistor Td reaches the level of the power supply voltage signal line Vdd plus the threshold voltage of the first driving transistor Td. Node N2 is charged to the level of the data line DL(n). The control transistor Tc in each auxiliary pixel driving circuit rap is turned on, and node N3 is charged to the level of the control signal line CSL. The control signal line CSL is configured to provide a high voltage signal (VGH) or a low voltage signal (VGL).

[0068] In the third sub-stage t3, the light emission control signal line em(n) is configured to provide a low voltage signal to the gates of the third transistor T3 and the first light emission control transistor Te in each main pixel driving circuit rmp, thereby turning on the third transistor T3 and the first light emission control transistor Te. The light emission control signal line em(n) is configured to provide the same low voltage signal to the gates of the second light emission control transistor Te' in each auxiliary pixel driving circuit, thereby turning on the second light emission control transistor Te' in each auxiliary pixel driving circuit rap. The gate line GL(n) is configured to provide a high voltage signal to the gate of the second transistor T2 in each main pixel driving circuit rmp, thereby turning off the second transistor T2 in each main pixel driving circuit rmp. The gate line GL(n) is configured to provide the same high voltage signal to the gates of the control transistor Tc in each auxiliary pixel driving circuit rap, thereby turning off the control transistor Tc in each auxiliary pixel driving circuit rap. The reset control signal line rst(n) is configured to provide a high voltage signal to the gates of the first transistor T1 and the fourth transistor T4 in each main pixel driving circuit, thereby turning off the first transistor T1 and the fourth transistor T4. The voltage level at node N2 changes from the level of data line DL(n) to the level of constant voltage supply line Vss. The voltage level at node N1 changes from Vdd + Vth (the level of power supply voltage signal line Vdd plus the threshold voltage of the first driving transistor Td) to Vdd + Vth + Vss - DL(n) (the level of power supply voltage signal line Vdd plus the threshold voltage of the first driving transistor Td plus the level of constant voltage supply line Vss minus the level of data line DL(n)).

[0069] If the control signal line CSL is configured to provide a high voltage signal (VGH) in the second sub-stage t2, then the switching transistor Ts is turned off in the third sub-stage t3, and the individual auxiliary light-emitting elements LE' do not emit light in the third sub-stage t3.

[0070] If the control signal line CSL is configured to provide a low voltage signal (VGL) in the second sub-stage t2, then the switching transistor Ts is turned on in the third sub-stage t3. The gates of the second driving transistors Td' in each auxiliary pixel driving circuit rap are charged to the same voltage level at node N1, for example, Vdd + Vth + Vss - DL(n), that is, the level of the power supply voltage signal line Vdd plus the threshold voltage of the first driving transistor Td plus the level of the constant voltage power supply line Vss minus the level of the data line DL(n). Because the second light-emitting control transistors Te' in each auxiliary pixel driving circuit rap are turned on in the third sub-stage t3, each auxiliary light-emitting element LE' emits light in the third sub-stage t3.

[0071] In some embodiments, each main pixel driving circuit rmp includes a compensation sub-circuit CSC. Optionally, the compensation sub-circuit CSC includes a first transistor T1 having a gate coupled to a reset control signal line rst(n), a source coupled to the drain of a first driving transistor Td, and a drain of a first capacitor electrode Ce1 coupled to the gate of the first driving transistor Td and the storage capacitor Cst; a second transistor T2 having a gate coupled to a gate line GL(n), a source coupled to a data line DL(n), and a drain of a second capacitor electrode Ce2 coupled to the storage capacitor Cst; a third transistor T3 having a gate coupled to a light emission control signal line em(n), a source coupled to a constant voltage power supply line Vss, and a drain of a second capacitor electrode Ce2 coupled to the storage capacitor Cst and the drain of the second transistor T2; and a fourth transistor T4 having a gate coupled to a reset control signal line rst(n), a source coupled to a constant voltage power supply line Vss, and a drain coupled to the anode of a corresponding main light emission element LE among the n1 main light emission elements.

[0072] In some embodiments, the corresponding auxiliary pixel driving circuit rap and the corresponding main pixel driving circuit rmp share a compensation sub-circuit CSC. In some embodiments, the threshold voltage levels of the first driving transistor Td and the second driving transistor Td' are substantially the same. Optionally, the ratio of the channel width to the channel length of the active layer in the first driving transistor Td is substantially the same as the ratio of the channel width to the channel length of the active layer in the second driving transistor Td'. In one example, the first driving transistor Td and the second driving transistor Td' are fabricated in a light-emitting substrate such that they are close to each other to ensure that their threshold voltage levels are substantially the same. As used herein, the term "substantially the same" means that the difference between two values ​​does not exceed 10% of a base value (e.g., one of the two values), such as not exceeding 8%, 6%, 4%, 2%, 1%, 0.5%, 0.1%, 0.05%, and 0.01% of the base value.

[0073] In some embodiments, each auxiliary pixel driving circuit rap includes a selection sub-circuit SSC. Optionally, the selection sub-circuit SSC includes a switching transistor Ts having a source of a first capacitor electrode Ce1 coupled to a first driving transistor Td and a first storage capacitor Cst of the corresponding main pixel driving circuit rmp, and a drain coupled to the gate of a second driving transistor Td' of the corresponding auxiliary pixel driving circuit rap; and a control transistor Tc having a gate coupled to a gate line GL(n), a source coupled to a control signal line CSL, and a drain coupled to the gate of the switching transistor Ts.

[0074] Reference Figure 7The gates of the second driving transistor Td' in each auxiliary pixel driving circuit rap and the first driving transistor Td in each main pixel driving circuit rmp are jointly coupled to node N1. As described above, when the control signal line CSL is configured to provide an on-state voltage in the second sub-stage t2, the gates of the second driving transistor Td' in each auxiliary pixel driving circuit rap are charged to the same voltage level at node N1, and each auxiliary light-emitting element LE' emits light in the third sub-stage t3. Therefore, in some embodiments, the display method includes providing the same voltage signal to the gates of the second driving transistor Td' in each auxiliary pixel driving circuit and the gates of the first driving transistor Td in each main pixel driving circuit, thereby driving each auxiliary light-emitting element and each main light-emitting element to emit light.

[0075] In some embodiments, the display method includes providing a control signal to each auxiliary pixel driving circuit to control the transmission of a common voltage signal to the gate of a second driving transistor Td' in each auxiliary pixel driving circuit. Optionally, when the control signal is an on signal, the common voltage signal is transmitted to the gate of the second driving transistor in each auxiliary pixel driving circuit, thereby turning on the second driving transistor. Each auxiliary light-emitting element LE' emits light. Optionally, where the control signal is an off signal, the gate of the second driving transistor in each auxiliary pixel driving circuit is configured not to receive the common voltage signal, and the second driving transistor is turned off. Each auxiliary light-emitting element LE' does not emit light.

[0076] Reference Figure 7 The data signals for each sub-pixel are provided only to the respective main pixel driving circuits rmp, and not to the respective auxiliary pixel driving circuits rap. Specifically, the data signals for each sub-pixel are provided to the source of the second transistor T2 in each main pixel driving circuit rmp. In some embodiments, the display method includes providing data signals to the respective main pixel driving circuits rmp configured to drive each main light-emitting element LE to emit light, but not to the respective auxiliary pixel driving circuits rap configured to drive each auxiliary light-emitting element LE' to emit light.

[0077] In some embodiments, the display method includes providing the same light-emitting control signal to the light-emitting control transistors in each main pixel driving circuit and each auxiliary pixel driving circuit. For example... Figure 7 As shown, the same light emission control signal is provided in phase to the first light emission control transistor Te in each main pixel driving circuit rmp and the second light emission control transistor Te' in each auxiliary pixel driving circuit rap.

[0078] In some embodiments, the display method includes providing the same gate scan signal in phase to a data writing transistor (e.g., a second transistor T2) in each main pixel driving circuit rmp and a control transistor Tc in each auxiliary pixel driving circuit rap.

[0079] Figure 9 This is a circuit diagram illustrating the structure of a main pixel driving circuit, an auxiliary pixel driving circuit, a second auxiliary pixel driving circuit, a main light-emitting element, an auxiliary light-emitting element, and a second auxiliary light-emitting element according to some embodiments of the present disclosure. Figure 9 An example is shown where n1 = 1 and n2 = 2. The structures of the main pixel driving circuits rmp and the auxiliary pixel driving circuits rap are shown. Figure 7 The same as shown. The second auxiliary pixel driving circuit rap' is configured to drive the second auxiliary light-emitting element LE" to emit light.

[0080] Reference Figure 9 In one example, the second auxiliary pixel driving circuit rap' is a 4T1C driving circuit. In some embodiments, the second auxiliary pixel driving circuit rap' includes a third driving transistor Td'' having a source coupled to the power supply voltage signal line Vdd; a third light-emitting control transistor Te'' having a gate coupled to the light-emitting control signal line em(n), a source coupled to the drain of the third driving transistor Td'', and a drain coupled to the anode of the second auxiliary light-emitting element LE'' among the n2 auxiliary light-emitting elements; and a switching transistor Ts' having a first driving transistor Td coupled to each main pixel driving circuit rmp and a first storage transistor of each main pixel driving circuit rmp. The first capacitor electrode Ce1 of the container Cst has a source and a drain of the third driving transistor Td” coupled to the gate of the second auxiliary pixel driving circuit rap’; the control transistor Tc’ has a gate coupled to the gate line GL(n), a source coupled to the second control signal line CSL’, and a drain coupled to the gate of the switching transistor Ts’; the third storage capacitor Cst” has a first capacitor electrode Ce1” coupled to the gate of the switching transistor Ts’ and the drain of the control transistor Tc’, and a second capacitor electrode Ce2 coupled to the constant voltage power supply line Vss.

[0081] In some embodiments, the total number of control signal lines configured to transmit signals to each sub-pixel is n². The illumination of the n² auxiliary light-emitting elements can be controlled independently relative to each individual auxiliary light-emitting element. This depends on the individual control signals (CSL1,...,CSL) transmitted to the individual auxiliary pixel driving circuits. i ,...,CSL n2 (1 ≤ i ≤ n²), each of the n² auxiliary light-emitting elements can be turned on or off independently. When CSL iWhen the provided i-th control signal is a turn-on signal, the same voltage signal (Vdd+Vth+Vss-DL(n)) is transmitted to the gate of the driving transistor in the i-th auxiliary pixel driving circuit, thereby turning on the driving transistor in the i-th auxiliary pixel driving circuit. When CSL i When the provided i-th control signal is a cutoff signal, the gate of the driving transistor in the i-th auxiliary pixel driving circuit is configured not to receive the same voltage signal, and the driving transistor in the i-th auxiliary pixel driving circuit is cut off.

[0082] In some embodiments, the gates of the second driving transistors in the n2 auxiliary pixel driving circuits and the gates of the first driving transistors in the n1 main pixel driving circuits are jointly coupled to node N1. The display method includes providing the same voltage signal (Vdd+Vth+Vss-DL(n)) to the gates of the second driving transistors in the n2 auxiliary pixel driving circuits and the gates of the first driving transistors in the n1 main pixel driving circuits.

[0083] In some embodiments, data signals for each sub-pixel are provided only to each main pixel driving circuit rmp, and not to the n2 auxiliary pixel driving circuits. Specifically, data signals for each sub-pixel are provided to the source of the second transistor T2 in each main pixel driving circuit rmp. In some embodiments, the display method includes providing data signals to each main pixel driving circuit rmp configured to drive each main light-emitting element LE to emit light, and not providing data signals to the n2 auxiliary pixel driving circuits configured to drive the n2 auxiliary light-emitting elements to emit light.

[0084] In some embodiments, the same light emission control signal is provided to the first light emission control transistor in each main pixel driving circuit and the second light emission control transistor in each of the n2 auxiliary pixel driving circuits.

[0085] In some embodiments, the same gate scan signal is provided to the data write transistors in each main pixel driving circuit and the control transistors in n2 auxiliary pixel driving circuits.

[0086] The n1 main light-emitting elements and n2 auxiliary light-emitting elements can have various suitable areas. In one example, the n1 main light-emitting elements and n2 auxiliary light-emitting elements have the same uniform area. In another example, the area of ​​each of the n1 main light-emitting elements is larger than the area of ​​each of the n2 auxiliary light-emitting elements. In yet another example, the area of ​​each of the n1 main light-emitting elements is smaller than the area of ​​each of the n2 auxiliary light-emitting elements.

[0087] Therefore, in some embodiments, the display method includes providing a display panel comprising a plurality of sub-pixels, each sub-pixel comprising n1 main light-emitting regions and n2 auxiliary light-emitting regions, where n1≥1 and n2≥1. Optionally, for displaying a first frame image, the light emission of each sub-pixel is controlled to be limited to m auxiliary light-emitting regions among the n1 main light-emitting regions and n2 auxiliary light-emitting regions, where 0≤m≤n2. Optionally, for displaying a second frame image, the light emission of each sub-pixel is controlled to be limited to m' auxiliary light-emitting regions among the n1 main light-emitting regions and n2 auxiliary light-emitting regions, where 0≤m'≤n2 and m≠m'.

[0088] In some embodiments, in order to display the first frame image in the first mode, the emission of each sub-pixel is restricted to n1 main emission regions, where m = 0. Optionally, in order to display the second frame image in the second mode, the emission of each sub-pixel is restricted to n1 main emission regions and n2 auxiliary emission regions, where m' = n2.

[0089] In some embodiments, in a first mode, at least a portion of the display panel including the respective sub-pixels is configured to display a monochrome image, or the first frame image has high contrast compared to a frame image among adjacent sub-pixels. Optionally, in a second mode, at least a portion of the display panel including the respective sub-pixels is configured to display a color image.

[0090] In some embodiments, the display method further includes: in order to display a third frame image in a third mode, controlling the emission of each sub-pixel to be limited to m” auxiliary light-emitting regions among n1 main light-emitting regions and n2 auxiliary light-emitting regions, where 1 < m” < n2 and m < m” < m'.

[0091] In another aspect, this disclosure provides a light-emitting substrate having a plurality of sub-pixels. In some embodiments, each sub-pixel of the plurality of sub-pixels includes n1 main light-emitting elements; n1 main pixel driving circuits configured to drive the n1 main light-emitting elements to emit light; n2 auxiliary light-emitting elements; and n2 auxiliary pixel driving circuits configured to drive the n2 auxiliary light-emitting elements to emit light. Optionally, n1 ≥ 1 and n2 ≥ 1. Optionally, n1 = 1 and n2 = 1. Optionally, each main pixel driving circuit in the n1 main pixel driving circuits includes a first storage capacitor, a first driving transistor, a first light-emitting control transistor, and a compensation sub-circuit. Optionally, each auxiliary pixel driving circuit in the n2 auxiliary pixel driving circuits includes a second storage capacitor, a second driving transistor, a second light-emitting control transistor, and a selection sub-circuit. Optionally, the threshold voltage levels of the first driving transistor and the second driving transistor are substantially the same.

[0092] Reference Figure 7In some embodiments, the gates of the second driving transistors Td' in each of the n2 auxiliary pixel driving circuits rap and the gates of the first driving transistors Td in each of the n1 main pixel driving circuits rmp are coupled to the same node (N1 node). Optionally, the gates of the first driving transistors in the n1 main pixel driving circuits and the gates of the second driving transistors in the n2 auxiliary pixel driving circuits are jointly coupled to the same node. In some embodiments, each main pixel driving circuit includes a first storage capacitor Cst, which includes a first capacitor electrode Ce1 coupled to the same node.

[0093] In some embodiments, the gate of the first driving transistor Td and the first capacitor electrode Ce1 of the first storage capacitor Cst are connected to the first node N1. Optionally, the gate of the second driving transistor Td' and the first capacitor electrode Ce1' of the second storage capacitor Cst' are connected to the first node N1 through a switching transistor Ts.

[0094] In some embodiments, each auxiliary pixel driving circuit rap includes a switching transistor Ts coupled to the gate of the second driving transistor Td' of each auxiliary pixel driving circuit rap and coupled to the same node (node ​​N1). Optionally, the switching transistor Ts is configured to control the gate of the second driving transistor Td' of each auxiliary pixel driving circuit rap to be electrically connected or disconnected from the same node.

[0095] In some embodiments, each auxiliary pixel driving circuit rap includes a control transistor Tc coupled to a switching transistor Ts of each auxiliary pixel driving circuit rap. The source of the control transistor Tc of each auxiliary pixel driving circuit rap is coupled to a control signal line CSL. The drain of the control transistor Tc of each auxiliary pixel driving circuit rap is coupled to the gate of the switching transistor Ts of each auxiliary pixel driving circuit rap. The gate of the control transistor Tc of each auxiliary pixel driving circuit rap is coupled to a gate line GL(n). The gate of the control transistor Tc of each auxiliary pixel driving circuit rap is provided with the same gate scan signal provided to the data write transistor (e.g., T2) in each main pixel driving circuit rmp.

[0096] In some embodiments, the control signal line CSL is configured to provide a control signal. When the control signal is an ON signal, the switching transistor Ts is ON, allowing the gates of the second driving transistors Td' in each auxiliary pixel driving circuit rap and the gates of the first driving transistors Td in each main pixel driving circuit rmp to receive the same voltage signal at the same node. When the control signal is an OFF signal, the switching transistor Ts is OFF, disconnecting the gates of the second driving transistors Td' in each auxiliary pixel driving circuit rap from the same node.

[0097] In some embodiments, the light-emitting substrate includes n² control signal lines configured to independently send control signals to n² auxiliary pixel driving circuits. The n² control signal lines (CSL1,...,CSL...) i ,...,CSL n2 Each of the following (1≤i≤n2) can independently send a separate control signal to a separate auxiliary pixel driving circuit. This depends on the individual control signals (CSL1,...,CSL2) transmitted to the individual auxiliary pixel driving circuit. i ,...,CSL n2 (1 ≤ i ≤ n²), each of the n² auxiliary light-emitting elements can be independently turned on or off. The illumination of the n² auxiliary light-emitting elements can be independently controlled relative to each individual auxiliary light-emitting element. When CSL i When the provided i-th control signal is a turn-on signal, the same voltage signal (Vdd+Vth+Vss-DL(n)) is transmitted to the gate of the driving transistor in the i-th auxiliary pixel driving circuit, thereby turning on the driving transistor in the i-th auxiliary pixel driving circuit. When CSL i When the provided i-th control signal is a cutoff signal, the gate of the driving transistor in the i-th auxiliary pixel driving circuit is configured not to receive the same voltage signal, and the driving transistor in the i-th auxiliary pixel driving circuit is cut off.

[0098] In some embodiments, each auxiliary pixel driving circuit rap further includes a second storage capacitor Cst', which includes a first capacitor electrode Ce1' and a second capacitor electrode Ce2'. The first capacitor electrode Ce1' of the second storage capacitor Cst' is coupled to the gate of the switching transistor Ts and the drain of the control transistor Tc; the second capacitor electrode Ce2' of the second storage capacitor Cst' is coupled to the constant voltage power supply line Vss.

[0099] In some embodiments, each main pixel driving circuit rmp includes a compensation sub-circuit CSC. Optionally, the compensation sub-circuit CSC includes a first transistor T1 having a gate coupled to a reset control signal line rst(n), a source coupled to the drain of a first driving transistor Td, and a drain of a first capacitor electrode Ce1 coupled to the gate of the first driving transistor Td and the storage capacitor Cst; a second transistor T2 having a gate coupled to a gate line GL(n), a source coupled to a data line DL(n), and a drain of a second capacitor electrode Ce2 coupled to the storage capacitor Cst; a third transistor T3 having a gate coupled to a light emission control signal line em(n), a source coupled to a constant voltage power supply line Vss, and a drain of a second capacitor electrode Ce2 coupled to the storage capacitor Cst and the drain of the second transistor T2; and a fourth transistor T4 having a gate coupled to a reset control signal line rst(n), a source coupled to a constant voltage power supply line Vss, and a drain coupled to the anode of each of the n1 main light emission elements LE.

[0100] In some embodiments, the auxiliary pixel driving circuits rap and the main pixel driving circuits rmp share a compensation sub-circuit CSC. In some embodiments, the threshold voltage levels of the first driving transistor Td and the second driving transistor Td' are substantially the same. Optionally, the ratio of the channel width to the channel length of the active layer in the first driving transistor Td is substantially the same as the ratio of the channel width to the channel length of the active layer in the second driving transistor Td'. In one example, the first driving transistor Td and the second driving transistor Td' are fabricated in a light-emitting substrate such that they are close to each other to ensure that their threshold voltage levels are substantially the same.

[0101] In some embodiments, each auxiliary pixel driving circuit rap includes a selection sub-circuit SSC. Optionally, the selection sub-circuit SSC includes a switching transistor Ts having a source of a first capacitor electrode Ce1 coupled to a first driving transistor Td and a first storage capacitor Cst of each main pixel driving circuit rmp, and a drain coupled to the gate of a second driving transistor Td' coupled to the gate of each auxiliary pixel driving circuit rap; and a control transistor Tc having a gate coupled to a gate line GL(n), a source coupled to a control signal line CSL, and a drain coupled to the gate of the switching transistor Ts.

[0102] In some embodiments, n1 main light-emitting elements and n2 auxiliary light-emitting elements are configured to emit light of the same color. Optionally, the light of the same color has a wavelength in the range of 435 nm to 480 nm, such as 435 nm to 440 nm, 440 nm to 445 nm, 445 nm to 450 nm, 450 nm to 455 nm, 455 nm to 460 nm, 460 nm to 465 nm, 465 nm to 470 nm, 470 nm to 475 nm, or 475 nm to 480 nm. In one example, the light of the same color has a wavelength in the range of 450 nm to 460 nm.

[0103] In some embodiments, each of the n1 main light-emitting elements has a first light-emitting region; and each of the n2 auxiliary light-emitting elements has a second light-emitting region. Optionally, the first light-emitting region is larger than the second light-emitting region.

[0104] In some embodiments, n1 main light-emitting elements have a first combined light-emitting region; and n2 auxiliary light-emitting elements have a second combined light-emitting region. Optionally, the first combined light-emitting region is larger than the second combined light-emitting region.

[0105] In another aspect, the present invention provides a display panel. In some embodiments, the display panel includes a light-emitting substrate manufactured as described herein or by the methods described herein, and a color filter. (See also...) Figure 3 , Figure 4 and Figure 6 In some embodiments, the display panel further includes a color filter, which comprises a plurality of color filter blocks (CFBs). The orthographic projection of each of the plurality of color filter blocks (CFBs) on the substrate BS at least partially overlaps with the orthographic projections of n1 main light-emitting elements on the substrate BS, and at least partially overlaps with the orthographic projections of n2 auxiliary light-emitting elements on the substrate BS.

[0106] Reference Figure 3 , Figure 4 and Figure 6 In some embodiments, the display panel further includes a first encapsulation layer EN1 encapsulating multiple light-emitting elements and a second encapsulation layer EN2 encapsulating multiple color filter blocks CFB.

[0107] Reference Figure 3 , Figure 4 and Figure 6 In some embodiments, the display panel also includes a cathode CD extending throughout a plurality of subpixels.

[0108] In some embodiments, one or more auxiliary light-emitting elements may be shared by two adjacent color filters in a plurality of color filters (CFBs). Figure 10 This is a cross-sectional view of a light-emitting substrate according to some embodiments of this disclosure. (Refer to...) Figure 10 The light-emitting substrate also includes a common light-emitting element SLE shared between an individual sub-pixel Sp and an adjacent sub-pixel Asp, and a common pixel driving circuit. The common pixel driving circuit is configured to drive the common light-emitting element SLE to emit light. The orthographic projection of the common light-emitting element SLE on the substrate BS at least partially overlaps with the orthographic projection of an individual color filter block RCB among the plurality of color filter blocks CFB on the substrate BS, and at least partially overlaps with the orthographic projection of an adjacent color filter block ACB among the plurality of color filter blocks CFB on the substrate BS. The individual color filter block RCB and the adjacent color filter block ACB are adjacent to each other. The individual color filter block RCB corresponds to an individual sub-pixel Sp, and the adjacent color filter block ACB corresponds to an adjacent sub-pixel Asp.

[0109] In one example, a common pixel driving circuit is coupled to each main pixel driving circuit in a separate sub-pixel Sp, and the gate of the driving transistor in the common pixel driving circuit is coupled to the gate of the first driving transistor in the main pixel driving circuit of the separate sub-pixel Sp.

[0110] In another example, a shared pixel driving circuit is coupled to a main pixel driving circuit in an adjacent sub-pixel Asp, and the gate of the driving transistor in the shared pixel driving circuit is coupled to the gate of the first driving transistor in the main pixel driving circuit in the adjacent sub-pixel Asp.

[0111] Figure 11 This is a schematic diagram illustrating the structure of a display panel according to some embodiments of the present disclosure. (Refer to...) Figure 11 In some embodiments, the color filter includes a plurality of color filter blocks CFB, each located in a plurality of light-transmitting regions TA. n1 main light-emitting elements have a first light-emitting region LA1. n2 auxiliary light-emitting elements have a second light-emitting region LA2. In some embodiments, each light-transmitting region in the plurality of light-transmitting regions TA at least partially overlaps with the first light-emitting region of the n1 main light-emitting elements and at least partially overlaps with the second light-emitting region of the n2 auxiliary light-emitting elements.

[0112] In some embodiments, the display panel further includes a color conversion layer (CCL). Optionally, the color conversion layer CCL includes a plurality of color conversion blocks CCP1 for a first color, a plurality of color conversion blocks CCP2 for a second color, and a plurality of light-transmitting blocks, and optionally includes a plurality of light-transmitting blocks TP. In one example, the first color is red and the second color is green. The plurality of light-transmitting blocks TP do not convert light into different wavelengths. In another example, the plurality of light-transmitting blocks TP correspond to blue sub-pixels.

[0113] In some embodiments, the display panel includes a first capping layer CAP1 on a light-emitting substrate; a color conversion layer CCL located on the side of the first capping layer CAP1 away from the light-emitting substrate; and a second capping layer CAP2 located on the side of the color conversion layer CCL away from the first capping layer CAP1. Optionally, a color filter is located on the side of the second capping layer CAP2 away from the color conversion layer CCL. The first capping layer CAP1 and the second capping layer CAP2 may be made of inorganic insulating materials, such as silicon dioxide, silicon nitride, and silicon oxynitride.

[0114] Figure 12A This is a plan view of the color filter and light-emitting element according to some embodiments of this disclosure. (Refer to...) Figure 12A Each color filter in a CFB is located in a corresponding light-transmitting region of multiple light-transmitting regions (e.g., Figure 11 In some embodiments, a corresponding light-transmitting region among the plurality of light-transmitting regions at least partially overlaps with the light-emitting regions of the n1 main light-emitting elements and at least partially overlaps with the light-emitting regions of the n2 auxiliary light-emitting elements. Optionally, a corresponding light-transmitting region among the plurality of light-transmitting regions completely covers the light-emitting regions of the n1 main light-emitting elements and at least partially overlaps with the light-emitting regions of the n2 auxiliary light-emitting elements.

[0115] In some embodiments, the orthographic projection of each color filter block in the plurality of color filter blocks (CFBs) onto the substrate at least partially overlaps with the orthographic projections of n1 main light-emitting elements onto the substrate, and at least partially overlaps with the orthographic projections of n2 auxiliary light-emitting elements onto the substrate. Optionally, the orthographic projection of each color filter block in the plurality of color filter blocks (CFBs) onto the substrate completely covers the orthographic projections of n1 main light-emitting elements onto the substrate, and at least partially overlaps with the orthographic projections of n2 auxiliary light-emitting elements onto the substrate.

[0116] In some embodiments, the center C1 of the orthographic projection of the n1 main light-emitting elements on the substrate substantially overlaps with the center C2 of the orthographic projection of each of the plurality of color filter blocks on the substrate. As used herein, the term “substantially overlap” means that two points (e.g., “centers”) are spaced no more than 1000 μm apart, for example, no more than 900 μm, no more than 800 μm, no more than 700 μm, no more than 600 μm, no more than 500 μm, no more than 400 μm, no more than 300 μm, no more than 200 μm, no more than 100 μm, no more than 90 μm, no more than 80 μm, no more than 70 μm, no more than 60 μm, no more than 50 μm, no more than 40 μm, no more than 30 μm, no more than 20 μm, no more than 10 μm, no more than 5 μm, no more than 4 μm, no more than 3 μm, no more than 2 μm, or no more than 1 μm.

[0117] Figure 12BThis is a plan view of the color filter and light-emitting element according to some embodiments of this disclosure. (Refer to...) Figure 12B Each of the multiple light-transmitting regions completely covers the light-emitting areas of the n1 main light-emitting elements and completely covers the light-emitting areas of the n2 auxiliary light-emitting elements. Optionally, the orthographic projection of each color filter block (CFB) on the substrate completely covers the orthographic projection of the n1 main light-emitting elements and completely covers the orthographic projection of the n2 auxiliary light-emitting elements on the substrate. Optionally, the center C1 of the orthographic projection of the n1 main light-emitting elements on the substrate substantially overlaps with the center C2 of the orthographic projection of each color filter block on the substrate. Figure 12B In this system, the light-emitting area of ​​each main light-emitting element is larger than the light-emitting area of ​​each auxiliary light-emitting element.

[0118] Figure 12C This is a plan view of the color filter and light-emitting element according to some embodiments of this disclosure. (Refer to...) Figure 12C The light-emitting areas of each main light-emitting element are basically the same as the light-emitting areas of each auxiliary light-emitting element.

[0119] As used in this article, the term "center" refers to, for example, the geometric center (especially for regular shapes), the approximate geometric center, or the equivalent center, such as the centroid or center of mass (especially for irregular shapes).

[0120] In another aspect, the present invention provides a display device comprising a light-emitting substrate described herein or manufactured by the methods described herein, and one or more integrated circuits connected to the light-emitting substrate. Examples of suitable display devices include, but are not limited to, electronic paper, mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo albums, GPS, etc. Optionally, the display device is an organic light-emitting diode (OLED) display device. Optionally, the display device is a liquid crystal display (LCD) device.

[0121] In some embodiments, the display device includes one or more processors configured to determine a display mode for each of the plurality of sub-pixels in the display device. In some embodiments, the one or more processors are configured to receive data signals from printed circuitry for displaying an image on the display panel, and the one or more processors are further configured to determine, based on the data signals, whether at least a portion of the display panel including the respective sub-pixels is configured to display a monochrome image. Optionally, when it is determined that at least a portion of the display panel including the respective sub-pixels is configured to display a monochrome image, the one or more processors are configured to send one or more signals to each sub-pixel to control the light emission of each sub-pixel to be limited to m auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, where 0 ≤ m ≤ n2.

[0122] In some embodiments, one or more processors are configured to receive a data signal of a frame image, and the one or more processors are further configured to determine, based on the data signal, whether the first frame image of each sub-pixel has high contrast compared to a frame image of its neighboring sub-pixels. Optionally, when it is determined that the first frame image of each sub-pixel has high contrast compared to the frame image of its neighboring sub-pixels, the one or more processors are configured to send one or more signals to each sub-pixel to control the emission of each sub-pixel to be limited to m auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, where 0 ≤ m ≤ n2.

[0123] In some embodiments, one or more processors are configured to receive a data signal of a frame of image, and the one or more processors are further configured to determine whether at least a portion of the display panel including each sub-pixel is configured to display a color image. Optionally, when it is determined that at least a portion of the display panel including each sub-pixel is configured to display a color image, the one or more processors are configured to send one or more signals to each sub-pixel to control the light emission of each sub-pixel to be limited to m' auxiliary light-emitting elements out of n1 main light-emitting elements and n2 auxiliary light-emitting elements, where 0 ≤ m' ≤ n2, and m ≠ m'.

[0124] In some embodiments, one or more processors are configured to receive a data signal of a frame of image, and the one or more processors are further configured to transmit one or more signals to each sub-pixel to control the light emission of each sub-pixel to be limited to m” auxiliary light-emitting elements among n1 main light-emitting elements and n2 auxiliary light-emitting elements, 1 < m” < n2, and m < m” < m'.

[0125] In another aspect, the present invention provides a method for manufacturing a light-emitting substrate. In some embodiments, the method includes forming a plurality of sub-pixels. In some embodiments, each sub-pixel of the plurality of sub-pixels includes forming n1 main light-emitting elements; forming n1 main pixel driving circuits configured to drive the n1 main light-emitting elements to emit light; forming n2 auxiliary light-emitting elements; and forming n2 auxiliary pixel driving circuits configured to drive the n2 auxiliary light-emitting elements to emit light. Optionally, n1 ≥ 1 and n2 ≥ 1. Optionally, the gate of the second driving transistor in each of the n2 auxiliary pixel driving circuits and the gate of the first driving transistor in each of the n1 main pixel driving circuits are coupled to the same node.

[0126] For illustrative and descriptive purposes, the foregoing description of embodiments of the invention has been provided. It is not exhaustive, nor is it intended to limit the invention to the precise forms or exemplary embodiments disclosed. Therefore, the foregoing description should be considered illustrative rather than restrictive. Clearly, many modifications and variations will be apparent to those skilled in the art. The embodiments were chosen and described to explain the principles of the invention and its best mode of practical application, thereby enabling those skilled in the art to understand the various embodiments of the invention and the various modifications suitable for the particular use or implementation contemplated. The scope of the invention is intended to be defined by the appended claims and their equivalents, wherein, unless otherwise stated, all terms are to be interpreted in their broadest reasonable sense. Therefore, the terms “the invention,” “the present invention,” etc., do not necessarily limit the scope of the claims to the specific embodiments, and references to exemplary embodiments of the invention do not imply limitation of the invention, nor should such limitation be inferred. The invention is defined only by the spirit and scope of the appended claims. Furthermore, these claims may involve the use of “first,” “second,” etc., followed by nouns or elements. These terms should be understood as nomenclature and should not be construed as limiting the number of elements modified by these nomenclatures unless a specific number has been given. Any advantages and benefits described may not apply to all embodiments of the invention. It should be understood that changes to the described embodiments can be made by those skilled in the art without departing from the scope of the invention as defined by the appended claims. Furthermore, the elements and components in this disclosure are not intended for public distribution, whether or not they are expressly recited in the appended claims.

Claims

1. A light-emitting substrate comprising a plurality of sub-pixels; in, Each of the plurality of sub-pixels includes: n1 main light-emitting elements; n1 main pixel driving circuits are configured to drive the n1 main light-emitting elements to emit light; n2 auxiliary light-emitting elements; n2 auxiliary pixel driving circuits are configured to drive the n2 auxiliary light-emitting elements to emit light; n1≥1 and n2≥1; Each of the n1 main pixel driving circuits includes a first storage capacitor, a first driving transistor, a first light-emitting control transistor, and a compensation sub-circuit. Each of the n2 auxiliary pixel driving circuits includes a second storage capacitor, a second driving transistor, a second light-emitting control transistor, and a selector circuit. Wherein, the threshold voltage levels of the first driving transistor and the second driving transistor are substantially the same; the compensation sub-circuit includes: The first transistor has a gate coupled to a reset control signal line, a source coupled to the drain of the first driving transistor, and a drain of a first capacitor electrode coupled to the gate of the first driving transistor and the first storage capacitor. The second transistor has a gate coupled to a gate line, a source coupled to a data line, and a drain coupled to a second capacitor electrode of the first storage capacitor. The third transistor has a gate coupled to a light-emitting control signal line, a source coupled to a constant voltage power supply line, and a drain coupled to a second capacitor electrode of the first storage capacitor and the drain of the second transistor; and The fourth transistor has a gate coupled to a reset control signal line, a source coupled to the constant voltage power supply line, and a drain coupled to the anode of the corresponding main light-emitting element among the n1 main light-emitting elements.

2. The light-emitting substrate according to claim 1, wherein, The selection sub-circuit includes: A switching transistor having a source at a first capacitor electrode coupled to a first driving transistor of a corresponding main pixel driving circuit and a first storage capacitor of the corresponding main pixel driving circuit, and a drain at a gate coupled to a second driving transistor of a corresponding auxiliary pixel driving circuit; and A control transistor having a gate coupled to a gate line, a source coupled to a control signal line, and a drain coupled to the gate of the switching transistor.

3. The light-emitting substrate according to claim 2, wherein, The gate of the first driving transistor and the first capacitor electrode of the first storage capacitor are connected to the first node; as well as The gate of the second driving transistor and the first capacitor electrode of the second storage capacitor are connected to the first node through the switching transistor.

4. The light-emitting substrate according to any one of claims 1 to 3, wherein, The n1 main light-emitting elements and the n2 auxiliary light-emitting elements are configured to emit light of the same color.

5. The light-emitting substrate according to claim 4, wherein, The wavelengths of the same color light are in the range of 435 nm to 480 nm.

6. The light-emitting substrate according to any one of claims 1 to 3, wherein, Each of the n1 main light-emitting elements has a first light-emitting area; Each of the n² auxiliary light-emitting elements has a second light-emitting region; and The first light-emitting area is larger than the second light-emitting area.

7. The light-emitting substrate according to claim 2 or 3, wherein, The source of the control transistor in the corresponding auxiliary pixel driving circuit is coupled to the control signal line; The drain of the control transistor of the corresponding auxiliary pixel driving circuit is coupled to the gate of the switching transistor of the corresponding auxiliary pixel driving circuit. The gate of the control transistor in the corresponding auxiliary pixel driving circuit is coupled to a gate line; and The gate of the control transistor in the corresponding auxiliary pixel driving circuit is provided with the same gate scan signal, which is provided to the data write transistor in the corresponding main pixel driving circuit.

8. The light-emitting substrate according to claim 7, wherein, The control signal line is configured to provide control signals; Wherein, when the control signal is an on signal, the switching transistor is turned on, such that the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit and the gate of the first driving transistor in the corresponding main pixel driving circuit receive the same voltage signal at the same node; and When the control signal is a cutoff signal, the switching transistor is turned off to disconnect the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit from the same node.

9. The light-emitting substrate according to claim 7, wherein, The second storage capacitor of the corresponding auxiliary pixel driving circuit includes a first capacitor electrode and a second capacitor electrode. The first capacitor electrode of the second storage capacitor is coupled to the gate of the switching transistor and the drain of the control transistor; as well as The second capacitor electrode of the second storage capacitor is coupled to the constant voltage power supply line.

10. A display panel comprising a light-emitting substrate and a color filter according to any one of claims 1 to 9; in, The color filter includes multiple color filter blocks respectively disposed in multiple light-transmitting areas; Each of the plurality of light-transmitting regions overlaps at least partially with the light-emitting regions of the n1 main light-emitting elements and at least partially with the light-emitting regions of the n2 auxiliary light-emitting elements.

11. The display panel according to claim 10, wherein, The orthographic projection of each of the plurality of color filter blocks on the substrate completely covers the orthographic projection of the n1 main light-emitting elements on the substrate, and at least partially overlaps with the orthographic projection of the n2 auxiliary light-emitting elements on the substrate.

12. The display panel according to claim 10, further comprising: A first coating layer is located on the light-emitting substrate; A color conversion layer is located on the side of the first covering layer away from the light-emitting substrate; as well as The second coating layer is located on the side of the color conversion layer away from the first coating layer; Wherein, the color filter is located on the side of the second coating layer away from the color conversion layer; and The color conversion layer includes multiple color conversion blocks of a first color, multiple color conversion blocks of a second color, and multiple light-transmitting blocks.

13. The display panel according to claim 10, wherein, The centers of the orthographic projections of the n1 main light-emitting elements on the substrate substantially overlap with the centers of the orthographic projections of each of the plurality of color filter blocks on the substrate.

14. A display device comprising a light-emitting substrate according to any one of claims 1 to 9, and one or more integrated circuits connected to the light-emitting substrate.

15. A display method, comprising: A display panel as described in any one of claims 10-13 is provided, the display panel comprising a plurality of sub-pixels, each of the plurality of sub-pixels comprising n1 main light-emitting elements and n2 auxiliary light-emitting elements, n1≥1 and n2≥1; In order to display the first frame image, the light emission of each sub-pixel is controlled to be limited to m auxiliary light emission elements among the n1 main light emission elements and the n2 auxiliary light emission elements, where 0≤m≤n2; as well as In order to display the second frame image, the light emission of each sub-pixel is controlled to be limited to m' auxiliary light emission elements among the n1 main light emission elements and the n2 auxiliary light emission elements, where 0≤m'≤n2 and m≠m'.

16. The display method according to claim 15, wherein, In order to display the first frame image in the first mode, the light emission of each sub-pixel is limited to the n1 main light-emitting elements, m = 0; as well as In order to display the second frame image in the second mode, the light emission of each sub-pixel is restricted to the n1 main light-emitting elements and the n2 auxiliary light-emitting elements, where m' = n2.

17. The display method according to claim 16, wherein, In the first mode, at least a portion of the display panel including each of the sub-pixels is configured to display a monochrome image, or the first frame image has high contrast compared to a frame image in an adjacent sub-pixel. as well as In the second mode, at least a portion of the display panel, including the respective sub-pixels, is configured to display a color image.

18. The display method according to claim 15, further comprising, in order to display a third frame image in a third mode, controlling the light emission of each sub-pixel to be limited to m'' auxiliary light emission elements among the n1 main light emission elements and the n2 auxiliary light emission elements, 1 < m'' < n2 and m < m'' < m'.

19. The display method according to any one of claims 15 to 18, comprising: The corresponding main light-emitting element among the n1 main light-emitting elements is driven to emit light through each main pixel driving circuit; as well as By connecting the corresponding auxiliary pixel driving circuit to each of the main pixel driving circuits, the corresponding auxiliary light-emitting element among the n2 auxiliary light-emitting elements is driven to emit light.

20. The display method according to claim 19, wherein, Driving the corresponding auxiliary light-emitting element and the corresponding main light-emitting element to emit light includes providing the same voltage signal to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit and the gate of the first driving transistor in the corresponding main pixel driving circuit.

21. The display method of claim 20, further comprising providing a control signal to the corresponding auxiliary pixel driving circuit to control the transmission of the same voltage signal to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit; in, When the control signal is a turn-on signal, the same voltage signal is transmitted to the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit, thereby turning on the second driving transistor; as well as When the control signal is a cutoff signal, the gate of the second driving transistor in the corresponding auxiliary pixel driving circuit is configured not to receive the same voltage signal, and the second driving transistor is cut off.

22. The display method of claim 19, comprising providing a data signal to a corresponding main pixel driving circuit configured to drive the corresponding main light-emitting element to emit light, but not providing the data signal to a corresponding auxiliary pixel driving circuit configured to drive the corresponding auxiliary light-emitting element to emit light.

23. The display method according to claim 19, comprising providing the same light-emitting control signal to a first light-emitting control transistor in the corresponding main pixel driving circuit and a second light-emitting control transistor in the corresponding auxiliary pixel driving circuit.

24. The display method of claim 19, comprising providing the same gate scan signal to the data writing transistor in the corresponding main pixel driving circuit and the control transistor in the corresponding auxiliary pixel driving circuit.

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