Low-stress packaging structure for MEMS resonators

Abstract

The invention relates to the field of sensor chips, and in particular to a low-stress packaging structure suitable for a MEMS resonator, comprising a MEMS chip, an isolation layer, an adhesive structure and an ASIC chip. The MEMS chip comprises a capping layer, a structural layer, upper and lower anchor layers and a substrate layer. The capping layer and the substrate layer are bonded to form a cavity for placing the structural layer. The structural layer is connected to the capping layer and the substrate layer through the upper and lower anchor layers. A spring structure is provided between the lower anchor layers for releasing the stress of the substrate. The upper surface of the substrate layer has a plurality of corrugated structures and deep grooves for absorbing and isolating stress. The isolation layer connected to the bottom of the substrate layer has a groove, and the surface of the groove has a corrugated structure for isolating and absorbing stress. The isolation layer and the ASIC chip are bonded through an adhesive structure. The structure has a multi-level stress isolation and stress release structure, which greatly reduces the thermal stress generated by the mismatch of thermal expansion coefficients between the adhesive structure and the MEMS chip, thereby improving the performance of the device.

Description

Technical Field

[0001] The present application relates to the field of sensor packaging, and more particularly, to a low-stress packaging structure of a MEMS resonator. Background Art

[0002] The movable parts and electrodes inside the MEMS chip are the core structure of the MEMS resonator, which affects the output performance of the resonator. In the patch process of the packaging process, due to the mismatch between the thermal expansion coefficient of the adhesive and the thermal expansion coefficient of the chip material (silicon 6.23ppm / K), thermal stress is generated on the contact surface between the adhesive and the MEMS when it is cooled from the high temperature of curing to room temperature. The thermal stress is transmitted to the structural layer of the MEMS - the movable parts and electrodes through the MEMS substrate layer. This causes the gap between the movable parts and the electrodes to change, which in turn affects the output frequency change.

[0003] The invention patent of patent document CN109355997A proposes a method of fixing a MEMS resonator in a package shell by using an I-shaped chip holder made of chip material. The stress generated by external deformation and temperature change in the MEMS resonator device manufactured by this method is not obvious, and the stability is good. However, this method is to fix the chip holder in the package shell by adhesive, and the thermal expansion coefficient of the adhesive itself is large, which will produce residual stress in the manufacture of MEMS chips. The invention patent of patent document CN105036060 proposes a method of adding a stress isolation layer to the substrate layer of the MEMS chip. The substrate layer used in this method has a simple structure, is easy to manufacture, and can effectively reduce thermal stress. The stress isolation layer of this method is connected to the MEMS chip through four corner surfaces, has a small contact area, and has poor impact resistance. Patent CN116259537A mentions a method for bonding silicon dioxide to silicon. This method achieves bonding between silicon dioxide and silicon by adding a germanium layer on the surface of silicon dioxide and the surface of silicon. The germanium material used in this method has almost the same thermal expansion coefficient as the silicon material. Patent document CN112938888A proposes a method of digging grooves on the electrode layer and the substrate to reduce the contact surface between the electrode layer and the substrate. This method can reduce the influence of stress on the MEMS structure layer. However, this method introduces a new structure into the MEMS chip, which is inconsistent with the thermal expansion coefficient of the chip material, and generates stress in the MEMS manufacturing process. Summary of the invention

[0004] In view of the deficiencies of the prior art, the present invention proposes a low-stress MEMS packaging structure, which has a multi-level stress release and stress isolation structure, and minimizes the impact of packaging stress on the MEMS structural layer.

[0005] The present invention proposes a low-stress packaging structure suitable for a MEMS resonator, which comprises a MEMS chip, an isolation layer, a bonding structure and an ASIC chip from top to bottom;

[0006] The MEMS chip comprises a capping layer, a structural layer, upper and lower anchor layers and a substrate layer;

[0007] The lower surface of the capping layer has a groove, and the lower surface of the capping layer and the upper surface of the substrate layer are bonded with gold and silicon through a dielectric layer to form a closed cavity;

[0008] The capping layer has an electrical path, the electrical path is insulated from the capping layer, and the electrical path is connected to the upper anchor layer;

[0009] The upper surface of the upper anchor point layer is connected to the capping layer, and the lower surface is connected to the structural layer;

[0010] An electrical path is provided inside the upper anchor layer, and the electrical path is insulated from the anchor layer;

[0011] The upper anchor layer electrical path realizes an electrical connection bridge between the structural layer and the capping layer;

[0012] The structural layer is located in the cavity, the upper surface of the structural layer is connected to the upper anchor layer and is suspended by the upper anchor layer, and the lower surface of the structural layer is connected to the lower anchor layer and is supported by the lower anchor layer;

[0013] The lower anchor point layer includes an upper oxide layer and a spring structure;

[0014] The upper oxide layer of the lower anchor layer is connected to the structural layer, and the lower surface is connected to the upper surface of the substrate layer;

[0015] Spring structures are distributed between the anchor point layers;

[0016] The upper surface of the substrate layer includes a plurality of corrugated structures and deep groove structures distributed around the contact surface of the anchor point layer.

[0017] Furthermore, the upper surface of the isolation layer has a groove, which is silicon-silicon bonded with the lower surface of the substrate layer to form a closed cavity;

[0018] The groove is located in the center of the isolation layer, and the surface of the groove has a wavy structure.

[0019] Furthermore, the bonding structure is used to connect the MEMS chip with the ASIC chip;

[0020] The bonding structure is mainly made of thermoplastic and thermosetting materials, and the thermal expansion coefficient is 10ppm / K to 100ppm / K. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A cross-sectional schematic diagram of an embodiment of a low-stress packaging structure for a MEMS resonator according to the present invention;

[0022] Figure 2 for Figure 1 Schematic cross-section of the middle anchor layer;

[0023] Figure 3 for Figure 1 A schematic cross-sectional view of the middle substrate layer;

[0024] Figure 4 for Figure 1 A schematic cross-sectional view of the middle isolation layer;

[0025] Figure 5 for Figure 1 Schematic diagram of the circular groove in the middle isolation layer;

[0026] Figure 6 for Figure 1 Schematic diagram of the square groove in the middle isolation layer. DETAILED DESCRIPTION

[0027] The present invention will be further described below in conjunction with the accompanying drawings.

[0028] See also Figure 1 The present invention provides a MEMS resonator packaging structure for reducing packaging stress, including a MEMS chip 1234, an isolation layer 500, a bonding structure 600, and an ASIC chip 700.

[0029] The MEMS chip includes a capping layer 100 , an upper anchor layer 201 , a structural layer 300 , a lower anchor layer 202 and a substrate layer 400 .

[0030] The lower surface of the capping layer 100 has a groove, and the lower surface of the capping layer 100 is bonded with gold-silicon on the upper surface of the substrate layer 400 to form a closed cavity.

[0031] The cavity is used to place the structure layer 300 and the anchor point layers 201 and 202 .

[0032] The capping layer 100 has an electrical path processed inside by TSV technology. The electrical path is insulated from the capping layer 100 and is electrically connected to the upper anchor layer 201 .

[0033] The upper anchor layer 201 simultaneously connects the capping layer 100 and the structural layer 300 to achieve electrical connection and structural support between the two.

[0034] The structural layer 300 is located in the cavity, with its upper surface connected to the lower surface of the upper anchor layer 201, and its lower surface connected to the oxide layer on the lower anchor layer 202. The anchor layers 201 and 202 provide support and electrical connection.

[0035] See also Figure 2 The lower anchor layer 202 is made of the same material as the chip, with a silicon oxide layer on its upper surface 202, a spring structure 202b between the anchor layers, and an oxide layer on its lower surface 202c.

[0036] The oxide layer on the upper surface 202a of the lower anchor layer is connected to the lower electrode surface of the structural layer, and the oxide layer on the lower surface 202c is connected to the upper surface 401 of the substrate layer. A germanium layer is sputtered on the surface of the oxide layer. The thermal expansion coefficient of metal germanium is 6.1ppm / K, which is almost the same as the chip material. It is bonded to the structural layer 200 at a low temperature to achieve the connection between the anchor layer 300 and the structural layer 200, while generating less stress.

[0037] There is a spring structure between the lower anchor point layers 202 for relieving stress.

[0038] See also Figure 3 The upper surface 401 of the substrate layer 400 includes wavy patterns 410a, deep grooves 410b, and anchor contact surfaces 410c.

[0039] The wavy patterns 410a and deep grooves 410b on the upper surface 401 of the substrate layer are used to release and isolate stress.

[0040] See also Figure 4 The isolation layer 500 has a groove on the upper surface 501, and the groove is circular 502a (see Figure 5 ) or square 502b (see Figure 6 ), the groove surface has wavy patterns 502.

[0041] The upper surface 501 of the isolation layer 500 is silicon-silicon bonded to the lower surface of the substrate layer 400 to form a cavity for isolating stress.

[0042] The bonding structure 600 is used to fix the MEMS chip 1234 on the ASIC chip 700. The bonding structure is usually made of thermoplastic or thermosetting resin material, and has a thermal expansion coefficient between 10 and 100 ppm / K, which is the main source of MEMS chip packaging stress.

Claims

1. A low stress packaging structure for a MEMS resonator, characterized in that: The packaging structure includes, from top to bottom, a MEMS chip, an isolation layer, a bonding structure and an ASIC chip; The MEMS chip comprises a capping layer, a structural layer, upper and lower anchor layers and a substrate layer; The lower surface of the capping layer has a groove, and the lower surface of the capping layer and the upper surface of the substrate layer are bonded with gold and silicon through a dielectric layer to form a closed cavity; The capping layer has an electrical path, the electrical path is insulated from the capping layer, and the electrical path is connected to the upper anchor layer; The upper surface of the upper anchor point layer is connected to the capping layer, and the lower surface is connected to the structural layer; An electrical path is provided inside the upper anchor layer, and the electrical path is insulated from the anchor layer; The upper anchor layer electrical path realizes an electrical connection bridge between the structural layer and the capping layer; The structural layer is located in the cavity, the upper surface of the structural layer is connected to the upper anchor layer and is suspended by the upper anchor layer, and the lower surface of the structural layer is connected to the lower anchor layer and is supported by the lower anchor layer; The lower anchor point layer includes an upper oxide layer and a spring structure; The upper oxide layer of the lower anchor layer is connected to the structural layer, and the lower surface is connected to the upper surface of the substrate layer; Spring structures are distributed between the anchor point layers; The upper surface of the substrate layer includes a plurality of corrugated structures and deep groove structures distributed around the contact surface of the anchor point layer.

2. The low stress packaging structure for MEMS resonator according to claim 1, characterized in that: The upper surface of the isolation layer has a groove, which is bonded with the lower surface of the substrate layer to form a closed cavity; The groove is located in the center of the isolation layer, and the surface of the groove has a wavy structure.

3. The low stress packaging structure for MEMS resonator according to claim 1, characterized in that: The bonding structure is used to connect the MEMS chip and the ASIC chip; The bonding structure is mainly made of thermoplastic and thermosetting materials, and the thermal expansion coefficient is 10ppm / K to 100ppm / K.

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