Polynomial modular multiplication operator, operation method and related device

Abstract

The present invention discloses a polynomial modular multiplication operator, an operation method and a related device, which are applied to the field of quantum computing. The polynomial modular multiplication operator is used to determine the modular multiplication result of a first polynomial and a second polynomial inputted, where the module in the modular multiplication operation is a third polynomial; the polynomial modular multiplication operator comprises n controlled adders and n-1 modular multiplication operators which are alternately cascaded; the controlled adder is used to determine a when the quantum state of the control bit corresponding to the control adder is the target quantum state. i The sum of the second polynomial times the value of the initial state, or the sum of the output result of the previous modular multiplication operator; each control bit is used to store the coefficient a of each degree term in the first polynomial i The quantum state of the first polynomial is no greater than n-1. The modular multiplication operator is used to determine the modular multiplication result of the output of the previous controlled adder and the variables in the first polynomial, where the modulus of the modular multiplication is the third polynomial. This implements the polynomial modular multiplication operation in quantum computing.

Description

Technical Field

[0001] The present invention belongs to the field of quantum computing technology, and in particular to a polynomial modular multiplication operator, an operation method and related devices. Background Art

[0002] A quantum computer is a physical device that follows the laws of quantum mechanics to perform high-speed mathematical and logical operations, and to store and process quantum information. When a device processes and calculates quantum information and runs quantum algorithms, it is considered a quantum computer. Quantum computers are a key technology under research because they can handle mathematical problems more efficiently than conventional computers. For example, they can reduce the time required to crack RSA keys from hundreds of years to just hours.

[0003] Modular arithmetic has a wide range of applications in number theory and cryptography, from determining odd and even numbers to determining prime numbers, from Sun Tzu's theorem to the Caesar cipher, from finite fields to the implementation of block cipher field towers, and from elliptic curves over finite fields to elliptic curve-based public-key cryptography. Because modular arithmetic is the most commonly used function in computational components, it is also true for quantum computing. Implementing modular multiplication of polynomials is a pressing technical challenge in quantum computing. Summary of the Invention

[0004] The purpose of the present invention is to provide a polynomial modular multiplication operator, an operation method and related devices, aiming to realize polynomial modular multiplication operations in quantum computing.

[0005] One embodiment of the present invention provides a polynomial modular multiplication operator, which is used to determine a modular multiplication result of a first polynomial and a second polynomial as input, where the module in the modular multiplication is a third polynomial. The polynomial modular multiplication operator includes n controlled adders and n-1 modular multiplication operators that are alternately cascaded, wherein:

[0006] The controlled adder is used to determine a when the quantum state of the control bit corresponding to it is the target quantum state. i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the output result of the second polynomial and the previous modular multiplication operator; each of the control bits is used to store the coefficient a of each degree term in the first polynomial i The quantum state of the first polynomial is no more than n-1;

[0007] The modular multiplication operator is used to determine a modular multiplication result of an output result of the previous controlled adder and a variable in the first polynomial, where the module in the modular multiplication operation is the third polynomial.

[0008] Optionally, the coefficients of the terms of each order in the first polynomial, the second polynomial and the third polynomial are elements on a binary field, and the controlled adder is used to determine the sum of the values of the second polynomial and the initial state when the quantum state of the corresponding control bit is |1>, or to determine the sum of the second polynomial and the output result of the previous modular multiplication operator.

[0009] Optionally, the coefficients of the first polynomial, the second polynomial and the third polynomial are elements on a multivariate field, and the controlled adder is used to determine a when the quantum state of the control bit corresponding to it is not |0> i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the second polynomial times the output result of the previous modular multiplication operator.

[0010] Optionally, each of the controlled adders is controlled in sequence by the quantum bits corresponding to the high-order coefficients to the low-order coefficients of the first polynomial; wherein, the first controlled adder is used to determine the sum of the numerical values of the second polynomial times the highest-order coefficient and the initial state when the quantum state corresponding to the highest-order coefficient of the first polynomial is the target quantum state; the controlled adders other than the first one are used to determine the sum of the second polynomial times the corresponding coefficients and the output result of the previous modular multiplication operator when the quantum states corresponding to other coefficients of the first polynomial are the target quantum state.

[0011] Optionally, the degrees of the first polynomial f(x) and the second polynomial g(x) are both N-1, and the degree of the third polynomial m(x) is n; the polynomial modular multiplication operator includes a first quantum register and a second quantum register, each of which includes n quantum bits; the quantum bits in the first quantum register are used to store the quantum state of the coefficient of each degree term in the first polynomial f(x), and the quantum bits in the second quantum register are used to store the quantum state of the coefficient of each degree term in the second polynomial g(x).

[0012] Optionally, the polynomial modular multiplication operator also includes a third quantum register, and each of the controlled adders is used to perform a CNOT gate operation on the quantum bits in the third quantum register when the quantum state of its corresponding control bit is |1>, so as to determine the sum of the quantum state of the coefficient of the second polynomial g(x) and the quantum state of the corresponding quantum bit in the third quantum register.

[0013] Optionally, the modular multiplication operator is used to perform a CNOT gate operation on the quantum bit corresponding to the i-1th coefficient in the third quantum register when the quantum state corresponding to the i-th coefficient of the third polynomial m(x) is |1>; and based on the order of the corresponding coefficients in the third quantum register from high to low, perform a SWAP gate operation on the quantum bits in the third quantum register in sequence; wherein the i-th bit is the non-highest bit and the non-lowest bit of the third polynomial m(x).

[0014] Optionally, the polynomial modular multiplication operator is used to determine a modular addition and modular multiplication result of the product of the first polynomial and the second polynomial and an input fourth polynomial, where the module in the modular addition and modular multiplication operation is the third polynomial, and the polynomial modular multiplication operator further includes n-1 modular division operators, wherein:

[0015] The modular division operator is arranged before the controlled adder and the modular multiplication operator to calculate a modular division result of the fourth polynomial and the third polynomial, where the modulus in the modular division operation is the third polynomial.

[0016] Optionally, the initial state of the quantum bits in the third quantum register is the quantum state of the coefficients of each degree term in the fourth polynomial, and the modular division operator is used to perform a SWAP gate operation on the quantum bits in the third quantum register in sequence based on the coefficients of the fourth polynomial from low to high; and when the quantum state corresponding to the i-th coefficient of the third polynomial is |1>, perform a CNOT gate operation on the quantum bit corresponding to the i-1-th coefficient of the fourth polynomial in the third quantum register; wherein the i-th bit is the non-highest bit and the non-lowest bit of the third polynomial.

[0017] Yet another embodiment of the present invention provides a polynomial modular multiplication method, the method comprising:

[0018] Obtaining the polynomial modular multiplication operator, the first polynomial, the second polynomial, and the third polynomial described in the above embodiment;

[0019] Inputting the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and running the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of the modular multiplication of the first polynomial and the second polynomial;

[0020] A modular multiplication result of the first polynomial and the second polynomial is determined based on a quantum state corresponding to the modular multiplication result.

[0021] Yet another embodiment of the present invention provides a polynomial modular multiplication device, the device comprising:

[0022] An acquisition module, configured to acquire the polynomial modular multiplication operator, the first polynomial, the second polynomial, and the third polynomial described in the above embodiment;

[0023] a computing module, configured to input the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and execute the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of the modular multiplication of the first polynomial and the second polynomial;

[0024] A determination module is used to determine a modular multiplication result of the first polynomial and the second polynomial based on the quantum state corresponding to the modular multiplication result.

[0025] Yet another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute the method described in the above embodiment when running.

[0026] Yet another embodiment of the present invention provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the method described in the above embodiment.

[0027] Compared with the prior art, the present invention provides a polynomial modular multiplication operator, operation method and related device, the polynomial modular multiplication operator is used to determine the modular multiplication result of the first polynomial and the second polynomial input, the module in the modular multiplication operation is a third polynomial; it includes n controlled adders and n-1 modular multiplication operators alternately cascaded, wherein: the controlled adder is used to determine a when the quantum state of the control bit corresponding to it is the target quantum state i The sum of the second polynomial times the value of the initial state, or, determine a i The sum of the second polynomial times the output of the previous modular multiplication operator; each control bit is used to store the coefficient a of each degree term in the first polynomial i The quantum state of the first polynomial is not greater than n-1; the modular multiplication operator is used to determine the modular multiplication result of the output result of the previous controlled adder and the variable in the first polynomial, and the module in the modular multiplication operation is the third polynomial.

[0028] By decomposing the polynomial modular multiplication operation into multiple iterative controlled addition operations and variable modular multiplication operations, and converting the above operation process into an executable quantum circuit, a polynomial modular multiplication operator was constructed, realizing the polynomial modular multiplication operation in quantum computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A network block diagram of a polynomial modular multiplication system provided by an embodiment of the present invention;

[0030] Figure 2 A schematic diagram of a polynomial modular multiplication operator provided by an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of a modular multiplication operator provided in an embodiment of the present invention;

[0032] Figure 4 A schematic diagram of another polynomial modular multiplication operator provided by an embodiment of the present invention;

[0033] Figure 5 A schematic diagram of a flow chart of a polynomial modular multiplication method provided in an embodiment of the present invention;

[0034] Figure 6 A schematic structural diagram of a polynomial modular multiplication operation device provided by an embodiment of the present invention;

[0035] Figure 7 A schematic structural diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limiting the present invention.

[0037] Figure 1 This is a network block diagram of a polynomial modular multiplication system provided by an embodiment of the present invention. The polynomial modular multiplication system may include a network 110, a server 120, a wireless device 130, a client 140, storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memory, classical processors, quantum processors, and other devices (not shown).

[0038] The network 110 is a medium for providing communication links between various devices and computers connected together in the polynomial modular multiplication operation system, including but not limited to the Internet, corporate intranet, local area network, mobile communication network and their combinations. The connection method can be wired, wireless communication links or optical fiber cables.

[0039] Server 120, wireless device 130, and client 140 are conventional data processing systems that may contain data and applications or software tools that perform conventional computing processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which may be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0040] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application 163 (application 173). The application 163 (application 173) may be used to implement a quantum algorithm compiled according to the polynomial modular multiplication method provided in an embodiment of the present invention.

[0041] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and similarly, any application program executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0042] It should be noted that a true quantum computer is a hybrid structure, which includes at least Figure 1 The system consists of two parts: the classical computing unit 160, which is responsible for performing classical calculations and control; and the quantum computing unit 170, which is responsible for running quantum programs and thus realizing quantum computing.

[0043] The classical computing unit 160 and quantum computing unit 170 can be integrated into a single device or distributed across two different devices. For example, a first device including the classical computing unit 160 runs a classical computer operating system, provides quantum application development tools and services, and also provides the storage and network services required for quantum applications. Users develop quantum programs using the quantum application development tools and services on the device, and send the quantum programs to a second device including the quantum computing unit 170 via the network services on the device. The second device runs a quantum computer operating system, which parses and compiles the code of the quantum program into instructions that can be recognized and executed by the quantum processor 170. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on the instructions.

[0044] The computing units of the classic processor 161 in the classic computing unit 160 are based on CMOS transistors on a silicon chip. These computing units are not constrained by time or coherence, meaning they are available at all times, regardless of the duration of their use. Furthermore, the number of these computing units on a silicon chip is plentiful. Currently, a classic processor 161 contains tens of thousands of computing units. This abundance of computing units and the selectable computational logic of the CMOS transistors are fixed, such as AND logic. When computing with CMOS transistors, a large number of CMOS transistors are combined with a limited number of logical functions to achieve the desired computational effect.

[0045] The basic computing unit of the quantum processor 171 in the quantum computing unit 170 is the qubit. The input of the qubit is limited by coherence and coherence time, that is, the qubit is limited by the length of use and is not available at any time. Making full use of the qubit within the available usage time of the qubit is a key problem in quantum computing. In addition, the number of qubits in a quantum computer is one of the representative indicators of the performance of the quantum computer. Each qubit realizes the computing function through the logical function configured on demand. Given the limited number of qubits, the logical functions in the field of quantum computing are diverse, such as: Hadamard gate (H gate), Pauli-X gate (X gate), Pauli-Y gate (Y gate), Pauli-Z gate (Z gate), X gate, RY gate, RZ gate, CNOT gate, CR gate, iSWAP gate, Toffoli gate, etc. During quantum computing, it is necessary to use limited qubits combined with a variety of logical functions to achieve the computing effect.

[0046] Based on these differences, the application of classical logic functions to the design of CMOS tubes and the application of quantum logic functions to the design of quantum bits are significantly and essentially different. The application of classical logic functions to the design of CMOS tubes does not require consideration of the individuality of the CMOS tubes. For example, the representation of CMOS tubes in silicon chips is the individual identification, position, and usable life of each CMOS tube. Therefore, the classical algorithms composed of classical logic functions only express the operational relationships of the algorithms, and do not express the algorithm's dependence on the individual CMOS tubes.

[0047] Quantum logic functions acting on qubits must consider their individuality, such as their position within the quantum chip, their individual identifier, their location, their relationship to surrounding qubits, and the usable lifespan of each qubit. Therefore, quantum algorithms composed of quantum logic functions not only express the algorithm's operational relationships but also its dependence on individual qubits.

[0048] Quantum chips can include qubits and channels that control them. Quantum logic gates are implemented using analog signals. Different combinations of analog signals are applied to qubits through the channels that control them, thereby realizing quantum circuits with different functions and completing data processing. Therefore, the design of quantum logic functions applied to qubits (including whether qubits are used and the efficiency of each qubit's use) is key to improving the computing performance of quantum computers and requires special design. This is also the uniqueness of quantum algorithms based on quantum logic functions, which are fundamentally and significantly different from classical algorithms based on classical logic functions. However, the above-mentioned qubit-specific design is a technical issue that ordinary computing devices do not need to consider or face.

[0049] The present invention proposes a polynomial modular multiplication operator, an operation method and related devices, aiming to realize polynomial modular multiplication operations in quantum computing.

[0050] An embodiment of the present invention provides a polynomial modular multiplication operator for determining a modular multiplication result of a first polynomial and a second polynomial inputted, where the module in the modular multiplication operation is a third polynomial. The polynomial modular multiplication operator includes n controlled adders and n-1 modular multiplication operators alternately cascaded, wherein:

[0051] The controlled adder is used to determine a when the quantum state of the control bit corresponding to it is the target quantum state. i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the output result of the second polynomial and the previous modular multiplication operator; each of the control bits is used to store the coefficient a of each degree term in the first polynomial i The quantum state of the first polynomial is no more than n-1;

[0052] The modular multiplication operator is used to determine a modular multiplication result of an output result of the previous controlled adder and a variable in the first polynomial, where the module in the modular multiplication operation is the third polynomial.

[0053] Specifically, the first polynomial input to the above-mentioned polynomial modular multiplication operator can be f(x), the second polynomial can be g(x), and the module in the modular multiplication operation can be a third polynomial m(x). Then, the above-mentioned polynomial modular multiplication operation can be expressed as a polynomial operation: f(x)*g(x)mod m(x).

[0054] In this embodiment, the degree of the first polynomial f(x) is no greater than N-1 and can be expressed as That is, f(x) = a n-1 x n-1 +a n-2 x n-2 +…+a1x+a0. First, decompose the calculation process of f(x)*g(x)mod m(x) above, and we can get:

[0055]

[0056] From this we can determine that the polynomial modular multiplication operation f(x)*g(x)modm(x) can be decomposed into n i Controlled addition operation and n-1 *x modular multiplication operations, accordingly, the polynomial modular multiplication operator requires n controlled adders and n-1 modular multiplication operators.

[0057] Then we can first calculate the coefficients a of each degree term in the first polynomial f(x) iThey are respectively encoded into the quantum state of the quantum bit. The encoding method can be commonly used basis encoding, angle encoding, amplitude encoding and the like, which are not specifically limited here.

[0058] For example, when the coefficient a i is an element on the binary field, that is, a i When it is equal to 1 or 0, the coefficient a can be encoded by basis coding. n-1 Encoded into the quantum state of the first control bit, the quantum state of the encoded control bit is |1> or |0>; correspondingly, when the coefficient a i When it is an element on a multivariate domain, we can first calculate the coefficient a of each term. i After normalization, the coefficients of the normalized terms are encoded into the amplitude of the quantum state through amplitude coding, which can be expressed as: cosθ|1>+sinθ|0>.

[0059] Through the above encoding method, the first group of n quantum bits can be used to encode the coefficients a of each order in the first polynomial f(x) respectively. n-1 、a n-2 , ..., a0, and obtain N control bits, which are used to control the N controlled adders. The controlled adder is used to determine A when the quantum state of its corresponding control bit is the target quantum state. i The sum of the second polynomial times the value of the initial state, or, determine a i The sum of the second polynomial times the value and the output result of the previous modular multiplication operator.

[0060] In one embodiment, a polynomial modular multiplication operator provided by an embodiment of the present invention can be as follows: Figure 2 As shown, the polynomial modular multiplication operator includes n controlled adders and n-1 modular multiplication operators that are alternately cascaded, wherein the box marked with "+" represents the controlled adder, the solid circle connected at the top represents the control bit, and the box marked with "*x" represents the modular multiplication operator.

[0061] Each of the controlled adders is sequentially controlled by the qubits corresponding to the first polynomial's high-order coefficients to the low-order coefficients. The first controlled adder is configured to, when the quantum state corresponding to the highest-order coefficient of the first polynomial is a target quantum state, determine the sum of the second polynomial times the highest-order coefficient and the initial state; and the controlled adders other than the first are configured to, when the quantum states corresponding to other coefficients of the first polynomial are target quantum states, determine the sum of the second polynomial times the corresponding coefficients and the output result of the preceding modular multiplication operator.

[0062] Specifically, store the coefficient a of the first polynomial f(x) n-1The control method of the control bit can be understood as follows: when the coefficient a n-1 When it is an element on the binary domain, the corresponding quantum state is |1>, which means that addition operation is required, and |0>, which means that no addition operation is required. When the coefficient a n-1 When it is an element on a multivariate domain, the corresponding quantum state is |0>, which means that no addition operation is required. Other quantum states indicate that addition operation is required.

[0063] Thus, the coefficients of each degree term of the second polynomial G(x) can be pre-encoded into the quantum state of the second group of quantum bits. Similarly, if the degree of the second polynomial g(x) is not greater than n-1, the coefficients b of each degree term of the second polynomial g(x) can be obtained by encoding with n quantum bits. i The first controlled adder can be in the f(x) coefficient a n-1 Under the control of the corresponding quantum state, calculate a n-1 The coefficients b of the second polynomial i The sum of the values of the initial state and the calculation results are stored in the third group of n quantum bits, where the initial states of the n quantum bits are all |0>. Then, the first controlled adder can output a when the quantum state of its corresponding control bit is the target quantum state. n-1 *The quantum state corresponding to g(x).

[0064] Furthermore, the first modular multiplication operator can calculate the modular multiplication result of the output result of the first controlled adder and the variable x in the first polynomial f(x), where the module in the modular multiplication operation is the third polynomial m(x), that is, calculate x(a n-1 *g(x)modm(x)), that is, calculate the remainder polynomial and output the quantum state corresponding to the calculation result.

[0065] Correspondingly, the second controlled adder can be n-2 Under the control of the corresponding quantum state, calculate a n-2 The coefficients b of the second polynomial i The sum of the quantum state output by the first modular multiplication operator is the calculation of a n-2 *g(x)+x(a n-1 *g(x)modm(x)), thereby outputting the corresponding quantum state.

[0066] Then, through the iterative calculation of the above-mentioned alternating cascade of n controlled adders and n-1 modular multiplication operators, the n-th controlled adder can calculate the sum of the quantum state of a0*g(x) and the output result of the n-1 modular multiplication operator. Then, finally, the above-mentioned polynomial modular multiplication operator can determine and output a0*g(x)+x(a1*g(x)+x(a2*g(x)+…+x(a n-2 *g(x)+x(a n-1 *g(x)mod m(x))mod m(x))mod m(x))…mod m(x) to obtain the modular multiplication result of f(x)*g(x)mod m(x), which is expressed as Figure 2 The quantum state output by the bottom n quantum bits is |f(x)*g(x)mod m(x)>.

[0067] In this embodiment, by decomposing the polynomial modular multiplication operation into multiple iterative controlled addition operations and variable modular multiplication operations, and converting the above operation process into an executable quantum circuit, a polynomial modular multiplication operator can be constructed using only 3n quantum bits, thereby realizing the polynomial modular multiplication operation in quantum computing.

[0068] As an implementation method of an embodiment of the present invention, the coefficients of the first polynomial, the second polynomial, and the third polynomial can be elements on a multivariate field, and the controlled adder is used to determine a when the quantum state of the control bit corresponding to it is not |0> i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the second polynomial times the output result of the previous modular multiplication operator.

[0069] Specifically, finite fields are an important foundation of cryptography, such as the Diffie-Hellman cryptographic algorithm on finite fields, the elliptic curve cryptography system on finite fields, and the application of binary field towers in block ciphers. Finite fields are generally divided into prime fields F in cryptographic applications. p and binary extension domain Binary extension domain It means constructing a new domain by adding two elements to a given domain F2, thereby expanding the original domain. p When the prime number p defined in is 2, F2 is a binary field. If a polynomial is a polynomial over a binary field, the coefficient of each term is an element over the binary field. Correspondingly, when a polynomial is a polynomial over a multivariate field, its coefficient has more possible values.

[0070] In one embodiment, if the coefficients of each order term in the first polynomial, the second polynomial, and the third polynomial are elements on a multivariate field, then amplitude coding can be used to encode the coefficients of each order term in the first polynomial and the second polynomial onto the amplitudes of the first group of quantum bits and the second group of quantum bits, respectively; if the amplitude of a certain control bit obtained by encoding is 0, that is, the quantum state is |0>, it means that the coefficient of a certain order term in the first polynomial corresponding to the control bit is 0, and the remaining quantum states all indicate that the coefficients are not 0.

[0071] Then, a third group of quantum bits with an initial state of |0> is used to store the calculation results of the intermediate calculation process. Then, the controlled adder can determine a when the quantum state of its corresponding control bit is not |0>. i The sum of the second polynomial times the value of the initial state, or, determine a i The sum of the second polynomial times the value and the output result of the previous modular multiplication operator.

[0072] In one embodiment, the controlled adder may include a quantum multiplier and a quantum adder. First, a is calculated by the quantum multiplier. i The quantum state of the product of the coefficients of each degree of the second polynomial is then added to the initial state |0> through a quantum adder, or added to the quantum state output by the previous modular multiplication operator, and the corresponding quantum state is input into the next modular multiplication operator.

[0073] Correspondingly, the modular multiplication operator can also include a quantum multiplier and a modular multiplication operation module. The quantum multiplier is used to calculate the product of the variable x and the input quantum state, and the modular multiplication operation module is used to calculate the modular multiplication of this product with the third polynomial and input the corresponding quantum state into the next controlled adder. The quantum states obtained by the above calculation process are all stored in the third group of quantum bits. Therefore, through iterative operations of the above controlled adder and modular multiplication operator, the nth controlled adder can ultimately output the quantum state |f(x)*g(x)mod m(x)>.

[0074] In this embodiment, when the coefficients of the first polynomial, the second polynomial, and the third polynomial are elements on a multivariate field, the polynomial modular multiplication operator can calculate a respectively by a quantum multiplier through amplitude coding and the like. i The product of the coefficients of each degree term of the second polynomial and the product of the variable x and the input quantum state solves the problem of polynomial modular multiplication over the multivariate field.

[0075] As an implementation method of an embodiment of the present invention, the coefficients of each order term in the above-mentioned first polynomial, second polynomial and third polynomial can be elements on a binary field, and the above-mentioned controlled adder is used to determine the sum of the numerical values of the second polynomial and the initial state when the quantum state of its corresponding control bit is |1>, or to determine the sum of the second polynomial and the output result of the previous modular multiplication operator.

[0076] Specifically, in some application scenarios of modular operations, for example, when designing Shor's algorithm to solve discrete logarithms on a binary field or discrete logarithms on elliptic curves on a binary field, it is necessary to implement related components such as modular addition, modular multiplication, and modular squaring on the binary field.

[0077] In one embodiment, if the coefficients of the first, second, and third polynomials are elements of a binary field, basis encoding can be used to encode the coefficients of the first and second polynomials onto the basis of the first and second groups of qubits, respectively. The quantum states of the encoded qubits are either |1> or |0>. When the quantum state of the control bit is |1>, the coefficient of a corresponding first-order term of the first polynomial is 1, requiring addition. Similarly, when the quantum state of the control bit is |0>, no addition is required.

[0078] As an implementation manner of an embodiment of the present invention, the degrees of the above-mentioned first polynomial f(x) and the second polynomial g(x) are both n-1, and the degree of the third polynomial m(x) is n; the above-mentioned polynomial modular multiplication operator includes a first quantum register and a second quantum register, each of which includes n quantum bits; the quantum bits in the first quantum register are used to store the quantum state of the coefficient of each degree term in the first polynomial f(x), and the quantum bits in the second quantum register are used to store the quantum state of the coefficient of each degree term in the second polynomial g(x).

[0079] Specifically, in field theory, a binary extension refers to the construction of a new field by adding two elements to a given field, thereby expanding the original field. Binary extensions play an important role in algebra and mathematical applications, especially in the study of polynomial equations and algebraic structures. By constructing appropriate binary extensions, complex mathematical problems can be solved.

[0080] For example, a commonly used representation method of binary extension domain can be expressed as follows:

[0081] Let F2[x] be a polynomial ring defined over the two-element field F2, whose elements are polynomials f(x)=a n x n +a n-1 x n -1+…+a1x+a0. Furthermore, the above polynomial ring F2[x] can be used to realize the binary expansion domain Where m(x) is an irreducible polynomial on the polynomial ring F2[x], the degree of m(x) is n (i.e. deg(m(x)=n), and ideal<m(x)> It can be a great ideal for F2[x].

[0082] Generally, the binary domain can be expanded Expressed as:

[0083] where a i =0 or 1, i=0,1,…,n-1}

[0084] In one embodiment, As an n-dimensional vector space defined on the binary field F2, and choosing {1,x,x 2 ,…,x n-1} as the binary extension domain A set of bases on , this set of bases is also called polynomial basis. Thus, the binary extension field The elements g(x) on the vector can be represented by a vector, that is, the polynomial g(x) = a n-1 x n-1 +a n-2 x n-2 +…+a1x+a0 is represented as a vector where a i = 0 or 1, i = 0, 1, ..., n-1. In quantum circuits, since polynomials are represented by arrays of {0, 1} vectors, they can be easily represented as quantum states. Therefore, the information of the polynomial can be conveniently encoded into the quantum state |1> or |0> of the qubit.

[0085] To calculate the binary extension The multiplication operation of two elements on , that is, to implement f(x)*g(x)mod m(x), where deg(f(x))=deg(g(x))≤n-1. Let Both have a i ,b i ,c i =0 or 1, i = 0, 1, ..., n-1. Since m(x) is an irreducible polynomial, its highest and lowest coefficients are 1, so c0 must be c n = 1. The modular polynomial m(x) can be represented by an n-dimensional array by default, and the highest bit is 1 by default.

[0086] Then, a first quantum register consisting of n qubits can be used to store the quantum states of the coefficients of each degree term in the first polynomial f(x), and a second quantum register consisting of n qubits can be used to store the quantum states of the coefficients of each degree term in the second polynomial g(x). Since these coefficients are all elements of a binary field, the following calculation rules apply: 0+0=0, 0+1=1, 1+0=1, 1+1=0. The addition of the arrays corresponding to these polynomials can be achieved through CNOT gate operations between quantum states; the *x modular multiplication operation on the g(x) array is equivalent to a left shift of the array followed by a modulo operation m(x).

[0087] As an implementation manner of an embodiment of the present invention, the above-mentioned polynomial modular multiplication operator also includes a third quantum register, and each of the controlled adders is used to perform a CNOT gate operation on the quantum bit in the third quantum register when the quantum state of its corresponding control bit is |1>, so as to determine the sum of the quantum state of the coefficient of the second polynomial g(x) and the quantum state of the corresponding quantum bit in the third quantum register.

[0088] Specifically, the third quantum register includes n quantum bits, all of which have an initial state of |0>, and the number of quantum bits included is the same as that of the second quantum register.

[0089] For each controlled adder, when the quantum state of the control bit of the controlled adder is |1>, it means that the quantum state of the coefficient of the second polynomial needs to be added to the quantum state of the quantum bit in the third quantum register. This addition operation can be completed by the following CNOT gate:

[0090] In the second and third quantum registers, a CNOT gate is applied to the qubit corresponding to each coefficient. The controlling bit of this CNOT gate is the qubit in the second quantum register, and the controlled bit is the corresponding qubit in the third quantum register. Thus, through n such CNOT gates, the sum of the quantum state of the coefficient of the second polynomial g(x) and the quantum state of the corresponding qubit in the third quantum register can be calculated. This calculation result can be stored in the qubit in the third quantum register and used as the quantum state of the next modular multiplication operator.

[0091] In this embodiment, the first and second polynomials are polynomial elements over a binary extension field, and the third polynomial is an irreducible polynomial over the corresponding polynomial ring. By expressing the coefficients of each degree term of the polynomial as a binary array, they can be conveniently encoded into a quantum state. Furthermore, when performing modular multiplication of polynomials, controlled addition between polynomials can be accurately and conveniently achieved through CNOT gate operations.

[0092] As an implementation manner of an embodiment of the present invention, the above-mentioned modular multiplication operator is used to perform a CNOT gate operation on the quantum bit corresponding to the i-1th coefficient in the third quantum register when the quantum state corresponding to the i-th coefficient of the third polynomial m(x) is |1>; and based on the order of the corresponding coefficients in the third quantum register from high to low, perform a SWAP gate operation on the quantum bits in the third quantum register in sequence; wherein the i-th bit is the non-highest bit and the non-lowest bit of the third polynomial m(x).

[0093] Specifically, the *x modular multiplication operation of the g(x) array is equivalent to the left shift of the array and then the modular multiplication of m(x). In the quantum circuit, it can be implemented by combining multiple CNOT gates and SWAP gates. First, the calculation process of x*g(x)mod m(x) is explained. Let Since m(x) is an irreducible polynomial, assume that there are coefficients c in t positions except the highest and lowest positions. i =1, the coefficient c will be 1 i Redefine as {c it}, obviously, t is an even number and less than n-1, and the calculation process of x*g(x)mod m(x) can be as follows:

[0094]

[0095] Then, we can use the non-zero i bits (the highest bit, excluding the lowest bit) of the modular polynomial (i.e., the third polynomial) to perform a controlled addition operation on the (i-1) bit of the second polynomial g(x), and then perform SWAP gate operations from left to right (i.e., from the high bit to the low bit of the calculation result of the addition operation).

[0096] For example, consider the polynomial g(x) = x^3 + x+1, and m(x) = x^4 + x^3 + x^2 + x+1. Since m(x) always has one more highest term than g(x) and the coefficient of the highest term is 1, when converted to a binary array, the polynomial can be represented using the binary array as g(x) = [1,0,1,1], m(x) = [1,1,1,1] (the highest bit is 1 by default and omitted). In this case, the coefficients of the g(x) and m(x) arrays completely correspond. The process for x*g(x) mod m(x) can be as follows:

[0097] It is known that the coefficients of the x^3, x^2, and x^0 terms of m(x) (except the highest and lowest terms which have been omitted) are all 1. Then, controlled addition operations are performed on the x^2, x^3, and x^0 terms of g(x) with respect to the coefficient of the x^3 term of g(x) (since the highest term of g(x) is the x^3 term, the coefficient of this term must be 1 at this time), and the array [1,1,0,0] is obtained.

[0098] Then swap the array [1,1,0,0] from left to back and get the result [1,0,0,1], which means that the polynomial obtained by x*g(x)mod m(x) is x^3+1.

[0099] In one embodiment, the structure of the modular multiplication operator corresponding to the calculation process in the above example can be as follows: Figure 3 As shown, the modular multiplication operator acts on 4 quantum bits, which are used to store the highest bit to the lowest bit of the calculation result of x*g(x)mod m(x) from top to bottom.

[0100] The initial state of the quantum bit in this quantum circuit is |0>. First, three X gates are used to evolve the initial state into the quantum state |1011> corresponding to the polynomial g(x) array [1,0,1,1].

[0101] Since the polynomial m(x) array [1,1,1,1] still has coefficients of 1 in the x^3, x^2, and x^0 terms, except for the highest and lowest terms, controlled addition operations must be performed on the x^2, x^3, and x^0 terms of g(x) in sequence. Therefore, the quantum state |1> corresponding to the highest bit of the polynomial g(x) array [1,0,1,1] (the highest term x^3) can be used to perform a CNOT gate operation on the lower-order qubits below, evolving the quantum state |1100>.

[0102] Finally, we perform SWAP gate operations on these four qubits in descending order of their corresponding coefficients, evolving the quantum state |1001>. This corresponds exactly to the array [1, 0, 0, 1] obtained from the classical calculation above.

[0103] In this embodiment, by combining multiple CNOT gates and SWAP gates, the modular multiplication operation of x*g(x)mod m(x) can be implemented through a quantum circuit with a low computational depth, thereby constructing a polynomial modular multiplication operator for quantum computing.

[0104] In one embodiment, Figure 4 As shown, the polynomial modular multiplication operator is used to determine the product of the first polynomial and the second polynomial, and the modular addition and modular multiplication result of the input fourth polynomial, the module in the modular addition and modular multiplication operation is the third polynomial, and the polynomial modular multiplication operator also includes n-1 modular division operators.

[0105] Wherein: the modular division operator is before the controlled adder and the modular multiplication operator, and is used to calculate the modular division result of the fourth polynomial and the third polynomial, and the modulus in the modular division operation is the third polynomial.

[0106] As an implementation method of an embodiment of the present invention, the initial state of the quantum bits in the third quantum register is the quantum state of the coefficients of each degree term in the fourth polynomial, and the modular division operator is used to perform a SWAP gate operation on the quantum bits in the third quantum register in sequence based on the coefficients of the fourth polynomial from low to high; and when the quantum state corresponding to the i-th coefficient of the third polynomial is |1>, the CNOT gate operation is performed on the quantum bit corresponding to the i-1-th coefficient of the fourth polynomial in the third quantum register; wherein the i-th bit is the non-highest bit and the non-lowest bit of the third polynomial.

[0107] Specifically, in order to realize the polynomial modular addition and modular multiplication operation in quantum computing, that is, h(x)+f(x)*g(x)mod m(x), we can set Then the specific implementation formula of the above polynomial modular addition and modular multiplication is:

[0108]

[0109] Then, if the initial state of the qubits in the third quantum register is set to the quantum state of the coefficients of each degree term in the fourth polynomial h(x), h(x) can be divided by x before performing the above polynomial modular multiplication operation f(x)*g(x)mod m(x). n-1 The modular operation is performed by calculating the modular division result of the fourth polynomial h(x) and the third polynomial m(x) through the modular division operator, and then calculating the modular multiplication result of the first polynomial f(x) and the second polynomial g(x) through the polynomial modular multiplication operator in the above embodiment, so as to obtain the quantum state of the polynomial modular addition and modular multiplication result |h(x)+f(x)*g(x)mod m(x).

[0110] The above modular division operator is set before the controlled adder and modular multiplication operator. n-1 The modular operation is the inverse of the *x operation, meaning that h(x) must be divided by x n-1 times, with the modulus being the third polynomial m(x). In contrast to the modular multiplication circuit described above, the modular division circuit performs SWAP gate operations on the qubits in the third quantum register sequentially, based on the coefficients of the fourth polynomial in ascending order. Furthermore, when the quantum state corresponding to the i-th bit (i-th bit is the non-highest bit or non-lowest bit of the third polynomial) of the third polynomial is |1>, a CNOT gate operation is performed on the qubit corresponding to the i-1th bit of the fourth polynomial in the third quantum register. The structure, principle, and specific construction of this quantum circuit are similar to those of the modular multiplication circuit described above and will not be further elaborated here.

[0111] In this embodiment, by combining multiple SWAP gates and CNOT gates, the construction of the modular division operator can be realized through a quantum circuit with a low computational depth, thereby further expanding the scope of application of the polynomial modular multiplication operator in the embodiment of the present invention. It can be used to determine the results of polynomial modular addition and modular multiplication operations in quantum computing, and can better solve some problems of modular operations.

[0112] like Figure 5 As shown, an embodiment of the present invention further provides a polynomial modular multiplication method, which may include the following steps:

[0113] Step 501: Obtain the polynomial modular multiplication operator, the first polynomial, the second polynomial, and the third polynomial described in the above embodiment;

[0114] Step 502: Inputting the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and running the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of modular multiplication of the first polynomial and the second polynomial;

[0115] Step 503: Determine a modular multiplication result of the first polynomial and the second polynomial based on the quantum state corresponding to the modular multiplication result.

[0116] Specifically, in some embodiments, a fourth polynomial can also be obtained, and based on the polynomial modular addition and modular multiplication operation method provided in the above embodiments, the product of the first polynomial and the second polynomial and the modular addition and modular multiplication operation result of the input fourth polynomial are determined. The module in the modular addition and modular multiplication operation is the third polynomial, which will not be repeated here.

[0117] See also Figure 6 , Figure 6 An embodiment of the present invention provides a polynomial modular multiplication operation device, the device comprising:

[0118] An acquisition module 601 is configured to acquire the polynomial modular multiplication operator, the first polynomial, the second polynomial, and the third polynomial described in the above embodiment;

[0119] a calculation module 602, configured to input the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and execute the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of the modular multiplication of the first polynomial and the second polynomial;

[0120] The determination module 603 is configured to determine a result of the modular multiplication of the first polynomial and the second polynomial based on the quantum state corresponding to the modular multiplication result.

[0121] Regarding the specific functions and effects achieved by the polynomial modular multiplication operation method and operation device, please refer to other embodiments of this specification for reference and explanation, and will not be repeated here. The various modules in the polynomial modular multiplication operation device can be implemented in whole or in part by software, hardware, or a combination thereof. The modules can be embedded in or independent of the processor in the computer device in hardware form, or can be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above modules.

[0122] See also Figure 7 The embodiment of this specification also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the polynomial modular multiplication method in the above embodiment when executing the computer program. Figure 7 , the computer device may be a classical computer, or the computer device may be a quantum computer.

[0123] The embodiments of this specification also provide a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a computer, the computer executes the polynomial modular multiplication method in the above embodiment.

[0124] The embodiments of this specification also provide a computer program product including instructions, which, when executed by a computer, enables the computer to perform the polynomial modular multiplication method in the above embodiment.

[0125] It should be understood that the specific examples in this specification are only intended to help those skilled in the art better understand the implementation methods of this specification, rather than to limit the scope of the present invention.

[0126] It can be understood that in the various implementations of this specification, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the implementation methods of this specification.

[0127] It can be understood that the various embodiments described in this specification can be implemented individually or in combination, and the embodiments in this specification are not limited to this.

[0128] Unless otherwise indicated, all technical and scientific terms used in the embodiments of this specification have the same meaning as those commonly understood by those skilled in the art in the technical field of this specification. The terms used in this specification are only for the purpose of describing specific embodiments and are not intended to limit the scope of this specification. The term "and / or" used in this specification includes any and all combinations of one or more related listed items. The singular forms "a", "above", and "the" used in the embodiments of this specification and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0129] It is understood that the processor in the embodiments of this specification can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiment can be completed by hardware integrated logic circuits in the processor or software instructions. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The various methods, steps, and logic block diagrams disclosed in the embodiments of this specification can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this specification can be directly implemented as being executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0130] It will be understood that the memory in the embodiments of this specification may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0131] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this specification.

[0132] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, devices and units can refer to the corresponding processes in the aforementioned method implementation methods and will not be repeated here.

[0133] In the several embodiments provided in this specification, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0134] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of this embodiment.

[0135] In addition, each functional unit in each embodiment of this specification may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0136] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this specification, or the part that contributes to the prior art, or the part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of this specification. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0137] The above description is merely a specific embodiment of this specification, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this specification should be included within the scope of protection of this specification. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A polynomial modular multiplication operator, characterized in that: The polynomial modular multiplication operator is used to determine the modular multiplication result of the input first polynomial and the second polynomial, where the module in the modular multiplication operation is the third polynomial; it includes n controlled adders and n-1 modular multiplication operators that are alternately cascaded, wherein: The controlled adder is used to determine a when the quantum state of the control bit corresponding to it is the target quantum state. i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the output result of the second polynomial and the previous modular multiplication operator; each of the control bits is used to store the coefficient a of each degree term in the first polynomial i The quantum state of the first polynomial is no more than n-1; The modular multiplication operator is used to determine a modular multiplication result of an output result of the previous controlled adder and a variable in the first polynomial, where the module in the modular multiplication operation is the third polynomial.

2. The polynomial modular multiplication operator according to claim 1, wherein: The coefficients of the terms of the first polynomial, the second polynomial, and the third polynomial are elements on a binary field. The controlled adder is used to determine the sum of the values of the second polynomial and the initial state when the quantum state of the corresponding control bit is |1>, or to determine the sum of the second polynomial and the output result of the previous modular multiplication operator.

3. The polynomial modular multiplication operator according to claim 1, wherein: The coefficients of the first polynomial, the second polynomial and the third polynomial are elements on a multivariate field, and the controlled adder is used to determine a when the quantum state of the control bit corresponding to it is not |0> i times the sum of the second polynomial and the value of the initial state, or, determine a i The sum of the second polynomial times the output result of the previous modular multiplication operator.

4. The polynomial modular multiplication operator according to claim 1, wherein: Each of the controlled adders is controlled in sequence by the quantum bits corresponding to the high-order coefficients to the low-order coefficients of the first polynomial; wherein the first controlled adder is used to determine the sum of the numerical values of the second polynomial times the highest-order coefficient and the initial state when the quantum state corresponding to the highest-order coefficient of the first polynomial is the target quantum state; the controlled adders other than the first one are used to determine the sum of the second polynomial times the corresponding coefficients and the output result of the previous modular multiplication operator when the quantum states corresponding to other coefficients of the first polynomial are the target quantum state.

5. The polynomial modular multiplication operator according to claim 2, wherein: The degrees of the first polynomial f(x) and the second polynomial g(x) are both n-1, and the degree of the third polynomial m(x) is n; the polynomial modular multiplication operator includes a first quantum register and a second quantum register, each of which includes n quantum bits; the quantum bits in the first quantum register are used to store the quantum state of the coefficient of each degree term in the first polynomial f(x), and the quantum bits in the second quantum register are used to store the quantum state of the coefficient of each degree term in the second polynomial g(x).

6. The polynomial modular multiplication operator according to claim 5, wherein: The polynomial modular multiplication operator also includes a third quantum register, and each of the controlled adders is used to perform a CNOT gate operation on the quantum bit in the third quantum register when the quantum state of its corresponding control bit is |1<, so as to determine the sum of the quantum state of the coefficient of the second polynomial g(x) and the quantum state of the corresponding quantum bit in the third quantum register.

7. The polynomial modular multiplication operator according to claim 6, wherein: The modular multiplication operator is configured to perform a CNOT gate operation on the quantum bit corresponding to the i-1th coefficient in the third quantum register when the quantum state corresponding to the i-th coefficient of the third polynomial m(x) is |1>; and sequentially perform a SWAP gate operation on the quantum bits in the third quantum register based on the order of the corresponding coefficients in the third quantum register from high to low; wherein the i-th bit is a non-highest bit and a non-lowest bit of the third polynomial m(x).

8. The polynomial modular multiplication operator according to claim 6, wherein: The polynomial modular multiplication operator is used to determine a modular addition and modular multiplication result of the product of the first polynomial and the second polynomial and an input fourth polynomial, where the module in the modular addition and modular multiplication operation is the third polynomial. The polynomial modular multiplication operator further includes n-1 modular division operators, wherein: The modular division operator is arranged before the controlled adder and the modular multiplication operator to calculate a modular division result of the fourth polynomial and the third polynomial, where the modulus in the modular division operation is the third polynomial.

9. The polynomial modular multiplication operator according to claim 8, wherein: The initial state of the quantum bits in the third quantum register is the quantum state of the coefficients of each degree term in the fourth polynomial. The modular division operator is used to sequentially perform a SWAP gate operation on the quantum bits in the third quantum register based on the coefficients of the fourth polynomial in ascending order; and when the quantum state corresponding to the i-th coefficient of the third polynomial is |1>, perform a CNOT gate operation on the quantum bit corresponding to the i-1-th coefficient of the fourth polynomial in the third quantum register; wherein the i-th bit is a non-highest bit and a non-lowest bit of the third polynomial.

10. A polynomial modular multiplication method, characterized in that: The method comprises: Obtaining the polynomial modular multiplication operator according to any one of claims 1 to 9, the first polynomial, the second polynomial, and the third polynomial; Inputting the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and running the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of the modular multiplication of the first polynomial and the second polynomial; A modular multiplication result of the first polynomial and the second polynomial is determined based on a quantum state corresponding to the modular multiplication result.

11. A polynomial modular multiplication device, characterized in that: The device comprises: An acquisition module, configured to acquire the polynomial modular multiplication operator, the first polynomial, the second polynomial, and the third polynomial according to any one of claims 1 to 9; a computing module, configured to input the first polynomial, the second polynomial, and the third polynomial into the polynomial modular multiplication operator, and execute the polynomial modular multiplication operator to obtain a quantum state corresponding to a result of the modular multiplication of the first polynomial and the second polynomial; A determination module is used to determine a modular multiplication result of the first polynomial and the second polynomial based on the quantum state corresponding to the modular multiplication result.

12. A storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program is configured to execute the method according to claim 10 when executed.

13. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to perform the method of claim 10 .

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