Multi-frequency electromagnetic wave signal characteristic test system based on delay line and electronically tunable filter

Abstract

The present invention belongs to the field of microwave measurement applications, and specifically relates to a multi-frequency electromagnetic wave signal characteristic testing system based on a delay line and an electrically tunable filter. The system uses the highest power level signal in each level signal test link as the frequency division characteristic. The system uses the delay line to allow the electrical signal to be tested in different levels of the test link to reach the electrically tunable filter after the previous level test link has completed its work. The electrically tunable filter then filters out the tested signal. Finally, the signal characteristic test circuit tests the signal to be tested with the highest power level in the filtered signal. After the test is completed, the FPGA controls the electrically tunable filter in the next level link to change its stopband to the signal frequency measured in the previous level. This cycle continues until all links have completed their work, and the same number of signals as the number of links can be measured. This achieves frequency division testing of multi-frequency signals, with the advantages of wide test bandwidth and fast test speed.

Description

Technical Field

[0001] The present invention belongs to the field of microwave measurement applications, and in particular relates to a multi-frequency electromagnetic wave signal characteristic testing system based on a delay line and an electrically tunable filter. Background Art

[0002] In modern warfare, each participant employs a large number of electronic weapons and jamming devices, flooding the battlefield with unknown electromagnetic signals. These electromagnetic signals of varying frequencies, each with distinct characteristics, can significantly impact the normal operation of equipment, leading to the emergence of numerous anti-interference methods. Identifying interference signals is fundamental to the entire anti-interference process. Currently, identifying interference signals still relies on operator experience. However, in complex battlefield electronic environments, relying solely on human intervention to identify interference signals is difficult and inefficient, inevitably hindering the smooth progress of anti-interference efforts. Therefore, in this complex environment with numerous multi-frequency signals, how to quickly identify and perform frequency-separation testing on these signals remains a pressing challenge. Summary of the Invention

[0003] In response to the problems existing in the above-mentioned prior art, the present invention proposes a multi-frequency electromagnetic wave signal characteristic testing system based on delay lines and electronically tunable filters to solve the problem of frequency division testing of multi-frequency electromagnetic wave signals in complex and changeable electromagnetic environments, and has the advantages of wide test bandwidth and fast test speed.

[0004] In order to solve the above problems, the present invention adopts the following technical solutions:

[0005] A multi-frequency electromagnetic wave signal characteristic test system based on a delay line and an electrically tunable filter, comprising: a receiving antenna, a 1-to-N main power splitter, and an N-channel signal test link;

[0006] The receiving antenna receives complex electromagnetic waves from free space and converts them into electrical signals;

[0007] The input end of the 1-to-N main power splitter is connected to the receiving antenna, and the N output ends are connected one-to-one with the N signal test links; it is used to split the received electrical signal into N paths and transmit them to the corresponding signal test links to perform characteristic testing of the multi-frequency signal;

[0008] The N-way signal test link corresponds to an N-level signal test link, and the first-level signal test link includes a first signal feature extraction circuit and a first FPGA controller connected in sequence; the second to N-level signal test links in the N-level signal test link have the same structure and include delay lines connected in sequence. 、 An electrically tunable filter, a second signal feature extraction circuit, and a second FPGA controller.

[0009] Furthermore, the N-level signal test link implements frequency division testing of multi-frequency electromagnetic wave signals using the following method:

[0010] The first-level signal test link extracts the signal feature with the highest power level from the received electrical signal by the first signal feature extraction circuit and calculates its corresponding frequency. The signal frequency with the highest power level is sent to the first FPGA controller. The first FPGA controller controls the stopband center frequency of the next-level electrically tunable filter to change to the received signal frequency with the highest power level, thus completing the first-level signal test link.

[0011] The second-level to N-1-level signal test link first uses a delay line to delay the received electrical signal so that it arrives at the electrically tunable filter after the previous-level signal test link completes its work; the electrically tunable filter filters out the signal with the tested frequency in the electrical signal according to the stopband center frequency formed under the control of the FPGA controller in the previous-level signal test link, and sends it to the second signal feature extraction circuit; the second signal feature circuit extracts the signal feature with the highest power level from the residual signal after filtering out the signal with the tested frequency and obtains its frequency, and then sends the signal frequency with the highest power level in the residual signal to the second FPGA controller to control the stopband center frequency of the next-level electrically tunable filter to change to this frequency;

[0012] The test process of the received electrical signal in the Nth-level signal test link is the same as the test process of the second-level to N-1th-level signal test links. The only difference is that after the second feature extraction circuit in this level of signal test link extracts the feature of the Nth signal, it no longer passes the frequency of the signal to the FPGA controller, and the feature test of the entire multi-frequency signal to be tested is completed.

[0013] Furthermore, the first feature extraction circuit and the second feature extraction circuit have the same structure, and both include: a first sub-power splitter, an action link, a holding link, a mixer, and a signal analysis module;

[0014] The first sub-power splitter receives the electrical signal to be tested, and is used to split the received electrical signal to be tested into two signals with the same power and characteristics, and send them to the action link and the holding link respectively;

[0015] The action link includes a second sub-power splitter, a first detector, a frequency response device, a second detector, a data processing center, a sub-FPGA controller and an agile frequency synthesizer; the second sub-power splitter receives one of the electrical signals to be tested sent by the first sub-power splitter, and equally divides it into two signals with the same characteristics, and sends them to the first detector and the frequency response device respectively; the detector is used to measure the amplitude of the signal with the highest power level in the action path signal, and generate a first voltage signal to be sent to the data processing center; the insertion loss of the frequency response device is monotonically related to the frequency of the signal with the highest power level in the electrical signal to be tested, and is used to attenuate the received action path signal and send the attenuated action path signal to the second detector; the second detector The filter is used to test the amplitude of the signal with the highest power level in the attenuated active path signal, and generate a second voltage signal to be sent to the data processing center; the data processing center calculates the insertion loss of the frequency response device based on the first voltage signal, the second voltage signal, the insertion loss, and the frequency of the signal with the highest power level in the electrical signal to be measured, and then performs an approximate calculation based on the insertion loss of the frequency response device to obtain the operating frequency of the signal with the highest power level in the active path and sends it to the sub-FPGA controller; the sub-FPGA controller controls the agile frequency synthesizer to generate a signal with the same frequency as the approximately calculated signal based on the received operating frequency of the signal with the highest power level in the active path, and sends the signal as the local oscillator signal to the mixer;

[0016] The holding link includes a sub-delay line, which is used to delay the received electrical signal to be tested from another path so that the time it takes to reach the mixer is the same as the total time consumed by the action link; the delayed electrical signal to be tested is sent to the mixer as a radio frequency signal;

[0017] The mixer mixes the received local oscillator signal and the radio frequency signal into an intermediate frequency signal, and sends the intermediate frequency signal to the signal analysis module for analysis and processing to obtain the signal's frequency, waveform, modulation mode and other characteristics.

[0018] The present invention utilizes a multi-frequency electromagnetic wave signal characteristic testing system based on delay lines and electrically tunable filters. This system uses power as the frequency division characteristic to test the frequency division characteristics of multi-frequency unknown electromagnetic wave signals. Delay lines ensure that the signals to be tested in different test links arrive at the electrically tunable filters only after the previous test link has completed its operation. The electrically tunable filters then filter out the previously tested signals. Finally, a signal characteristic testing circuit tests the signal to be tested with the highest power level among the filtered signals. After the test is complete, an FPGA controls the electrically tunable filters in the next link to shift their stopband to the frequency of the previously measured signal. This cycle continues until all links have completed their operation, resulting in the measurement of a number of signals equal to the number of links. This system tests and separates signals one by one in descending power level order, achieving frequency division testing of multi-frequency signals. This system offers the advantages of wide test bandwidth and high test speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the structural block diagram of the signal feature extraction circuit;

[0020] Figure 2 This is a circuit structure block diagram of a multi-frequency electromagnetic wave signal characteristic test system based on a delay line and an electrically tunable filter provided by the present invention;

[0021] Reference numerals:

[0022] 1. First sub-power divider, 2. Second sub-power divider, 3. First detector, 4. Frequency response device, 5. Second detector, 6. Data processing center, 7. Sub-FPGA, 8. Agile frequency synthesizer, 9. Sub-delay line, 10. Mixer, 11. Signal analysis module, 12. Receiving antenna, 13. Main power divider, 14. First signal feature extraction circuit, 15. First FPGA, 16. First delay line, 17. First electrically tunable filter, 18. Second signal feature extraction circuit, 19. Second FPGA, 20. N-1 stage delay line, 21. N-1 stage electrically tunable filter, 22. N-stage signal feature extraction circuit. DETAILED DESCRIPTION

[0023] In order to make the objects, technical solutions and advantages of the present invention clearer, the various exemplary embodiments to be described below will refer to the corresponding drawings, which constitute a part of the exemplary embodiments, in which various exemplary embodiments that may be used to implement the present invention are described. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation methods described in the following exemplary embodiments do not represent all implementation methods consistent with the present disclosure. It should be understood that they are only examples of processes, methods and devices that are consistent with some aspects of the present disclosure as detailed in the appended claims, and other embodiments may also be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and essence of the present invention.

[0024] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", etc. indicate the orientation or position relationship based on the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the elements referred to must have a specific orientation, be constructed and operate in a specific orientation. The terms "first", "second", etc. are only used for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "plurality" means two or more. The terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0025] In order to illustrate the technical solution of the present invention, a specific embodiment is provided below, in which only the parts related to the embodiment of the present invention are shown.

[0026] This embodiment provides a multi-frequency electromagnetic wave signal characteristic testing system based on a delay line and an electrically tunable filter, such as Figure 2 The figure shows: a receiving antenna, a 1-to-N main power splitter and an N-way signal test link. The receiving antenna receives complex electromagnetic waves from free space and converts them into electrical signals. The input end of the 1-to-N main power splitter is connected to the receiving antenna, and the N-way output ends are connected one-to-one with the N-way signal test links; it is used to divide the received electrical signal into N paths and transmit them to the corresponding signal test links to perform characteristic testing of multi-frequency signals. The N-way signal test link corresponds to an N-level signal test link, and the first-level signal test link includes a first signal feature extraction circuit and a first FPGA controller connected in sequence; the second to N-level signal test links in the N-level signal test link have the same structure, and both include delay lines connected in sequence 、 An electrically tunable filter, a second signal feature extraction circuit, and a second FPGA controller.

[0027] The first signal feature extraction circuit and the second signal feature extraction circuit have the same structure and are used to extract the signal feature with the highest power level in the electrical signal to be measured. This embodiment provides a specific implementation block diagram. Figure 1 As shown: it includes: a first sub-power divider, an action link, a holding link, a mixer and a signal analysis module.

[0028] The input of the first sub-power splitter receives the electrical signal to be measured, and its output is connected to the action link and the holding link, respectively. The action link includes a second sub-power splitter, a first detector, a frequency response device, a second detector, a data processing center, a sub-FPGA controller, and an agile frequency synthesizer. The input of the second sub-power splitter is connected to one of the outputs of the first sub-power splitter, and its output is connected to the input of the first detector and the input of the frequency response device, respectively. The output of the first detector is connected to the data processing center; the output of the frequency response device is connected to the data processing center via the second detector; and the output of the data processing center is connected to the first input of the mixer, in sequence, via the sub-FPGA controller and the control agile frequency synthesizer.

[0029] The holding link comprises a sub-delay line, the input of the sub-delay line is connected to the other output of the first sub-power divider, and the output of the sub-delay line is connected to the second input of the mixer. The output of the mixer is connected to the analysis module.

[0030] The method for performing multi-frequency electromagnetic wave signal characteristic testing using the above-mentioned test system includes the following steps:

[0031] Step 1: After powering on, the test system begins operation. The receiving antenna converts electromagnetic waves from free space into electrical signals, which are then transmitted to the main power splitter. The main power splitter splits the signals into multiple paths and transmits them to subsequent links. Each link, starting with the first link, tests the multi-frequency electromagnetic signals in descending order of power, determining the characteristics of each frequency. The entire test system concludes after the final link is tested. The test results are stored in the signal analysis module within the signal feature extraction circuitry of each link.

[0032] Step 2: After the test system is finished, it will automatically shut down.

[0033] The above-described embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above-described embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A multi-frequency electromagnetic wave signal characteristic testing system based on a delay line and an electrically tunable filter, comprising: Receiving antenna, 1-to-N main power splitter and N-channel signal test link, characterized by: The receiving antenna receives complex electromagnetic waves from free space and converts them into electrical signals; The input end of the 1-to-N main power splitter is connected to the receiving antenna, and the N output ends are connected one-to-one with the N signal test links; it is used to split the received electrical signal into N paths and transmit them to the corresponding signal test links to perform characteristic testing of the multi-frequency signal; The N-channel signal test links correspond to N-level signal test links, and the first-level signal test link includes a first signal feature extraction circuit and a first FPGA controller connected in sequence; the second to N-level signal test links in the N-level signal test links have the same structure, and all include a delay line, an electronically tunable filter, a second signal feature extraction circuit, and a second FPGA controller connected in sequence.

2. The multi-frequency electromagnetic wave signal characteristic testing system based on a delay line and an electrically tunable filter according to claim 1, characterized in that: The N-level signal test link uses the following method to implement frequency division testing of multi-frequency electromagnetic wave signals: The first-level signal test link extracts the signal feature with the highest power level from the received electrical signal by the first signal feature extraction circuit, and calculates its corresponding frequency; The signal frequency with the highest power level is sent to the first FPGA controller. The first FPGA controller controls the stopband center frequency of the next-stage electrically tunable filter to change to the received signal frequency with the highest power level, and the first-stage signal test link is completed. The second-level to N-1-level signal test link first uses a delay line to delay the received electrical signal so that it arrives at the electrically tunable filter after the previous-level signal test link completes its work; the electrically tunable filter filters out the signal with the tested frequency in the electrical signal according to the stopband center frequency formed under the control of the FPGA controller in the previous-level signal test link, and sends it to the second signal feature extraction circuit; the second signal feature circuit extracts the signal feature with the highest power level from the residual signal after filtering out the signal with the tested frequency and obtains its frequency, and then sends the signal frequency with the highest power level in the residual signal to the second FPGA controller to control the stopband center frequency of the next-level electrically tunable filter to change to this frequency; The test process of the received electrical signal in the Nth-level signal test link is the same as the test process of the second-level to N-1th-level signal test links. The only difference is that after the second feature extraction circuit in this level of signal test link extracts the feature of the Nth signal, it no longer passes the frequency of the signal to the FPGA controller, and the feature test of the entire multi-frequency signal to be tested is completed.

3. The multi-frequency electromagnetic wave signal feature testing system based on a delay line and an electrically tunable filter according to claim 1 or 2, wherein the first signal feature extraction circuit and the second signal feature extraction circuit are the same and both comprise: a first sub-power splitter, an action link, a holding link, a mixer, and a signal analysis module; The first sub-power splitter receives the electrical signal to be tested, and is used to split the received electrical signal to be tested into two signals with the same power and characteristics, and send them to the action link and the holding link respectively; The action link includes a second sub-power splitter, a first detector, a frequency response device, a second detector, a data processing center, a sub-FPGA controller, and an agile frequency synthesizer; the second sub-power splitter receives one of the electrical signals to be tested sent by the first sub-power splitter, and equally divides the signal into two signals with the same characteristics, which are respectively sent to the first detector and the frequency response device; the detector is used to measure the amplitude of the signal with the highest power level in the action signal, and generate a first voltage signal to be sent to the data processing center; The insertion loss of the frequency response device is monotonically related to the frequency of the signal with the highest power level in the electrical signal to be measured, and is used to attenuate the received active path signal and send the attenuated active path signal to the second detector; The second detector is used to measure the amplitude of the signal with the highest power level in the attenuated action path signal, and generate a second voltage signal to be sent to the data processing center; The data processing center calculates the insertion loss of the frequency-response device based on the first voltage signal, the second voltage signal, the insertion loss, and the frequency of the signal with the highest power level in the electrical signal to be measured. The data processing center then performs an approximate calculation based on the insertion loss of the frequency-response device to obtain the operating frequency of the signal with the highest power level in the active path, and sends the calculated frequency to the sub-FPGA controller. The sub-FPGA controller controls the agile frequency synthesizer to generate a signal with the same frequency as the approximately calculated frequency based on the received operating frequency of the signal with the highest power level in the active path, and sends the signal as a local oscillator signal to the mixer. The holding link includes a sub-delay line, which is used to delay the received electrical signal to be tested from another path so that the time it takes to reach the mixer is the same as the total time consumed by the action link; the delayed electrical signal to be tested is sent to the mixer as a radio frequency signal; The mixer mixes the received local oscillator signal and the radio frequency signal into an intermediate frequency signal, and sends the intermediate frequency signal to the signal analysis module for analysis and processing to obtain the frequency, waveform, and modulation characteristics of the signal.

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