System and method for caching in storage devices
By employing a shared page cache data structure and a machine learning system for file grouping in the storage device, the problem of uneven cache hit rate was solved, resulting in a higher cache hit rate and performance improvement.
Patent Information
- Application Number
- CN202310707214.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-08-04
- Filing Date
- 2023-06-15
- Publication Date
- 2025-12-23
- Estimated Expiration
- 2043-06-15
AI Technical Summary
In existing technologies, the cache hit rate of files is affected by whether the file is a private file or a shared file, resulting in significant performance differences, especially with limited performance improvement in the case of shared files.
A shared page cache data structure is adopted, which groups multiple files into inode groups. A machine learning system is used to make file grouping decisions to improve cache hit rate.
It significantly improved cache hit rate, increasing it from 47% for private files to over 90% for shared files, thereby improving the performance of applications running on the host.
Smart Images

Figure CN117251105B_ABST
Abstract
Description
[0001] Cross Reference to Related Applications
[0002] This application claims priority to and the benefit of U.S. Provisional Application No. 63 / 352,976, filed June 16, 2022, entitled “SYSTEM AND METHOD TO IMPROVE FILE CACHE HIT RATE BY GROUPING FILES,” the entire contents of which are incorporated herein by reference. TECHNICAL FIELD
[0003] One or more aspects of embodiments according to the present disclosure relate to computing systems, and more specifically, to systems and methods for caching in storage devices. BACKGROUND
[0004] When data is read from persistent storage by a host, the host can cache the data in host memory, and in some cases, the host can prefetch data. The extent to which data is cached can impact cache hit rate (the fraction of cache read accesses that are successful) and the performance of applications running on the host.
[0005] This is about the general technical environment related to aspects of the present disclosure. SUMMARY
[0006] According to embodiments of the present disclosure, a method for caching is provided, comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; and adding a second pointer to the first data structure, the second pointer pointing to the second page of data.
[0007] In some embodiments, the method further comprises: modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure.
[0008] In some embodiments, the method further comprises: flushing the first page to the first file; and moving the first pointer to the first data structure.
[0009] In some embodiments, the first thread is a member of a first control group, and the second thread is a member of the first control group.
[0010] In some embodiments, the page cache is part of a memory budget of the first control group.
[0011] In some embodiments, the first file is within a first directory, and the second file is within the first directory.
[0012] In some embodiments, the method further comprises receiving, from the second thread, a request to group the second file with the first file.
[0013] In some embodiments, the method further comprises opening, by the first thread, a third file; reading a third page of data from the third file into the page cache; and adding a pointer to the third page of data to the first data structure.
[0014] In some embodiments, the method further comprises receiving, from the first thread, a request to group the third file with the first file.
[0015] According to embodiments of the present disclosure, there is provided a system for caching, comprising: processing circuitry; and a memory operatively connected to the processing circuitry and storing instructions that, when executed by the processing circuitry, cause the system to perform a method comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; and adding a second pointer to the first data structure, the second pointer pointing to the second page of data.
[0016] In some embodiments, the method further comprises modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure.
[0017] In some embodiments, the method further comprises flushing the first page to the first file; and moving the first pointer to the first data structure.
[0018] In some embodiments, the first thread is a member of a first control group and the second thread is a member of the first control group.
[0019] In some embodiments, the page cache is part of a memory budget of the first control group.
[0020] In some embodiments, the first file is within a first directory and the second file is within the first directory.
[0021] In some embodiments, the method further comprises receiving, from the second thread, a request to group the second file with the first file.
[0022] In some embodiments, the method further comprises opening, by the first thread, a third file; reading a third page of data from the third file into the page cache; and adding a pointer to the third page of data to the first data structure.
[0023] In some embodiments, the method further comprises receiving, from the first thread, a request to group the third file with the first file.
[0024] According to embodiments of the disclosure, a system for caching is provided, comprising: a means for processing; and a memory operably connected to the means for processing and storing instructions that, when executed by the means for processing, cause the system to perform a method comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; and adding a second pointer to the first data structure, the second pointer pointing to the second page of data.
[0025] In some embodiments, the method further comprises modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure. BRIEF DESCRIPTION OF DRAWINGS
[0026] These and other features and advantages of the present disclosure will be appreciated and understood by reference to the detailed description, claims, and accompanying drawings, in which:
[0027] Figure 1 is a block diagram of a system for computing comprising a host and a storage system according to embodiments of the present disclosure;
[0028] Figure 2 is a block diagram of a system for caching file data according to embodiments of the present disclosure;
[0029] Figure 3 is a graph of results of experiments according to embodiments of the present disclosure; and
[0030] Figure 4 is a flowchart of a method for caching according to embodiments of the present disclosure; DETAILED DESCRIPTION
[0031] The detailed description set forth below, in connection with the appended drawings, is intended as a description of exemplary embodiments of systems and methods for caching in storage devices provided in accordance with the present disclosure and is not intended to represent the only forms in which the present disclosure can be constructed or utilized. The description sets forth the features of the present disclosure in connection with the illustrated embodiments. It is to be understood, however, that the same or equivalent features can be incorporated in different embodiments which are also intended to be encompassed within the scope of the present disclosure. As shown elsewhere herein, like numbers in different figures indicate like elements or features.
[0032] In computing systems where a host is connected to persistent storage, the host can send write and read commands to the persistent storage (e.g., local persistent storage or persistent storage on a storage server that is physically separate from the host server), and in response, the persistent storage can store data sent by the host or retrieve data and send it to the host. Such operations can be significantly slower than similar operations that the host can perform in host memory (e.g., dynamic random access memory (DRAM)). For example, writing to host memory can be substantially faster (in both throughput and latency) than writing to persistent storage, and reading from host memory can be substantially faster (in both throughput and latency) than reading from persistent storage.
[0033] As such, to improve performance, the host can maintain a cache of a portion of the data in the persistent storage in host memory (which can be referred to as a "page cache"). After the page cache is established, when the host requests data from the persistent storage, the page cache is first checked for the data. If the data is present in the page cache (which can be referred to as a "page cache hit," or simply a "cache hit"), the data is retrieved from the page cache, thereby avoiding the need to perform a read operation from the persistent storage. If the data is not in the page cache (which can be referred to as a "page cache miss" or simply a "cache miss"), the data is retrieved from the persistent storage and returned to the host (at which point the data can also be stored in the page cache).
[0034] As noted above, the greater the proportion of page cache hits, the better the overall performance of applications running on the host can be, in part because host memory can exhibit significantly better performance (in terms of speed) than persistent storage. Accordingly, systems and methods for improving page cache performance can improve the performance of applications running on the host.
[0035] In some operating systems, such as in the Linux operating system, the page cache hit rate and the performance of the page cache can be affected by whether a file is a private file (accessible only by one thread) or a shared file (accessible by multiple threads). As used herein, a "thread" is the smallest sequence of programming instructions that can be independently managed by a scheduler. For example, as discussed in further detail below, the page cache hit rate can be approximately 47% for private files and approximately 90% for shared files, which is an increase of nearly 100% if shared files are used instead of private files.
[0036] As such, in some embodiments, a shared page cache data structure is used for a group of two or more files to obtain the performance improvements sought by sharing files. The shared page cache data structure can be used for data read from persistent storage, as well as for data written to persistent storage after the page cache has been flushed, e.g., after the page cache has been synchronized with persistent storage. Various mechanisms can be used to select files for grouping. For example, files stored by default in persistent storage in the same directory can be grouped, or an application can request that certain files be grouped. As used herein, "grouping" two or more files means arranging the files to share a shared page cache data structure. Grouping of files can result in improved performance for applications accessing the files, e.g., as a result of increased cache hit rates.
[0037] Figure 1 A computing system in some embodiments is shown. A host 100, which can include processing circuitry 105 (e.g., a central processing unit (CPU)) and memory 110 (e.g., DRAM memory), can be connected to a persistent storage system 115, which can share an enclosure and other elements (e.g., a power supply) with the host 100, or can be in a separate enclosure, and can include, for example, one or more solid state drives (SSDs). In operation, as described above, the host can send read and write commands to the persistent storage, in response to which the persistent storage can store data sent by the host or retrieve data and send it to the host, and the host can maintain a page cache in host memory, storing a portion of the data in the persistent storage.
[0038] As described above, in operation, a collection of files can be grouped into groups. Such groups can be referred to as inode groups. Figure 2An organization structure (from the perspective of file data) that can be used for such embodiments is shown. Each of a plurality of inodes 205 (each of which corresponds to a respective file 210 in persistent storage) can have a reference (e.g., a pointer) to a page cache data structure of a plurality of data structures, including a per-group-unified read page cache data structure 215 and a plurality of per-file write page cache data structures 220. The memory used to store the pages of cached file data can be part of a memory budget of a thread group (e.g., a control group (cgroup) containing threads in a Linux environment) for which the file is cached in pages referenced by the per-group-unified read page cache data structure 215. In some embodiments, the memory budget can be modified; for example, an application can return some of its memory budget to the operating system when it ends a task, or if the application has more than one group associated with it, the application can move some of its memory budget from one group to another. The per-group-unified read page cache data structure 215 can maintain a list of inodes 205 for which file data is cached in pages referenced by the per-group-unified read page cache data structure 215. When data in the page cache is modified, the data can be marked as “dirty” because the page cache data can not be equivalent to the data in persistent storage until the change is synchronized with the data in persistent storage (an operation that can be referred to as “flushing”). In such a case, the inode and / or page corresponding to the modified data can be locked to prevent, for example, another process from reading or updating from persistent storage data that is no longer up-to-date (not modified) potentially resulting in an erroneous result. Because inodes need to be locked when data is modified, a separate page cache data structure can be used for each inode for which data in the page cache is dirty. Such an approach can avoid locking multiple inodes in response to a modification of data associated with any one inode.
[0039] For example, if a first thread running on the host (e.g., as part of an application running on the host) opens a first file and reads data from the first file, pages read from the first file can be returned to the thread, and the pages read from the first file (and possibly other pages, e.g., adjacent pages in the file) can be stored in the page cache. Pointers to the pages 225 stored in the page cache can be made up of a portion of each of the per-group unified read page cache data structures 215. If a second thread running on the host opens a second file and reads data from the second file, pages from the second file can also be saved in the page cache, and pointers to the pages 225 from the second file stored in the page cache can be added to each of the per-group unified read page cache data structures 215. As noted above, this sharing of each of the per-group unified read page cache data structures 215 can result in performance improvements, e.g., increased page cache hit rates.
[0040] Similarly, if the first thread opens a third file, and reads data from the third file, pages from the third file can also be saved in the page cache, and pointers to the pages 225 from the third file stored in the page cache can be added to each of the per-group unified read page cache data structures 215.
[0041] When a need arises to cache data from a file, e.g., when a thread opens a new file and reads data from it, the inode of that file can be grouped with other inodes according to various criteria. For example, when a second file is in the same directory as a first file, the inode of the first file is associated with each-group-unified read page cache data structure 215, then the second file can be associated with the same each-group-unified read page cache data structure 215. In some embodiments, upon opening a file, a thread can request that the file being opened be associated with one or more other files in an each-group-unified read page cache data structure 215. In some embodiments, all files opened by an application running on the host can be associated with a single each-group-unified read page cache data structure 215. In some embodiments, an application can request that all files opened by the application be part of one group. Such a request can be made by the application (e.g., by a thread of the application) each time a new file is opened, or can be made by the application as a general or “global” request (e.g., when the application starts, or at any time thereafter), which is a request that all files opened for the application be part of one group. In some embodiments, such a request can be subsequently revoked by the application. In some embodiments, an application can make per-file grouping or ungrouping requests, e.g., the application can request that (i) files currently in one group be removed (and associated with separate page cache data structures), or (ii) files currently in one group be moved to another group, or (iii) files not currently in a group be added to an existing group.
[0042] In some embodiments, the grouping decisions for files can be made by a machine learning system (e.g., a suitably trained neural network). Such a machine learning system can make grouping decisions based on various file characteristics or attributes, e.g., (i) respective cache hit rates for files currently open, (ii) access counts for files currently open, (iii) access patterns, such as which files are accessed concurrently or substantially simultaneously, (iv) file sizes, (v) block addresses at which files are stored, or (vi) whether a file is being accessed by one or more threads that are also accessing another file. A machine learning system can also be employed to determine suitable memory budgets for memory used to store pages of file data cached, based on some or all of the same criteria.
[0043] Various methods can be used to train such a machine learning system. For example, operational logs obtained from a system using various grouping and memory allocation methods (e.g., methods based on application requests, file locations in a directory, or a machine learning system trained based on some or all of the same criteria) during an operational interval can be used as training data, with file characteristics or attributes as input feature maps, grouping decisions made during the operational interval as output feature maps, and a cost function based on access counts and cache hit rates.
[0044] If one of the threads with open files (e.g., the second thread) then writes to a portion of a file that is cached in the page cache, the system can modify the affected pages 225 in the page cache (so that these pages 225 become dirty), move the cached pages 225 from the file to the per-file write page cache data structure 220 (as shown by arrow 230 in Figure 2 ), and lock the inode corresponding to the file. This process can be such that all inodes that are cached and referenced by the per-set uniform read page cache data structure 215 for the pages 225 that are moved from the per-set uniform read page cache data structure 215 to the per-file write page cache data structure 220 do not have to be locked. The movement of the pages 225 from the per-set uniform read page cache data structure 215 to the per-file write page cache data structure 220 can be accomplished by moving the pointers to the affected pages 225 from the per-set uniform read page cache data structure 215 to the per-file write page cache data structure 220. The movement of the pointers can involve adding the pointers to the affected pages 225 to the per-file write page cache data structure 220 and removing the pointers to the affected pages 225 from the per-set uniform read page cache data structure 215.
[0045] If the cached pages 225 referenced by the per-file write page cache data structure 220 are subsequently synchronized with the persistent storage (e.g., flushed to the persistent storage using the “fsync” command in a Linux environment), the inodes can be unlocked and the cached pages 225 can be moved to the per-set uniform read page cache data structure 215 (as shown by arrow 235 in Figure 2 ). The movement of the pages 225 from the per-file write page cache data structure 220 to the per-set uniform read page cache data structure 215 can be accomplished by moving the pointers to the affected pages 225 from the per-file write page cache data structure 220 to the per-set uniform read page cache data structure 215.
[0046] An experiment using 32 threads as follows was used to estimate the performance improvement that can be achieved in some embodiments. Figure 3 is a graph of the throughput measurements for various cases in this experiment (as well as the results of similar experiments with fewer threads (1, 2, 4, 8, and 16 threads)). The I / O size for each read was 4 kilobytes (KB), and the page cache was flushed prior to running the experiment. The persistent storage was either non-volatile express memory (NVME) (or “local NVME”) or NVME over Fabrics (NVME-oF) (or “remote NVME”). In the first test, 32 threads were programmed to do random reads from private files (each with a size of 1 gigabyte (GB)). The measured throughput is shown in Figure 3 , and theFigure 3 The legend uses bars labeled "LOCAL_NVME" and "REMOTE_NVME". In the second test, 32 threads were programmed to randomly read from a 32GB shared file; these threads performed read operations anywhere within the file. In the third test, 32 threads were programmed to randomly read from a 32GB shared file; each of these threads performed read operations only within the corresponding portion or "shard" of the file. The second and third tests were performed on both local and remote NVME connections; the results are shown in [the original text]. Figure 3 The legend uses bars labeled "LOCAL_NVME_SHARE" and "REMOTE_NVME_SHARE" (in each case, the performance difference between the second and third tests is not significant). During the experiment, it was found that the cache hit rate for threads reading from private files was 47.3%, for threads reading from shared files (each thread reads from a random read position in the file), and for threads reading from shared files, it was 90.2% (each thread reads from the corresponding portion of the file).
[0047] Figure 4 This is a flowchart of the method. In some embodiments, the method includes: at 405, opening a first file by a first thread; at 410, reading a first page of data from the first file into a page cache in the host memory of the host; at 415, adding a pointer to the first page of data to a first data structure (which may be a unified read page cache data structure 215 for each set); at 420, opening a second file by a second thread; at 425, reading a second page of data from the second file into a page cache; and at 430, adding a pointer to the second page of data to the first data structure.
[0048] As used herein, "a part" of something means "at least some" of something, and may thus mean less than or all of something. Thus, "a part" of something includes the whole thing as a special case, i.e., an example where the whole thing is a part of something. As used herein, when a second quantity is "within Y" of a first quantity X, it means that the second quantity is at least XY and at most X+Y. As used herein, when a second number is "within Y%" of a first number, it means that the second number is at least (1-Y / 100) times the first number and at most (1+Y / 100) times the first number. As used herein, the term "or" should be interpreted as "and / or," such that, for example, "A or B" means any one of "A" or "B" or "A and B."
[0049] The background, including that provided in the background section of this disclosure, is provided only for setting context and should not be considered as admitting what is prior art. Any component or any combination of components described (e.g., in any system diagram included herein) can be used to perform one or more operations of any flow diagram included herein. Moreover, (i) the operations are example operations and can involve various additional steps not expressly covered, and (ii) the chronological order of the operations can vary.
[0050] Each of the terms “processing circuitry” and “means for processing” is used herein to mean any combination of hardware, firmware, and software employed to process data or digital signals. The processing circuitry hardware can include, for example, an application specific integrated circuit (ASIC), a general purpose or special purpose central processing unit (CPU), a digital signal processor (DSP), a graphics processing unit (GPU), and a programmable logic device such as a field programmable gate array (FPGA). In the processing circuitry, as used herein, each function is performed by either hardware (i.e., hardwired) configured to perform that function, or by more general purpose hardware (such as a CPU) configured to execute instructions stored in a non-transitory storage medium. The processing circuitry can be fabricated on a single printed circuit board (PCB) or distributed among several interconnected PCBs. The processing circuitry can contain other processing circuitry; for example, the processing circuitry can include two processing circuits, an FPGA and a CPU, interconnected on a PCB.
[0051] As used herein, when a method (e.g., adjusting) or a first quantity (e.g., a first variable) is referred to as being “based on” a second quantity (e.g., a second variable), it means that the second quantity is an input to the method or influences the first quantity, e.g., the second quantity can be an input (e.g., the only input, or one of several inputs) to a function that computes the first quantity, or the first quantity can equal the second quantity, or the first quantity can be identical to the second quantity (e.g., stored in one or more locations of the same memory as the second quantity).
[0052] It will be understood that, although the terms “first,” “second,” “third,” etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed herein could be termed a second element, component, region, layer or section without departing from the spirit and scope of the inventive concept.
[0053] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concept. As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation and not as terms of degree, unless otherwise indicated herein and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art.
[0054] As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Further, use of "can" in describing embodiments of the inventive concept refers to one or more embodiments of the disclosure. Moreover, the term "exemplary" is intended to refer to an example or illustration. As used herein, the terms "use," "used," and "used in" can be considered synonymous with the terms "utilize," "utilized," and "utilized in," respectively.
[0055] It will be understood that when an element or layer is referred to as being "on" another element or layer, "connected to" another element or layer, "coupled to" another element or layer, or "adjacent" another element or layer, it can be directly on, connected, coupled, or adjacent to the other element or layer or one or more intervening elements or layers can also be present. In contrast, when an element or layer is referred to as being "directly on," "directly connected to," "directly coupled to," or "immediately adjacent" to another element or layer, there are no intervening elements or layers present.
[0056] Any numerical range recited herein is intended to include all sub-ranges of the same whole number precision subsumed within the recited range. For example, a range of "1.0 to 10.0" or "between 1.0 and 10.0" is intended to include all sub-ranges, for example, 2.4 to 7.6, between 2.4 and 7.6, etc. Similarly, a range described as "within 35% of 10" is intended to include all sub-ranges within the range of 6.5 (i.e., (1 - 35 / 100) multiplied by 10) and 13.5 (i.e., (1 + 35 / 100) multiplied by 10), for example, 7.4 to 10.6. Any maximum numerical limitation recited herein is intended to include all lower numerical limitations falling within the recited maximum limit, and any minimum numerical limitation recited herein is intended to include all higher numerical limitations falling within the recited minimum limit.
[0057] While example embodiments of systems and methods for caching in storage devices have been described and shown herein, it will be apparent to those skilled in the art that many modifications and changes can be made to the embodiments without departing from the principles of the present disclosure. It is thus intended that the scope of the systems and methods for caching in storage devices constructed according to the principles of the present disclosure should not be limited to the embodiments specifically described herein. The present disclosure is also defined by the following claims and their equivalents.
Claims
1. A method comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; adding a second pointer to the first data structure, the second pointer pointing to the second page of data; and reading, by the first thread, the second page of data from the page cache.
2. The method of claim 1, further comprising: modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure.
3. The method of claim 2, further comprising: flushing the first page to the first file; and moving the first pointer to the first data structure.
4. The method of claim 1, further comprising: grouping the first file and the second file into a first group according to a criterion, wherein the page cache is associated with the first group. the page cache is part of a memory budget of the first group. the first file is within a first directory and the second file is within the first directory.
7. The method of claim 1, further comprising receiving, from the second thread, a request to group the second file with the first file.
5. The method of claim 4, wherein, 8. The method of claim 1, further comprising:
6. The method of claim 1, wherein, opening, by the first thread, a third file; reading a third page of data from the third file into the page cache; and adding a pointer to the first data structure pointing to the third page of data.
9. The method of claim 8, further comprising receiving, from the first thread, a request to group the third file with the first file.
10. A system comprising: processing circuitry; and memory operably connected to the processing circuitry and storing instructions that, when executed by the processing circuitry, cause the system to perform a method comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; adding a second pointer to the first data structure, the second pointer pointing to the second page of data; and reading, by the first thread, the second page of data from the page cache. the method further comprising: modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure. the method further comprising:
11. The system of claim 10, wherein, flushing the first page to the first file; and moving the first pointer to the first data structure.
13. The system of claim 10, further comprising:
12. The system of claim 11, wherein, grouping the first file and the second file into a first group, wherein the page cache is associated with the first group, according to a criterion.
14. The system of claim 13, wherein, The page cache is part of a memory budget of the first group.
15. The system of claim 10, wherein, The first file is within a first directory and the second file is within the first directory.
16. The system of claim 10, wherein, The method further comprises receiving, from the second thread, a request to group the second file with the first file.
17. The system of claim 10, wherein, The method further comprises: opening, by the first thread, a third file; reading a third page of data from the third file into the page cache; and adding a pointer to the third page of data to the first data structure.
18. The system of claim 17, wherein, The method further comprises receiving, from the first thread, a request to group the third file with the first file.
19. A system comprising: a means for processing; and a memory, operatively connected to the means for processing and storing instructions that, when executed by the means for processing, cause the system to perform a method comprising: opening, by a first thread, a first file; reading a first page of data from the first file into a page cache in a host memory of a host; adding a first pointer to a first data structure, the first pointer pointing to the first page of data; opening, by a second thread, a second file; reading a second page of data from the second file into the page cache; adding a second pointer to the first data structure, the second pointer pointing to the second page of data; and reading, by the first thread, the second page of data from the page cache.
20. The system of claim 19, wherein, The method further comprises: modifying, by the host, data in the first page of data; and moving the first pointer to a second data structure different from the first data structure.
Citation Information
Patent Citations
Caching method and control system
CN104750621A
Distributed virtual file system with shared page cache
CN113243008A