Spiking wave recognition model construction method, spiking wave recognition method, device and equipment

Abstract

The present application relates to the medical technical field, disclose a spike recognition model construction method, spike recognition method, device and equipment, the construction method includes: obtaining electroencephalogram signal;The electroencephalogram signal is segmented, and the spike electroencephalogram signal section is obtained;The spike electroencephalogram signal section is pulse coded, and the pulse sequence is obtained;Based on the pulse sequence and neuron dynamics mechanism, the initial neuron model is constructed;Based on the initial neuron model, the feedforward pulse neural network is constructed, and the feedforward pulse neural network is used for feature mapping to the pulse sequence;Based on the neuron synapse self-feedback time delay adjustment mechanism, the feedforward pulse neural network is updated, and the target spike recognition model is obtained.Based on the neuron synapse adjustment mechanism of self-feedback time delay, the global convergence of feedforward pulse neural network is accelerated, and the high-precision recognition model is ensured to recognize non-invasive traceable type epilepsy sample spike.

Description

TECHNICAL FIELD

[0001] The present application relates to the medical technical field, and in particular to a spike recognition model construction method, a spike recognition method, a device and equipment. BACKGROUND

[0002] Epileptiform spike is a large number of pyramidal neurons in the brain cortex of the intracranial synchronous abnormal discharge, which is recorded by the extracranial electrode after the transmission of the skull and brain tissue. Spiking neural network (SNN) is a model simulating the dynamics of brain neurons.

[0003] At present, the neural network has developed to the third generation. The feature learning model constructed based on the first two generations of neural networks restricts the learning of the difference information between the traceable epileptiform spike and the spike because the mechanism of the discharge propagation of the epileptogenic zone neurons is not clear, which leads to the recognition effect of the learning model far from meeting the clinical use demand.

[0004] Moreover, when the group neurons are synchronously discharged, there is a millisecond-level time delay in the neurotransmitter released by the synapse, and the duration of the traceable epileptiform spike is only 20-200 milliseconds. Therefore, the millisecond-level time delay of the neurotransmitter released by the synapse affects the accurate regulation of the activity of the excitatory neurons by the inhibitory neurons in the development process of the traceable epileptiform spike, which restricts the reliability of the SNN in recognizing the traceable epileptiform spike. SUMMARY

[0005] Therefore, the present application provides a spike recognition model construction method, a spike recognition method, a device and equipment to solve the problem of low precision of the SNN in recognizing the traceable epileptiform spike due to the time delay of the neurotransmitter released by the synapse.

[0006] In a first aspect, the present application provides a spike recognition model construction method, which comprises:

[0007] obtaining an electroencephalogram signal;

[0008] segmenting the electroencephalogram signal to obtain a spike electroencephalogram signal segment;

[0009] pulse coding the spike electroencephalogram signal segment to obtain a pulse sequence;

[0010] constructing an initial neuron model based on the pulse sequence and the neuron dynamics mechanism;

[0011] constructing a feedforward spiking neural network based on the initial neuron model, the feedforward spiking neural network being used for feature mapping of the pulse sequence;

[0012] updating the feedforward spiking neural network based on the synaptic self-feedback time delay adjustment mechanism to obtain a target spike recognition model.

[0013] Based on the neuron synaptic regulation mechanism of self-feedback time delay, the global convergence of the feedforward pulse neural network is accelerated, and the high-precision recognition of the non-invasive traceable epileptic-like spike wave of the recognition model is ensured.

[0014] In an optional implementation, an initial neuron model is constructed based on a pulse sequence and a neuron dynamics mechanism, including:

[0015] A resting membrane potential, a membrane capacitance, and a membrane resistance of the preset neuron are determined;

[0016] In a case where there is a membrane current input, a membrane potential of the neuron is determined, wherein the membrane current is weighted by a pulse current of a presynaptic neuron;

[0017] Based on the resting membrane potential, the membrane potential, the membrane capacitance, and the membrane resistance, an initial neuron model is established, and the initial neuron model is used to describe a dynamic chaotic system of an in-brain source transmission to a measurement space.

[0018] The established initial neuron model can be used to describe complex activities of neurons in the brain, and provides a basis for improving the recognition accuracy of the target spike wave recognition model.

[0019] In an optional implementation, a feedforward pulse neural network is updated based on a neuron synaptic self-feedback time delay regulation mechanism, to obtain a target spike wave recognition model, including:

[0020] The self-feedback time delay synaptic regulation mechanism is described;

[0021] A neuron class is determined;

[0022] An error is calculated based on a mean square root cost function;

[0023] The feedforward pulse neural network is updated according to the neuron synaptic self-feedback time delay regulation mechanism and the mean square root error cost function;

[0024] The neuron synaptic self-feedback time delay regulation mechanism includes:

[0025]

[0026] Wherein, f represents a convolution operation, σ represents a sigmoid function, δ t-1 is a Dirac function of a pulse sequence at t-1, represents an element inner product, V t represents a membrane potential at t, τ=CR represents a time constant, C is a membrane capacitance, R is a membrane resistance, K t is a self-feedback gate, I t represents a membrane current.

[0027] In an optional implementation, the neuron class is determined, including:

[0028]

[0029] where g denotes the convolution operation, denotes the sign function, EI t denotes whether the input neuron is an inhibitory or excitatory neuron, denotes the firing rate of the neuron, and t denotes the Dirac function of the spike train at time t, V t denotes the membrane potential at time t, and O denotes the description of the firing process of the two types of neurons:

[0030]

[0031] where V th denotes the membrane potential threshold, and when the membrane potential V t exceeds the positive threshold, a positive spike occurs, and when the membrane potential V t is below the negative threshold, a negative spike occurs.

[0032] In an alternative embodiment, the mean square error cost function is:

[0033]

[0034] where y′ t denotes the output at time t, denotes the average activation rate of a given time window T, y i denotes the true label of the spike, and M denotes the sample size.

[0035] In a second aspect, the present application provides a spike recognition method, the method comprising:

[0036] obtaining an EEG signal to be recognized;

[0037] inputting the EEG signal to be recognized into a spike recognition model to recognize a traceable epileptiform spike signal segment of the EEG signal to be recognized, wherein the spike recognition model is constructed by using the spike recognition model construction method of any one of the first aspect.

[0038] In the present application, the traceable epileptiform spike recognition result of the EEG signal to be recognized is obtained by the spike recognition model, which improves the recognition accuracy of the traceable epileptiform spike in the EEG signal, and further provides support for subsequent diagnosis and treatment.

[0039] In a third aspect, the present application provides a spike recognition model construction device, the device comprising:

[0040] an acquisition module for acquiring an EEG signal;

[0041] a segmentation module for segmenting the EEG signal to obtain a spike EEG signal segment;

[0042] The encoding module is configured to pulse encode the spike wave electroencephalogram segment to obtain a pulse sequence.

[0043] The neuron model construction module is configured to construct an initial neuron model based on the pulse sequence and a neuron dynamics mechanism.

[0044] The pulse neural network construction module is configured to construct a feedforward pulse neural network based on the initial neuron model, and the feedforward pulse neural network is configured to perform feature mapping on the pulse sequence.

[0045] The network updating module is configured to update the feedforward pulse neural network based on a neuron synapse self-feedback time delay adjustment mechanism to obtain a target spike wave recognition model.

[0046] In a fourth aspect, the present application provides a spike wave recognition device, the device comprising:

[0047] The to-be-recognized electroencephalogram signal acquisition module is configured to acquire a to-be-recognized electroencephalogram signal.

[0048] The spike wave recognition module is configured to input the to-be-recognized electroencephalogram signal into the spike wave recognition model to recognize a traceable epileptiform spike wave signal segment of the to-be-recognized electroencephalogram signal, wherein the spike wave recognition model is constructed by the spike wave recognition model construction device of any one of the third aspect.

[0049] In a fifth aspect, the present application provides a computer device, comprising a memory and a processor, the memory and the processor are in communication connection with each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the spike wave recognition model construction method of the first aspect and any one of the corresponding embodiments thereof or the spike wave recognition method of the second aspect.

[0050] In a sixth aspect, the present application provides a computer readable storage medium, the computer readable storage medium stores computer instructions, and the computer instructions are used to make the computer execute the spike wave recognition model construction method of the first aspect and any one of the corresponding embodiments thereof or the spike wave recognition method of the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0051] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or prior art description. Obviously, the drawings described below are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0052] Figure 1 is a flowchart of the spike wave recognition model construction method according to an embodiment of the present application.

[0053] Figure 2 FIG. 6 is a flowchart of another spike identification model construction method according to an embodiment of the present application.

[0054] Figure 3 FIG. 5 is a flowchart of a spike identification model construction method according to an embodiment of the present application.

[0055] Figure 4 FIG. 4 is a flowchart of a spike identification method according to an embodiment of the present application.

[0056] Figure 5 FIG. 3 is a structural block diagram of a spike identification model construction device according to an embodiment of the present application.

[0057] Figure 6 FIG. 2 is a structural block diagram of a spike identification device according to an embodiment of the present application.

[0058] Figure 7 FIG. 1 is a hardware structure schematic diagram of a computer device according to an embodiment of the present application. DETAILED DESCRIPTION

[0059] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0060] The neuroscience-oriented spiking neural network (SNN) aims to explain the development dynamics of neuron discharge from the biophysical principle, but the development of traceable epilepsy-like spike waves has unique neuron spike discharge interaction, which restricts the reliability of SNN learning inter-class difference information.

[0061] In the development process of the traceable epileptiform spike, when a neuron fires an action potential, i.e. a pulse, it causes a biphasic change in the postsynaptic membrane potential, the excitatory synaptic (EPSP) input reduces the negative polarization state of the cell membrane, and the hyperpolarization process is the input of the inhibitory synaptic (IPSP) which further aggravates the negative polarization state of the cell membrane so that the neuron does not fire a pulse. Studies have shown that the pulse neural network is constructed based on the excitatory and inhibitory neuron model, but only the mapping of the input information is realized, and the post-synaptic membrane weight of the neuron is not updated and learned. And the directional selective network model of the excitatory and inhibitory neurons used in the related research also calculates the connection strength in advance, instead of updating the network parameters based on the synaptic learning mechanism of the neuron. However, the related research shows that the learning mechanism needs to ensure that the inhibitory neuron provides feedback inhibition to the excitatory neuron based on the local learning rule to update the post-synaptic membrane weight of the learning neuron, so that the inhibitory neuron sends a certain amount of inhibitory current to the excitatory neuron, and the excitatory neuron is decoupled from the activity of the excitatory neuron by inhibiting redundant pulse intensity. Therefore, the present application describes a self-feedback dynamic regulation mechanism of excitatory and inhibitory neurons to regularize the synaptic membrane potential and accelerate the global convergence of the pulse neural network.

[0062] Based on the above, the self-feedback delay synaptic regulation mechanism is explored to accelerate the global convergence of the SNN while ensuring high-precision identification of non-invasive traceable epileptiform spikes.

[0063] In view of this, the present application provides a spike identification model construction method, a spike identification method, a device and equipment in the computer device, it needs to be pointed out that the execution subject can be a spike identification model construction device, the device can be realized by software, hardware or a combination of software and hardware to become part or all of the computer device, wherein the computer device can be a terminal or a client or a server, the server can be a server, or a server cluster composed of multiple servers, the terminal in the embodiment of the present application can be a smart phone, a personal computer, a tablet computer and other smart hardware devices. In the following method embodiment, the execution subject is taken as an example to be a computer device for description.

[0064] According to the embodiment of the present application, a spike identification model construction method is provided, it needs to be pointed out that the steps shown in the flowchart of the drawing can be executed in a computer system such as a group of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in different order from here.

[0065] In the present embodiment, a spike identification model construction method is provided, which can be used in the above-mentioned computer device, Figure 1is a flowchart of a spike wave identification model construction method according to an embodiment of the present application, as shown in the figure, the flow includes the following steps: Figure 1

[0066] Step S101, acquiring an electroencephalogram signal.

[0067] In an example, the electroencephalogram signal is a non-invasive scalp electroencephalogram signal, rather than an intracranial electroencephalogram signal, which can reduce the pain and burden of the patient.

[0068] Step S102, segmenting the electroencephalogram signal to obtain a spike wave electroencephalogram signal segment.

[0069] In an example, the electroencephalogram signal segment is a seizure spike wave signal segment, which can be segmented by using a time window of a certain length.

[0070] Specifically, segmentation can be performed according to the following formula:

[0071] X(t i ) and t i = (A a -L / 2) x f s ,..., (A a x f s -L / 2)

[0072] Where A a represents the time when the expert mark point is located, L is the length of the time window, f s is the frequency of the seizure electroencephalogram, a = 1, 2,..., Q, Q represents the total amount of expert marked seizure spike waves. Specifically, the multi-lead signal segment within 100 milliseconds before and after the clinician mark point is intercepted to obtain a database of samples to be analyzed.

[0073] Step S103, pulse coding the spike wave electroencephalogram signal segment to obtain a pulse sequence.

[0074] In an example, by simulating the sparsity phenomenon of the existence of single neuron firing pulses, a sparse pulse coding method is proposed to perform sparse pulse coding on the electroencephalogram signal segment to obtain a sparse pulse sequence, solving the problem that the discharge sparsity will cause information coding redundancy and affect coding accuracy.

[0075] Step S104, constructing an initial neuron model based on the pulse sequence and the neuron dynamics mechanism;

[0076] Neurons are the basic functional units of the nervous system and the basic components of neural network models. The neuron dynamics mechanism can be explained as the process of change of neuron potential and the process of membrane potential generation and transmission.

[0077] ​The initial neuron model constructed according to the pulse sequence and the neuron dynamic mechanism can be a mathematical model for simulating the interaction between neurons in the brain. It is based on the connection between neurons and the transmission of electrical activity, as well as the dynamic behavior between neurons.

[0078] In step S105, a feedforward pulse neural network is constructed based on the initial neuron model, and the feedforward pulse neural network is used for feature mapping of the pulse sequence.

[0079] In this embodiment, a feedforward pulse neural network using pulses for information transmission or processing is designed using the constructed initial neuron model. As mentioned above, the initial neuron model is a mathematical model for simulating the interaction between neurons in the brain, that is, a mathematical description of the behavior of biological neurons. When constructing the feedforward pulse neural network, the initial neuron model can be selected as the basic unit in the network. Each neuron processes the input pulse by simulating the change of membrane potential, and generates an output pulse under certain conditions. Then the neurons can be connected through synapses to form a feedforward pulse neural network by designing the topology and determining the hierarchy. The constructed feedforward pulse neural network can realize nonlinear feature mapping of the pulse sequence.

[0080] In step S106, the feedforward pulse neural network is updated based on the neuron synapse self-feedback delay adjustment mechanism to obtain a target spike wave recognition model.

[0081] Based on the initial neuron model, a large-scale pulse neural network is constructed by synaptic connection. In order to realize feature representation of the pulse sequence, it is necessary to update the learning network parameters based on the synaptic adjustment mechanism on the training data. However, the difficulty lies in that most studies are based on the construction of pulse neural network by excitatory neuron model, and only the synaptic update learning of excitatory neurons is performed, which will lead to the increase of difficulty in realizing global convergence of pulse neural network with the increase of network layers. In addition, the millisecond-level delay of neurotransmitter release by neuron synapse affects the accurate regulation of excitatory neuron activity by inhibitory neurons in the development process of traceable epilepsy spike wave, which restricts the reliability of the output traceable feature of pulse neural network. In this embodiment, the neuron synaptic adjustment mechanism of self-feedback delay is explored, and the feedforward pulse neural network is updated using the neuron self-feedback delay synaptic learning mechanism to obtain the target spike wave recognition model, which accelerates the global convergence of SNN and ensures the high-precision recognition of non-invasive traceable epilepsy spike wave.

[0082] In some technologies, since most studies construct a spiking neural network based on an excitatory neuron model, only update learning of excitatory neuron synapses, and as the number of network layers increases, it is difficult to achieve global convergence of the spiking neural network. In addition, the millisecond-level delay of neurotransmitter release from neuron synapses can affect the precise regulation of the activity of excitatory neurons by inhibitory neurons during the development of traceable epileptic spike waves, and restricts the accuracy of the spiking neural network in identifying traceable epileptic spike waves. The target spike wave identification model constructed in the embodiment is based on the self-feedback delay regulation mechanism of neuron synapses, which accelerates the global convergence of the feedforward spiking neural network while ensuring high-precision identification of non-invasive traceable epileptic spike waves.

[0083] In the embodiment, a spike wave identification model construction method is provided, which can be used for the computer device described above, Figure 2 is a flowchart of another spike wave identification model construction method according to an embodiment of the application, as shown in Figure 2 The flowchart includes the following steps:

[0084] In step S401, the electroencephalogram signal is obtained; for details, see step S101 of the above embodiment, which will not be repeated here.

[0085] In step S402, the electroencephalogram signal is segmented to obtain a spike wave electroencephalogram signal segment; for details, see step S102 of the above embodiment, which will not be repeated here.

[0086] In step S403, the spike wave electroencephalogram signal segment is pulse coded to obtain a pulse sequence; for details, see step S103 of the above embodiment, which will not be repeated here.

[0087] In step S404, the resting membrane potential, membrane capacitance and membrane resistance of the neuron are preset. The resting membrane potential refers to the membrane potential of the neuron without external stimulation. The resting membrane potential, membrane capacitance and membrane resistance of the neuron can be preset first.

[0088] In step S405, the membrane potential of the neuron is determined in the presence of a membrane current input, wherein the membrane current is obtained by weighting the pulse current of the presynaptic neuron.

[0089] The membrane potential refers to the potential difference on the neuron, which can change over time. In the presence of a membrane current input, the change of the membrane potential depends on the membrane capacitance and the membrane resistance.

[0090] In an example, the membrane current can be obtained according to the following formula:

[0091]

[0092] where i = 1, 2,..., N is the number of neurons, O(t) is the coded pulse sequence, The weights of the feedforward pulse neural network are j = 1, 2,..., φ-1, and the number of layers of the feedforward pulse neural network is φ.

[0093] In step S406, an initial neuron model is established based on the resting membrane potential, the membrane potential, the membrane capacitance, and the membrane resistance, and the initial neuron model is used to describe a dynamic chaotic system of a brain source transmitted to a measurement space. The measurement space refers to a region used to measure or observe brain activity.

[0094] In an example, a Leaky Integrated-and-Fire neuron model is constructed by using a mathematical description of a biological neuron model to describe a dynamic chaotic system of a brain source transmitted to a measurement space.

[0095]

[0096] wherein V t is the membrane potential of a single neuron at time t, V rest is the resting membrane potential, the time constant τ m is the product of the membrane capacitance C m and the membrane resistance R m , and I t is the membrane current.

[0097] In this embodiment, the initial neuron model can be used to describe the complex activity of neurons in the brain, and provides a basis for improving the accuracy of the target spike wave recognition model.

[0098] In step S407, a feedforward pulse neural network is constructed based on the initial neuron model, and the feedforward pulse neural network is used for feature mapping of a pulse sequence. For details, please refer to step S105 of the above embodiment, which will not be described here.

[0099] In step S408, the feedforward pulse neural network is updated based on a neuron synapse self-feedback time delay adjustment mechanism, and a target spike wave recognition model is obtained. For details, please refer to step S106 of the above embodiment, which will not be described here.

[0100] In some optional embodiments, the step S106 described above updates the pulse neural network based on a neuron synapse self-feedback time delay adjustment mechanism to obtain a target spike wave recognition model. As shown in FIG. 6, the process includes the following steps: Figure 3

[0101] In step S1061, a self-feedback time delay synapse adjustment mechanism is described. In the self-feedback time delay adjustment mechanism, the strength of the synapse is adjusted after a certain time delay according to the activity of the neuron itself. This adjustment mechanism can reflect the feedback adjustment process of the neuron activity, and can be used to explain the self-regulation behavior and adaptability of the neuron.

[0102] ​In some alternative embodiments, the synaptic self-feedback delay adjustment mechanism of neurons can be described as:

[0103]

[0104] where f denotes the convolution operation, σ denotes the sigmoid function, and denotes the element-wise product, V t denotes the membrane potential at time t, τ = CR denotes the time constant, C is the membrane capacitance, R is the membrane resistance, K t is the self-feedback gate, I t is the membrane current. In this embodiment, the self-feedback gate is a gating mechanism used in neural networks to input the output of the network as feedback, which can help the network better learn and adjust parameters.

[0105] Step S1062, determine the neuron class, which includes excitatory neurons or inhibitory neurons;

[0106] To describe the self-feedback dynamics regulation mechanism of excitatory and inhibitory neurons to regularize the synaptic membrane potential of neurons. In order to dynamically maintain the balance of excitatory and inhibitory neurons, the membrane potential can be sent to a convolution layer with a sign activation function before being sent to a threshold function to determine whether the neuron is excited.

[0107] In some alternative embodiments, the determination of the neuron class can be described by the mathematical expression:

[0108]

[0109] where g denotes the convolution operation, θ denotes the sign function, and E t denotes whether the input neuron is an inhibitory or excitatory neuron, δ t is the Dirac function of the spike train at time t, V t is the membrane potential at time t, and O denotes the description of the spike firing process of the two types of neurons.

[0110] Regarding the spike firing process of neurons, to accurately describe the phenomenon of the bimodal change of neuron spike firing, excitatory neurons are defined as neurons that release positive spikes, and inhibitory neurons are defined as neurons that release negative spikes. The spike firing process of the two types of neurons can be described as:

[0111]

[0112] where V th denotes the membrane potential threshold, when the membrane potential V t exceeds the positive threshold, a positive peak occurs, and when the membrane potential V t is below the negative threshold, a negative peak occurs.

[0113] Step S1063, the error is calculated based on the root mean square cost function. The error between the model prediction result and the actual result can be calculated by using the root mean square cost function. By calculating the error, the performance of the feedforward pulse neural network can be evaluated to optimize and adjust the feedforward pulse neural network, so as to obtain the target spike recognition model.

[0114] In some optional embodiments, the root mean square error cost function is:

[0115]

[0116] Wherein, y' t represents the output of the last layer of the network at time t, represents the average activation rate of a given time window T, y i represents the true label of the spike, and M represents the sample size.

[0117] Step S1064, according to the neuron synapse self-feedback delay adjustment mechanism and the root mean square error cost function, the feedforward pulse neural network is updated as:

[0118]

[0119] In this embodiment, the neuron synapse self-feedback delay adjustment mechanism which can maintain the dynamic balance of excitatory neurons and inhibitory neurons and consider the millisecond-level delay of synaptic neurotransmitter release is explored. The convergence of the pulse neural network is accelerated, and the non-invasive traceable epileptiform spike is accurately identified.

[0120] In this embodiment, a spike recognition method is provided, which can be used in the above computer device, Figure 4 is a flowchart of the spike recognition method according to an embodiment of the present application, as Figure 4 shown, the flow includes the following steps:

[0121] Step S501, obtaining a brain electrical signal to be identified.

[0122] Step S502, inputting the brain electrical signal to be identified into a spike recognition model to identify a traceable epileptiform spike signal segment of the brain electrical signal to be identified.

[0123] In this embodiment of the present application, the spike recognition model is constructed by using the spike recognition model construction method of any one of the above embodiments.

[0124] The spike recognition method provided in this embodiment identifies the recognition result of the traceable epileptiform spike of the brain electrical signal to be identified through the spike recognition model, improves the recognition accuracy of the traceable epileptiform spike in the brain electrical signal, and further provides support for subsequent diagnosis and treatment.

[0125] A spiky wave recognition model construction device is also provided in the embodiment, which is used to implement the above-mentioned embodiments and preferred embodiments, and has been described above and will not be repeated here. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware is also possible and contemplated.

[0126] The embodiment provides a spiky wave recognition model construction device, as shown in Figure 5 The device comprises the following modules:

[0127] The device comprises the following modules:

[0128] The device comprises the following modules:

[0129] The device comprises the following modules:

[0130] The device comprises the following modules:

[0131] The device comprises the following modules:

[0132] The device comprises the following modules:

[0133] The further function description of each module and unit above is the same as the corresponding embodiment above, and will not be repeated here.

[0134] The spiky wave recognition model construction device in the embodiment is presented in the form of functional units, and the unit here refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and a memory executing one or more software or fixed programs, and / or other devices that can provide the above functions.

[0135] A spiky wave recognition device is provided in the embodiment, as shown in Figure 6 The device comprises the following modules:

[0136] The device comprises the following modules:

[0137] The spike recognition module 702 is used to input the EEG signal to be recognized into the spike recognition model and identify the traceable epileptiform spike signal segment of the EEG signal to be recognized.

[0138] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0139] In this embodiment, the spike recognition device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0140] This invention also provides a computer device having the above-described features. Figure 5 The spike recognition model construction device shown is the same as the one described above. Figure 6 The spike wave recognition device shown.

[0141] Please see Figure 7 , Figure 7 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 7 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 7 Take a processor 10 as an example.

[0142] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0143] The memory 20 stores instructions executable by the at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0144] The memory 20 can include a program storage area and a data storage area. The program storage area can store an operating system and application programs required by at least one function. The data storage area can store data created according to the use of the computer device, and the like. In addition, the memory 20 can include a high-speed random access memory, and can also include a non-transitory memory such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some optional embodiments, the memory 20 can optionally include a memory disposed remotely with respect to the processor 10, and these remote memories can be connected to the computer device through a network. Examples of the above network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0145] The memory 20 can include a volatile memory such as a random access memory, and can also include a non-volatile memory such as a flash memory, a hard disk, or a solid-state disk. The memory 20 can also include a combination of the above-mentioned kinds of memories.

[0146] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or communication networks.

[0147] The embodiments of the present application also provide a computer readable storage medium. The above method according to the embodiments of the present application can be implemented in hardware, firmware, or recorded in a storage medium, or implemented as computer code originally stored in a remote storage medium or non-transitory machine readable storage medium and downloaded to a local storage medium, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid-state disk, and the like. Further, the storage medium can also include a combination of the above-mentioned kinds of memories. It can be understood that the computer, the processor, the microprocessor controller, or the programmable hardware includes a storage component that can store or receive software or computer code, which, when accessed and executed by the computer, the processor, or the hardware, implements the method shown in the above embodiments.

[0148] Although the embodiments of the present application are described in conjunction with the accompanying drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A method for constructing a spike recognition model, characterized in that, The method includes: Acquiring EEG signals; The EEG signal is segmented to obtain spike wave EEG signal segments; The spike wave EEG signal segment is pulse-coded to obtain a pulse sequence; An initial neuron model is constructed based on the pulse sequence and neuronal dynamics mechanism. This includes: pre-setting the resting-state membrane potential, membrane capacitance, and membrane resistance of the neuron; determining the membrane potential of the neuron in the presence of membrane current input, wherein the membrane current is obtained by weighting the pulse currents of the presynaptic neuron; and establishing the initial neuron model based on the resting-state membrane potential, the membrane potential, the membrane capacitance, and the membrane resistance. This initial neuron model is used to describe the dynamic chaotic system when endogenous signals are transmitted from the brain to the measurement space. Based on the initial neuron model, a feedforward spiking neural network is constructed, which is used to perform feature mapping on the spiking sequence. Based on the neuronal synaptic self-feedback delay adjustment mechanism, the feedforward spiking neural network is updated to obtain a target spike recognition model; wherein, it includes: Describe the self-feedback delay synaptic modulation mechanism; Determine the neuron category; Error is calculated based on the root mean square cost function; The feedforward spiking neural network is updated based on the neuronal synaptic self-feedback delay adjustment mechanism and the root mean square error cost function. The neuronal synaptic self-feedback delay modulation mechanism includes: Where f represents the convolution operation, σ represents the sigmoid function, and δ t-1 Let V be the Dirac function of the pulse sequence at time t-1, ⊙ denotes the inner product of elements, and V t Let τ = CR represent the membrane potential at time t, where τ = CR represents the time constant, C is the membrane capacitance, R is the membrane resistance, and L is the membrane resistance. t For self-feedback gates, I t This represents the membrane current.

2. The method according to claim 1, characterized in that, The determination of neuron categories includes: Where g represents the convolution operation, θ represents the sign function, and EI t This indicates whether the input neuron is an inhibitory or excitatory neuron, δ t Let V be the Dirac function of the pulse sequence at time t. t Let t be the membrane potential at time t, and O represent the description of the impulse firing process for the two types of neurons: Among them, V th This represents the membrane potential threshold, when the membrane potential V t A positive peak value appears when the membrane potential V exceeds the positive threshold. t A negative peak occurs when the value is below the negative threshold.

3. The method according to claim 1, characterized in that, The root mean square error cost function is: Where, y′ t This represents the output at time t. y represents the average activation rate for a given time window T. i M represents the true label of the spike wave, and M represents the sample size.

4. A spike wave recognition method, characterized in that, The method includes: Acquire the EEG signal to be identified; The EEG signal to be identified is input into the spike recognition model to identify the traceable epileptiform spike signal segment of the EEG signal to be identified, wherein the spike recognition model is constructed using the spike recognition model construction method according to any one of claims 1-3.

5. A spike recognition model construction device, characterized in that, The device includes: The acquisition module is used to acquire electroencephalogram (EEG) signals; The segmentation module is used to segment the electroencephalogram (EEG) signal to obtain spike wave EEG signal segments; The encoding module is used to perform pulse encoding on the spike EEG signal segment to obtain a pulse sequence; A neuron model construction module is used to construct an initial neuron model based on the pulse sequence and neuronal dynamics mechanism; wherein, it includes: pre-setting the resting-state membrane potential, membrane capacitance, and membrane resistance of the neuron; determining the membrane potential of the neuron in the presence of membrane current input, wherein the membrane current is obtained by weighting the pulse current of the presynaptic neuron; and establishing the initial neuron model based on the resting-state membrane potential, the membrane potential, the membrane capacitance, and the membrane resistance, wherein the initial neuron model is used to describe the dynamic chaotic system when endogenous signals in the brain are transmitted to the measurement space; A spiking neural network construction module is used to construct a feedforward spiking neural network based on the initial neuron model, wherein the feedforward spiking neural network is used to perform feature mapping on the spiking sequence; A network update module is used to update the feedforward spiking neural network based on the neuronal synaptic self-feedback delay adjustment mechanism to obtain a target spike recognition model; wherein, it includes: Describe the self-feedback delay synaptic modulation mechanism; Determine the neuron category; Error is calculated based on the root mean square cost function; The feedforward spiking neural network is updated based on the neuronal synaptic self-feedback delay adjustment mechanism and the root mean square error cost function. The neuronal synaptic self-feedback delay modulation mechanism includes: Where f represents the convolution operation, σ represents the sigmoid function, and δ t-1 Let V be the Dirac function of the pulse sequence at time t-1, ⊙ denotes the inner product of elements, and V t Let τ = CR represent the membrane potential at time t, where τ = CR represents the time constant, C is the membrane capacitance, R is the membrane resistance, and K is the capacitance. t For self-feedback gates, I t This represents the membrane current.

6. A spike wave recognition device, characterized in that, The device includes: The module for acquiring EEG signals to be identified is used to acquire EEG signals to be identified. The spike recognition module is used to input the EEG signal to be recognized into the spike recognition model and recognize the traceable epileptiform spike signal segment of the EEG signal to be recognized, wherein the spike recognition model is constructed using the spike recognition model construction device according to any one of claims 1 to 3.

7. A computer device, characterized in that, include: The system includes a memory and a processor, which are interconnected. The memory stores computer instructions, and the processor executes the computer instructions to perform the spike recognition model construction method of any one of claims 1 to 3 or the spike recognition method of claim 4.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to execute the spike recognition model construction method of any one of claims 1 to 3 or the spike recognition method of claim 4.

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