Apparatus and method for performing atomic operations

Abstract

An apparatus and method for performing atomic operation. The apparatus for performing atomic operation comprises a remote direct memory access network interface card (RNIC) and an input / output memory management unit (IOMMU), the RNIC is configured to send a read memory instruction to the IOMMU, the read memory instruction comprises a target storage address; the IOMMU is configured to read operation data from a target storage space corresponding to the target storage address in an exclusive manner, and send the operation data to the RNIC, the target storage space is provided by a memory; the RNIC is further configured to perform an operation on the operation data to obtain an operation result, and write the operation result into the target storage space through the IOMMU. The apparatus provides a basic guarantee for the consistency of data storage in the memory, and avoids the problem of data inconsistency.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to an apparatus and method for performing atomic operations. Background Technology

[0002] In the fields of artificial intelligence (AI) and high-performance computing (HPC), the computing performance of a single node is far from sufficient to meet the demands, typically requiring multiple nodes to form a cluster for computation. With the increasing volume of communication between nodes, the resulting memory copying and communication protocol processing overhead consume more and more central processing unit (CPU) resources. Therefore, Remote Direct Memory Access (RDMA) technology was proposed, enabling a node to directly transfer data to the memory of another node over a network without affecting the operating system, thereby reducing CPU resource consumption.

[0003] However, when multiple nodes (such as multiple RDMA network cards or multiple processes) access the same memory address simultaneously, ensuring data consistency at that memory address is a problem that urgently needs to be solved. Summary of the Invention

[0004] This application provides an apparatus and method for performing atomic operations, which provides a fundamental guarantee for the consistency of data storage in memory and avoids data inconsistency problems.

[0005] In a first aspect, this application provides an apparatus for performing atomic operations, comprising: a remote direct memory access network interface card (RNIC) and an input / output memory management unit (IOMMU); wherein, the RNIC is configured to send a memory read instruction to the IOMMU, the memory read instruction including a target memory address; the IOMMU is configured to exclusively read computational data from a target memory space corresponding to the target memory address and send the computational data to the RNIC, the target memory space being provided by memory; the RNIC is further configured to perform computational operations on the computational data to obtain a computational result, and write the computational result into the target memory space through the IOMMU.

[0006] In the execution of atomic operations, the IOMMU in the service node can exclusively access the target storage space in memory where one of the data to be operated is stored. That is, the IOMMU locks the target storage space, and only it can read / write data from it. Other IOMMUs in the service node or remote service node cannot access the target storage space at the same time. This provides a basic guarantee for the consistency of data storage in memory and avoids the problem of data inconsistency caused by other IOMMUs modifying the data in the storage space after the IOMMU reads the data.

[0007] In one possible implementation, the IOMMU is specifically used to: read the computational data from the target storage space after marking the target storage space as exclusive.

[0008] The IOMMU in the service node marks the target storage space as exclusive and then reads the computation data from it. In this way, the IOMMU can lock the target storage space, allowing only itself to read / write data from it. Other IOMMUs in the service node or remote service nodes cannot access the target storage space at the same time, preventing other IOMMUs from modifying the data in the storage space and ensuring the consistency of data storage in memory.

[0009] In one possible implementation, the IOMMU is specifically used to mark the target storage space as the exclusive state line by line according to the cache line.

[0010] In one possible implementation, the target storage space is greater than 8 bytes.

[0011] When IOMMU performs read or write operations on memory, it can set the length of the data being read / written to a cache line. A cache line can typically be 1 byte (B) to 256 bytes, such as 64B, 128B, or 256B. Therefore, IOMMU can perform exclusive locking in units of cache lines. That is, when IOMMU reads memory, it can exclusively lock the storage space of the cache line length (greater than 8 bytes). This solves the problem that existing technologies can only lock 8 bytes of storage space at a time, thus failing to meet the data consistency requirements of simultaneously accessing larger storage spaces.

[0012] In one possible implementation, the IOMMU is further configured to: mark the target storage space as shared after writing the operation result into the target storage space.

[0013] After an atomic operation is completed, the IOMMU can release its exclusive access to the target memory space, marking the target memory space as shared, so that other IOMMUs can read / write to the target memory space.

[0014] In one possible implementation, the IOMMU is specifically used to mark the target storage space as the shared state line by line according to the cache line.

[0015] In one possible implementation, the IOMMU is further configured to: after writing the computation result to the target storage space, send a response message to the RNIC, the response message being used to instruct the IOMMU to terminate access to the target storage space.

[0016] IOMMU can send a response message to RNIC to inform RNIC that it has ended access to the target memory space, so that RNIC can process other atomic operation requests corresponding to the target memory space.

[0017] In one possible implementation, the RNIC is further configured to send a Remote Direct Memory Access (RDMA) message containing the computation data to a remote server node, so that the remote server node performs the computation operation on the received computation data.

[0018] The RNIC sends an RDMA message to the remote service node, sending the computation data to be processed before the operation to the remote service node for its use. This allows the remote service node to perform the same operation on the received data and obtain the result, enabling remote service nodes to access the memory corresponding to the local service node while ensuring data consistency in memory.

[0019] Secondly, this application provides a method for performing atomic operations, comprising: an RNIC sending a memory read instruction to an IOMMU, the memory read instruction including a target memory address; the IOMMU reading computation data from a target memory space corresponding to the target memory address in an exclusive manner, and sending the computation data to the RNIC; the RNIC performing computation operations on the computation data to obtain a computation result, and writing the computation result into the target memory space through the IOMMU.

[0020] In one possible implementation, the IOMMU reads computation data from the target storage space corresponding to the target storage address in an exclusive manner, including: after marking the target storage space as exclusive, the IOMMU reads the computation data from the target storage space.

[0021] In one possible implementation, the IOMMU marks the target storage space as exclusive by: the IOMMU marking the target storage space as exclusive line by line according to the cache line.

[0022] In one possible implementation, the target storage space is greater than 8 bytes.

[0023] In one possible implementation, after writing the computation result to the target storage space through the IOMMU, the method further includes: the IOMMU marking the target storage space as a shared state.

[0024] In one possible implementation, the IOMMU marks the target storage space as shared, including: the IOMMU marks the target storage space as shared line by line according to the cache line.

[0025] In one possible implementation, after writing the computation result to the target storage space through the IOMMU, the method further includes: the IOMMU sending a response message to the RNIC, the response message being used to instruct the IOMMU to terminate access to the target storage space.

[0026] In one possible implementation, after the RNIC performs a computational operation on the computational data to obtain the computational result, the RNIC further includes sending an RDMA message containing the computational data to a remote server node, so that the remote server node performs the computational operation on the received computational data. Attached Figure Description

[0027] Figure 1 Here is an example structural diagram of a multi-node cluster;

[0028] Figure 2 Here is an example structural diagram of a multi-node cluster;

[0029] Figure 3 An exemplary structural diagram of a device for performing atomic operations according to this application;

[0030] Figure 4 This is an exemplary flowchart of a method for performing atomic operations according to this application. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0032] The terms "first," "second," etc., used in the specification, embodiments, claims, and drawings of this application are for distinguishing purposes only and should not be construed as indicating or implying relative importance or order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as including a series of steps or units. A method, system, product, or apparatus is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses.

[0033] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0034] Figure 1 Here is an example structural diagram of a multi-node cluster, such as Figure 1 As shown, in the fields of AI and HPC, the computing performance of a single node is far from sufficient to meet the demands, so a cluster composed of multiple nodes can be formed for computing. This example includes three service nodes (host1, host2, and host3), each containing a network interface card (NIC). As the number of service nodes increases, communication between them becomes more frequent, and data synchronization communication between service nodes becomes a bottleneck for further cluster expansion.

[0035] RDMA technology emerged to address this need. RDMA rapidly moves data from one server node to the memory of another over a network without impacting the operating system, significantly reducing CPU resource consumption. RDMA can be simply understood as a dedicated hardware unit for handling data movement within memory; both the source and destination are CPU memory, resulting in low latency. The network interface card in a server node supporting RDMA technology is called an RDMA network interface card (RNIC).

[0036] Figure 2 Here is an example structural diagram of a multi-node cluster. Figure 2 by Figure 1 Taking two service nodes (host1 and host2) in the cluster as an example, both host1 and host2 support RDMA. Both host1 and host2 can use the following... Figure 3 In the structure shown, host1 and host2 are connected through their respective RNICs, that is, RNIC1 in host1 and RNIC2 in host2 are connected to each other via cable or wirelessly.

[0037] It should be noted that, Figure 2 The present invention only illustrates one structure of a multi-node cluster, but does not limit the structure of the multi-node cluster. That is, the multi-node cluster may include more service nodes, and the structure of each service node may be the same or different. This application does not make any specific limitations in this regard.

[0038] Figure 3 An exemplary structural diagram of the apparatus for performing atomic operations according to this application is shown below. Figure 3 As shown, the device can be applied to the aforementioned service node (or host), including memory, bus, memory management unit (MMU), input output memory management unit (IOMMU), and RNIC.

[0039] A memory management unit (MMU) is a piece of computer hardware responsible for handling processor memory access requests. Its functions include virtual address to physical address translation (i.e., virtual memory management), memory protection, and processor cache control. An independent memory management unit (IOMMU) is a memory management unit that connects an I / O bus with direct memory access (DMA) capability to memory. For example, like a traditional MMU (which translates processor-visible virtual addresses into physical addresses), an IOMMU can map device-visible virtual addresses (also referred to as device addresses or I / O addresses in this document) to physical addresses.

[0040] It should be noted that the IOMMU can also be called the system memory management unit (SMMU), and ARM defines its IOMMU version as SMMU.

[0041] Memory, also known as internal memory or main memory, is used to temporarily store data processed by the processor, as well as data exchanged with external storage devices such as hard drives. Memory acts as a bridge between external storage and the processor; all programs in a server node run within memory. Once a server node starts running, the operating system retrieves the necessary data from memory to the processor for computation. After the computation is complete, the processor sends the result back. RDMA allows other server nodes to directly access data in memory via RNIC, without going through the processor.

[0042] An RNIC is computer hardware designed to allow service nodes to communicate within a network, enabling multiple service nodes to interconnect via cable or wireless means. Multiple service node RNICs can communicate with each other by transmitting RDMA messages.

[0043] Furthermore, the MMU and IOMMU are interconnected via a bus and memory. The bus is an internal structure through which the various components of the service node are connected.

[0044] The processor, as the computing and control core of the service node, is the final execution unit for information processing and program execution.

[0045] To ensure data consistency at this memory address, the apparatus for performing atomic operations in this application can employ the following steps to perform atomic operations, such as... Figure 4 As shown:

[0046] S0. The remote server node sends an RDMA message to the RNIC, which includes information indicating atomic operations.

[0047] An atomic operation is one or a series of operations that cannot be interrupted. It is the smallest unit of execution process, so an atomic operation will not be interrupted by the operations of other threads during its execution.

[0048] Atomic operations generally consist of three steps: reading memory, performing an operation, and writing memory. These three steps can also be referred to as read, modify, and overwrite steps, respectively. Reading memory refers to retrieving data from the target memory space corresponding to the target memory address. The operation involves adding (or subtracting) the data obtained in the read memory step with the data contained in the information indicating the atomic operation to obtain the result, or comparing the data obtained in the read memory step with the data contained in the information indicating the atomic operation to obtain the result. Writing memory refers to writing the result obtained in the operation step into the target memory space corresponding to the target memory address. Due to the requirements of atomic operations, these three steps—reading memory, performing an operation, and writing memory—must be executed in one continuous process.

[0049] The RNIC of the serving node can receive remote direct memory access (RDMA) messages sent by the remote serving node (which can be the RNIC of the remote serving node). These RDMA messages include information indicating atomic operations. For example, if the remote serving node wants to perform arithmetic operations on data stored in the memory corresponding to the serving node, it can send an RDMA message to the serving node, carrying information related to the atomic operation within the message. For example, atomic operations can include reading memory, performing arithmetic operations, and writing memory. Correspondingly, the information related to the atomic operation can include the target memory address of the data stored in the memory corresponding to the serving node, another piece of data to be processed, and the type of operation (e.g., addition).

[0050] S1 and RNIC send a memory read instruction to the IOMMU, which includes the target memory address.

[0051] After receiving the RDMA message, the RNIC of the service node parses the RDMA message to obtain the information related to the atomic operation carried in the RDMA message. Then, it sends a memory read instruction to the IOMMU, instructing the IOMMU to read data from the target memory space corresponding to the target memory address. The target memory address can be a virtual address.

[0052] S2 and IOMMU read computation data from the target storage space corresponding to the target storage address in an exclusive manner. The target storage space is provided by memory.

[0053] IOMMU is a piece of computer hardware responsible for handling memory access requests. After receiving a read memory instruction from RNIC, it initiates a read operation on memory according to the target memory address in the read memory instruction.

[0054] In this application, the IOMMU accesses the target memory space corresponding to the target memory address exclusively to read data. That is, the IOMMU locks the target memory space, allowing only itself to read / write data from it. Other IOMMUs on the service node or remote service node cannot access the target memory space simultaneously. This provides a fundamental guarantee for data storage consistency in memory, preventing other IOMMUs from modifying the data in the target memory space after the IOMMU has read it, thus avoiding data inconsistency. For example, the IOMMU sends a read-only instruction (ReadUnique) to the memory for the target memory space, marking it as Exclusive (E) in the read-only instruction. The bus between the IOMMU and memory recognizes the E-state marking in the read-only instruction, making other bus operations, including the processor accessing the target memory space through the MMU and other RNICs accessing the target memory space through the IOMMU, inaccessible to that target memory space.

[0055] Optionally, the IOMMU can mark the target storage space as exclusive (E-state) line by line according to the cache line.

[0056] In this application, the IOMMU performs read or write operations on memory and can set the length of the data to be read / written to a cache line. The cache line can typically be 1 byte (B) to 256B, such as 64B, 128B, or 256B. Therefore, the IOMMU can perform E-mode locking in the above read-only instructions in units of cache lines. That is, when the IOMMU reads memory, it can exclusively occupy the storage space of the cache line length.

[0057] S3 and IOMMU send the computation data to RNIC.

[0058] IOMMU reads the computation data from the target storage space and then sends the computation data to RNIC.

[0059] S4 and RNIC perform calculations on the data to obtain the results.

[0060] The RNIC receives computation data from the IOMMU, performs atomic operations on the computation data to obtain the computation result, for example, adding (subtracting) the data contained in the information related to the atomic operation and the computation data to obtain the sum (difference) result, or comparing the data contained in the information related to the atomic operation and the computation data to obtain the comparison result.

[0061] S5 and RNIC send a write-to-memory instruction to the IOMMU, which includes the calculation result.

[0062] The RNIC passes the computation result to the IOMMU via a write-back instruction, and the RNIC saves the computation data before the operation.

[0063] S6 and IOMMU write the calculation results to the target storage space.

[0064] In one possible implementation, after receiving a write-to-memory instruction, the IOMMU matches the result of the write-to-memory instruction to the atomic operation described in the previous steps, determines the target memory address corresponding to that atomic operation, and stores the result in the target memory space corresponding to that address. Thus, if the RNIC receives requests for multiple atomic operations, to avoid storing the results of these operations in the wrong memory space, the IOMMU can first match the results from the RNIC with the atomic operations to be processed, and then store the results in the target memory space corresponding to the matched atomic operations. The IOMMU's matching can be based on the results of the operations and the identification information in the atomic operations, without specific limitations.

[0065] The storage space for the computational data is filled with the computational results obtained after performing operations on the computational data, so as to be consistent with the computational results obtained by the remote service node performing the same operations on the computational data in the following text, thereby achieving data storage consistency in memory.

[0066] S7 and IOMMU mark the target storage space as shared.

[0067] After an atomic operation is completed, the IOMMU can release its exclusive access to the target memory space, marking the target memory space as shared, so that other IOMMUs can read / write to the target memory space.

[0068] S8, IOMMU sends a response message to RNIC, which instructs IOMMU to terminate access to the target storage space.

[0069] IOMMU can send a response message to RNIC to inform RNIC that it has ended access to the target memory space, so that RNIC can process other atomic operation requests corresponding to the target memory space.

[0070] S9 and RNIC send an RDMA message to the remote service node. The RDMA message includes computation data.

[0071] The RNIC sends a response (RDMA message) to the remote service node, sending the computation data from before the operation to the remote service node for its use. This allows the remote service node to perform the same operation on the received data and obtain the result, enabling remote access to the memory of the local service node while ensuring data consistency in memory.

[0072] Optionally, the atomic operations described above can be masked atomic operations.

[0073] It should be noted that the above atomic operations are described as a series of steps or operations. It should be understood that the above processes can be executed in various orders and / or occur simultaneously, and are not limited to the above execution order.

[0074] In the execution of atomic operations, the IOMMU in the service node can exclusively access the target storage space in memory where one of the data to be operated is stored. That is, the IOMMU locks the target storage space, and only it can read / write data from it. Other IOMMUs in the service node or remote service node cannot access the target storage space at the same time. This provides a basic guarantee for the consistency of data storage in memory and avoids the problem of data inconsistency caused by other IOMMUs modifying the data in the target storage space after the IOMMU reads the data.

[0075] In implementation, each step of the above method embodiments can be completed by integrated logic circuits in the processor hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this application can be directly implemented by a hardware encoding processor, or by a combination of hardware and software modules in the encoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0076] The memory mentioned in the above embodiments can be volatile memory or non-volatile memory, or may include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0077] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0078] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0079] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0080] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0081] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0082] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0083] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An apparatus for performing atomic operations, characterized in that, include: Remote Direct Memory Access Network Interface (RNIC) and Input / Output Memory Management Unit (IOMMU); among them... The RNIC is used to send a memory read instruction to the IOMMU, and the memory read instruction includes the target memory address; The IOMMU is used to read computation data from the target storage space corresponding to the target storage address in an exclusive manner, and send the computation data to the RNIC, wherein the target storage space is provided by memory; The RNIC is also used to perform calculations on the computational data to obtain calculation results, and to write the calculation results into the target storage space through the IOMMU.

2. The apparatus according to claim 1, characterized in that, The IOMMU is specifically used for: After marking the target storage space as exclusive, the computational data is read from the target storage space.

3. The apparatus according to claim 2, characterized in that, The IOMMU is specifically used to mark the target storage space as the exclusive state line by line according to the cache line.

4. The apparatus according to any one of claims 1-3, characterized in that, The IOMMU is also used for: After writing the calculation result into the target storage space, the target storage space is marked as shared.

5. The apparatus according to claim 4, characterized in that, The IOMMU is specifically used to mark the target storage space as the shared state line by line according to the cache line.

6. The apparatus according to any one of claims 1-3 and 5, characterized in that, The IOMMU is also used for: After writing the calculation result into the target storage space, a response message is sent to the RNIC, which instructs the IOMMU to terminate access to the target storage space.

7. The apparatus according to any one of claims 1-3 and 5, characterized in that, The RNIC is also used to send a Remote Direct Memory Access (RDMA) message containing the computation data to a remote service node, so that the remote service node can perform the computation operation on the received computation data.

8. A method for performing atomic operations, characterized in that, include: The remote direct memory access network interface card (RNIC) sends a memory read instruction to the input / output memory management unit (IOMMU), and the memory read instruction includes the target memory address; The IOMMU reads computation data from the target storage space corresponding to the target storage address in an exclusive manner, and sends the computation data to the RNIC; The RNIC performs calculations on the computational data to obtain the calculation results, and writes the calculation results into the target storage space through the IOMMU.

9. The method according to claim 8, characterized in that, The IOMMU reads computational data from the target storage space corresponding to the target storage address in an exclusive manner, including: After marking the target storage space as exclusive, the IOMMU reads the computational data from the target storage space.

10. The method according to claim 9, characterized in that, The IOMMU marks the target storage space as exclusive, including: The IOMMU marks the target storage space as exclusive according to the cache line.

11. The method according to any one of claims 8-10, characterized in that, After writing the calculation result to the target storage space through the IOMMU, the method further includes: The IOMMU marks the target storage space as shared.

12. The method according to claim 11, characterized in that, The IOMMU marks the target storage space as shared, including: The IOMMU marks the target storage space as the shared state line by line according to the cache line.

13. The method according to any one of claims 8-10, 12, characterized in that, After writing the calculation result to the target storage space through the IOMMU, the method further includes: The IOMMU sends a response message to the RNIC, which instructs the IOMMU to terminate access to the target storage space.

14. The method according to any one of claims 8-10, 12, characterized in that, After the RNIC performs calculations on the computational data to obtain the calculation result, it further includes: The RNIC sends a Remote Direct Memory Access (RDMA) message containing the computation data to the remote service node, so that the remote service node can perform the computation operation on the received computation data.

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