A continuous medium coherent array edge emitting semiconductor laser and method of fabrication

Abstract

The application discloses a continuous medium coherent array edge emitting semiconductor laser and a preparation method thereof. The laser comprises a conductive substrate, an epitaxial layer formed on the upper surface of the conductive substrate, a rear-end optical medium waveguide area and a front-end optical medium waveguide area located on both sides of the epitaxial layer. The upper surface of the epitaxial layer is provided with a one-dimensional array ridge waveguide area. A rear-end phase grating layer is etched on the rear-end optical medium waveguide area, and a front-end phase grating layer is etched on the front-end optical medium waveguide area. A P-face electrode is arranged on the upper surface of the one-dimensional array ridge waveguide area, an N-face electrode is arranged on the lower surface of the conductive substrate, a high-reflection film is arranged on the end surface of the rear-end phase grating layer, and an anti-reflection film is arranged on the end surface of the front-end phase grating layer. The laser of the application can realize in-phase mode lasing without the selection of supermodes by external optical elements, and the optical field has an ultra-narrow divergence angle in the slow-axis direction of the far field, so that the coupling efficiency of the array semiconductor laser and the optical fiber is greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor laser, in particular to a continuous medium coherent array edge emitting semiconductor laser and a preparation method thereof. BACKGROUND

[0002] Semiconductor laser is a direct modulation light source, which has the characteristics of high efficiency, easy integration, wide waveband coverage, long service life, etc., and is widely used in the fields of laser communication, laser processing, laser detection, etc. In order to improve the output power of semiconductor laser, array semiconductor laser mode is proposed, but the beam quality in the slow axis direction is very poor, which seriously limits its application range.

[0003] The traditional array semiconductor laser realizes coherence in two ways: evanescent wave coherent coupling and leaky wave coherent coupling. However, both of these two ways belong to weak coupling mode and the devices tend to operate in anti-phase mode. The limitation of the number of array coupled ridge waveguides and the far-field light field double-lobe phenomenon are not ideal for improving the power of array semiconductor laser and the beam quality in the slow axis direction. SUMMARY

[0004] In view of the deficiencies in the prior art, the present application provides a continuous medium coherent array edge emitting semiconductor laser and a preparation method thereof. The laser realizes coherent of a large number of ridge waveguide arrays through Talbot diffraction coupling, and greatly improves the power of array semiconductor laser and the beam quality in the slow axis direction to near diffraction limit.

[0005] The present application discloses a continuous medium coherent array edge emitting semiconductor laser, comprising: a conductive substrate, an epitaxial layer formed on the upper surface of the conductive substrate, and a rear-end optical medium waveguide region and a front-end optical medium waveguide region formed on the upper surface of the conductive substrate, wherein the rear-end optical medium waveguide region and the front-end optical medium waveguide region are located on both sides of the epitaxial layer.

[0006] The upper surface of the epitaxial layer is provided with a one-dimensional array ridge waveguide region, and the length of the one-dimensional array ridge waveguide region satisfies the Talbot effect.

[0007] The rear-end optical medium waveguide region comprises a first optical medium waveguide layer, a second optical medium waveguide layer and a third optical medium waveguide layer arranged in order from bottom to top, and a rear-end phase grating layer is etched on the second optical medium waveguide layer.

[0008] The front-end optical medium waveguide region comprises a fourth optical medium waveguide layer, a fifth optical medium waveguide layer and a sixth optical medium waveguide layer arranged in order from bottom to top, and a front-end phase grating layer is etched on the fifth optical medium waveguide layer, wherein the lengths of the front-end phase grating layer and the rear-end phase grating layer are different.

[0009] The upper surface of the one-dimensional array ridge waveguide region is provided with a P-plane electrode, the lower surface of the conductive substrate is provided with an N-plane electrode, the end face of the rear phase grating layer is provided with a high-reflection film, and the end face of the front phase grating layer is provided with an anti-reflection film.

[0010] As a further improvement of the present invention, the epitaxial layer includes, from bottom to top, an N-type confinement layer, an N-type waveguide layer, an active region, a P-type waveguide layer, a P-type confinement layer, and a highly doped layer; wherein, the thickness of the N-type waveguide layer is greater than the thickness of the P-type waveguide layer.

[0011] As a further improvement of the present invention, the length of the one-dimensional array ridge waveguide region is an integer multiple or a fractional multiple of the Talbot distance; wherein, the Talbot distance Z T The calculation formula is:

[0012] Z T =2nd 2 / λ

[0013] In the formula, n is the equivalent refractive index of the N-type waveguide layer, the active region, and the P-type waveguide layer, d is the ridge waveguide array period of the one-dimensional array ridge waveguide region, and λ is the free space light wavelength generated by the active region.

[0014] As a further improvement of the present invention, the one-dimensional array ridge waveguide region includes a ridge waveguide array composed of multiple identical ridge waveguide units with rectangular cross sections. The length of the one-dimensional array ridge waveguide region is 500μm to 2000μm, the width is 1mm to 10mm, the depth is 0.8μm to 1μm, and the array period is 5μm to 10μm.

[0015] As a further improvement of the present invention, an electrical insulating layer is provided between adjacent ridge waveguide units. The material of the electrical insulating layer includes one of SiO2 and Si3N4, and the thickness of the electrical insulating layer is 100nm to 500nm.

[0016] As a further improvement of the present invention, the length of the rear optical dielectric waveguide region is less than the length of the front optical dielectric waveguide region, and the length of the rear phase grating layer is less than the length of the front phase grating layer; the dimensional parameters of the rear phase grating layer are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.3μm to 3μm; the dimensional parameters of the front phase grating layer are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.6μm to 6μm.

[0017] As a further improvement of the present invention, the material and refractive index of the first optical dielectric waveguide layer are the same as those of the third optical dielectric waveguide layer, and the refractive index of the first optical dielectric waveguide layer is less than that of the second optical dielectric waveguide layer.

[0018] The material and refractive index of the fourth optical medium waveguide layer are the same as those of the sixth optical medium waveguide layer, but the refractive index of the fourth optical medium waveguide layer is less than that of the fifth optical medium waveguide layer.

[0019] As a further improvement of the present invention

[0020] The conductive substrate is made of one of the following materials: silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide.

[0021] The P-side electrode comprises one or more of titanium, gold, and platinum;

[0022] The N-face electrode includes one or more of germanium and palladium.

[0023] As a further improvement of the present invention

[0024] The high-reflectivity film is composed of alternating SiO2 and Ta2O5 layers or SiO2 and Al2O3 layers, with each layer having a thickness of 100nm to 300nm and a reflectivity of 97% to 99%.

[0025] The antireflective film consists of alternating layers of SiO2 and Ta2O5 or SiO2 and Al2O3, with each layer having a thickness of 100 nm to 300 nm and a reflectivity of 3% to 4%.

[0026] This invention also discloses a method for fabricating a continuous dielectric coherent array side-emitting semiconductor laser, comprising:

[0027] Select a conductive substrate;

[0028] An epitaxial layer is deposited on the upper surface of a conductive substrate;

[0029] A one-dimensional arrayed ridge waveguide region is obtained by etching ridge waveguide units on the upper surface of the epitaxial layer.

[0030] The epitaxial layers on both sides of the one-dimensional array ridge waveguide region are etched to expose the substrate, and two optical dielectric waveguides are deposited in sequence to obtain the first and second optical dielectric waveguide layers of the rear optical dielectric waveguide region, and the fourth and fifth optical dielectric waveguide layers of the front optical dielectric waveguide region.

[0031] A rear-end phase grating layer is etched on the second optical dielectric waveguide layer, and a front-end phase grating layer is etched on the fifth optical dielectric waveguide layer.

[0032] A third optical dielectric waveguide is deposited on the phase grating layer to obtain the third optical dielectric waveguide layer in the rear optical dielectric waveguide region and the sixth optical dielectric waveguide layer in the front optical dielectric waveguide region.

[0033] The three-layer optical dielectric waveguide layer deposited on the surface of the one-dimensional array ridge waveguide region is thinned and polished to form an electrically insulating layer.

[0034] P-surface electrodes are deposited on the upper surface of the one-dimensional array ridge waveguide region;

[0035] N-face electrodes are deposited on the lower surface of a conductive substrate by vapor deposition;

[0036] A high-reflectivity film is deposited on the end face of the back-end phase grating layer;

[0037] An antireflection film is deposited on the end face of the front-end phase grating layer.

[0038] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0039] This invention achieves Talbot optical field distribution by etching a one-dimensional array ridge waveguide region that satisfies the Talbot effect, enabling Talbot diffraction coupling. Furthermore, by etching and filling three layers of optical dielectric waveguide regions of different lengths on both sides of the one-dimensional array ridge waveguide region, and introducing grating phase layers of different lengths, in-phase mode operation of the device is realized. This invention is not only simple and low-cost, but also provides a potential method for fabricating high-power, high-beam-quality, large-size semiconductor laser arrays. Attached Figure Description

[0040] Fig. 1 This is a side view of the continuous dielectric coherent array side-emitting semiconductor laser disclosed in this invention;

[0041] Fig. 2 This is a top view of the continuous dielectric coherent array side-emitting semiconductor laser disclosed in this invention;

[0042] Fig. 3 This is a schematic diagram of the front cavity surface of the continuous dielectric coherent array side-emitting semiconductor laser disclosed in this invention;

[0043] Fig. 4 This is a schematic diagram of the front cavity surface of the continuous dielectric coherent array side-emitting semiconductor laser disclosed in this invention.

[0044] In the picture:

[0045] 1: N-face electrode; 2: Conductive substrate; 3: N-type confinement layer; 4: N-type waveguide layer; 5: Active region; 6: P-type waveguide layer; 7: P-type confinement layer; 8: Highly doped layer; 9: P-face electrode; 10: Rear optical dielectric waveguide region; 11: Third optical dielectric waveguide layer; 12: Second optical dielectric waveguide layer; 13: First optical dielectric waveguide layer; 14: Front optical dielectric waveguide region; 15: Sixth optical dielectric waveguide layer; 16: Fifth optical dielectric waveguide layer; 17: Fourth optical dielectric waveguide layer; 18: Rear phase grating layer; 19: One-dimensional array ridge waveguide region; 20: Ridge waveguide unit; 21: Electrically insulating layer; 22: Front phase grating layer; 23: High reflection coating; 24: Anti-reflection coating; 25: Fast axis collimating lens. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] The present invention will now be described in further detail with reference to the accompanying drawings:

[0048] like Figs. 1-4 As shown, this invention provides a continuous dielectric coherent array side-emitting semiconductor laser. This laser can achieve in-phase mode lasing without the need for external optical elements to select the supermode, and the optical field has an ultra-narrow divergence angle in the far-field slow axis direction, greatly improving the coupling efficiency between the array semiconductor laser and the optical fiber. The laser includes: a conductive substrate 2, an epitaxial layer formed on the upper surface of the conductive substrate 2, and a rear optical dielectric waveguide region 10 and a front optical dielectric waveguide region 14 formed on the upper surface of the conductive substrate, with the rear optical dielectric waveguide region 10 and the front optical dielectric waveguide region 14 located on opposite sides of the epitaxial layer; wherein,

[0049] The epitaxial layer of the present invention includes an N-type confinement layer 3, an N-type waveguide layer 4, an active region 5, a P-type waveguide layer 6, a P-type confinement layer 7, and a highly doped layer 8, sequentially deposited on the upper surface of a conductive substrate 2; wherein the thickness of the N-type waveguide layer 4 is greater than the thickness of the P-type waveguide layer 6. Preferably, the N-type confinement layer 3 is an N-type AlGaAs confinement layer, the N-type waveguide layer 4 is an N-type AlGaAs waveguide layer, the active region 5 is an InGaAs / GaAs single quantum well active region, the P-type waveguide layer 6 is a P-type AlGaAs waveguide layer, the P-type confinement layer 7 is a P-type AlGaAs confinement layer, and the highly doped layer 8 is a GaAs highly doped layer.

[0050] In this invention, a one-dimensional arrayed ridge waveguide region 19 is etched on the upper surface (highly doped layer 8) of the epitaxial layer. The length of the one-dimensional arrayed ridge waveguide region 19 satisfies the Talbot effect, that is, the length of the one-dimensional arrayed ridge waveguide region 19 is an integer multiple or a fractional multiple of the Talbot distance; wherein, the Talbot distance Z T The calculation formula for Z is: T =2nd 2 / λ; where n is the equivalent refractive index of the N-type waveguide layer 4, the active region 5, and the P-type waveguide layer 6, d is the ridge waveguide array period of the one-dimensional array ridge waveguide region 19, and λ is the free-space light wavelength generated by the active region 5. The one-dimensional array ridge waveguide region 19 includes a ridge waveguide array composed of multiple identical ridge waveguide units 20 with rectangular cross-sections. The length of the one-dimensional array ridge waveguide region 19 is 500μm to 2000μm, the width is 1mm to 10mm, the depth is 0.8μm to 1μm, and the array period is 5μm to 10μm. An electrical insulating layer 21 is disposed between adjacent ridge waveguide units 20. The material of the electrical insulating layer 21 includes one of SiO2 and Si3N4, and the thickness of the electrical insulating layer 21 is 100nm to 500nm.

[0051] The rear optical dielectric waveguide region 10 of the present invention includes a first optical dielectric waveguide layer 13, a second optical dielectric waveguide layer 12, and a third optical dielectric waveguide layer 11 arranged sequentially from bottom to top. A rear phase grating layer 18 is etched on the second optical dielectric waveguide layer 12. The front optical dielectric waveguide region 14 of the present invention includes a fourth optical dielectric waveguide layer 17, a fifth optical dielectric waveguide layer 16, and a sixth optical dielectric waveguide layer 15 arranged sequentially from bottom to top. A front phase grating layer 22 is etched on the fifth optical dielectric waveguide layer 16. The front phase grating layer 22 has a different length than the rear phase grating layer 18. The length of the rear optical dielectric waveguide region (first optical dielectric waveguide layer 13, second optical dielectric waveguide layer 12 and third optical dielectric waveguide layer 11) is less than the length of the front optical dielectric waveguide region (fourth optical dielectric waveguide layer 17, fifth optical dielectric waveguide layer 16 and sixth optical dielectric waveguide layer 15), and the length of the rear phase grating layer 18 is less than the length of the front phase grating layer 22. The dimensional parameters of the rear phase grating layer 18 are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.3μm to 3μm. The dimensional parameters of the front phase grating layer 22 are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.6μm to 6μm. Furthermore, the material and refractive index of the first optical dielectric waveguide layer 13 are the same as those of the third optical dielectric waveguide layer 11, and the material of the first optical dielectric waveguide layer 13 can be SiO2; the refractive index of the first optical dielectric waveguide layer 13 is less than that of the second optical dielectric waveguide layer 12, and the material of the second optical dielectric waveguide layer 12 can be Si3N4; the material and refractive index of the fourth optical dielectric waveguide layer 17 are the same as those of the sixth optical dielectric waveguide layer 15, and the material of the fourth optical dielectric waveguide layer 17 can be SiO2; the refractive index of the fourth optical dielectric waveguide layer 17 is less than that of the fifth optical dielectric waveguide layer 16, and the material of the fifth optical dielectric waveguide layer 16 can be Si3N4.

[0052] In this invention, a P-plane electrode 9 is disposed on the upper surface of the one-dimensional array ridge waveguide region 19, and the P-plane electrode 9 is connected to the highly doped layer 8; an N-plane electrode 1 is disposed on the lower surface of the conductive substrate 2; a high-reflection film 23 is disposed on the end face of the rear phase grating layer 18, and an anti-reflection film 24 is disposed on the end face of the front phase grating layer 22, and a fast-axis collimating lens 25 can be selectively disposed on the light-emitting surface of the anti-reflection film 24. Further, the material of the conductive substrate 2 includes one of silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide; the P-plane electrode 9 includes one or more of titanium, gold, and platinum; and the N-plane electrode 1 includes one or more of germanium and palladium. Furthermore, the high-reflectivity film 23 consists of alternating layers of SiO2 and Ta2O5 or SiO2 and Al2O3, each with a thickness of 100 nm to 300 nm and a reflectivity of 97% to 99%; the antireflective film 24 consists of alternating layers of SiO2 and Ta2O5 or SiO2 and Al2O3, each with a thickness of 100 nm to 300 nm and a reflectivity of 3% to 4%.

[0053] This invention provides a method for fabricating the above-mentioned continuous dielectric coherent array side-emitting semiconductor laser, comprising:

[0054] Step 1: Select conductive substrate 2;

[0055] Step 2: Sequentially deposit an N-type confinement layer 3, an N-type waveguide layer 4, an active region 5, a P-type waveguide layer 6, a P-type confinement layer 7, and a highly doped layer 8 on the upper surface of the conductive substrate 2 to obtain the epitaxial layer;

[0056] Step 3: Etch ridge waveguide units 20 on the upper surface of the epitaxial layer to obtain a one-dimensional arrayed ridge waveguide region 19;

[0057] Step 4: Etch the epitaxial layers on both sides of the one-dimensional array ridge waveguide region 19 until the conductive substrate 2 is exposed, and deposit two optical dielectric waveguides in sequence to obtain the first optical dielectric waveguide layer 13 and the second optical dielectric waveguide layer 12 of the rear optical dielectric waveguide region 10, as well as the fourth optical dielectric waveguide layer 17 and the fifth optical dielectric waveguide layer 16 of the front optical dielectric waveguide region 14.

[0058] Step 5: Etch the second optical dielectric waveguide layer 12 to obtain the rear phase grating layer 18, and etch the fifth optical dielectric waveguide layer 16 to obtain the front phase grating layer 22.

[0059] Step 6: Continue to deposit a third optical dielectric waveguide on the upper optical dielectric waveguide layer and phase grating layer to obtain the third optical dielectric waveguide layer 11 of the rear optical dielectric waveguide region 10 and the sixth optical dielectric waveguide layer 15 of the front optical dielectric waveguide region 14.

[0060] Step 7: Thinning and polishing the three-layer optical dielectric waveguide layer deposited on the surface of the one-dimensional array ridge waveguide region 19 to form an electrically insulating layer 21;

[0061] Step 8: Evaporate P-surface electrodes 9 on the upper surface of the one-dimensional array ridge waveguide region 19;

[0062] Step 9: Deposit N-face electrode 1 on the lower surface of conductive substrate 2;

[0063] Step 10: Deposit a high-reflectivity film 23 on the end face of the rear phase grating layer 18;

[0064] Step 11: Deposit an antireflection film 24 on the end face of the front phase grating layer 22.

[0065] Example:

[0066] Taking a gallium arsenide semiconductor laser with a working wavelength of 980 nm as an example, its fabrication method includes:

[0067] S1. Select a gallium arsenide substrate.

[0068] S2. On the gallium arsenide substrate 2, epitaxial layers 3-8 are deposited using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). From bottom to top, they are: epitaxial layer 3 is an N-type confinement layer Al 0.25 GaAs, with a doping concentration of 3e 18 cm -3 The thickness ranges from 0.8 μm to 1.5 μm. Epitaxial layer 4 is an N-type waveguide layer Al. 0.22 GaAs, with a doping concentration of 1e 17 cm -3 The thickness ranges from 0.7 μm to 1.1 μm. Epitaxial layer 5 is the active region, employing a single quantum well structure, where the quantum well is In... 0.16 GaAs material with a thickness of 0.005 μm to 0.012 μm and a quantum barrier of Ga 0.15 The material is AsP, with a thickness of 0.010 μm to 0.020 μm. Epitaxial layer 6 is a P-type waveguide layer Al. 0.22 GaAs, with a doping concentration of 1.5e 17 cm -3 The thickness is 0.6 μm to 0.8 μm. Epitaxial layer 7 is a p-type confinement layer Al. 0.25 GaAs, with a doping concentration of 3e 18 cm -3 The thickness is 0.8 μm to 1.5 μm. To ensure a good ohmic contact between the P-side electrode 9 and the epitaxial layers 3 to 8, an epitaxial layer 8, which is a highly doped GaAs layer with a concentration of 1e, is deposited above the epitaxial layer 7. 20 cm -3 The thickness is 0.2μm to 0.4μm.

[0069] S3. A one-dimensional array ridge waveguide pattern is obtained on the surface of the epitaxial layer using a photoresist mask and ultraviolet exposure method. Then, the one-dimensional array ridge waveguide pattern is etched using an inductively coupled plasma method to obtain a one-dimensional array ridge waveguide region 19 with the following dimensions: length of 500μm to 2000μm, width of 1mm to 10mm, period of 5μm to 10μm, and depth of 0.8μm to 1μm.

[0070] S4. Using a photoresist mask and ultraviolet exposure method, patterns of the rear optical dielectric waveguide region and the front optical dielectric waveguide region are obtained on both sides of the epitaxial layer surface near the one-dimensional array ridge waveguide region 19. Then, inductively coupled plasma etching is used to etch the epitaxial layer on both sides of the one-dimensional array ridge waveguide region until the substrate is exposed. Then, the first optical dielectric waveguide layer 13 and the fourth optical dielectric waveguide layer 17 are deposited on the upper surface using plasma-enhanced chemical vapor deposition. They are deposited in the same layer during deposition. The material is SiO2 with a refractive index of 1.6 and a thickness of 0.8 to 1.5 μm. The second optical dielectric waveguide layer 12 and the fifth optical dielectric waveguide layer 16 are deposited on the first optical dielectric waveguide layer 13 and the fourth optical dielectric waveguide layer 17. The material is Si3N4 with a refractive index of 1.8 and a thickness of 1.4 to 2.2 μm.

[0071] S5. Using photoresist masking and ultraviolet exposure, structural patterns of the rear-end phase grating layer 18 and the front-end phase grating layer 22 are obtained on the surfaces of the second optical dielectric waveguide layer 12 and the fifth optical dielectric waveguide layer 16. Then, the patterns of the rear-end phase grating layer 18 and the front-end phase grating layer 22 are etched using reactive ion etching, with an etching depth of 1.4μm to 2.2μm, a width of 3μm to 6μm, and a length of 0.3μm to 6μm. The optical dielectric material is then filled using plasma-enhanced chemical vapor deposition to form the third optical dielectric waveguide layer 11 and the sixth optical dielectric waveguide layer 15. The material is SiO2 with a refractive index of 1.6 and a thickness of 0.8 to 1.5μm.

[0072] S6. Thinning and polishing the surface of the one-dimensional array ridge waveguide region 19 to form an electrically insulating layer 21 by depositing three layers of optical dielectric waveguide layers.

[0073] S7. Using photoresist mask and ultraviolet exposure, an electrode window pattern is obtained on the surface of the one-dimensional array ridge waveguide region 19. Then, reactive ion etching is used to etch and thin the remaining insulating layer after polishing to obtain the electrode window pattern, exposing the GaAs highly doped layer 8 on the surface of the one-dimensional array ridge waveguide region 19.

[0074] S8. A P-side electrode 9 is deposited on the top layer of the epitaxial layer by electron beam evaporation. The metal materials and thicknesses used are as follows: Ti metal 20nm~30nm, Pt metal 20nm~30nm, and Au metal 150nm~200nm.

[0075] S9, thinning and polishing of conductive gallium arsenide substrate, with a remaining thickness of 110μm to 130μm.

[0076] S10. An N-face electrode 1 is deposited on the underside of a gallium arsenide substrate by electron beam evaporation. The metal materials and thicknesses used are: Ge metal 80nm~90nm and Pd metal 200nm~300nm, respectively.

[0077] S11. Use an alloy annealing machine to perform alloy annealing treatment on the chip.

[0078] S12. Use a cleaving machine to cleave the array bar strips.

[0079] S13. Using electron beam evaporation, an antireflection film 24 is deposited on the end face of the front optical dielectric waveguide region 14, and a high reflectivity film 23 is deposited on the end face of the rear optical dielectric waveguide region 10. The alternating SiO2 / Ta2O5 optical dielectric films make the front cavity surface reflectivity reach 3% to 4% and the rear cavity surface reflectivity reach 97% to 99%.

[0080] S14. Using flip-chip bonding, the array bar is packaged with its P-side facing down on a heat sink with solder, and device performance testing is performed.

[0081] The advantages of this invention are:

[0082] This invention achieves Talbot optical field distribution by etching a one-dimensional array ridge waveguide region that satisfies the Talbot effect, enabling Talbot diffraction coupling. Furthermore, by etching and filling three layers of optical dielectric waveguide regions of different lengths on both sides of the one-dimensional array ridge waveguide region, and introducing grating phase layers of different lengths, in-phase mode operation of the device is realized. This invention is not only simple and low-cost, but also provides a potential method for fabricating high-power, high-beam-quality, large-size semiconductor laser arrays.

[0083] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A continuous dielectric coherent array side-emitting semiconductor laser, characterized in that, include: The conductive substrate, the epitaxial layer formed on the upper surface of the conductive substrate, and the rear optical dielectric waveguide region and the front optical dielectric waveguide region formed on the upper surface of the conductive substrate, wherein the rear optical dielectric waveguide region and the front optical dielectric waveguide region are located on both sides of the epitaxial layer; The upper surface of the epitaxial layer is provided with a one-dimensional arrayed ridge waveguide region, and the length of the one-dimensional arrayed ridge waveguide region satisfies the Talbot effect. The rear optical dielectric waveguide region includes a first optical dielectric waveguide layer, a second optical dielectric waveguide layer and a third optical dielectric waveguide layer arranged sequentially from bottom to top, and a rear phase grating layer is etched on the second optical dielectric waveguide layer. The front-end optical dielectric waveguide region includes a fourth optical dielectric waveguide layer, a fifth optical dielectric waveguide layer and a sixth optical dielectric waveguide layer arranged sequentially from bottom to top. A front-end phase grating layer is etched on the fifth optical dielectric waveguide layer. The upper surface of the one-dimensional array ridge waveguide region is provided with a P-plane electrode, the lower surface of the conductive substrate is provided with an N-plane electrode, the end face of the rear phase grating layer is provided with a high-reflection film, and the end face of the front phase grating layer is provided with an anti-reflection film. The length of the rear optical dielectric waveguide region is less than the length of the front optical dielectric waveguide region, and the length of the rear phase grating layer is less than the length of the front phase grating layer; the dimensional parameters of the rear phase grating layer are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.3μm to 3μm; the dimensional parameters of the front phase grating layer are: etching depth of 1.4μm to 2.2μm, width of 3μm to 6μm, and length of 0.6μm to 6μm.

2. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, The epitaxial layer includes, from bottom to top, an N-type confinement layer, an N-type waveguide layer, an active region, a P-type waveguide layer, a P-type confinement layer, and a highly doped layer; wherein, the thickness of the N-type waveguide layer is greater than the thickness of the P-type waveguide layer.

3. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 2, characterized in that, The length of the one-dimensional array ridge waveguide region is an integer multiple or a fractional multiple of the Talbot distance; wherein, the Talbot distance Z T The calculation formula is: Z T =2nd 2 / λ In the formula, n is the equivalent refractive index of the N-type waveguide layer, the active region, and the P-type waveguide layer, d is the ridge waveguide array period of the one-dimensional array ridge waveguide region, and λ is the free space light wavelength generated by the active region.

4. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, The one-dimensional array ridge waveguide region includes a ridge waveguide array composed of multiple identical ridge waveguide units with rectangular cross sections. The length of the one-dimensional array ridge waveguide region is 500μm to 2000μm, the width is 1mm to 10mm, the depth is 0.8μm to 1μm, and the array period is 5μm to 10μm.

5. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, An electrical insulating layer is provided between adjacent ridge waveguide units. The material of the electrical insulating layer includes one of SiO2 and Si3N4, and the thickness of the electrical insulating layer is 100nm to 500nm.

6. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, The material and refractive index of the first optical dielectric waveguide layer are the same as those of the third optical dielectric waveguide layer, and the refractive index of the first optical dielectric waveguide layer is less than that of the second optical dielectric waveguide layer. The material and refractive index of the fourth optical medium waveguide layer are the same as those of the sixth optical medium waveguide layer, but the refractive index of the fourth optical medium waveguide layer is less than that of the fifth optical medium waveguide layer.

7. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, The conductive substrate is made of one of the following materials: silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide. The P-side electrode comprises one or more of titanium, gold, and platinum; The N-face electrode includes one or more of germanium and palladium.

8. The continuous dielectric coherent array side-emitting semiconductor laser as described in claim 1, characterized in that, The high-reflectivity film is composed of alternating SiO2 and Ta2O5 layers or SiO2 and Al2O3 layers, with each layer having a thickness of 100nm to 300nm and a reflectivity of 97% to 99%. The antireflective film consists of alternating layers of SiO2 and Ta2O5 or SiO2 and Al2O3, with each layer having a thickness of 100 nm to 300 nm and a reflectivity of 3% to 4%.

9. A method for fabricating a continuous dielectric coherent array side-emitting semiconductor laser as described in any one of claims 1 to 8, characterized in that, include: Select a conductive substrate; An epitaxial layer is deposited on the upper surface of a conductive substrate; A one-dimensional arrayed ridge waveguide region is obtained by etching ridge waveguide units on the upper surface of the epitaxial layer. The epitaxial layers on both sides of the one-dimensional array ridge waveguide region are etched to expose the substrate, and two optical dielectric waveguides are deposited in sequence to obtain the first and second optical dielectric waveguide layers of the rear optical dielectric waveguide region, and the fourth and fifth optical dielectric waveguide layers of the front optical dielectric waveguide region. A rear-end phase grating layer is etched on the second optical dielectric waveguide layer, and a front-end phase grating layer is etched on the fifth optical dielectric waveguide layer. A third optical dielectric waveguide is deposited on the phase grating layer to obtain the third optical dielectric waveguide layer in the rear optical dielectric waveguide region and the sixth optical dielectric waveguide layer in the front optical dielectric waveguide region. The three-layer optical dielectric waveguide layer deposited on the surface of the one-dimensional array ridge waveguide region is thinned and polished to form an electrically insulating layer. P-surface electrodes are deposited on the upper surface of the one-dimensional array ridge waveguide region; N-face electrodes are deposited on the lower surface of a conductive substrate by vapor deposition; A high-reflectivity film is deposited on the end face of the back-end phase grating layer; An antireflection film is deposited on the end face of the front-end phase grating layer.

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