Method, device and electronic device for calculating equivalent resistance of resistor network

Abstract

This patent application discloses a method, device, and electronic device for calculating the equivalent resistance of a resistor network. By establishing a set of equations to be solved for calculating the resistor network; determining a permutation matrix based on the set of equations to be solved, and performing LDL on the permuted admittance matrix. T Decomposition is performed to obtain a lower triangular matrix with a diagonal line of 1 and a diagonal matrix; based on the permutation matrix, the unit vector is transformed; the non-zero element position vector in the solution of the system of equations to be solved is determined; according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector and the lower triangular matrix, the system of equations to be solved is subjected to downward back substitution operation to obtain the solution of the system of equations to be solved; according to the non-zero element position vector in the solution of the system of equations to be solved, the solution of the system of equations to be solved and the diagonal matrix, the equivalent resistance of the target node is obtained, thereby reducing the amount of equivalent resistance calculation and improving the efficiency of the calculation.

Description

Technical Field

[0001] This patent application belongs to the field of circuit design technology, and in particular relates to a method, device, and electronic device for calculating the equivalent resistance of a resistor network. Background Art

[0002] In circuit layout parasitic parameter extraction during circuit simulation, it is usually necessary to perform equivalent resistance analysis on large-scale resistor networks, especially with the continuous development of advanced semiconductor process technology and the continuous increase in power density in large-scale integrated circuits.

[0003] However, the existing circuit analysis technology requires a large amount of computation and has low efficiency. Summary of the Invention

[0004] This patent application provides a method, device, and electronic device for calculating the equivalent resistance of a resistor network to overcome or alleviate the shortcomings of the prior art.

[0005] The technical solutions provided in the present invention are as follows:

[0006] A method for calculating equivalent resistance in a resistor network, wherein the method uses an external power supply method to calculate the equivalent resistance of a target node, the method comprising:

[0007] Establish the admittance matrix to be solved for the resistor network;

[0008] Based on the admittance matrix to be determined, the permutation matrix is ​​determined, and the LDL is performed on the permuted admittance matrix. T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0009] transforming the unit vector based on the permutation matrix;

[0010] Determining a position vector of a non-zero element in a solution of the system of equations to be solved;

[0011] performing a downward back substitution operation on the system of equations to be solved according to the non-zero element position vectors in the solution of the system of equations to be solved, the transformed unit vectors, and the lower triangular matrix to obtain a solution to the system of equations to be solved;

[0012] The equivalent resistance of the target node is obtained according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix.

[0013] Optionally, the set of equations to be solved for establishing the resistor network includes:

[0014] Determine a reference node and a target node of a resistor network, ground the reference node, and connect an external 1A current source between the reference node and the target node;

[0015] The admittance matrix of the resistor network and the unit vector representing the 1A current source are determined to establish the set of equations to be solved.

[0016] Optionally, determining the position vector of a non-zero element in the solution of the system of equations to be solved includes:

[0017] The non-zero element position vectors in the solution of the system of equations to be solved are determined based on the elimination tree of the lower triangular matrix and the transformed unit vectors.

[0018] Optionally, the method further includes:

[0019] Conditions for calculating the equivalent resistance are constructed to determine a reference node and a target node of the resistor network when the conditions are met.

[0020] Optionally, the condition includes at least one of short-circuiting an independent voltage source in the resistance network, disconnecting an independent current source, and disconnecting a capacitor.

[0021] Optionally, determining the admittance matrix of the resistor network includes:

[0022] According to the filling rule of the components in the improved node analysis method, the admittance matrix of the resistance network excluding the reference node is determined.

[0023] Optionally, determining a permutation matrix based on the set of equations to be solved includes:

[0024] Based on the set of equations to be solved, a permutation matrix is ​​determined according to a set sorting algorithm.

[0025] Optionally, obtaining the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix includes:

[0026] Performing a vector product on the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix to obtain the equivalent resistance of the target node.

[0027] A device for calculating equivalent resistance in a resistor network, which uses an external power supply method to calculate the equivalent resistance of a target node, the device comprising:

[0028] Unit 1 is used to establish the set of equations to be solved for calculating the resistor network;

[0029] The second unit is used to determine the permutation matrix based on the equations to be solved, and perform LDL on the permuted admittance matrix T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0030] A third unit is configured to transform the unit vector based on the permutation matrix;

[0031] A fourth unit is used to determine a position vector of a non-zero element in a solution of the set of equations to be solved;

[0032] a fifth unit, configured to perform a downward back substitution operation on the system of equations to be solved according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector, and the lower triangular matrix, to obtain a solution to the system of equations to be solved;

[0033] The sixth unit is used to obtain the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved and the diagonal matrix.

[0034] An electronic device includes a memory and a processor, wherein the memory is used to store a computer-executable program, and the processor is used to run the computer-executable program to implement the method described in any embodiment of the present application.

[0035] In the solution provided by the present application, a set of equations to be solved for calculating the resistance network is established; based on the set of equations to be solved, a permutation matrix is ​​determined, and an LDL is performed on the permuted admittance matrix. T Decomposition is performed to obtain a lower triangular matrix with a diagonal line of 1 and a diagonal matrix; based on the permutation matrix, the unit vector is transformed; the non-zero element position vector in the solution of the system of equations to be solved is determined; according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector and the lower triangular matrix, the system of equations to be solved is subjected to downward back substitution operation to obtain the solution of the system of equations to be solved; according to the non-zero element position vector in the solution of the system of equations to be solved, the solution of the system of equations to be solved and the diagonal matrix, the equivalent resistance of the target node is obtained, thereby reducing the amount of equivalent resistance calculation and improving the efficiency of the calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 Schematic diagram of the principle of calculating the equivalent resistance of a target node based on an external power supply in an embodiment of the present application.

[0037] Figure 2 This is a flow chart of a method for calculating equivalent resistance in a resistor network according to an embodiment of the present application. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of this patent application to clearly describe the technical solutions in the embodiments of this patent application. Obviously, the embodiments described are part of the embodiments of this patent application, not all of the embodiments. Based on the embodiments in this patent application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this patent application.

[0039] The terms "first," "second," and the like in the specification and claims of this patent application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this patent application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0040] In the solution provided by the present application, a set of equations to be solved for the resistor network is established; based on the set of equations to be solved, a permutation matrix is ​​determined, and an LDL is performed on the permuted admittance matrix. T Decomposition is performed to obtain a lower triangular matrix with a diagonal line of 1 and a diagonal matrix; based on the permutation matrix, the unit vector is transformed; the non-zero element position vector in the solution of the system of equations to be solved is determined; according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector and the lower triangular matrix, the system of equations to be solved is subjected to downward back substitution operation to obtain the solution of the system of equations to be solved; according to the non-zero element position vector in the solution of the system of equations to be solved, the solution of the system of equations to be solved and the diagonal matrix, the equivalent resistance of the target node is obtained, thereby reducing the number of equivalent resistance calculations and improving the efficiency of the calculation.

[0041] Figure 1 The schematic diagram of the principle of calculating the equivalent resistance of the target node based on the external power supply in the embodiment of the present application is shown in FIG. The external power supply method sets the independent power supply in the resistance network to zero (including short-circuiting the independent voltage source and disconnecting the independent current source) and disconnecting the capacitor, such as Figure 1 As shown, an independent power supply is connected between the target node and the reference node, and the equivalent resistance of the target node (ie, the equivalent resistance between the target node and the reference node) is the ratio of the voltage to the current therebetween.

[0042] like Figure 1 As shown, the equivalent resistance R between nodes i and j is calculated by connecting a 1A current source to nodes i and j. ij , since node j is grounded (i.e. node j is used as the reference node), R ijAbbreviated as R i . R i The calculation formula can be expressed as:

[0043] R i =V i ⑴ Among them V i is the voltage value of node i.

[0044] Figure 2 This is a flow chart of a method for calculating equivalent resistance in a resistor network according to an embodiment of the present application. Figure 2 As shown, the equivalent resistance of the target node is calculated using an external power supply method, and the method includes:

[0045] S101, establishing a set of equations to be solved for calculating a resistance network;

[0046] S102, based on the equations to be solved, determine the permutation matrix, and perform LDL on the permuted admittance matrix T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0047] S103, transforming the unit vector based on the permutation matrix;

[0048] S104, determining a non-zero position vector in a solution of the system of equations to be solved;

[0049] S105, performing a downward back substitution operation on the system of equations to be solved according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector, and the lower triangular matrix to obtain a solution to the system of equations to be solved;

[0050] S106 , obtaining the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix.

[0051] Optionally, in one embodiment, the equation group to be solved for establishing the calculation resistance network includes:

[0052] Determine a reference node and a target node of a resistor network, ground the reference node, and connect an external 1A current source between the reference node and the target node;

[0053] The admittance matrix of the resistor network and the unit vector representing the 1A current source are determined to establish the set of equations to be solved.

[0054] Optionally, in one embodiment, determining the position vector of a non-zero element in the solution of the system of equations to be solved includes:

[0055] The non-zero element position vectors in the solution of the system of equations to be solved are determined based on the elimination tree of the lower triangular matrix and the transformed unit vectors.

[0056] Optionally, in one embodiment, the method further includes:

[0057] Conditions for calculating the equivalent resistance are constructed to determine a reference node and a target node of the resistor network when the conditions are met.

[0058] Optionally, in one embodiment, the condition includes at least one of short-circuiting an independent voltage source in the resistor network, disconnecting an independent current source, and disconnecting a capacitor.

[0059] Optionally, in one embodiment, determining the admittance matrix of the resistor network includes:

[0060] According to the filling rule of the components in the improved node analysis method, the admittance matrix of the resistance network excluding the reference node is determined.

[0061] Optionally, in one embodiment, determining a permutation matrix based on the set of equations to be solved includes:

[0062] Based on the set of equations to be solved, a permutation matrix is ​​determined according to a set sorting algorithm.

[0063] Optionally, in one embodiment, obtaining the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix includes:

[0064] Performing a vector product on the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix to obtain the equivalent resistance of the target node.

[0065] In the application scenario, refer to the above Figure 1 , the principles of the above embodiments of the present application are briefly described as follows.

[0066] Alternatively, the matrix form of the circuit equation using the improved node analysis method is generally expressed as in is the admittance matrix of the resistor network, with a matrix dimension of n (the number of non-grounded nodes). The admittance matrix is ​​usually a sparse matrix.

[0067] See also It can be seen that the term I on the right is an independent current source vector, and I are determined according to the filling rules of the components in the improved node analysis method. V is the node voltage vector to be calculated, which includes the voltage values ​​of all non-grounded nodes. The current value of the external independent current source is generally filled in The right-hand side item I, for node i (i is a positive integer not equal to j and less than n), the i-th value I in I i =1A, which is expressed as e in standard unit vector form. i , in e i The i-th value in is 1, and the rest of the elements are 0. Therefore, for node i, the corresponding node voltage vector V can be written as follows:

[0068]

[0069] Among them, I=e i is the standard unit vector, e i The i-th value in is 1, and the rest of the elements are 0.

[0070] Combining formula (1) and formula (2), the equivalent resistance of node i to ground can be expressed as

[0071]

[0072] In a solution, for node i, a direct method is usually used to solve the linear equations in formula (2) The process is as follows:

[0073] right LU decomposition of the matrix (that is, decomposed into the product of a lower triangular matrix and an upper triangular matrix), that is, (where L is a lower triangular matrix with 1s on the diagonal, and U is an upper triangular matrix);

[0074] Then do a step of backward substitution to obtain the equation system LX = e i The solution X;

[0075] Finally, substitute upward to obtain the solution V of the equation system UV=X.

[0076] In another solution, based on the above formula (3), the process of solving the equivalent resistance of node i to ground can be as follows:

[0077] First of all, LDL T break down:

[0078]

[0079] Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix (with elements only on the diagonal and all other elements are 0).

[0080] In LDL T After the decomposition is completed, perform downward substitution to obtain the system of equations Solution Its expression can be written as:

[0081]

[0082] The above downward iteration can be implemented by using a sparse algorithm, for example.

[0083] Based on the above process, since it can be determined in advance as the above solution The non-zero position vector ∑ of the sparse vector is actually composed of all the non-zero elements in the vector The position index in is composed of , and the number of non-zero elements is small relative to the total number of elements. Therefore, through the sparse downward substitution of this application, the computational cost is only equal to L and The number of non-zero elements in is related to the calculation of all elements, thus reducing the amount of calculation and improving the efficiency of the solution. i More dense Do the right-hand term, which will lead to the destruction of the sparsity of the right-hand term during the upward back-substitution process, and the solution obtained by upward back-substitution It will also be more dense and increase the amount of calculation.

[0084] Therefore, in this application scenario, if based on the above Figure 2 The solution shown in the figure can avoid the problem of sparsity destruction, reduce the amount of calculation and improve the efficiency of the solution. The detailed principle is as follows:

[0085] Will The deformation process is:

[0086]

[0087] Substitute the formula (6) into , thus obtaining:

[0088] R i =(e i T PL -1T )D -1 (L -1 P T e i ) (7)

[0089] See also Further transforming formula (7) yields:

[0090]

[0091] Further see the transformation of equation (5): Due to the downward substitution solution Than e i dense, as mentioned above, if upward substitution is used, a denser Do the right-hand side and substitute upward to get the solution Therefore, the above process can make full use of the right-hand side term e when back-substituting downward. i The extremely sparse characteristics of , thus avoiding the destruction of the sparsity of the right-hand term in the upward back substitution process. At the same time, the method of the embodiment of the present application can avoid directly solving the relatively dense vector , and only extract the vector The i-th value in the equivalent resistance R of node i is obtained i In this application, R i The calculation of only needs to be done according to formula (8) This avoids a lot of extra calculations and improves efficiency.

[0092] In addition, in this embodiment, the above-mentioned P is determined by a set sorting algorithm (such as the approximate minimum degree algorithm AMD algorithm), which reduces the number of filler elements generated in the above-mentioned decomposition process and further reduces the computational complexity of the above-mentioned downward iteration algorithm.

[0093] When calculating the equivalent resistance of a large number of nodes in a large-scale resistor network, LDL T The decomposition only needs to be done once, and the large number of back-substitution solutions is the bottleneck in equivalent resistance analysis. T The application of decomposition, downward substitution, and vector inner product processes in this scenario can greatly improve the efficiency of solving equivalent resistance and resolve the performance bottleneck of solving the equivalent resistance of large-scale resistor networks.

[0094] In a specific application scenario, consider a resistor network with a matrix dimension of 1,285,688, where the total number of pins for which the equivalent resistance to ground needs to be calculated is 411,405. After decomposition, the right-hand term corresponding to the node number corresponding to the pin is set to 1, and the above back substitution and vector inner product are performed to obtain the equivalent resistance of the corresponding pin to ground. This loop is repeated for all pin numbers to obtain the equivalent resistance for all pins. This loop utilizes parallel computing.

[0095] If the LU decomposition method is used with two-step dense back substitution to calculate 411,405 equivalent resistances to ground, the total time is 2,229.09 seconds (16 threads); while the method based on this application takes only 1.86 seconds (16 threads), which is 1199 times faster than the LU decomposition method.

[0096] Table 1 shows the equivalent resistance solution time based on the present application solution under different numbers of threads, indicating that the present application solution has good parallel scalability.

[0097] Table 1 Equivalent resistance solution time based on the present application scheme under different thread numbers

[0098] Number of threads 1 4 8 16 32 Improved direct method 18.77s 4.48s 2.66s 1.86s 1.56s

[0099] based on Figure 2 The calculation method of the equivalent resistance in the resistor network shown in the figure. Considering that some steps may be optimized in some scenarios, another calculation method of the equivalent resistance in the resistor network is obtained, which includes:

[0100] Determine the permutation matrix based on the set of equations to be solved for the equivalent resistance;

[0101] Perform LDL on the admittance matrix of the resistor network T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0102] The equivalent resistance of the target node is calculated according to the permutation matrix, the lower triangular matrix, and the diagonal matrix.

[0103] Optionally, calculating the equivalent resistance of the target node according to the permutation matrix, the lower triangular matrix, and the diagonal matrix includes:

[0104] Based on the non-zero position vectors in the solution of the system of equations to be solved, the transformed unit vectors, and the lower triangular matrix, performing a downward back substitution operation on the system of equations to be solved to obtain a solution to the system of equations to be solved;

[0105] The equivalent resistance of the target node is obtained according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix.

[0106] Optionally, in one embodiment, the method further includes:

[0107] transforming the unit vector based on the permutation matrix;

[0108] Determine the position vectors of non-zero elements in the solution of the system of equations to be solved.

[0109] Optionally, in one embodiment, performing a downward back substitution operation on the system of equations to be solved based on the unit vector and the lower triangular matrix to obtain a solution to the system of equations to be solved includes:

[0110] A downward back substitution operation is performed on the system of equations to be solved according to the transformed unit vector and the lower triangular matrix to obtain a solution to the system of equations to be solved.

[0111] Optionally, obtaining the equivalent resistance of the target node according to the non-zero element position vector in the solution of the system of equations to be solved, the solution of the system of equations to be solved, and the diagonal matrix includes:

[0112] An inner product operation is performed on the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix to obtain the equivalent resistance of the target node.

[0113] An embodiment of the present application further provides a device for calculating equivalent resistance in a resistor network, which uses an external power supply method to calculate the equivalent resistance of a target node. The device includes:

[0114] Unit 1 is used to establish the set of equations to be solved for calculating the resistor network;

[0115] The second unit is used to determine the permutation matrix based on the equations to be solved, and perform LDL on the permuted admittance matrix T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0116] A third unit is configured to transform the unit vector based on the permutation matrix;

[0117] A fourth unit is used to determine a position vector of a non-zero element in a solution of the set of equations to be solved;

[0118] a fifth unit, configured to perform a downward back substitution operation on the system of equations to be solved according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector, and the lower triangular matrix, to obtain a solution to the system of equations to be solved;

[0119] The sixth unit is used to obtain the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved and the diagonal matrix.

[0120] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory is configured to store a computer executable program, and the processor is configured to run the computer executable program to implement the following steps:

[0121] Establish a set of equations to be solved for calculating the resistance network;

[0122] Based on the equations to be solved, determine the permutation matrix and perform LDL on the permuted admittance matrix T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix;

[0123] transforming the unit vector based on the permutation matrix;

[0124] Determining a position vector of a non-zero element in a solution of the system of equations to be solved;

[0125] performing a downward back substitution operation on the system of equations to be solved according to the non-zero element position vectors in the solution of the system of equations to be solved, the transformed unit vectors, and the lower triangular matrix to obtain a solution to the system of equations to be solved;

[0126] The equivalent resistance of the target node is obtained according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix.

[0127] Optionally, in one embodiment, when establishing the set of equations to be solved for the computational resistance network, the processor includes:

[0128] Determine a reference node and a target node of a resistor network, ground the reference node, and connect an external 1A current source between the reference node and the target node;

[0129] The admittance matrix of the resistor network and the unit vector representing the 1A current source are determined to establish the set of equations to be solved.

[0130] Optionally, in one embodiment, when determining the position vector of a non-zero element in the solution of the system of equations to be solved, the processor includes:

[0131] The non-zero element position vectors in the solution of the system of equations to be solved are determined based on the elimination tree of the lower triangular matrix and the transformed unit vectors.

[0132] Optionally, in one embodiment, when executing the computer executable program, the processor further performs the following steps:

[0133] Conditions for calculating the equivalent resistance are constructed to determine a reference node and a target node of the resistor network when the conditions are met.

[0134] Optionally, in one embodiment, the condition includes at least one of short-circuiting an independent voltage source in the resistor network, disconnecting an independent current source, and disconnecting a capacitor.

[0135] Optionally, in one embodiment, when determining the admittance matrix of the resistor network, the processor includes: determining the admittance matrix of the resistor network excluding the reference node according to a value filling rule of components in an improved node analysis method.

[0136] Optionally, in one embodiment, when the processor determines the permutation matrix based on the set of equations to be solved, the process further includes: determining the permutation matrix based on the set of equations to be solved according to a set sorting algorithm.

[0137] Optionally, in one embodiment, when the processor obtains the equivalent resistance of the target node according to the non-zero element position vector in the solution of the system of equations to be solved, the solution of the system of equations to be solved, and the diagonal matrix, the processor includes:

[0138] Performing a vector product on the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix to obtain the equivalent resistance of the target node.

[0139] The embodiments of the present patent application are described above in conjunction with the accompanying drawings, but the present patent application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this patent application, ordinary technicians in this field can also make many forms without departing from the purpose of this patent application and the scope of protection of the claims, all of which fall within the scope of protection of this patent application.

Claims

1. A method for calculating equivalent resistance in a resistor network, characterized in that: The equivalent resistance of a target node is calculated using an external power supply method, the method comprising: Establish a set of equations to be solved for calculating the resistance network; Based on the equations to be solved, determine the permutation matrix and make the permutation admittance matrix LDL T Decompose and get a lower triangular matrix with diagonal 1 L and the diagonal matrix D ; transforming the unit vector based on the permutation matrix; Determining a position vector of a non-zero element in a solution of the system of equations to be solved; performing a downward back substitution operation on the system of equations to be solved according to the non-zero element position vectors in the solution of the system of equations to be solved, the transformed unit vectors, and the lower triangular matrix to obtain a solution to the system of equations to be solved; Obtaining an equivalent resistance of the target node according to a non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix; The equations to be solved for establishing the calculation resistor network include: Determine a reference node and a target node of a resistor network, ground the reference node, and connect an external 1A current source between the reference node and the target node; The admittance matrix of the resistor network and the unit vector representing the 1A current source are determined to establish the set of equations to be solved.

2. The method for calculating the equivalent resistance in a resistor network according to claim 1, wherein: Determining the position vector of a non-zero element in the solution of the set of equations to be solved includes: The non-zero element position vectors in the solution of the system of equations to be solved are determined based on the elimination tree of the lower triangular matrix and the transformed unit vectors.

3. The method for calculating the equivalent resistance in a resistor network according to claim 1, wherein: The method further comprises: Conditions for calculating the equivalent resistance are constructed to determine a reference node and a target node of the resistor network when the conditions are met.

4. The method for calculating the equivalent resistance in a resistor network according to claim 3, wherein: The condition includes at least one of short-circuiting an independent voltage source in the resistor network, disconnecting an independent current source, and disconnecting a capacitor.

5. The method for calculating the equivalent resistance in a resistor network according to claim 1, wherein: Determining the admittance matrix of the resistor network includes: Delete the row and column corresponding to the reference node in the obtained admittance matrix.

6. The method for calculating the equivalent resistance in a resistor network according to claim 1, wherein: Determining a permutation matrix based on the set of equations to be solved includes: Based on the set of equations to be solved, a permutation matrix is ​​determined according to a set sorting algorithm.

7. The method for calculating the equivalent resistance in a resistor network according to claim 1, wherein: Obtaining the equivalent resistance of the target node according to the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix includes: Performing a vector product on the non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix to obtain the equivalent resistance of the target node.

8. A device for calculating equivalent resistance in a resistor network, characterized in that: The device for calculating the equivalent resistance of a target node using an external power supply method comprises: Unit 1 is used to establish the set of equations to be solved for calculating the resistor network; The second unit is used to determine the permutation matrix based on the equations to be solved and to make the permutation matrix LDL T Decompose to obtain a lower triangular matrix with diagonal 1 and a diagonal matrix; A third unit is configured to transform the unit vector based on the permutation matrix; A fourth unit is used to determine a position vector of a non-zero element in a solution of the set of equations to be solved; a fifth unit, configured to perform a downward back substitution operation on the system of equations to be solved according to the non-zero element position vector in the solution of the system of equations to be solved, the transformed unit vector, and the lower triangular matrix, to obtain a solution to the system of equations to be solved; a sixth unit, configured to obtain an equivalent resistance of the target node according to a non-zero element position vector in the solution of the set of equations to be solved, the solution of the set of equations to be solved, and the diagonal matrix; The equations to be solved for establishing the calculation resistor network include: Determine a reference node and a target node of a resistor network, ground the reference node, and connect an external 1A current source between the reference node and the target node; The admittance matrix of the resistor network and the unit vector representing the 1A current source are determined to establish the set of equations to be solved.

9. An electronic device, characterized in that: The method comprises a memory and a processor, wherein the memory is used to store a computer-executable program, and the processor is used to run the computer-executable program to implement the method according to any one of claims 1 to 7.

Images