Anti-global dose bandgap reference circuit

Abstract

The application discloses an anti-total dose band gap reference circuit, which comprises a total dose effect monitoring circuit, a current compensation circuit, a fixed bias circuit, a temperature compensation circuit and a minimum compensation current current limiting circuit connected in sequence. The application solves the problem that the output voltage of the existing band gap reference circuit is affected by the total dose effect and drifts.

Description

Technical Field

[0001] This invention belongs to the field of radiation hardening technology for analog integrated circuits, and relates to a total dose bandgap reference circuit. Background Technology

[0002] DC-DC converters provide stable DC output voltages in aerospace power systems and play a crucial role in aerospace equipment. The output voltage accuracy of a DC-DC converter is directly related to its internal bandgap reference. Under the influence of radiation, the transistors in the bandgap reference degrade over time, causing a shift in the reference voltage and affecting the output voltage accuracy of the DC-DC converter. This can lead to insufficient power supply to the system and even system failure. Therefore, research on radiation hardening techniques for bandgap references is of paramount importance.

[0003] Current methods for total dose hardening of bandgap references employ thin-gate structures and ring-gate structures on the layout to achieve total dose irradiation resistance. These methods mostly require specific processes, are costly, and have high versatility. For circuit-level radiation hardening, existing methods include using diodes and DTMOS to replace bipolar transistors to generate positive temperature coefficient voltages. However, the temperature characteristics of diodes vary significantly across different processes, making them unsuitable for all processes. Using closed-gate DTMOS can avoid the p-n+ formation of thick-field oxygen, eliminating the total dose effect, but DTMOS is not a standard device and is also unsuitable for standard CMOS processes. Summary of the Invention

[0004] The purpose of this invention is to provide an anti-total-dose bandgap reference circuit, which solves the problem of output voltage drift caused by the total-dose effect in existing bandgap reference circuits.

[0005] The technical solution adopted in this invention is an anti-total dose bandgap reference circuit, which includes a total dose effect monitoring circuit, a current compensation circuit, a fixed bias circuit, a temperature compensation circuit, and a minimum compensation current limiting circuit connected in sequence.

[0006] The invention is further characterized by:

[0007] The total dose effect monitoring circuit includes resistor R1. One end of resistor R1 is connected to the base and collector of bipolar transistor T1, and the other end of resistor R1 is connected to the inverting input of operational amplifier AMP1 and one end of resistor R4. The other end of resistor R4 is connected to the output of operational amplifier AMP1. One end of resistor R2 is connected to the upper terminal V of resistor R7. R7 Connected, due to the feedback effect of the operational amplifier (AMP), V R7 Equal to the base-emitter voltage V of T2 BE2The other end of resistor R2 is connected to resistor R3 and the non-inverting input of operational amplifier AMP1, and the other end of resistor R3 is connected to GND.

[0008] The total dose effect monitoring circuit detects the base and collector voltage V of bipolar transistor T1. BE1 and the base and collector voltage V of T2 BE2 By utilizing the voltage divider relationship between resistors R1 to R4, the output voltage V can be obtained. X With V BE2 and V BE1 The relationship is such that V can be changed by altering the ratio of the resistance values ​​of R1 to R4. X With V BE2 and V BE1 The difference relationship is shown in the following formula (1):

[0009] (1).

[0010] The current compensation circuit includes an operational amplifier AMP2. The non-inverting input of the operational amplifier AMP2 is connected to the output terminal Vx of the total dose effect monitoring circuit. The output terminal of the operational amplifier AMP2 is connected to the gate of NMOS transistor M1. The source terminal of NMOS transistor M1 is connected to one end of resistor R5, and the other end of resistor R5 is connected to GND. The drain terminal of NMOS transistor M1 is also connected to the drain terminal of PMOS transistor M2. PMOS transistors M2 to M5 form a common-source common-gate current mirror. The drain terminal of PMOS transistor M3 serves as the output of the current compensation circuit and is connected in sequence to the output of the temperature compensation circuit, the output of the fixed bias circuit, and the input of the minimum compensation current limiting circuit.

[0011] The fixed bias circuit includes NMOS transistor M 11 With NMOS transistor M 10 The fixed bias circuit is used to simulate the current I flowing through the bandgap reference when the bandgap reference current is not subjected to total dose radiation. DC Current I DC Through NMOS transistor M 11 The drain and gate inputs are connected by the NMOS transistor M. 10 The drain output is connected to the output of the temperature compensation circuit, the output of the current compensation circuit, and the input of the minimum compensation current limiting circuit, respectively.

[0012] The temperature compensation circuit includes a bipolar transistor Q1. The emitter of bipolar transistor Q1 and one end of resistor R6 are connected to GND. The base of bipolar transistor Q1 is connected to the collector and the other end of resistor R6, and then connected to a common-source, common-gate current mirror formed by PMOS transistors M6-M9. The drain of M6 serves as the output of the temperature compensation circuit, outputting a negative temperature compensation current I. CTATIt is connected to the output of the current compensation circuit, the output of the fixed bias circuit, and the input of the minimum compensation current limiting circuit.

[0013] The minimum compensation current limiting circuit includes an NMOS transistor M12. The gate and drain of NMOS transistor M12 are connected to the gate of NMOS transistor M13. The source of NMOS transistor M12 and the source of NMOS transistor M13 are connected to GND. The drain of NMOS transistor M13 is connected to the gate of PMOS transistor M14, the drain of PMOS transistor M14, and the gate of PMOS transistor M15, respectively. The source of PMOS transistor M14 and the source of PMOS transistor M15 are connected to AVIN. The drain of PMOS transistor M15 serves as the output of the minimum compensation current limiting circuit.

[0014] The beneficial effects of this invention are that, for bandgap reference circuits operating in irradiated environments, the total dose-resistant bandgap reference circuit proposed in this invention can continuously monitor changes in irradiation dose, and simultaneously convert the monitored voltage changes into a corresponding compensation current to offset the bandgap reference output voltage shift caused by radiation, thereby achieving the purpose of total dose hardening; this invention also has the characteristics of continuous detection, high accuracy, parallel detection and hardening, and wide applicability. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the anti-total dose bandgap reference circuit of the present invention;

[0016] Figure 2 for Figure 1 A schematic diagram of the reinforced circuit structure;

[0017] Figure 3 The bandgap reference voltage reinforced by the anti-total-dose bandgap reference circuit of the present invention. Detailed Implementation

[0018] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0019] This invention relates to an anti-total dose bandgap reference circuit. Figure 1This diagram illustrates a bandgap reference voltage and hardening circuit. The bandgap reference circuit includes an operational amplifier AMP, bipolar transistors T1 and T2, resistors R7-R12, and a PMOS transistor M1. The emitter of bipolar transistor T1 is grounded, and its base and collector are connected to one end of resistor R7. The voltage at this point is the base-emitter voltage VBE1 of bipolar transistor T1, which also serves as the input to the hardening circuit. The other end of R7 (point X) connects to both the input and output of the hardening circuit, and also connects to one end of resistor R8 and the non-inverting input of operational amplifier AMP. The emitter of bipolar transistor T2 is grounded, and its base and collector are connected. The voltage at this point is the base-emitter voltage VBE2 of bipolar transistor T2, and also connects to the inverting input of operational amplifier AMP and one end of resistor R9. Resistors R8, R9, R10, and R12 are connected to a single point. The other end of resistor R10 is connected to one end of resistor R11, serving as the output VREF of the bandgap reference circuit. The other ends of resistors R11 and R12 are connected to the drain of PMOS transistor M1. The gate of PMOS transistor M1 is connected to the output of operational amplifier AMP, and the source of M1 is connected to power supply VDD.

[0020] A hardening circuit was added to the bandgap reference circuit. This hardening circuit monitors the change in voltage across resistor R7 in the bandgap reference circuit during radiation. Due to the virtual short effect of the operational amplifier AMP, V... X =V Y And since the ratio of the number of transistors in T1 to T2 is n:1, the voltage drop across R7 can be calculated as follows: V BE =V BE2 -V BE1 =V T ln n , V BE VBE2 is the difference between the base-emitter voltages VBE2 and VBE1 of bipolar transistors T1 and T2. At this time, the voltage drop across R7 is a positive temperature coefficient voltage. V BE This voltage is compared with the base-emitter voltage V of bipolar transistor T2. BE2 By adding the values ​​together and then using the voltage divider relationship between resistors R7 to R12, and setting R0 as the equivalent resistance of the series-parallel connection of resistors R7 to R12, the bandgap reference voltage V can be obtained. REF for:

[0021] (1)

[0022] (2)

[0023] For a bandgap reference circuit under irradiation, total dose irradiation introduces charges into the oxide, forming interface states at the Si-SiO2 interface. This leads to the expansion of the depletion layer in the emitter-base region of the bipolar transistor and an increase in the surface recombination rate, resulting in a decrease in the bipolar transistor current gain and consequently, Vo. BE The characteristics change. This drastic change cannot be completely eliminated by annealing. Therefore, after total dose irradiation, the positive temperature coefficient voltage and the negative temperature coefficient voltage cannot be weighted to cancel each other out, causing the output voltage of the bandgap reference to change and deviate from the design value.

[0024] Depend on Figure 1 Analysis shows that the total dose effect causes emitter-base leakage current in bipolar transistors. I B The emitter current increases, but because the number of bipolar transistors on the two branches of the bandgap reference is different, the increase in emitter current on the two branches is also different. Since the right branch only has one bipolar transistor, the increase in base leakage current is negligible. Assume that the emitter current I of the bipolar transistor after radiation... C If the voltages remain constant, then the emitter-base voltages of the two bipolar transistors should also remain constant. However, in reality, due to the emitter current I in the left branch... R Changes will affect V BE1 The number of bipolar transistors on the left branch is n times that on the right branch, so the leakage current on the left branch will increase significantly after radiation, leading to I... R Rise, V BE1 Decrease, but V BE2 The relative value remains unchanged. Therefore, the bandgap reference positive temperature coefficient voltage... V BE Increase, negative temperature coefficient voltage V BE2 The output voltage V of the bandgap reference remains unchanged after radiation. REF Increase.

[0025] After the total dose effect occurs, the hardened circuitry will monitor... V BE The change in voltage is converted into the corresponding compensation voltage I. O It is used to compensate for the output voltage deviation of the bandgap reference during radiation, ensuring the high reliability of the bandgap reference.

[0026] Example 1

[0027] Figure 1 The specific structure of the medium-strengthened circuit is as follows: Figure 2 As shown, it includes a total dose effect monitoring circuit, a current compensation circuit, a fixed bias circuit, a temperature compensation circuit, and a minimum compensation current limiting circuit.

[0028] Example 2

[0029] The total dose effect monitoring circuit includes an operational amplifier AMP1, resistors R1~R4, and one end of resistor R1 connected to the bandgap reference V. BE1 The other end of resistor R1 is connected to the inverting input terminal of AMP1 and one end of resistor R4, while the other end of resistor R4 is connected to the output terminal of AMP1; one end of resistor R2 is connected to... Figure 1 The upper end V of resistor R7 in the middle R7 Connected, and because Figure 1 The feedback effect of the operational amplifier (AMP) is such that this voltage is equal to the base-emitter voltage V of T2. BE2 The other end of resistor R2 is connected to R3 and the non-inverting input of AMP1, and the other end of R3 is connected to GND. The detection circuit will detect V. BE1 and V BE2 The voltage is amplified or reduced by the voltage division relationship of resistors R1 to R4, and V can be set. BE2 and V BE1 The amplification factor after subtraction is expressed as the output voltage V of AMP1. X As shown in the following formula (3):

[0030] (3)

[0031] Example 3

[0032] The current compensation circuit includes an operational amplifier AMP2, an NMOS transistor M1, a resistor R5, and PMOS transistors M2-M5 forming a common-source, common-gate current mirror. The non-inverting input of operational amplifier AMP2 is connected to the output of the total dose effect monitoring circuit. The detected voltage difference is converted into a compensation current through NMOS transistor M1 and resistor R5. The inverting input of operational amplifier AMP2 is connected to the source of NMOS transistor M1 and one end of resistor R5, with the other end of the resistor connected to GND. The output of AMP2 is connected to the gate of NMOS transistor M1, forming a negative feedback structure. The drain of NMOS transistor M1 is connected to the drain and gate of PMOS transistor M2. X When resistor R5 is converted into compensation current I M A common-source, common-gate current mirror is constructed using PMOS transistors M2 to M5, and the output is from the drain terminal of PMOS transistor M3.

[0033] Example 4

[0034] The temperature compensation circuit consists of a bipolar transistor Q1, a resistor R6, and PMOS transistors M6 to M9 forming a common-source common-gate current mirror. One end of the resistor R6 is connected to the emitter of the bipolar transistor Q1 to GND.

[0035] The base and collector of bipolar transistor Q1 are connected together, forming a diode-type junction, and are also connected to the other end of resistor R6. Through this structure, bipolar transistor Q1 generates a base-emitter voltage V.BE And a negative temperature coefficient current I is generated through resistor R6. CTAT Negative temperature coefficient current I CTAT A common-source, common-gate current mirror is constructed using PMOS transistors M6 to M9. The current is input from the gate and drain terminals of PMOS transistor M7 and output from the drain terminal of PMOS transistor M6.

[0036] Example 5

[0037] The fixed bias circuit includes NMOS transistor M 11 With NMOS transistor M 10 This module is designed to simulate the flow of the bandgap reference current I when it is not subjected to total dose radiation. DC This current flows through the NMOS transistor M 11 The drain and gate inputs are connected by the NMOS transistor M. 10 The output is from the drain terminal.

[0038] The total dose effect monitoring circuit is connected to the outputs of the current compensation circuit, the fixed bias circuit, and the temperature compensation circuit at one point. After subtracting the current, the result is used as the input of the minimum compensation current limiting circuit.

[0039] Example 6

[0040] The minimum compensation current limiting circuit includes NMOS transistor M12, whose gate and drain are connected to the gate of NMOS transistor M13. The sources of NMOS transistors M12 and M13 are connected to GND. The drain of NMOS transistor M13 is connected to the gate and drain of PMOS transistor M14 and the gate of PMOS transistor M15. The sources of PMOS transistors M14 and M15 are connected to AVIN. The drain of PMOS transistor M15 serves as the output of the minimum compensation current limiting circuit. This module is used to prevent the hardening circuit from drawing collector current from the bandgap reference when the bandgap reference is not fully established, thus preventing the bandgap reference output voltage from being established. Its input is from NMOS transistor M12. 12 The gate and drain terminals are inputs, and the output comes from the PMOS transistor M. 15 The drain output is used to prevent the hardening compensation current I. O If it is too small, it will affect the output of the reference voltage.

[0041] Hardening current I in total dose effect monitoring circuit O Temperature compensation circuit current I CTAT Current compensation circuit current I M and fixed bias circuit current I DC The relationship is:

[0042] (4)

[0043] When the bandgap reference is not irradiated, the bandgap reference voltage remains unchanged.

[0044] When the bandgap reference is affected by total dose irradiation, it triggers base leakage current in the bipolar transistor, causing a voltage difference between the base and emitter voltages of T1 and T2. V BE The output voltage V of the bandgap reference changes. REF An offset is generated. V BE The base-emitter voltage difference after radiation. V rad V is the voltage offset caused by radiation. REF1 The bandgap reference voltage after radiation:

[0045] (5)

[0046] (6)

[0047] At this time, the module's total dose effect monitoring circuit and current compensation circuit detect the radiation change, V X and I M Changes occurred successively, V X and I M Voltage and current after radiation:

[0048] (7)

[0049] (8)

[0050] At this time, the reinforcement current I O The gap begins to increase, and corresponding compensation is made to the left branch of the bandgap reference, such as... Figure 3 As shown, its reinforcement current I O Size:

[0051] (9)

[0052] Due to the compensation current I O Inflow, voltage V BE1 As the value increases, the voltage drift of the bandgap reference is compensated, V REF2 The reinforced bandgap reference voltage can be expressed as:

[0053] (10)

[0054] Figure 3The horizontal axis represents the degree of radiation received by the bandgap reference, and the vertical axis represents the output voltage of the bandgap reference. The three curves respectively show the voltage of the bandgap reference circuit before radiation, the reference voltage shift after radiation, and the reference voltage shift after hardening. Figure 3 As shown, the output voltage of the bandgap reference circuit without radiation is 1.202V. After being exposed to radiation doses of 100krad, 200krad, and 300krad, respectively, the output voltage becomes 1.2066V, 1.2117V, and 1.2169V. The offset of the reference output voltage at radiation doses of 100krad to 300krad is 3.4 to 11.2mV. Figure 3 As shown, after hardening, the bandgap reference output voltage ranges from 1.20168V to 1.20245V under radiation doses of 100krad to 300krad. The offset of the reference output voltage within 1mV under radiation doses of 100krad to 300krad is within 1mV.

[0055] The bandgap reference hardening method proposed in this invention can achieve real-time monitoring of the bandgap reference at the circuit level and adaptively generate a corresponding hardening current to harden the output voltage deviation of the bandgap reference caused by total dose radiation. Compared with process-level and device-level hardening methods, this method has higher versatility. The required hardening current can be adjusted according to different types of bandgap references by changing the resistance values ​​of R1~R5 in the total dose effect monitoring circuit and the current compensation circuit, or by adjusting the current mirror ratio. Furthermore, the resistance value of R6 in the temperature compensation circuit can be changed according to the different temperature coefficients of different bandgap references to provide corresponding temperature compensation.

Claims

1. A total dose bandgap reference circuit, characterized in that: The circuit includes a bandgap reference circuit with a hardened circuitry, the hardened circuitry comprising a total dose effect monitoring circuit, a current compensation circuit, a fixed bias circuit, a temperature compensation circuit, and a minimum compensation current limiting circuit connected in sequence. The bandgap reference circuit includes an operational amplifier AMP, bipolar transistors T1 and T2, resistors R7~R12, and a PMOS transistor M1. The emitter of bipolar transistor T1 is grounded, and the base and collector of bipolar transistor T1 are connected to one end of resistor R7. The voltage at this connection point is the base-emitter voltage VBE1 of bipolar transistor T1. The other end of R7 is connected to one end of resistor R8 and the non-inverting input of operational amplifier AMP. The emitter of bipolar transistor T2 is grounded, and the base and collector of bipolar transistor T2 are connected. The voltage at this connection point is the base-emitter voltage VBE2 of bipolar transistor T2. It is also connected to the inverting input of operational amplifier AMP and one end of resistor R9. The total dose effect monitoring circuit includes a resistor R1, one end of which is connected to the V of the bandgap reference circuit. BE1 The other end of resistor R1 is connected to the inverting input of operational amplifier AMP1 and one end of resistor R4, while the other end of resistor R4 is connected to the output of operational amplifier AMP1; one end of resistor R2 is connected to the upper V of resistor R7. R7 Connected, due to the feedback effect of the operational amplifier (AMP), V R7 Equal to the base-emitter voltage V of T2 BE2 The other end of resistor R2 is connected to resistor R3 and the non-inverting input of operational amplifier AMP1, and the other end of resistor R3 is connected to GND.

2. The anti-total-dose bandgap reference circuit according to claim 1, characterized in that: The total dose effect monitoring circuit detected V BE1 and V BE2 By utilizing the voltage division relationship between resistors R1 to R4, the output voltage V of the total dose effect monitoring circuit can be obtained. X With V BE2 and V BE1 The relationship is such that V can be changed by altering the ratio of the resistance values ​​of R1 to R4. X With V BE2 and V BE1 The difference relationship is shown in the following formula (1): （1）。 3. The anti-total-dose bandgap reference circuit according to claim 1, characterized in that: The current compensation circuit includes an operational amplifier AMP2. The inverting input of the operational amplifier AMP2 is connected to the output Vx of the total dose effect monitoring circuit. The output of the operational amplifier AMP2 is connected to the gate of NMOS transistor M1. The source of NMOS transistor M1 is connected to one end of resistor R5, and the other end of resistor R5 is connected to GND. The drain of NMOS transistor M1 is also connected to the drain of PMOS transistor M2. PMOS transistors M2 to M5 form a common-source common-gate current mirror. The drain of PMOS transistor M3 serves as the output of the current compensation circuit and is connected in sequence to the output of the temperature compensation circuit, the output of the fixed bias circuit, and the input of the minimum compensation current limiting circuit.

4. The anti-total-dose bandgap reference circuit according to claim 3, characterized in that: The fixed bias circuit includes an NMOS transistor M. 11 With NMOS transistor M 10 The fixed bias circuit is used to simulate the current I flowing through the bandgap reference when the bandgap reference current is not subjected to total dose radiation. DC Current I DC Through NMOS transistor M 11 The drain and gate inputs are connected by the NMOS transistor M. 10 The drain output is connected to the output of the temperature compensation circuit, the output of the current compensation circuit, and the input of the minimum compensation current limiting circuit, respectively.

5. The anti-total-dose bandgap reference circuit according to claim 4, characterized in that: The temperature compensation circuit includes a bipolar transistor Q1. The emitter of bipolar transistor Q1 and one end of resistor R6 are connected to GND. The base of bipolar transistor Q1 is connected to the collector and the other end of resistor R6, and then connected to a common-source, common-gate current mirror composed of PMOS transistors M6-M9. The drain of M6 serves as the output of the temperature compensation circuit, outputting a negative temperature compensation current I. CTAT It is connected to the output of the current compensation circuit, the output of the fixed bias circuit, and the input of the minimum compensation current limiting circuit.

6. The anti-total-dose bandgap reference circuit according to claim 5, characterized in that: The minimum compensation current limiting circuit includes an NMOS transistor M12. The gate and drain of the NMOS transistor M12 are connected to the gate of the NMOS transistor M13. The source of the NMOS transistor M12 and the source of the NMOS transistor M13 are connected to GND. The drain of the NMOS transistor M13 is connected to the gate of the PMOS transistor M14, the drain of the PMOS transistor M14, and the gate of the PMOS transistor M15, respectively. The source of the PMOS transistor M14 and the source of the PMOS transistor M15 are connected to AVIN. The drain of the PMOS transistor M15 serves as the output of the minimum compensation current limiting circuit.

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