Analog input system with input current limiting protection

Abstract

The application relates to the technical field of DCS control systems, in particular to an analog quantity input system with input current limiting protection, which comprises at least one channel circuit for connecting and providing acquisition current for an external AI instrument and a sampling control circuit connected with each channel circuit; wherein the sampling control circuit is used for acquiring the voltage value of any channel circuit and controlling the switch of the channel circuit according to the acquired voltage value. The analog quantity input system with input current limiting protection can prevent the overheat damage of MOS tubes in the channel circuit, keep the channel circuit from generating less heat when overcurrent occurs and improve the reliability, compared with the prior art.

Description

Technical Field

[0001] This invention relates to the field of DCS control system technology, and in particular to an analog input system with input current limiting protection. Background Technology

[0002] In existing DCS (Distributed Control System) systems, analog current input systems (e.g., 4mA to 20mA) are commonly used to sample data from actuators in production sites and utilities, typically with a drive voltage of 24V. Short-circuit damage to actuators, incorrect short-circuit connections by engineers, or incorrect voltage connections can lead to significant voltage drops within the analog current input system. This results in substantial power consumption within the system, causing component damage. In systems with current-limiting protection, the current is primarily consumed by the current regulating transistor. This not only wastes a significant amount of electrical energy but also causes a substantial increase in the internal temperature of the analog current input system, greatly shortening the lifespan of electronic components, making the system more susceptible to various malfunctions, and reducing system reliability. Summary of the Invention

[0003] In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides an analog input system with input current limiting protection, which solves the technical problem of high power consumption inside the existing current input module.

[0004] To achieve the above objectives, the main technical solutions adopted by the present invention include:

[0005] This invention provides an analog input system with input current limiting protection, comprising:

[0006] At least one channel circuit for connecting to an external AI instrument and providing the external AI instrument with the current to be collected, and a sampling control circuit connected to each of the channel circuits;

[0007] The sampling control circuit is used to collect the voltage value of any of the channel circuits according to a pre-specified control cycle, and control the switching of the channel circuits based on the collected voltage value.

[0008] Preferably, each of the channel circuits includes: a first circuit, a second circuit, a third circuit, and a control switch circuit connected to the second circuit and the third circuit respectively;

[0009] The control switch circuit is also connected to the sampling control circuit and is used to turn the second circuit off or on under the control of the sampling control circuit.

[0010] Preferably, the first circuit includes: a first terminal block and a first diode;

[0011] The cathode of the first diode is connected to the first terminal; the anode of the first diode is connected to a 24-volt voltage.

[0012] The second circuit includes: a second terminal block, a second diode, a first resistor, a first MOSFET, a second resistor, and a third resistor connected in sequence;

[0013] The second terminal is connected to the positive terminal of the second diode;

[0014] One end of the third resistor is connected to the second resistor, and the other end of the third resistor is grounded;

[0015] The drain of the first MOSFET is connected to the first resistor;

[0016] The source of the first MOSFET is connected to the second resistor;

[0017] The gate of the first MOS transistor is connected to the control switch circuit;

[0018] The third circuit includes: a third terminal block, wherein the third terminal block is grounded;

[0019] The control switch circuit includes: a second MOSFET, a fourth resistor, a fifth resistor, and a sixth resistor;

[0020] The drain of the second MOS transistor is connected to one end of the fourth resistor;

[0021] The other end of the fourth resistor is connected to a preset voltage Vg;

[0022] The source of the second MOS transistor is connected to the third terminal of the third circuit;

[0023] The gate of the second MOS transistor is connected to one end of the fifth resistor and one end of the sixth resistor, respectively;

[0024] The other end of the fifth resistor is connected to a 3.3-volt voltage;

[0025] The other end of the sixth resistor is connected to the sampling control circuit.

[0026] Preferably, the sampling control circuit includes: a data acquisition unit and a control unit connected in sequence;

[0027] The data acquisition unit is used to acquire the voltage value of any of the channel circuits and send the voltage value of the channel circuit to the control unit.

[0028] The control unit sends a signal to the control switch circuit to turn it off or on based on the voltage value of the channel circuit and a preset value.

[0029] If the control switch circuit receives a shutdown signal, it turns on the second MOSFET, which pulls the gate of the first MOSFET low, thereby turning off the first MOSFET.

[0030] If the control switch circuit receives an enable signal, the second MOSFET will turn off, causing the gate of the first MOSFET to rise, thereby enabling the first MOSFET.

[0031] Preferably, the data acquisition unit is connected to the first connection interface in the second circuit;

[0032] The first connection interface is located between the second resistor and the third resistor.

[0033] Preferably, each of the channel circuits further includes a second-order low-pass filter circuit;

[0034] One end of the second-order low-pass filter circuit is connected to the first connection interface in the second circuit.

[0035] The first connection interface is located between the second resistor and the third resistor;

[0036] The other end of the second-order low-pass filter circuit is connected to the data acquisition unit.

[0037] Preferably, each of the channel circuits further includes a fourth circuit;

[0038] The fourth circuit includes: a first capacitor and a HART circuit connected thereto;

[0039] One end of the first capacitor is connected to the positive terminal of the second diode;

[0040] The other end of the first capacitor is connected to the input terminal of the HART circuit;

[0041] The output of the HART circuit is connected to the control unit of the sampling control circuit.

[0042] Preferably, the preset voltage Vg connected to the fourth resistor satisfies:

[0043] Vg>24mA(R2+R3)+V thmax ;

[0044] V thmax This is the maximum value of the turn-on voltage of the first MOSFET.

[0045] Preferably, the control unit sends a shut-off or open signal to the control switch circuit based on the voltage value of the channel circuit and a preset value, specifically including:

[0046] The control unit determines whether the voltage value of the channel circuit is greater than a preset value and obtains the determination result;

[0047] If the determination result is that the voltage value of the channel circuit is greater than the preset value, the control unit will issue a shutdown signal after a preset conduction period TC; and issue an opening signal after a preset time period after issuing the shutdown signal.

[0048] The preset time period is the remaining time after subtracting the conduction period TC from the specified control period.

[0049] Preferably, if the determination result is that the voltage value of the channel circuit is less than or equal to a preset value, the control unit issues an activation signal.

[0050] The beneficial effects of the present invention are as follows: The analog input system with input current limiting protection of the present invention, by using a sampling control circuit to collect the voltage value of any of the channel circuits and controlling the switching of the channel circuits according to the collected voltage value, can prevent the MOSFETs in the channel circuits from overheating and being damaged, keep the channel circuits from generating too much heat during overcurrent, and has high reliability compared with the prior art. Attached Figure Description

[0051] Figure 1 This is a schematic diagram of an analog input system with input current limiting protection according to the present invention;

[0052] Figure 2 This is a schematic diagram of an analog input system with input current limiting protection according to an embodiment of the present invention;

[0053] Figure 3 This is a schematic diagram of another analog input system with input current limiting protection in an embodiment of the present invention;

[0054] Figure 4 This is a schematic diagram of another analog input current limiting protection system in an embodiment of the present invention;

[0055] Figure 5 This is a schematic diagram of another analog input current limiting protection system in an embodiment of the present invention;

[0056] Explanation of reference numerals in the attached figures

[0057] A: First terminal block;

[0058] B: Second terminal block;

[0059] C: Third terminal block;

[0060] D1: First diode;

[0061] D2: Second diode;

[0062] R1: First resistor;

[0063] Q1: First MOSFET;

[0064] R2: Second resistor;

[0065] R3: Third resistor;

[0066] Q2: Second MOSFET;

[0067] R4: Fourth resistor;

[0068] R5: Fifth resistor;

[0069] R6: The sixth resistor;

[0070] C1: First capacitor;

[0071] R7: The seventh resistor;

[0072] R8: The eighth resistor;

[0073] C2: Second capacitor;

[0074] C3: Third capacitor. Detailed Implementation

[0075] To better explain and facilitate understanding of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0076] To better understand the above technical solutions, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that the present invention can be understood more clearly and thoroughly, and that the scope of the present invention can be fully conveyed to those skilled in the art.

[0077] See Figure 1 This embodiment provides an analog input system with input current limiting protection, including:

[0078] At least one channel circuit for connecting to an external AI instrument and providing the external AI instrument with the current to be collected, and a sampling control circuit connected to each of the channel circuits.

[0079] The sampling control circuit is used to collect the voltage value of any of the channel circuits according to a pre-specified control cycle, and control the switching of the channel circuits based on the collected voltage value.

[0080] Specifically, each of the channel circuits includes: a first circuit, a second circuit, a third circuit, and a control switch circuit connected to the second circuit and the third circuit respectively.

[0081] The control switch circuit is also connected to the sampling control circuit and is used to turn the second circuit off or on under the control of the sampling control circuit.

[0082] See Figure 2 In this embodiment, the first circuit includes: a first terminal A and a first diode D1.

[0083] Wherein, the negative terminal of the first diode D1 is connected to the first terminal A; the positive terminal of the first diode D1 is connected to a 24-volt voltage.

[0084] The second circuit includes: a second terminal B, a second diode D2, a first resistor R1, a first MOSFET Q1, a second resistor R2, and a third resistor R3 connected in sequence;

[0085] The second terminal B is connected to the positive terminal of the second diode D2;

[0086] One end of the third resistor R3 is connected to the second resistor R2, and the other end of the third resistor R3 is grounded.

[0087] The drain of the first MOSFET Q1 is connected to the first resistor R1;

[0088] The source of the first MOSFET Q1 is connected to the second resistor R2;

[0089] The gate of the first MOS transistor Q1 is connected to the control switch circuit;

[0090] In this embodiment, the first diode D1 and the second diode D2 are for reverse connection protection. When a positive voltage is applied to the first terminal A and the second terminal B, the first diode D1 is cut off to prevent reverse flow of 24V. When a negative voltage is applied to the second terminal B and the third terminal C, the second diode D2 is reverse-biased and cut off, thus protecting the circuit.

[0091] The third circuit includes: a third terminal C, wherein the third terminal is grounded;

[0092] The control switch circuit includes: a second MOSFET Q2, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6;

[0093] The drain of the second MOS transistor Q2 is connected to one end of the fourth resistor R4;

[0094] The other end of the fourth resistor R4 is connected to a preset voltage Vg;

[0095] The source of the second MOS transistor Q2 is connected to the third terminal C of the third circuit;

[0096] The gate of the second MOS transistor Q2 is connected to one end of the fifth resistor R5 and one end of the sixth resistor R6, respectively;

[0097] The other end of the fifth resistor R5 is connected to a 3.3-volt voltage;

[0098] The other end of the sixth resistor R6 is connected to the sampling control circuit.

[0099] In this embodiment, the control switch circuit uses the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the second MOSFET Q2 to control the switching of the first MOSFET Q1. When the control switch circuit receives a shutdown signal from the control unit, it turns on the second MOSFET, pulling the gate of the first MOSFET low and thus turning off the first MOSFET. If the control switch circuit receives an enable signal from the control unit, it turns off the second MOSFET, raising the gate of the first MOSFET and thus turning on the first MOSFET.

[0100] The function of the fourth resistor R4 is to provide a definite voltage level when the power is first applied and the voltage level of the control switch circuit is uncertain, so as to keep the channel closed.

[0101] In this embodiment, each channel circuit has three terminals (first terminal A, second terminal B, and third terminal C). When using first terminal A and second terminal B, the connected external AI instrument can be a passive AI instrument. When using second terminal B and third terminal C, the connected external AI instrument can be an active AI instrument.

[0102] Passive AI Instruments: Passive AI instruments are instruments without an internal signal source. They are typically used only to measure externally provided analog signals and transmit them to a receiving device. Passive AI instruments rely on an external signal source, such as a 4-20mA or 0-10V signal, for measurement and transmission. These instruments cannot actively generate signals; they can only measure and report external signals. Active AI Instruments: Active AI instruments are instruments with an internal signal source. They are capable of actively generating analog signals and transmitting them to other devices. Active AI instruments typically have a built-in current or voltage source that can simulate or emulate specific measurement signals. These instruments can be used for analog measurements or calibration of other equipment, as well as for diagnostics and testing.

[0103] In this embodiment, the first MOSFET Q1 can be selected in a smaller package, such as SOT-23. SOT-23 is a very common small package, particularly suitable for space-constrained applications. It has three pins and can accommodate smaller MOSFET devices, such as low-power MOSFETs, at a lower cost. The second MOSFET Q2, acting only as a switching MOSFET with almost no power requirement, can be selected from even smaller packages such as SOT363. SOT363 is a very small package, typically used in low-power and small-circuit applications. It has six pins, suitable for the small package requirements of integrated circuits.

[0104] See Figure 2 The sampling control circuit in this embodiment includes: a data acquisition unit and a control unit connected in sequence;

[0105] In this embodiment, the data acquisition unit includes a MUX and an ADC. The control unit in this embodiment is an MCU.

[0106] The data acquisition unit is used to acquire the voltage value of any of the channel circuits and send the voltage value of the channel circuit to the control unit.

[0107] The control unit sends a signal to the control switch circuit to turn it off or on based on the voltage value of the channel circuit and a preset value.

[0108] If the control switch circuit receives a shutdown signal, it turns on the second MOSFET, which pulls the gate of the first MOSFET low, thereby turning off the first MOSFET.

[0109] If the control switch circuit receives an enable signal, the second MOSFET will turn off, causing the gate of the first MOSFET to rise, thereby enabling the first MOSFET to turn on.

[0110] See Figure 2 In this embodiment, the data acquisition unit is connected to the first connection interface in the second circuit;

[0111] The first connection interface is located between the second resistor and the third resistor.

[0112] See Figure 3 In another embodiment, each of the channel circuits further includes a second-order low-pass filter circuit.

[0113] One end of the second-order low-pass filter circuit is connected to the first connection interface in the second circuit.

[0114] The first connection interface is located between the second resistor and the third resistor.

[0115] The other end of the second-order low-pass filter circuit is connected to the data acquisition unit.

[0116] See Figure 3 The second-order low-pass filter circuit in this embodiment includes a seventh resistor R7, an eighth resistor R8, a second capacitor C2, and a third capacitor C3. In this embodiment, the first end of the seventh resistor R7 is connected to the first connection interface, and the second end of the seventh resistor R7 is connected to the first end of the eighth resistor R8 and the first end of the second capacitor C2, respectively. The second end of the eighth resistor R8 is connected to the first end of the third capacitor C3 and the data acquisition unit, respectively. The second ends of the second capacitor C2 and the second ends of the third capacitor C3 are both grounded.

[0117] The second-order low-pass filter circuit in this embodiment filters the data routinely sampled by the external AI instrument, stabilizing the card's input signal. Furthermore, since the control unit's response speed cannot be too slow, a reasonable cutoff frequency, such as 100Hz, needs to be selected. The second-order low-pass filter circuit in this embodiment achieves this effect perfectly.

[0118] In the practical application of this embodiment, see Figure 4 and Figure 5 Each of the aforementioned channel circuits further includes a fourth circuit;

[0119] The fourth circuit includes: a first capacitor C1 and a HART circuit connected thereto; wherein one end of the first capacitor C1 is connected to the positive terminal of the second diode; the other end of the first capacitor C1 is connected to the input terminal of the HART circuit; and the output terminal of the HART circuit is connected to the control unit of the sampling control circuit.

[0120] The HART (Highway Addressable Remote Transducer) circuit in this embodiment is a communication protocol used in industrial automation. It adds digital communication capabilities to a 4-20mA analog signal, enabling bidirectional data transmission between instruments and control devices. In a specific application, the HART circuit in this embodiment transmits the data it acquires to the control unit, which then processes the data and transmits it to a host computer connected to it.

[0121] In this embodiment, the preset voltage Vg connected to the fourth resistor satisfies:

[0122] Vg>24mA(R2+R3)+V thmax ;

[0123] V thmax This is the maximum value of the turn-on voltage of the first MOSFET.

[0124] Vg is actually the hardware current-limiting voltage of the second MOSFET. Let the current in the channel circuit be I, then the formula is satisfied: I = (Vg - V th(Q1) ) / (R2+R3);

[0125] Among them, V th(Q1) This is the turn-on voltage of the first MOSFET.

[0126] Assume I = 30mA, meeting the 0-24mA requirement of the external AI instrument. Assume R1 + R2 + R3 = 250Ω, meeting the input impedance requirements of the HART card.

[0127] The turn-on voltage V of the first MOSFET th(Q1) It has a maximum and a minimum value, which only needs to satisfy: Vg>24mA(R2+R3)+V thmax ;

[0128] For example, if R2 + R3 = 200Ω, if V thmax =2.5V, then:

[0129] Vg = 200 * 25 / 1000 + 2.5 = 7.5V, at this time Imax = 25mA.

[0130] And if the first MOSFET has V thmin =1.5V, so Imax = 25 + 1 / 200 * 1000 = 30mA. At this time, the input current can be controlled more precisely, about 25-30mA.

[0131] In this embodiment, the control unit sends a shut-off or open signal to the control switch circuit based on the voltage value of the channel circuit and a preset value, specifically including:

[0132] The control unit determines whether the voltage value of the channel circuit is greater than a preset value and obtains the determination result; in this embodiment, the preset value is the voltage value corresponding to the third resistor R3.

[0133] If the determination result is that the voltage value of the channel circuit is greater than the preset value, the control unit will issue a shutdown signal after a preset conduction period TC; and issue an opening signal after a preset time period after issuing the shutdown signal.

[0134] In this embodiment, the conduction period TC is 60ms, and the specified control period is 500ms.

[0135] The preset time period is the remaining time after subtracting the conduction period TC from the specified control period.

[0136] If the determination result is that the voltage value of the channel circuit is less than or equal to a preset value, the control unit will issue an activation signal.

[0137] In this embodiment, within each specified control cycle, a signal to turn off or on is sent to the control switch circuit based on the voltage value of the channel circuit and a preset value, causing the second MOSFET to turn off or on. This cycle repeats continuously, minimizing heat generation in the channel circuit during overcurrent and ensuring high reliability. When the channel current returns to normal, the channel remains on, ensuring the normal operation of the external AI instrument.

[0138] This embodiment of an analog input system with input current limiting protection uses a sampling control circuit to collect the voltage value of any of the channel circuits and controls the switching of the channel circuits based on the collected voltage value. Compared with the prior art, this system can prevent the MOSFETs in the channel circuits from overheating and being damaged, keep the channel circuits from generating too much heat during overcurrent, and has high reliability.

[0139] In the description of this invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0140] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0141] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that they are in indirect contact through an intermediate medium. Furthermore, "above," "over," or "on top" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," or "beneath" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0142] In the description of this specification, the terms "one embodiment," "some embodiments," "embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0143] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make modifications, alterations, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. An analog input system with input current limiting protection, characterized in that, include: At least one channel circuit for connecting to an external AI instrument and providing the external AI instrument with the current to be collected, and a sampling control circuit connected to each of the channel circuits; The sampling control circuit is used to collect the voltage value of any of the channel circuits according to a pre-specified control cycle, and control the switching of the channel circuits according to the collected voltage value. Each of the aforementioned channel circuits includes: a first circuit, a second circuit, a third circuit, and a control switch circuit connected to the second circuit and the third circuit respectively; The control switch circuit is also connected to the sampling control circuit and is used to close or open the second circuit under the control of the sampling control circuit. The first circuit includes: a first terminal block and a first diode; The cathode of the first diode is connected to the first terminal; the anode of the first diode is connected to a 24-volt voltage. The second circuit includes: a second terminal block, a second diode, a first resistor, a first MOSFET, a second resistor, and a third resistor connected in sequence; The second terminal is connected to the positive terminal of the second diode; One end of the third resistor is connected to the second resistor, and the other end of the third resistor is grounded; The drain of the first MOSFET is connected to the first resistor; The source of the first MOSFET is connected to the second resistor; The gate of the first MOS transistor is connected to the control switch circuit; The third circuit includes a third terminal block, wherein the third terminal block is grounded.

2. The analog input system with input current limiting protection according to claim 1, characterized in that, The control switch circuit includes: a second MOSFET, a fourth resistor, a fifth resistor, and a sixth resistor; The drain of the second MOS transistor is connected to one end of the fourth resistor; The other end of the fourth resistor is connected to a preset voltage Vg; The source of the second MOS transistor is connected to the third terminal of the third circuit; The gate of the second MOS transistor is connected to one end of the fifth resistor and one end of the sixth resistor, respectively; The other end of the fifth resistor is connected to a 3.3-volt voltage; The other end of the sixth resistor is connected to the sampling control circuit.

3. The analog input system with input current limiting protection according to claim 2, characterized in that, The sampling control circuit includes: a data acquisition unit and a control unit connected in sequence; The data acquisition unit is used to acquire the voltage value of any of the channel circuits and send the voltage value of the channel circuit to the control unit. The control unit sends a signal to the control switch circuit to turn it off or on based on the voltage value of the channel circuit and a preset value. If the control switch circuit receives a shutdown signal, it turns on the second MOSFET, which pulls the gate of the first MOSFET low, thereby turning off the first MOSFET. If the control switch circuit receives an enable signal, the second MOSFET will turn off, causing the gate of the first MOSFET to rise, thereby enabling the first MOSFET.

4. The analog input system with input current limiting protection according to claim 3, characterized in that, The data acquisition unit is connected to the first connection interface in the second circuit; The first connection interface is located between the second resistor and the third resistor.

5. The analog input system with input current limiting protection according to claim 3, characterized in that, Each of the aforementioned channel circuits further includes a second-order low-pass filter circuit; One end of the second-order low-pass filter circuit is connected to the first connection interface in the second circuit. The first connection interface is located between the second resistor and the third resistor; The other end of the second-order low-pass filter circuit is connected to the data acquisition unit.

6. The analog input system with input current limiting protection according to claim 4 or 5, characterized in that, Each of the aforementioned channel circuits further includes a fourth circuit; The fourth circuit includes: a first capacitor and a HART circuit connected thereto; One end of the first capacitor is connected to the positive terminal of the second diode; The other end of the first capacitor is connected to the input terminal of the HART circuit; The output of the HART circuit is connected to the control unit of the sampling control circuit.

7. The analog input system with input current limiting protection according to claim 6, characterized in that, in, The preset voltage Vg connected to the fourth resistor satisfies: Vg>24mA(R2+R3)+V thmax ; V thmax This is the maximum value of the turn-on voltage of the first MOSFET.

8. The analog input system with input current limiting protection according to claim 7, characterized in that, The control unit sends a shut-off or open signal to the control switch circuit based on the voltage value of the channel circuit and a preset value, specifically including: The control unit determines whether the voltage value of the channel circuit is greater than a preset value and obtains the determination result; If the determination result is that the voltage value of the channel circuit is greater than the preset value, the control unit will issue a shutdown signal after a preset conduction period TC; and issue an opening signal after a preset time period after issuing the shutdown signal. The preset time period is the remaining time after subtracting the conduction period TC from the specified control period.

9. The analog input system with input current limiting protection according to claim 8, characterized in that, If the determination result is that the voltage value of the channel circuit is less than or equal to a preset value, the control unit will issue an activation signal.

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