Bandwidth parameter setting method, chip design method, device and related equipment

Abstract

Embodiments of the present application provide a bandwidth parameter setting method, a chip design method, an apparatus, and related devices. The bandwidth parameter setting method is used to set bandwidth parameters for an IP system including an IP source, a destination, and a bus path connecting the IP source and destination. The method comprises: invoking a pre-built bandwidth parameter evaluation model that indicates at least a change relationship between multiple bandwidth parameters of the IP system, and obtaining initial values for at least some of the multiple bandwidth parameters; adjusting the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the multiple bandwidth parameters to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source; and determining the target values corresponding to the multiple bandwidth parameters as the bandwidth parameters set for the IP system. This method can improve the performance of the chip IP system when the chip IP system is designed based on the bandwidth parameters.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and in particular to a bandwidth parameter setting method, a chip design method, an apparatus, and related equipment. Background Art

[0002] IP (Intellectual Property) modules, also known as IP cores or IP blocks, are pre-designed and verified functional modules that can be integrated into chip designs, such as processor cores, memory controllers, interface controllers, direct memory access devices (DMA), and memory.

[0003] In chip design, an IP system consists of IP modules, which are interconnected via a bus. This allows for data transmission between the modules, enabling them to collaborate and complete multiple tasks. To ensure chip performance, the bandwidth of the IP system must be properly designed during chip design. In this context, providing a bandwidth parameter setting solution to optimize the bandwidth parameters of the IP system and improve its performance has become a pressing technical challenge for those skilled in the art. Summary of the Invention

[0004] In view of this, the embodiments of the present application provide a bandwidth parameter setting method, a chip design method, an apparatus and related equipment, which improve the IP system performance of the chip design by reasonably designing the bandwidth parameters of the IP system.

[0005] In a first aspect, an embodiment of the present application provides a bandwidth parameter setting method for setting bandwidth parameters of an IP system, wherein the IP system includes an IP source end, a destination end, and a bus path connecting the IP source end and the destination end; the method includes:

[0006] Invoking a pre-built bandwidth parameter evaluation model, wherein the bandwidth parameter evaluation model at least indicates a change relationship between multiple bandwidth parameters of the IP system;

[0007] and obtaining initial values of at least some of the plurality of bandwidth parameters;

[0008] adjusting the values of the plurality of bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters, so as to determine target values corresponding to the plurality of bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end;

[0009] The target values corresponding to the multiple bandwidth parameters are determined as the bandwidth parameters set by the IP system.

[0010] Optionally, the plurality of bandwidth parameters include: the port transmission unit quantity and data processing time of the IP source end, and the transmission delay of the bus path;

[0011] The initial values of the partial bandwidth parameters include: an initial value of the port transmission unit quantity and an initial value of the data processing time.

[0012] Optionally, adjusting the values of the multiple bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end includes:

[0013] The values of the multiple bandwidth parameters are adjusted at least based on the bandwidth parameter evaluation model, and the initial values of the port transmission unit quantity and the data processing time, so as to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

[0014] Optionally, the transmission delay of the bus path includes: transmission response delay and hash transmission delay;

[0015] The transmission response delay indication is the corresponding transmission time of the request sent by the IP source end and the corresponding response data received on the bus path;

[0016] The hash transmission delay indication is: the hash transmission interval time corresponding to two data processing signals generated when the request sent by the corresponding IP source end is transmitted at the bottleneck node in the bus path.

[0017] Optionally, the changing relationship between the multiple bandwidth parameters of the IP system includes:

[0018] If the value of the port transmission unit amount of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, the hash transmission delay reaches the maximum;

[0019] If the value of the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, the data processing time of the IP source end reaches the maximum.

[0020] Optionally, also include:

[0021] Acquire simulation data of the IP system, the simulation data including at least a simulation structure of a bus path and simulation interface information of an IP source end connected to a destination end via the bus path;

[0022] Simulating the transmission process of the IP system based on the simulation data; wherein the transmission process of the IP system includes a process in which a request sent by an IP source end is transmitted to a destination end via a bus path, and a process in which response data from the destination end is transmitted to the IP source end via the bus path;

[0023] Analyzing and determining, according to the transmission process of the IP system, a plurality of bandwidth parameters corresponding to the processing bandwidth of the IP system, and a change relationship between the plurality of bandwidth parameters;

[0024] The bandwidth parameter evaluation model is constructed according to the multiple bandwidth parameters and the change relationships between the multiple bandwidth parameters.

[0025] Optionally, also include:

[0026] Obtaining an initial relationship between the hash transmission delay of the bus path and the data processing time of the IP source end;

[0027] The adjusting the values of the multiple bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing duration to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing duration requirement of the IP source end includes:

[0028] Taking the initial relationship between the hash transmission delay of the bus path and the data processing time as a constraint, according to the bandwidth parameter evaluation model, as well as the initial values of the port transmission unit quantity and the data processing time, the values of the multiple bandwidth parameters are adjusted to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

[0029] Optionally, the initial relationship between the hash transmission delay of the bus path and the data processing duration includes:

[0030] The hash transmission delay is less than the data processing time of the IP source end, or the hash transmission delay is greater than the data processing time of the IP source end;

[0031] When the hash transmission delay is less than the data processing time of the IP source, the data processing time of the IP source limits the bandwidth utilization of the bus path;

[0032] When the hash transmission delay is greater than the data processing time of the IP source end, the bandwidth of the bus path limits the demand of the data processing time of the IP source end on the port transmission unit quantity.

[0033] Optionally, the adjusting the values of the multiple bandwidth parameters based on the bandwidth parameter evaluation model, the initial values of the port transmission unit quantity and the data processing time, and taking the initial relationship between the transmission delay of the bus path and the data processing time as a constraint, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end, includes:

[0034] When the hash transmission delay is less than the data processing time of the IP source, adjusting the values of the plurality of bandwidth parameters according to the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, so that the data processing time of the IP source is balanced with the bandwidth of the bus path;

[0035] Determine target values corresponding to the multiple bandwidth parameters in the balanced state, wherein the data processing time of the IP source end and the bandwidth of the bus path reach a balanced state, and the bandwidth of the bus path meets the port transmission unit quantity requirement and data processing time requirement of the IP source end.

[0036] Optionally, the data processing time of the IP source terminal and the bandwidth of the bus path reaching a balance state include:

[0037] The port transmission unit quantity of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit quantity of the IP source end is less than the ratio of the transmission response delay to the hash transmission delay.

[0038] Optionally, the balance state is between a first state and a second state, the first state is a state in which both the bus path and the IP source end are idle for data processing, and the second state is a state in which the transmission response delay of the bus path increases.

[0039] Optionally, the first state includes the following relationship: the port transmission unit amount of the IP source end is less than the ratio of the transmission response delay to the data processing time of the IP source end;

[0040] Wherein, when the IP source end is in a third state in which data processing is idle, if the data processing time of the IP source end is reduced, the port transmission unit amount of the IP source end is less than the ratio of the transmission response delay to the data processing time of the IP source end;

[0041] The third state includes the following relationship: the port transmission unit quantity of the IP source end is greater than the ratio of the transmission response delay to the data processing time length of the IP source end.

[0042] Optionally, the second state includes the following relationship: the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay;

[0043] Among them, in the balanced state, if the port transmission unit amount of the IP source end is increased, the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay.

[0044] Optionally, adjusting the values of the multiple bandwidth parameters so that the data processing time of the IP source end and the bandwidth of the bus path reach a balance includes:

[0045] If the current state is the third state, reducing the data processing time of the IP source end to adjust from the third state to the first state;

[0046] If the current state is the first state, increasing the port transmission unit quantity of the IP source end to adjust from the first state to a balanced state;

[0047] If the current state is the second state, the port transmission unit quantity of the IP source end is reduced to adjust from the second state to the balanced state.

[0048] In a second aspect, an embodiment of the present application provides a chip design method, comprising:

[0049] Obtaining a bandwidth parameter set by the IP system, where the bandwidth parameter is determined based on the bandwidth parameter setting method described in the first aspect above;

[0050] The IP system of the chip is designed according to the bandwidth parameters.

[0051] In a third aspect, an embodiment of the present application provides a bandwidth parameter setting device for setting bandwidth parameters of an IP system, wherein the IP system includes an IP source end, a destination end, and a bus path connecting the IP source end and the destination end, including:

[0052] A calling module, configured to call a pre-built bandwidth parameter evaluation model, wherein the bandwidth parameter evaluation model at least indicates a change relationship between multiple bandwidth parameters of the IP system;

[0053] A first acquisition module, configured to acquire at least initial values of some bandwidth parameters among the multiple bandwidth parameters;

[0054] an adjustment module, configured to adjust the values of the plurality of bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters, so as to determine target values corresponding to the plurality of bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end;

[0055] The determination module is configured to determine the target values corresponding to the multiple bandwidth parameters as the bandwidth parameters set by the IP system.

[0056] In a fourth aspect, an embodiment of the present application provides a chip design device, comprising:

[0057] A second acquisition module is configured to acquire a bandwidth parameter set by the IP system, wherein the bandwidth parameter is determined based on the bandwidth parameter setting method described in the first aspect above;

[0058] The chip design module is used to design the IP system of the chip according to the bandwidth parameters.

[0059] In a fifth aspect, an embodiment of the present application provides a computer device, comprising: the bandwidth parameter setting device as described in the third aspect above and / or the chip design device as described in the fourth aspect above.

[0060] In a sixth aspect, an embodiment of the present application provides a storage medium, which stores one or more computer-executable instructions, and the one or more computer-executable instructions are used to execute the bandwidth parameter setting method described in the first aspect above and / or the chip design method described in the second aspect above.

[0061] Embodiments of the present application provide a bandwidth parameter setting method, a chip design method, an apparatus, and related devices. The bandwidth parameter setting method is used to set bandwidth parameters for an IP system, wherein the IP system includes an IP source, a destination, and a bus path connecting the IP source and destination. The method calls a pre-built bandwidth parameter evaluation model, which at least indicates a changing relationship between multiple bandwidth parameters of the IP system; and obtains initial values of at least some of the multiple bandwidth parameters. Furthermore, the method adjusts the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the multiple bandwidth parameters to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source. Furthermore, the target values corresponding to the multiple bandwidth parameters are determined as the bandwidth parameters set for the IP system.

[0062] It can be seen that the embodiment of the present application calls the bandwidth parameter setting method of the pre-built bandwidth parameter evaluation model, so that the initial values of some bandwidth parameters among the multiple bandwidth parameters of the IP system can be adjusted based on the bandwidth parameter evaluation model, so that when the bandwidth of the bus path of the IP system meets the data processing requirements of the IP source end, the target values corresponding to the multiple bandwidth parameters are determined. When the target values corresponding to the multiple bandwidth parameters are determined as the bandwidth parameters set by the IP system, the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path reach a balanced state, thereby realizing the reasonable design of the bandwidth parameters of the IP system.

[0063] Furthermore, based on the bandwidth parameters that achieve a balanced state between the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path, when designing the IP system of the chip, the utilization of the bus path bandwidth and the data processing efficiency of the IP source end in the IP system of the chip can be effectively improved, thereby achieving performance improvement of the IP system of the chip design. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0065] Figure 1 It is an optional structural diagram of the chip IP system;

[0066] Figure 2 This is an optional flow chart of the bandwidth parameter setting method provided in an embodiment of the present application;

[0067] Figure 3 This is a flow chart of constructing a bandwidth parameter evaluation model provided by an embodiment of the present application;

[0068] Figure 4 This is a schematic diagram of signal transmission simulation of an IP system provided in an embodiment of the present application;

[0069] Figure 5 Schematic diagram of a bandwidth parameter evaluation model provided in an embodiment of the present application;

[0070] Figures 6 to 12 A schematic diagram of transmission timing corresponding to adjusting various bandwidth parameters of an IP system based on a bandwidth parameter evaluation model provided in an embodiment of the present application;

[0071] Figure 13 This is an optional flowchart of the chip design method provided in the embodiment of the present application;

[0072] Figure 14 This is an optional block diagram of a bandwidth parameter setting device provided in an embodiment of the present application;

[0073] Figure 15 This is an optional block diagram of the chip design device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0074] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0075] Figure 1 The following is an exemplary diagram showing an optional structure of a chip IP system. Figure 1 As shown, the chip system includes: multiple IP (Intellectual Property, intellectual property) modules (such as Figure 1 Shown are IP module 01, IP module 02, ..., IP module 0n) and a bus path 11.

[0076] The IP module is a pre-designed and verified functional module that can be integrated into the chip design, such as a processor core, a memory controller, an interface controller, a direct memory access device (DMA), a memory, etc., for implementing corresponding communications.

[0077] The bus path 11 is the path for information transfer between the various functional modules in the chip IP system and is the basis for information transmission in the chip IP system. The bus path 11 can be formed by one or more buses, where buses can generally be divided into address buses, data buses, and control buses. The address bus is used to transmit memory addresses, the data bus is used to transmit data, and the control bus is used to transmit control signals. The various functional modules in the chip IP system transmit and exchange information through the bus path, realizing the various functions of the chip IP system.

[0078] Figure 1 The multiple IP modules (IP module 01, IP module 02, ..., IP module 0n) shown can transmit data via bus path 11, enabling collaborative work to complete multiple tasks. When multiple IP modules transmit data via bus path 11, the IP module sending data can be called the IP source, and the receiving end of the data can be called the destination. The IP source, destination, and the bus path connecting the IP source and destination form an IP system.

[0079] During chip design, to ensure the performance of the IP system of the chip design and enable the IP module to meet the performance design indicators, it is necessary to reasonably design the bandwidth of the IP system connecting the IP source end to the destination end through the bus path (for example, the bandwidth of the IP system from DMA to memory through the bus path). When designing the bandwidth of the IP system, it is necessary to comprehensively consider factors such as the parameter information of the IP source end, the bus path and the destination end.

[0080] As an optional implementation, the bandwidth of the IP system from the IP source to the destination can be evaluated by calculating the total amount of data transmitted by the bus per unit time, that is, the bandwidth of the bus, where the bandwidth of the bus is equal to the ratio of the data transmitted in each bus cycle to the bus transmission cycle.

[0081] However, the bus bandwidth cannot reflect the performance of the IP module, and the reasonable design of the IP system from the IP source to the destination cannot be achieved only by the bus bandwidth.

[0082] In view of this, the embodiments of the present application provide an improved chip design solution. Through a bandwidth parameter setting method, the bandwidth parameters set for the IP system are determined so that the bandwidth of the bus path in the IP system meets the data processing requirements of the IP source end. When the IP system of the chip is designed based on the bandwidth parameters, the utilization rate of the bus path bandwidth in the IP system of the chip and the data processing efficiency of the IP source end can be effectively improved, thereby achieving performance improvement of the IP system designed for the chip.

[0083] Based on this idea, in the bandwidth parameter setting method provided in the embodiment of the present application, by calling the bandwidth parameter setting method of a pre-built bandwidth parameter evaluation model, the initial values of some bandwidth parameters among the multiple bandwidth parameters of the IP system can be adjusted based on the bandwidth parameter evaluation model. Therefore, when the bandwidth of the bus path of the IP system meets the data processing requirements of the IP source end, the target values corresponding to the multiple bandwidth parameters are determined. When the target values corresponding to the multiple bandwidth parameters are determined as the bandwidth parameters set by the IP system, the data processing performance of the IP source end and the bandwidth utilization of the bus path in the IP system are balanced.

[0084] The bandwidth parameter setting method provided in the embodiment of the present application is described in detail below.

[0085] Figure 2 The following is an exemplary diagram of an optional flow chart of a method for setting bandwidth parameters according to an embodiment of the present application. Figure 2 As shown, the bandwidth parameter setting method includes:

[0086] Step S101: calling a pre-built bandwidth parameter evaluation model.

[0087] In an optional example, the bandwidth parameter evaluation model can be obtained by simulating and analyzing the simulation data of the IP system based on comprehensive consideration of the parameter information of the IP source end, bus path and destination end. Thus, under the condition of comprehensive consideration of the parameter information of the IP source end, bus path and destination end in the IP system, the bandwidth parameter evaluation model can at least indicate the changing relationship between multiple bandwidth parameters of the IP system.

[0088] The bandwidth parameter may be a parameter corresponding to the performance of the IP source end and the bandwidth information of the bus path.

[0089] Step S102: obtaining initial values of at least some of the multiple bandwidth parameters.

[0090] The initial values of some bandwidth parameters among the multiple bandwidth parameters may be parameter values related to the IP source end, the destination end, and the bus path in a pre-designed IP system.

[0091] By obtaining initial values of at least some of the multiple bandwidth parameters, a pre-designed IP system can be simulated and evaluated based on a pre-built bandwidth parameter evaluation model.

[0092] Step S103 : adjusting the values of the various bandwidth parameters at least according to the bandwidth parameter evaluation model and the initial values of some bandwidth parameters.

[0093] When the bandwidth parameter evaluation model at least indicates the changing relationship between multiple bandwidth parameters of the IP system and obtains initial values of some bandwidth parameters among the multiple bandwidth parameters, the initial values of the some bandwidth parameters can be brought into the bandwidth parameter evaluation model to adjust the numerical values of the multiple bandwidth parameters of the IP system based on the evaluation results of the bandwidth parameter evaluation model.

[0094] By adjusting the values of the multiple bandwidth parameters, target values corresponding to the multiple bandwidth parameters can be determined when the bandwidth of the bus path in the IP system meets the data processing requirements of the IP source end.

[0095] The bandwidth of the bus path in the IP system meeting the data processing requirements of the IP source can be understood as meaning that, in the IP system, the data processing performance of the IP source is maximized based on the bandwidth of the bus path, and / or the bandwidth of the bus path can be effectively utilized based on the number of requests issued by the IP source, without idle or congested states, and the utilization rate of the bus path is maximized. For example, when the bandwidth of the bus path in the IP system meets the data processing requirements of the IP source, it is necessary to achieve a balance between the data processing performance of the IP source and the bandwidth utilization of the bus path in the IP system.

[0096] Step S104: determining target values corresponding to the plurality of bandwidth parameters as bandwidth parameters set by the IP system.

[0097] When the bandwidth of the bus path meets the data processing requirements of the IP source end, target values corresponding to multiple bandwidth parameters are determined. Therefore, when the target values corresponding to the multiple bandwidth parameters are determined as bandwidth parameters set by the IP system, the parameter information requirements of the IP source end, the bus path and the destination end can be comprehensively considered, and a reasonable design of the IP system can be achieved. In this IP system, a balance is achieved between the data processing performance of the IP source end and the bandwidth utilization of the bus path.

[0098] Furthermore, based on the bandwidth parameters that achieve a balanced state between the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path, when designing the IP system of the chip, the utilization of the bus path bandwidth in the chip IP system and the data processing efficiency of the IP source end can be effectively improved, thereby achieving performance improvement of the IP system of the chip design and avoiding the modification process caused by the bus path bandwidth not being able to meet the data processing efficiency of the IP source end in the later stage.

[0099] It can be seen that the embodiment of the present application, by calling the bandwidth parameter setting method of the pre-built bandwidth parameter evaluation model, enables the initial values of some of the various bandwidth parameters of the IP system to be adjusted based on the bandwidth parameter evaluation model. Thus, when the bandwidth of the bus path of the IP system meets the data processing requirements of the IP source end, the target values corresponding to the various bandwidth parameters are determined. When the target values corresponding to the various bandwidth parameters are determined as the bandwidth parameters set by the IP system, the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path are balanced, thereby achieving a reasonable design of the bandwidth parameters of the IP system. Furthermore, based on the bandwidth parameters that achieve a balanced state between the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path, when designing the IP system of the chip, the utilization rate of the bus path bandwidth of the chip IP system and the data processing efficiency of the IP source end can be effectively improved, thereby achieving performance improvement of the IP system designed for the chip.

[0100] In some embodiments, based on comprehensive consideration of factors such as parameter information of the IP source, bus path and destination in the IP system, the various bandwidth parameters of the IP system may include the port transmission unit quantity and data processing time of the IP source, as well as the transmission delay of the bus path.

[0101] As an optional implementation, in bus transmission, a transaction (abbreviated as "trans") serves as a basic data transmission. The master device sends a trans request to the slave device, and the slave device responds to the request and returns a response to the master device. Without waiting for the slave device to reply to the response, the master device will continuously issue one or more trans requests. Each trans transmits one or more transfers according to the burst type; the master device and the slave device transmit once through the valid and ready handshake (both are 1), indicating the transmission of a transfer. For example, when the valid and ready signals are 1 at the same time, a transfer is transmitted. When all transfers are completed, the slave device will reply to the master device with a response indicating that the entire trans is completed, such as an OKAY response. Outstanding indicates the number of trans that are being executed and not yet completed among the multiple transmissions of the master device.

[0102] Based on this, in an optional implementation, the port transmission unit capacity of the IP source end can be understood as the number of requests that the IP source end in the IP system can continuously issue without waiting for the response corresponding to the previous data transmission request. This port transmission unit capacity can be called the outstanding capacity of the IP source end.

[0103] When an IP source initiates a data transfer request, the bus interface corresponding to the IP source sends one or more data transfer units (trans). During the data transfer process on the bus, a trans may contain multiple beats of data. A beat refers to the data transmitted in a data transfer cycle, for example, 4 bytes (32 bits) of data in a data transfer cycle. When a trans is executed, the destination returns a response to indicate the completion status of the trans. Outstanding indicates the number of trans that have not yet completed within the execution of one or more trans transactions.

[0104] The data processing time is the time it takes for the IP source to process the response data corresponding to a request. The length of the IP source's data processing time corresponds to the speed of the IP source's data processing. For example, the faster the IP source's data processing speed, the shorter the IP source's data processing time; the slower the IP source's data processing speed, the longer the IP source's data processing time. This data processing time can be referred to as IP INV.

[0105] The transmission delay of the bus path is the time generated by the request of the IP source end being transmitted in the bus path based on the architecture of the bus path.

[0106] Therefore, when the multiple bandwidth parameters of the IP system include the port transmission unit capacity and data processing duration of the IP source, the initial values of some of the bandwidth parameters obtained may include the initial value of the port transmission unit capacity and the initial value of the data processing duration. For example, if the initial value of the port transmission unit capacity of the IP source is 4, that is, the outstanding capacity of the IP source is 4, the IP source can simultaneously issue 4 requests to the bus path for transmission during one bus cycle.

[0107] As an optional implementation, when the multiple bandwidth parameters of the IP system include the port transmission unit quantity and data processing time of the IP source end, the step of adjusting the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end may be: adjusting the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the port transmission unit quantity to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and data processing time requirement of the IP source end. In other words, the data processing requirements of the IP source end include the port transmission unit quantity requirement and data processing time requirement of the IP source end.

[0108] In some embodiments, the transmission delay of the bus path is associated with the architecture of the bus path, and the transmission delay of the bus path may include a transmission response delay and a hash transmission delay.

[0109] In one example, since a bus path is a data path formed by one or more buses, the request and response data from the IP source may generate corresponding transmission time when transmitted on the bus path. The transmission response delay may indicate the transmission time between the request sent by the IP source and the corresponding response data received on the bus path. This transmission response delay may be referred to as bus delay.

[0110] In one example, due to different interface parameters corresponding to different buses, requests from an IP source may be dispersed into multiple transmission units when transmitted across different buses. Consequently, the transmission of these multiple transmission units can generate a hash transmission time. The hash transmission delay can indicate the interval between hash transmissions of two requests from the IP source on the corresponding bus paths. This hash transmission delay can be referred to as data INV.

[0111] To facilitate understanding of the various bandwidth parameters of the embodiments of the present application, an example is given in which the outstanding capability of the IP source is 4. The IP source can simultaneously issue 4 requests within one bus cycle. One request is transmitted to the destination via the bus path, and the destination responds to the request. The transmission time for transmitting the return signal to the IP source via the bus path is the transmission response delay of the bus path.

[0112] During the transmission process of the bus path, different requests will become loose due to the delay of different buses in the bus path, and will be dispersed into multiple beat data by the bus. For example, one transaction is dispersed into eight beat data. Moreover, due to the protocol restrictions of the bus, after the eight beat data are sent by the bus, they must wait for the corresponding response to be returned before the next transaction can be sent, which will cause hash transmission delay in the bus path.

[0113] After receiving the response data returned by the destination, the IP source end will process the response data, which will generate the data processing time of the IP source end. This data processing time can reflect the data processing rate of the IP source end. That is, the smaller the value of the data processing time, the higher the data processing rate of the IP source end; the larger the value of the data processing time, the lower the data processing rate of the IP source end.

[0114] In some embodiments, the maximum bandwidth of a bus path is the amount of data transmitted within a certain period of time. Since the amount of data transmitted by the bus path is associated with the outstanding capability of the IP source, and the outstanding capability of the IP source is associated with the data processing time and the hash transmission delay of the bus path, the changing relationship between various bandwidth parameters of the IP system may include:

[0115] If the value of the port transmission unit amount of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, the hash transmission delay reaches the maximum;

[0116] If the value of the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, the data processing time of the IP source end reaches the maximum.

[0117] As an optional implementation, the bandwidth parameter evaluation model can be constructed based on multiple bandwidth parameters of the IP system and the change relationship between the multiple bandwidth parameters. Figure 3 The following is an exemplary flow chart showing the process of constructing a bandwidth parameter evaluation model in an embodiment of the present application. Figure 3 As shown, constructing a bandwidth parameter evaluation model may include:

[0118] Step S201: Acquire simulation data of the IP system.

[0119] The simulation data may include at least the simulation composition structure of the bus path and the simulation interface information of the IP source end connected to the destination end through the bus path.

[0120] Step S202, simulating the transmission process of the IP system according to the simulation data;

[0121] Based on the simulation data, the transmission process of the IP system can be simulated. In the case where the IP system includes an IP source, a destination, and a bus path connecting the IP source and destination, the transmission process of the IP system can include the process of transmitting a request from the IP source to the destination via the bus path, and the process of transmitting response data from the destination to the IP source via the bus path.

[0122] Step S203: Analyze and determine, according to the transmission process of the IP system, a plurality of bandwidth parameters corresponding to the processing bandwidth of the IP system, and a change relationship between the plurality of bandwidth parameters.

[0123] The processing bandwidth of the IP system can be understood as the amount of data that the entire IP system can process.

[0124] It is understood that in an IP system, requests sent by an IP source and response data sent by a destination are transmitted via a bus path. The bus path has a certain bandwidth indicator, and the IP source also has a certain data processing time for the response data. When analyzing and calculating the bandwidth of the bus path in an IP system, since data from the IP source and destination is transmitted on the bus, the data needs to pass through different types of buses (e.g., address bus, data bus, control bus, etc.) in the bus path. If data is hashed when transmitted to a certain bus, the hash transmission delay of the data on that bus is long, which will affect the transmission speed of the data in the bus path and increase the transmission response delay of the bus path, thereby limiting the bandwidth of the bus path. In other words, the bandwidth of the bus path depends on the delay of the narrowest bus in the bus path, which is the bottleneck node in the bus path. Furthermore, when calculating the processing bandwidth of the IP system, if the number of requests sent by the IP source within the transmission response delay of the bus path is greater than or equal to the ratio of the transmission response delay of the bus path to the hash transmission delay of the bottleneck node, the maximum bandwidth of the bus path can be achieved. If the IP source's data processing time is long, even when the bus path reaches its maximum bandwidth, the response data transmission time to the IP source is short, preventing the IP source from fully processing the previous data. This data congestion will occur before the IP source, impacting the performance of the IP system. Furthermore, if the ratio of the bus path's transmission response delay to the IP source's data processing time is equal to the number of requests issued by the IP source, the hash transmission delay in the bus path can be maximized. If the ratio of the bus path's transmission response delay to the IP source's data processing time is greater than the number of requests issued by the IP source, the IP source's data processing time can be maximized.

[0125] Based on the above analysis, it can be concluded that the processing bandwidth of the IP system is related to the port transmission unit volume of the IP source end, the data processing time of the IP source end, and the transmission delay of the bus path, and the port transmission unit volume of the IP source end, the data processing time of the IP source end, and the transmission delay of the bus path are mutually constrained.

[0126] Therefore, based on the analysis of the processing bandwidth of the IP system, it is possible to determine multiple bandwidth parameters corresponding to the processing bandwidth of the IP system, namely, the port transmission unit quantity of the IP source end, the data processing time of the IP source end, and the transmission delay of the bus path; as well as the changing relationship between the multiple bandwidth parameters, namely, if the ratio of the transmission response delay of the bus path to the data processing time of the IP source end is equal to the number of requests issued by the IP source end, then the hash transmission delay in the bus path can reach the maximum; if the ratio of the transmission response delay of the bus path to the data processing time of the IP source end is greater than the number of requests issued by the IP source end, then the data processing time of the IP source end can reach the maximum.

[0127] Step S204: constructing a bandwidth parameter evaluation model based on the multiple bandwidth parameters and the change relationships between the multiple bandwidth parameters.

[0128] It should be noted that by simulating and analyzing the signal transmission process from the IP source to the destination via a bus path based on IP system simulation data, various bandwidth parameters and the changing relationships between them can be derived, forming a bandwidth parameter evaluation model. Furthermore, by integrating parameter information from the IP source, destination, and bus path, the constructed bandwidth parameter evaluation model is used to evaluate the overall parameters of the IP system, identify bottleneck nodes that affect IP system performance, and make corresponding adjustments to these bottleneck nodes to ensure efficient bus utilization and maximize the processing speed of the IP source.

[0129] To facilitate understanding of the construction process of the bandwidth parameter evaluation model, Figure 4 The transmission simulation diagram of the IP system provided in the embodiment of the present application is exemplarily shown.

[0130] Among them, the bus path of the IP system can be an emulation structure architecture having an AXI (Advanced eXensible Interface) bus, a north bridge bus, and a data bus. The AXI bus includes transmission channels, such as a read address channel, a write address channel, a read data channel, and a write data channel. The AXI bus realizes efficient data transmission and control signal transmission through the transmission channels.

[0131] The IP source is connected to the AXI bus as a master device (e.g. Figure 4 The Master_AXI in the bus path is connected to the memory device at the destination end through the simulation structure of the bus path. The memory device is, for example, a Double Data Rate Synchronous Dynamic Random Access Memory (DDR), forming a simulation IP system.

[0132] For the simulated IP system, the outstanding capability of the Master_AXI simulation interface of the IP source is 4, that is, the port transmission unit of the IP source is 4, which can send 4 requests continuously, and each request can transmit 8 data (ie burst8), and the bit width of each data is 256 bits (ie 256bit); the simulated north bridge IO interface corresponding to the north bridge bus (for example Figure 4 NBIO_IOHC in supports 32 outstanding, that is, it can process 32 requests at the same time, with a bit width of 256 bits; the simulated data bus IO interface corresponding to the data bus (for example Figure 4DF_IOMS in IOMS can issue 8 outstanding requests at a time. Each request contains a beat data with a data width of 256 bits.

[0133] like Figure 4 As shown, Master_AXI simultaneously sends four requests (requests) to NBIO_IOHC, which then transmits them to DF_IOMS via NBIO_IOHC. Since NBIO_IOHC can handle 32 requests simultaneously, it can handle all four requests sent by Master_AXI without distributing them, only increasing the corresponding request transmission and reception latency. When NBIO_IOHC transmits the requests to DF_IOMS, since DF_IOMS can issue eight outstanding requests at a time, each containing a single beat of data, after DF_IOMS processes all eight requests, it must receive a data response before it can send the next request's data transmission unit (transfer). This congests NBIO_IOHC data at DF_IOMS, making DF_IOMS the bottleneck node for requests from the IP source in the bus path. Consequently, requests increase latency between NBIO_IOHC and DF_IOMS, resulting in significant hashing.

[0134] The request is transmitted to the DDR through the bus path, and after reaching the DDR, the data is retrieved and the response is returned. Based on the simulation architecture of the bus path, it passes through DF_IOMS and NBIO_IOHC and then returns to Master_AXI. Figure 4 The thick arrows in the figure represent the transmission process of the response data.

[0135] It should be noted that the request can be processed through other links before reaching the DDR, but since the request does not form a re-hashing of the trans when it reaches the DDR, the request sequence can still remain in a parallel state, only increasing the corresponding path delay.

[0136] Based on the transmission process of the IP system, the bandwidth of the bus path of the IP system is calculated.

[0137] The calculation formula for the maximum bus bandwidth is:

[0138] (DLY / INV)*burst*size / DLY=burst*size / INV,

[0139] Among them, burst represents multiple data requests (trans) corresponding to the transmission request request; size represents the data size of each data request; DLY is the delay time from the IP source end in the bus path sending a data request to receiving the corresponding response data; INV is the interval time between two requests issued by the bottleneck node DF_IOMS in the bus path.

[0140] Calculations and analysis show that when the number of outstanding messages sent by the IP source during the bus path's DLY time equals the ratio of DLY to INV, the bus path reaches a bottleneck. If the outstanding capacity of the interface corresponding to the IP source is greater than or equal to the number of outstanding messages, the bus path reaches its maximum bandwidth.

[0141] Therefore, by omitting the intermediate level of the bus path and retaining the interface timing of the IP system, a bandwidth parameter evaluation model is constructed based on the multiple bandwidth parameters in the IP system and the change relationship between the multiple bandwidth parameters, and the result is obtained. Figure 5 The bandwidth parameter evaluation model is shown in Figure 2. Figure 5 As shown, bus delay corresponds to the transmission response delay of the bus path, indicating the transmission time between the request sent by the IP source end and the corresponding response data received in the bus path; data INV corresponds to the hash transmission delay of the bus path, indicating the hash transmission interval time corresponding to the two data processing signals generated when the transmission request sent by the IP source end is transmitted at the bottleneck node in the bus path; IP INV corresponds to the data processing time of the IP source end.

[0142] In some embodiments, based on a pre-built bandwidth parameter evaluation model, when obtaining initial values for some of the multiple bandwidth parameters, it is also necessary to obtain an initial relationship between the bus path transmission delay (i.e., bus delay) and the data processing time (IP INV) of the IP source. Thus, when performing the step of adjusting the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and data processing time to determine target values corresponding to the multiple bandwidth parameters when the bus path bandwidth meets the port transmission unit quantity requirement and data processing time requirement of the IP source, embodiments of the present application can be implemented as follows:

[0143] Taking the initial relationship between the hash transmission delay and the data processing time of the bus path as a constraint, according to the bandwidth parameter evaluation model, as well as the initial values of the port transmission unit quantity and the data processing time, the values of the multiple bandwidth parameters are adjusted to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

[0144] In some embodiments, the initial relationship between the hash transfer delay of the bus path and the data processing duration may include that the hash transfer delay is less than the data processing duration of the IP source end, or the hash transfer delay is greater than the data processing duration of the IP source end.

[0145] As an optional implementation, when the hash transfer delay is less than the data processing duration of the IP source end, that is, data INV < IP INV, the delay in the bus path decreases, and the transmission speed of the request from the IP source end in the bus path increases. As a result, the response data can be quickly sent to the IP source end, enabling the IP source end to process the data. That is to say, the bandwidth of the bus path can meet the data requirements of the IP source end. When the data in the bus path returns to the IP source end, data congestion may occur at the IP source end. Then, the data processing duration of the IP source end limits the bandwidth utilization rate of the bus path.

[0146] As another optional implementation, when the hash transfer delay is greater than the data processing duration of the IP source end, that is, data INV > IP INV, the delay in the bus path increases, and the transmission speed of the request from the IP source end in the bus path is slow. After the response data is sent to the IP source end, the IP source end can quickly process the data, but the response data of the next request fails to arrive in time after being processed by the IP source end. That is to say, the bandwidth of the bus path cannot meet the data requirements of the IP source end, and data processing idleness occurs at the IP source end. Then, the bandwidth of the bus path limits the demand for the port transmission unit quantity due to the data processing duration of the IP source end.

[0147] In some embodiments, the embodiments of the present application may determine the target values corresponding to the multiple bandwidth parameters when the hash transfer delay is less than the data processing duration of the IP source end. As an optional implementation, when performing the step of adjusting the values of the multiple bandwidth parameters according to the bandwidth parameter evaluation model, and the initial values of the port transmission unit quantity and the data processing duration, with the initial relationship between the transmission delay of the bus path and the data processing duration as a limitation, to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the requirements of the port transmission unit quantity and the data processing duration of the IP source end, the embodiments of the present application may be implemented in the following manner:

[0148] If the hash transmission delay is less than the data processing time of the IP source, the values of the multiple bandwidth parameters are adjusted based on the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and data processing time, so that the data processing time of the IP source and the bandwidth of the bus path reach a balanced state. Target values corresponding to the multiple bandwidth parameters in the balanced state are then determined. When the data processing time of the IP source and the bandwidth of the bus path reach a balanced state, the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source.

[0149] In some embodiments, when the data processing time of the IP source end and the bandwidth of the bus path reach a balanced state, the balanced state can be between a first state and a second state, wherein the first state is a state in which both the bus path and the IP source end are idle for data processing, and the second state is a state in which the transmission response delay of the bus path increases.

[0150] As an optional implementation, the first state may include the following relationship: the port transmission unit quantity of the IP source end is less than the ratio of the transmission response delay to the data processing time of the IP source end.

[0151] Among them, when the IP source end is in the third state of idle data processing, if the data processing time of the IP source end is reduced, the port transmission unit quantity of the IP source end is less than the ratio of the transmission response delay to the data processing time of the IP source end.

[0152] The third state may include the following relationship: the port transmission unit quantity of the IP source end is greater than the ratio of the transmission response delay to the data processing time length of the IP source end.

[0153] As another optional implementation, the second state may include the following relationship: the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay;

[0154] Among them, in the balanced state, if the port transmission unit amount of the IP source end is increased, the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay.

[0155] In some embodiments, based on adjusting the values of the multiple bandwidth parameters, the data processing duration of the IP source end and the bandwidth of the bus path are balanced. As an optional implementation, if the current state is the third state, the data processing duration of the IP source end is reduced to adjust from the third state to the first state.

[0156] As another optional implementation, if the current state is the first state, the port transmission unit quantity of the IP source end is increased to adjust from the first state to the balanced state.

[0157] As yet another optional implementation, if the current state is the second state, the port transmission unit quantity of the IP source end is reduced to adjust from the second state to the balanced state.

[0158] To facilitate understanding of the above state adjustment process, an example is given with the outstanding ability of the IP source end being 4. Figures 6 to 12 This is a schematic diagram of the transmission timing corresponding to multiple bandwidth parameters for adjusting the IP system based on the bandwidth parameter evaluation model in the embodiments of the present application.

[0159] When the processing speed of the IP source end reaches the maximum bandwidth condition of the bus path: outstanding > bus delay / IP INV, and data INV < IP INV, refer to Figure 6 As shown, the data of the first request is returned after bus delay, and the data processing duration of the IP source end is IP INV. At this time, the IP source end can issue another request. However, since data INV < IP INV, it is necessary to wait until the IP source end finishes processing one piece of data before issuing the next request. The returned data is temporarily stored in the IP source end buffer, and the data processing speed of the IP source end is the performance bottleneck of the IP system.

[0160] When the data processing speed of the IP source end is increased, that is, IP INV is reduced, such that outstanding < bus delay / IP INV, refer to Figure 7 As shown, data INV is still less than IP INV. At this time, the bus path cannot be fully utilized due to the influence of the outstanding ability of the IP source end and there is idle time; the IP source end has idle time periods due to the influence of bus delay. That is to say, neither the IP source end nor the bus path reaches the maximum bandwidth of the IP system.

[0161] Increase the outstanding ability of the IP source end, refer to Figure 8As shown, after increasing the outstanding capability of the IP source end, bus delay / IP INV = outstanding, and it is less than bus delay / data INV, and data INV is still less than IP INV. At this time, the bus path can return sufficient respond data for the IP source end to process. The data processing load of the IP source end is full and reaches the maximum speed. In this case, the IP source end and the bus path reach a balanced state in the IP system.

[0162] Continuously increasing the outstanding capability of the IP source end, refer to Figure 9 As shown, it is obtained that bus delay / IP INV < outstanding, and bus delay / data INV < outstanding. Among them, the return of respond data is congested at the IP source end. Although the IP source end can temporarily store the returned data, the data processing of the IP source end has reached full load, and its data processing duration cannot be changed, that is, the data processing rate of the IP source end cannot be increased. Moreover, increasing the outstanding capability of the IP source end leads to an increase in the load of the bus path, which also increases the bus delay of the bus path.

[0163] It can be seen that based on the bandwidth parameter evaluation model, by adjusting the initial values of some of the multiple bandwidth parameters in the IP system, when it can be determined that the bandwidth of the bus path in the IP system meets the data processing requirements of the IP source end, the target values corresponding to the multiple bandwidth parameters can be obtained, so that the data processing performance of the IP source end and the bandwidth utilization rate of the bus path in the IP system reach a balanced state. Therefore, when designing the IP system of the chip based on this target data, the maximum data processing performance of the IP source end and the maximum utilization rate of the bus path in the IP system can be achieved simultaneously, avoiding the modification and re-design of the bandwidth parameters of the IP system caused by the fact that the bandwidth of the bus path cannot meet the data processing requirements of the IP source end.

[0164] When there is a transmission bottleneck in the bus path of the IP system, that is, data INV > IP INV, and outstanding < busdelay / data INV. Refer to Figure 10 As shown, due to outstanding < bus delay / data INV, the return of respond data is discontinuous. Therefore, after outstanding data are returned, the IP source end will have a long idle time. Moreover, the IP source end can immediately process the returned data, resulting in the processing of the IP source end not reaching the saturation state and not reaching the maximum processing speed.

[0165] Increase the number of outstanding IP sources, refer to Figure 11 As shown in the figure, the condition for the bus path to reach the maximum bandwidth is: outstanding>=bus delay / data INV, and when data INV>IP INV, since the bus path continuously returns the respond data at the maximum speed in the hash model, but the data processing at the IP source end has not yet reached saturation, the bottleneck node in the IP system is still the bandwidth of the bus path.

[0166] Continue to increase the number of IP outstanding, refer to Figure 12 As shown, the request enters the bus path prematurely, increasing only the bus delay. The speed at which the response returns data remains unchanged, and the bus bandwidth remains unchanged. In this case, the data processing time at the IP source remains unchanged and does not reach the minimum time, meaning the IP source's data processing speed has not increased. In other words, increasing the IP source's outstanding capabilities does not increase the overall bandwidth of the IP system. Instead, it causes request congestion in the bus path, resulting in bandwidth loss. Furthermore, excessive bus delays can also affect the IP source's data processing performance.

[0167] It can be seen that the embodiment of the present application calls the bandwidth parameter setting method of the pre-built bandwidth parameter evaluation model, so that the initial values of some bandwidth parameters among the multiple bandwidth parameters of the IP system can be adjusted based on the bandwidth parameter evaluation model, so that when the bandwidth of the bus path of the IP system meets the data processing requirements of the IP source end, the target values corresponding to the multiple bandwidth parameters are determined. When the target values corresponding to the multiple bandwidth parameters are determined as the bandwidth parameters set by the IP system, the data processing performance of the IP source end and the bandwidth utilization of the bus path in the IP system are balanced, thereby realizing the reasonable design of the bandwidth parameters of the IP system.

[0168] Furthermore, based on the bandwidth parameters that achieve a balanced state between the data processing performance of the IP source end in the IP system and the bandwidth utilization of the bus path, when designing the IP system of the chip, the utilization of the bus path bandwidth and the data processing efficiency of the IP source end in the IP system of the chip can be effectively improved, thereby achieving performance improvement of the IP system of the chip design.

[0169] The embodiment also provides a chip design method. Figure 13 The following is an exemplary flowchart of the chip design method according to the embodiment of the present application. Figure 13 As shown, the chip design method may include:

[0170] Step S301: Obtain bandwidth parameters set by the IP system.

[0171] The bandwidth parameter may be determined based on the bandwidth parameter setting method according to the embodiment of the present application.

[0172] Step S302: Designing the IP system of the chip according to the bandwidth parameters.

[0173] It can be understood that the bandwidth parameter obtained by the bandwidth parameter setting method of the embodiment of the present application is the target value when the bandwidth of the bus path of the IP system meets the data processing requirements of the IP source end. Therefore, when designing the IP system of the chip according to the bandwidth parameter, in the designed IP system of the chip, the data processing performance of the IP source end and the bandwidth utilization of the bus path reach a balanced state, which can effectively improve the utilization of the bus path bandwidth and the data processing efficiency of the IP source end, realize the performance improvement of the IP system of the chip design, and avoid the repeated modification and design process caused by the bandwidth of the bus path in the later IP system not meeting the data processing speed of the IP source end.

[0174] Embodiments of the present application also provide a bandwidth parameter setting device, which can be used to set bandwidth parameters for an IP system, the IP system comprising an IP source, a destination, and a bus path connecting the IP source and destination. The device described below can be considered the functional modules required to implement the bandwidth parameter setting method provided in embodiments of the present application. The following description can be cross-referenced with the above description.

[0175] As an optional implementation, Figure 14 An optional block diagram of a bandwidth parameter setting device provided in an embodiment of the present application is exemplarily shown, and the device may include:

[0176] A calling module 141 is configured to call a pre-built bandwidth parameter evaluation model, wherein the bandwidth parameter evaluation model at least indicates a change relationship between multiple bandwidth parameters of the IP system;

[0177] A first acquisition module 142 is configured to acquire initial values of at least some of the bandwidth parameters.

[0178] an adjusting module 143 configured to adjust the values of the plurality of bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of bandwidth parameters, so as to determine target values corresponding to the plurality of bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end;

[0179] The determination module 144 is configured to determine the target values corresponding to the multiple bandwidth parameters as the bandwidth parameters set by the IP system.

[0180] Optionally, the multiple bandwidth parameters indicated by the pre-built bandwidth parameter evaluation model called by the calling module 141 include: the port transmission unit quantity and data processing time of the IP source end, and the transmission delay of the bus path;

[0181] The initial values of some bandwidth parameters acquired by the first acquisition module 142 include: an initial value of the port transmission unit quantity and an initial value of the data processing duration.

[0182] Optionally, the adjustment module 143 is configured to adjust the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the partial bandwidth parameters, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end, including:

[0183] The values of the multiple bandwidth parameters are adjusted at least based on the bandwidth parameter evaluation model, and the initial values of the port transmission unit quantity and the data processing time, so as to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

[0184] Optionally, the transmission delay of the bus path includes: transmission response delay and hash transmission delay;

[0185] The transmission response delay indication is the corresponding transmission time of the request sent by the IP source end and the corresponding response data received on the bus path;

[0186] The hash transmission delay indication is: the hash transmission interval time corresponding to two data processing signals generated when transmitting at the bottleneck node in the bus path corresponding to the request sent by the IP source end.

[0187] Optionally, the pre-built bandwidth parameter evaluation model called by the calling module 141 at least indicates the change relationship between multiple bandwidth parameters of the IP system including:

[0188] If the value of the port transmission unit amount of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, the hash transmission delay reaches the maximum;

[0189] If the value of the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, the data processing time of the IP source end reaches the maximum.

[0190] Optionally, the calling module 141 is further configured to:

[0191] Acquire simulation data of the IP system, the simulation data including at least a simulation structure of the bus path and simulation interface information of the IP source end connected to the destination end through the bus path;

[0192] Simulating the transmission process of the IP system based on the simulation data; wherein the transmission process of the IP system includes a process in which a request sent by an IP source end is transmitted to a destination end via a bus path, and a process in which response data from the destination end is transmitted to the IP source end via the bus path;

[0193] Analyzing and determining, according to the transmission process of the IP system, a plurality of bandwidth parameters corresponding to the processing bandwidth of the IP system, and a change relationship between the plurality of bandwidth parameters;

[0194] The bandwidth parameter evaluation model is constructed according to the multiple bandwidth parameters and the change relationships between the multiple bandwidth parameters.

[0195] Optionally, the first acquisition module 142 is further configured to acquire an initial relationship between the hash transmission delay of the bus path and the data processing time of the IP source end;

[0196] The adjustment module 143 is configured to adjust the values of the multiple bandwidth parameters based on at least the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end, including the following steps:

[0197] Taking the initial relationship between the hash transmission delay of the bus path and the data processing time as a constraint, according to the bandwidth parameter evaluation model, as well as the initial values of the port transmission unit quantity and the data processing time, the values of the multiple bandwidth parameters are adjusted to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

[0198] Optionally, the initial relationship between the hash transmission delay of the bus path and the data processing duration obtained by the first obtaining module 142 includes:

[0199] The hash transmission delay is less than the data processing time of the IP source end, or the hash transmission delay is greater than the data processing time of the IP source end;

[0200] When the hash transmission delay is less than the data processing time of the IP source, the data processing time of the IP source limits the bandwidth utilization of the bus path;

[0201] When the hash transmission delay is greater than the data processing time of the IP source end, the bandwidth of the bus path limits the demand of the data processing time of the IP source end on the port transmission unit quantity.

[0202] Optionally, the adjustment module 143 adjusts the values of the multiple bandwidth parameters based on the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, taking the initial relationship between the transmission delay of the bus path and the data processing time as a constraint, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end, including:

[0203] When the hash transmission delay is less than the data processing time of the IP source, adjusting the values of the plurality of bandwidth parameters according to the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, so that the data processing time of the IP source is balanced with the bandwidth of the bus path;

[0204] Determine target values corresponding to the multiple bandwidth parameters in the balanced state, wherein the data processing time of the IP source end and the bandwidth of the bus path reach a balanced state, and the bandwidth of the bus path meets the port transmission unit quantity requirement and data processing time requirement of the IP source end.

[0205] The present application also provides a chip design device. The device described below can be considered as the functional modules required to implement the chip design method provided in the present application. The content described below can be referenced in conjunction with the content described above.

[0206] As an optional implementation, Figure 15 An optional block diagram of a chip design apparatus provided in an embodiment of the present application is exemplarily shown. The apparatus may include:

[0207] A second acquisition module 151 is configured to acquire a bandwidth parameter set by the IP system, wherein the bandwidth parameter is determined based on the bandwidth parameter setting method described above;

[0208] The chip design module 152 is configured to design the IP system of the chip according to the bandwidth parameters.

[0209] The present application also provides a computer device that can implement the bandwidth parameter setting method and / or chip design method provided in the present application by configuring the bandwidth parameter setting device and / or chip design device described above. The computer device can be, for example, a terminal device or a server device.

[0210] An embodiment of the present application further provides a storage medium storing one or more computer-executable instructions. When the one or more computer-executable instructions are executed, the bandwidth parameter setting method and / or chip design method provided in the embodiment of the present application are implemented.

[0211] The above describes multiple embodiment schemes provided by the embodiments of the present application. The various optional methods introduced in each embodiment scheme can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible embodiment schemes, which can all be considered as embodiment schemes disclosed and open in the embodiments of the present application.

[0212] Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims.

Claims

1. A bandwidth parameter setting method, characterized in that: The method is used to set bandwidth parameters of an IP system, wherein the IP system includes an IP source terminal, a destination terminal, and a bus path connecting the IP source terminal and the destination terminal; the method includes: Invoking a pre-built bandwidth parameter evaluation model, wherein the bandwidth parameter evaluation model at least indicates a change relationship between multiple bandwidth parameters of the IP system; and obtaining initial values of at least some of the plurality of bandwidth parameters; adjusting the values of the plurality of bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters, so as to determine target values corresponding to the plurality of bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end; Determining target values corresponding to the multiple bandwidth parameters as bandwidth parameters set by the IP system; The multiple bandwidth parameters include: the port transmission unit quantity and data processing time of the IP source end, and the transmission delay of the bus path; The initial values of the partial bandwidth parameters include: an initial value of the port transmission unit quantity and an initial value of the data processing time.

2. The bandwidth parameter setting method according to claim 1, wherein: The adjusting the values of the multiple bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end includes: The values of the multiple bandwidth parameters are adjusted at least based on the bandwidth parameter evaluation model, and the initial values of the port transmission unit quantity and the data processing time, so as to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

3. The bandwidth parameter setting method according to claim 2, characterized in that: The transmission delay of the bus path includes: transmission response delay and hash transmission delay; The transmission response delay indication is the corresponding transmission time of the request sent by the IP source end and the corresponding response data received on the bus path; The hash transmission delay indication is: the hash transmission interval time corresponding to two data processing signals generated when the request sent by the corresponding IP source end is transmitted at the bottleneck node in the bus path.

4. The bandwidth parameter setting method according to claim 3, characterized in that: The changing relationships among the various bandwidth parameters of the IP system include: If the value of the port transmission unit amount of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, the hash transmission delay reaches the maximum; If the value of the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, the data processing time of the IP source end reaches the maximum.

5. The bandwidth parameter setting method according to any one of claims 1 to 4, characterized in that: Also includes: Acquire simulation data of the IP system, the simulation data including at least a simulation structure of a bus path and simulation interface information of an IP source end connected to a destination end via the bus path; Simulating the transmission process of the IP system based on the simulation data; wherein the transmission process of the IP system includes a process in which a request sent by an IP source end is transmitted to a destination end via a bus path, and a process in which response data from the destination end is transmitted to the IP source end via the bus path; Analyzing and determining, according to the transmission process of the IP system, a plurality of bandwidth parameters corresponding to the processing bandwidth of the IP system, and a change relationship between the plurality of bandwidth parameters; The bandwidth parameter evaluation model is constructed according to the multiple bandwidth parameters and the change relationships between the multiple bandwidth parameters.

6. The bandwidth parameter setting method according to any one of claims 3 to 4, characterized in that: Also includes: Obtaining an initial relationship between the hash transmission delay of the bus path and the data processing time of the IP source end; The adjusting the values of the multiple bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end, includes: Taking the initial relationship between the hash transmission delay of the bus path and the data processing time as a constraint, according to the bandwidth parameter evaluation model, as well as the initial values of the port transmission unit quantity and the data processing time, the values of the multiple bandwidth parameters are adjusted to determine the target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end.

7. The bandwidth parameter setting method according to claim 6, characterized in that: The initial relationship between the hash transmission delay of the bus path and the data processing time includes: The hash transmission delay is less than the data processing time of the IP source end, or the hash transmission delay is greater than the data processing time of the IP source end; When the hash transmission delay is less than the data processing time of the IP source, the data processing time of the IP source limits the bandwidth utilization of the bus path; When the hash transmission delay is greater than the data processing time of the IP source end, the bandwidth of the bus path limits the demand of the data processing time of the IP source end on the port transmission unit quantity.

8. The bandwidth parameter setting method according to claim 7, characterized in that: The adjusting of the values of the multiple bandwidth parameters based on the bandwidth parameter evaluation model, the initial values of the port transmission unit quantity and the data processing time, with the initial relationship between the transmission delay of the bus path and the data processing time as a constraint, so as to determine target values corresponding to the multiple bandwidth parameters when the bandwidth of the bus path meets the port transmission unit quantity requirement and the data processing time requirement of the IP source end, includes: When the hash transmission delay is less than the data processing time of the IP source, adjusting the values of the multiple bandwidth parameters according to the bandwidth parameter evaluation model and the initial values of the port transmission unit quantity and the data processing time, so that the data processing time of the IP source is balanced with the bandwidth of the bus path; Determine target values corresponding to the multiple bandwidth parameters in the balanced state, wherein the data processing time of the IP source end and the bandwidth of the bus path reach a balanced state, and the bandwidth of the bus path meets the port transmission unit quantity requirement and data processing time requirement of the IP source end.

9. The bandwidth parameter setting method according to claim 8, characterized in that: The data processing time of the IP source terminal and the bandwidth of the bus path reach a balance state, which includes: The port transmission unit quantity of the IP source end is equal to the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit quantity of the IP source end is less than the ratio of the transmission response delay to the hash transmission delay.

10. The bandwidth parameter setting method according to claim 9, characterized in that: The balance state is between a first state and a second state. The first state is a state in which both the bus path and the IP source end are idle for data processing. The second state is a state in which the transmission response delay of the bus path increases.

11. The bandwidth parameter setting method according to claim 10, characterized in that: The first state includes the following relationship: the port transmission unit amount of the IP source end is less than the ratio of the transmission response delay to the data processing time length of the IP source end; Wherein, when the IP source end is in a third state in which data processing is idle, if the data processing time of the IP source end is reduced, the port transmission unit amount of the IP source end is less than the ratio of the transmission response delay to the data processing time of the IP source end; The third state includes the following relationship: the port transmission unit quantity of the IP source end is greater than the ratio of the transmission response delay to the data processing time length of the IP source end.

12. The bandwidth parameter setting method according to claim 10, characterized in that: The second state includes the following relationship: the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit volume of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay; Among them, in the balanced state, if the port transmission unit amount of the IP source end is increased, the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the data processing time of the IP source end, and the port transmission unit amount of the IP source end is greater than the ratio of the transmission response delay to the hash transmission delay.

13. The bandwidth parameter setting method according to any one of claims 10 to 12, characterized in that: The adjusting the values of the plurality of bandwidth parameters so that the data processing time of the IP source end and the bandwidth of the bus path reach a balance includes: If the current state is the third state, reducing the data processing time of the IP source end to adjust from the third state to the first state; If the current state is the first state, increasing the port transmission unit quantity of the IP source end to adjust from the first state to a balanced state; If the current state is the second state, the port transmission unit quantity of the IP source end is reduced to adjust from the second state to the balanced state.

14. A chip design method, characterized in that: include: Obtaining a bandwidth parameter set by the IP system, wherein the bandwidth parameter is determined based on the bandwidth parameter setting method according to any one of claims 1 to 13; The IP system of the chip is designed according to the bandwidth parameters.

15. A bandwidth parameter setting device, characterized in that: Used to set bandwidth parameters of an IP system, wherein the IP system includes an IP source, a destination, and a bus path connecting the IP source and destination, including: A calling module, configured to call a pre-built bandwidth parameter evaluation model, wherein the bandwidth parameter evaluation model at least indicates a change relationship between multiple bandwidth parameters of the IP system; A first acquisition module, configured to acquire at least initial values of some bandwidth parameters among the multiple bandwidth parameters; an adjustment module, configured to adjust the values of the plurality of bandwidth parameters based at least on the bandwidth parameter evaluation model and the initial values of the portion of the bandwidth parameters, so as to determine target values corresponding to the plurality of bandwidth parameters when the bandwidth of the bus path meets the data processing requirements of the IP source end; a determination module, configured to determine target values corresponding to the plurality of bandwidth parameters as bandwidth parameters set by the IP system; The multiple bandwidth parameters include: the port transmission unit quantity and data processing time of the IP source end, and the transmission delay of the bus path; The initial values of the partial bandwidth parameters include: an initial value of the port transmission unit quantity and an initial value of the data processing time.

16. A chip design device, characterized in that: include: A second acquisition module, configured to acquire a bandwidth parameter set by the IP system, wherein the bandwidth parameter is determined based on the bandwidth parameter setting method according to any one of claims 1 to 13; The chip design module is used to design the IP system of the chip according to the bandwidth parameters.

17. A computer device, characterized in that: include: The bandwidth parameter setting device according to claim 15 and / or the chip design device according to claim 16.

18. A storage medium, characterized in that The storage medium stores one or more computer-executable instructions, and the one or more computer-executable instructions are used to execute the bandwidth parameter setting method according to any one of claims 1 to 13 and / or the chip design method according to claim 14.

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