Sensor pixel unit, signal processing circuit and electronics

Abstract

The disclosed embodiment discloses a sensor pixel unit, a signal processing circuit and an electronic device, wherein the sensor pixel unit includes: k signal acquisition modules, a signal processing module and a signal output module; wherein k is an integer greater than or equal to 1; each of the signal acquisition modules is used to receive a light signal within an exposure time to generate a photoelectric charge, and output the photoelectric charge according to the control of a first feedback signal; the signal processing module is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of a second feedback signal; the signal output module is used to output a target signal based on the photoelectric charge in the signal processing module according to the control of an external control signal. This embodiment realizes adjustable exposure time in the pixel unit through the first feedback signal and the second feedback signal, thereby realizing high dynamic range imaging.

Description

Technical Field

[0001] The present disclosure relates to the technical field of image sensors, and in particular to a sensor pixel unit, a signal processing circuit and an electronic device. Background Art

[0002] Image sensors have been widely used in digital cameras, mobile phones, medical treatment, automobiles, drones, machine recognition and other fields. In particular, the rapid development of complementary metal oxide semiconductor (CMOS) image sensor technology has led to higher requirements for the output image quality of image sensors. Dynamic range is an important evaluation index of photoelectric image sensors. Summary of the invention

[0003] According to one aspect of an embodiment of the present disclosure, a sensor pixel unit is provided, comprising: k signal acquisition modules, a signal processing module and a signal output module; wherein k is an integer greater than or equal to 1;

[0004] Each of the signal acquisition modules is used to receive a light signal within an exposure time to generate a photoelectric charge, and output the photoelectric charge according to the control of the first feedback signal;

[0005] The signal processing module is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of the second feedback signal;

[0006] The signal output module is used to output a target signal based on the photoelectric charge in the signal processing module under the control of an external control signal.

[0007] Optionally, the signal acquisition module includes: a photodiode and a first switch transistor;

[0008] One end of the photodiode is grounded, and the other end is connected to the signal processing module through the first switch transistor;

[0009] The first switch transistor is used to be turned on or off according to the control of the first feedback signal.

[0010] Optionally, the signal acquisition module further includes: a second switch transistor;

[0011] The second switch transistor is used to be turned on or off according to the control of the first switch signal, so that when the second switch transistor is turned on, the first feedback signal is transmitted to the first switch transistor to control the first switch transistor.

[0012] Optionally, the signal processing module includes: a floating diffusion region, a reset transistor and a reset control transistor;

[0013] One end of the floating diffusion region is grounded, and the other end is connected to the source end of the reset transistor as a connection end of the signal processing module; and is connected to the signal acquisition module and the signal output module through the connection end;

[0014] The source terminal of the reset transistor is connected to the floating diffusion area, the drain terminal receives the power supply signal, and the gate terminal receives the second feedback signal through the reset control transistor;

[0015] The reset control transistor is used to be turned on or off according to the control of the second switch signal, so that when the reset control transistor is turned on, the second feedback signal is transmitted to the reset transistor.

[0016] Optionally, the floating diffusion area performs reset when the reset transistor is turned on; when the reset transistor is turned off and the first switch transistor in one of the signal acquisition modules is turned on, the floating diffusion area receives the photoelectric charge generated by the photodiode of the signal acquisition module.

[0017] Optionally, the signal output module includes: a source follower transistor and a selection transistor;

[0018] The gate terminal of the source follower transistor is connected to the signal processing module, the source terminal is connected to the selection transistor, and the drain terminal receives a power supply signal; it is used to detect and follow the charge change of the floating diffusion area to determine the target signal;

[0019] The drain terminal of the selection transistor is connected to the source terminal of the source follower transistor, the source terminal is connected to the signal quantization module, the gate terminal receives an external control signal, and determines whether to output the target signal according to the control of the external control signal.

[0020] According to another aspect of the embodiments of the present disclosure, a signal processing circuit is provided, comprising: a pixel array composed of m rows*n columns of sensor pixel units as described in any one of the above embodiments, and n*k column processors; wherein each of the column processors corresponds to at least a part of the circuit of each of the m sensor pixel units in a column; m and n are integers greater than or equal to 1 respectively;

[0021] The pixel array is used to quantize the pixel signals of each row of the sensor pixel units row by row according to the control of the external control signal, output n target signals and send them to the n column processors respectively;

[0022] The column processor is used to determine the encoding signal corresponding to the sensor pixel unit according to the received target signal, and obtain a first feedback signal and a second feedback signal based on the encoding signal, and control the operation of the sensor pixel unit through the first feedback signal and the second feedback signal.

[0023] Optionally, it also includes: a digital readout circuit and a double sampling readout circuit;

[0024] The digital readout circuit is used to read out the coded signal at every preset time interval to obtain a digital sequence;

[0025] The double sampling readout circuit outputs the exposure charge when the coded signal meets the preset condition.

[0026] Optionally, the column processor comprises: a comparator, a first AND logic circuit and a second AND logic circuit;

[0027] The negative input terminal of the comparator is connected to the output terminal of the sensor pixel unit for receiving the target signal, the positive input terminal receives the reference signal, the output terminal outputs the coded signal, and the output terminal is respectively connected to one input terminal of the first and second AND logic circuits;

[0028] One input terminal of the first AND logic circuit is connected to the output terminal of the comparator, the other input terminal receives a first external AND signal, and the output terminal outputs the first feedback signal;

[0029] One input terminal of the second AND logic circuit is connected to the output terminal of the comparator, the other input terminal receives a second external AND signal, and the output terminal outputs the second feedback signal.

[0030] Optionally, the column processor further comprises: a third AND logic circuit;

[0031] The output end of the comparator is also connected to an input end of the third AND logic circuit, and the other input end of the third AND logic circuit receives a power supply signal; the output end of the third AND logic circuit is connected to the enable port of the double sampling readout circuit;

[0032] The input end of the double sampling readout circuit is connected to the output end of the sensor pixel unit for receiving the target signal, and the enable port is connected to the output end of the third AND logic circuit. In response to the third AND logic circuit outputting a high level, the double sampling readout circuit processes the target signal to obtain the exposure charge and outputs it.

[0033] According to another aspect of the embodiments of the present disclosure, there is provided an electronic device, comprising: a processor, and a memory communicatively connected to the processor, and further comprising the sensor pixel unit described in any one of the above embodiments or the signal processing circuit described in any one of the above embodiments;

[0034] The memory stores computer-executable instructions;

[0035] The processor executes computer-executable instructions stored in the memory to control the sensor pixel unit or the signal processing circuit.

[0036] Optionally, the electronic device is included in any one of the following: a pulse camera, a high-speed camera, an audio / video player, a navigation device, a fixed-position terminal, an entertainment unit, a smart phone, a communication device, a device in a motor vehicle, a camera, a sports or wearable camera, a detection device, a flight device, a medical device, a security device.

[0037] A sensor pixel unit, a signal processing circuit and an electronic device provided based on the above-mentioned embodiment of the present disclosure include: k signal acquisition modules, a signal processing module and a signal output module; wherein k is an integer greater than or equal to 1; each of the signal acquisition modules is used to receive a light signal within the exposure time to generate a photoelectric charge, and output the photoelectric charge according to the control of a first feedback signal; the signal processing module is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of a second feedback signal; the signal output module is used to output a target signal based on the photoelectric charge in the signal processing module according to the control of an external control signal. This embodiment realizes adjustable exposure time in the pixel unit through the first feedback signal and the second feedback signal, thereby realizing high dynamic range imaging.

[0038] The technical solution of the present disclosure is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0040] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0041] Figure 1 is a schematic diagram of a circuit structure of a sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0042] Figure 2 is a schematic diagram of the circuit structure of a signal acquisition module in a sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0043] Figure 3 is a schematic diagram of the circuit structure of a signal processing module in a sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0044] Figure 4 is a schematic diagram of an optional circuit structure of a sensor pixel unit provided by another exemplary embodiment of the present disclosure;

[0045] Figure 5 is a circuit structure diagram of a signal processing circuit provided by an exemplary embodiment of the present disclosure;

[0046] Figure 6 is a circuit structure diagram of a signal processing circuit provided by another exemplary embodiment of the present disclosure;

[0047] Figure 7a is a schematic diagram of a digital sequence output by a digital readout circuit in an optional example of a signal processing circuit provided by an exemplary embodiment of the present disclosure;

[0048] Figure 7b yes Figure 7a A schematic diagram of an analog signal output by a double sampling readout circuit corresponding to the illustrated embodiment;

[0049] Figure 8a is a circuit structure diagram of a column processor in a signal processing circuit provided by an exemplary embodiment of the present disclosure;

[0050] Figure 8b is a circuit structure diagram of a column processor in a signal processing circuit provided by another exemplary embodiment of the present disclosure;

[0051] Fig. 9 is a timing diagram of various signals of a signal processing circuit in an example provided by an exemplary embodiment of the present disclosure;

[0052] Fig.10 A block diagram of an electronic device according to an embodiment of the present disclosure is illustrated. DETAILED DESCRIPTION

[0053] Below, the exemplary embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure, and it should be understood that the present disclosure is not limited to the exemplary embodiments described here.

[0054] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

[0055] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0056] It should also be understood that in the embodiments of the present disclosure, “plurality” may refer to two or more than two, and “at least one” may refer to one, two, or more than two.

[0057] It should also be understood that any component, data or structure mentioned in the embodiments of the present disclosure can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0058] In addition, the term "and / or" in this disclosure is only a description of the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this disclosure generally indicates that the previous and next associated objects are in an "or" relationship. The data referred to in this disclosure may include unstructured data such as text, images, and videos, and may also be structured data.

[0059] It should also be understood that the description of the various embodiments in the present disclosure focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0060] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0061] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0062] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0063] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0064] In the process of realizing the present disclosure, the inventors found that in order to improve the dynamic range of the photoelectric image sensor, there are currently three main methods: the first method is multi-frame exposure synthesis, which continuously outputs images from underexposure to overexposure in time, and then fuses them to obtain images with high dynamic range. When the image sensor or the photographed object moves, since the images from underexposure to overexposure are obtained at different time points, the synthesized image may have motion artifacts, blur, etc. The second method is to set two large and small photodiodes (PD) in the pixel, and read out the accumulated charge in the two large and small photodiodes each time, so as to take into account the imaging of low dark areas and high bright areas. However, since the large and small photodiodes are integrated in the pixel respectively, the pixel area and the complexity of the process preparation are increased, and the signals in the large and small photodiodes need to be read out simultaneously each time, which increases the time for each signal readout and limits the imaging speed. The third method is LOFIC (Lateral Over Flow Integration Capacitor) technology. When the PD reaches half of the saturation well capacity during exposure, the relevant circuit action will be triggered and the charge on the PD will be transferred to a separately added storage capacitor, increasing the pixel's ability to store charge, thereby achieving high dynamic range imaging. The main challenge of this technology is to efficiently manufacture large-capacity storage capacitors, so a new pixel preparation process needs to be developed.

[0065] The above three technical approaches to achieve high dynamic range mainly include the synthesis of images exposed at different times, and adding PD or capacitance in the pixel to adjust the sensitivity of the pixel, which puts forward high requirements on the algorithm and pixel preparation process.

[0066] Figure 1 FIG. 1 is a schematic diagram of a circuit structure of a sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 1 As shown, it includes: k signal acquisition modules 11, a signal processing module 12 and a signal output module 13.

[0067] Wherein, k is an integer greater than or equal to 1. Each signal acquisition module 11 is connected to a signal processing module 12 and a signal output module 13 respectively.

[0068] Each signal acquisition module 11 is used to receive a light signal within an exposure time to generate photoelectric charges, and output the photoelectric charges according to the control of the first feedback signal.

[0069] Optionally, the main components in the signal acquisition module 11 can be photoelectric conversion components (for example, photodiodes, etc.), which can receive light signals during the exposure time and convert the light signals into photoelectric charges; and before transmitting the photoelectric charges to the signal processing module, the photoelectric charges are stored, and the light intensity is characterized by the number of photoelectric charges generated. Among them, the first feedback signal can be determined based on the target signal output by the signal output module 13 after processing, that is, the exposure time is automatically adjusted based on the target signal. When the first feedback signal is at a high level, the signal acquisition module 11 is controlled to output the photoelectric charge; when the first feedback signal is at a low level, the signal acquisition module 11 accumulates the photoelectric charge and does not transmit it.

[0070] In this embodiment, by integrating k signal acquisition modules 11 in the same sensor pixel unit, the signal acquisition function of k independent sensor pixel units is realized. However, since there is only one set of signal processing module and signal output module, the chip size is compressed, the hardware space occupied by the sensor using the sensor pixel unit is reduced, and the application range of the sensor pixel unit is expanded.

[0071] The signal processing module 12 is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of the second feedback signal.

[0072] Optionally, the signal processing module 12 may be reset according to the control of the second feedback signal before processing the signal. The signal processing module 12 also generates photoelectric charges under light illumination to realize the light detection function, and, when a preset condition is met, reads the photoelectric charges generated in the signal acquisition module according to the control of the second feedback signal. When the second feedback signal is at a high level, the signal processing module 12 is reset; when the second feedback signal is at a low level, the signal processing module 12 reads the photoelectric charges generated by each of the k signal acquisition modules 11 in turn.

[0073] The signal output module 13 is used to output a target signal based on the photoelectric charge in the signal processing module under the control of an external control signal.

[0074] Optionally, the target signal may include at least one of the following signals: a pulse signal, a potential signal, and a numerical value with a finite bit, etc.

[0075] The above-mentioned embodiments of the present disclosure provide a sensor pixel unit, a signal processing circuit and an electronic device, comprising: k signal acquisition modules, a signal processing module and a signal output module; wherein k is an integer greater than or equal to 1; each of the signal acquisition modules is used to receive a light signal within an exposure time to generate a photoelectric charge, and output the photoelectric charge according to the control of a first feedback signal; the signal processing module is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of a second feedback signal; the signal output module is used to output a target signal based on the photoelectric charge in the signal processing module according to the control of an external control signal. This embodiment realizes adjustable exposure time in the pixel unit through the first feedback signal and the second feedback signal, thereby realizing high dynamic range imaging.

[0076] Figure 2 FIG. 1 is a schematic diagram of a circuit structure of a signal acquisition module in a sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 2 As shown, the signal acquisition module 11 includes: a photodiode 111 and a first switch transistor 112;

[0077] One end of the photodiode 111 is grounded, and the other end is connected to the signal processing module 12 through the first switch transistor 112 .

[0078] Optionally, the photodiode 111 may also be other photoelectric conversion components that can realize photoelectric conversion, so as to realize the conversion of light signals into photoelectric charges. Under illumination conditions, the photodiode 111 generates photoelectric charges, and before the first switch transistor is turned on, the photoelectric charges are confined in the depletion region of the photodiode 111 by the energy potential well, and the photoelectric charges in the photodiode 111 gradually accumulate.

[0079] The first switch transistor 112 is used to generate a first feedback signal Φ TXy The control is turned on or off.

[0080] In this embodiment, the photodiode 111 and the signal processing module 12 are connected via the first switch transistor 112. When the first switch transistor 112 is disconnected, the photoelectric charge accumulated in the photodiode 111 cannot be transmitted and can only continue to accumulate. Only when the first switch transistor 112 is closed, the photodiode 111 sends the collected photoelectric charge to the signal processing module 12.

[0081] like Figure 2 As shown, the signal acquisition module 11 further includes: a second switch transistor 113;

[0082] The second switch transistor 113 is used to generate a first switching signal Φ TXxWhen the second switch transistor 113 is turned on or off by controlling the first feedback signal Φ TXy The signal transmitted to the first switch transistor 112 is used to control the first switch transistor 112 .

[0083] In this embodiment, the first feedback signal Φ is realized by adding a second switch transistor 113. TXy The control signal transmitted to the first switch transistor 112 is only TXx When the first feedback signal Φ is high, the second switch transistor 113 is turned on. TXy is transmitted to the gate terminal of the first switch transistor 112 to realize the conduction control of the first switch transistor 112. TXy When the first feedback signal Φ is high, the first switch transistor 112 is turned on, and the photodiode 111 sends the collected photoelectric charge to the signal processing module 12; TXy When the first switching transistor 112 is at a low level, the first switching transistor 112 is turned off. In this embodiment, the first feedback signal Φ that allows external transmission is realized by adding the second switching transistor 113. TXy The first switch transistor 112 is controlled to control the exposure time of the photodiode 111 .

[0084] Figure 3 FIG. 1 is a schematic diagram of a circuit structure of a signal processing module in a sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 3 As shown, the signal processing module 12 includes: a floating diffusion area 121 , a reset transistor 122 and a reset control transistor 123 .

[0085] One end of the floating diffusion region 121 is grounded GND, and the other end is connected to the source end of the reset transistor 122 as a connection end of the signal processing module; and is connected to the signal acquisition module 11 and the signal output module 13 through the connection end.

[0086] Optionally, the floating diffusion area 121 performs reset when the reset transistor 122 is turned on; when the reset transistor 122 is turned off and the first switch transistor 112 in a signal acquisition module 11 is turned on, the floating diffusion area 121 receives the photoelectric charge generated by the photodiode of the signal acquisition module 11.

[0087] In this embodiment, the floating diffusion area 121 is a common structure in the pixel unit of the 4T structure. The light detection function is realized by the floating diffusion area 121, and when the photodiode 111 is turned on between the signal processing module 12, the photoelectric charge generated in the photodiode 111 is read to the floating diffusion area 121.

[0088] The source terminal of the reset transistor 122 is connected to the floating diffusion region 121, the drain terminal receives the power supply signal Vdd, and the gate terminal receives the second feedback signal Φ through the reset control transistor 123. rsty .

[0089] Optionally, when the reset transistor 122 is turned on, the floating diffusion area 121 is turned on by the power supply signal Vdd, so as to reset the floating diffusion area 121 and charge the voltage on the floating diffusion area 121 to a high level. Under illumination conditions, photoelectric charges are generated in both the photodiode 111 and the floating diffusion area 121, wherein the voltage on the floating diffusion area 121 gradually decreases under the action of the photoelectric charges. Normally, the floating diffusion area 121 is reset before generating photoelectric charges.

[0090] The reset control transistor 123 is used to reset the control transistor 123 according to the second switch signal Φ rsty When the reset control transistor 123 is turned on or off, the second feedback signal Φ rsty Enter the gate terminal of the reset transistor.

[0091] The source terminal of the reset control transistor 123 receives the second feedback signal Φ rsty , the gate terminal receives the second switching signal Φ rstx , the drain terminal is connected to the gate terminal of the reset transistor 122.

[0092] This embodiment uses the change in the voltage signal caused by the photoelectric charge in the floating diffusion region to determine whether to transfer and read out the photoelectric charge stored in the photodiode.

[0093] In this embodiment, whether the reset transistor 122 is turned on depends on whether the level received by the gate terminal is a high level. rsty When the second feedback signal Φ rsty Whether the second switching signal Φr can be transmitted to the gate terminal of the reset transistor 122 depends on whether the reset control transistor 123 is turned on. stx When the reset control transistor 123 is high, the reset control transistor 123 is turned on. In this embodiment, the reset control transistor 123 is provided to realize the second switch signal Φ that allows external input. rstx The reset transistor 122 is controlled; the second switch signal Φ rstx and the second feedback signal Φ rstyThe floating diffusion area 121 is reset or controlled to read the charge. When the floating diffusion area 121 is reset, the photodiode 111 is exposed, and the exposure time of the photodiode 111 is adaptively adjusted, thereby achieving high dynamic range imaging. In addition, since the target signal increases linearly with time, and the noise increases with time in an open-root relationship, if the exposure time of the sensor pixel unit in the dark light area can be increased, it will help improve the signal-to-noise ratio, thereby improving the image quality; this embodiment can adaptively increase the exposure time of the sensor pixel unit in the dark light area by adaptively adjusting the exposure time of the photodiode 111, thereby improving the signal-to-noise ratio and the quality of the collected image.

[0094] Figure 4 FIG. 1 is a schematic diagram of an optional circuit structure of a sensor pixel unit provided by another exemplary embodiment of the present disclosure. Figure 4 As shown, in this embodiment, a signal acquisition module 11 is included, and the signal output module 13 includes: a source follower transistor 131 and a selection transistor 132;

[0095] The source follower transistor 131 has a gate terminal connected to the signal processing module 12 , a source terminal connected to the selection transistor 132 , and a drain terminal receiving a power supply signal Vdd; and is used to detect and follow the charge change of the floating diffusion area 121 to determine the target signal.

[0096] The drain terminal of the selection transistor 132 is connected to the source terminal of the source follower transistor 131, the source terminal is connected to the signal quantization module 12, and the gate terminal receives the external control signal Φ sel , and according to the external control signal Φ sel The control determines whether the target signal is output.

[0097] In this embodiment, the gate terminal of the source follower transistor 131 is connected to the signal processing module 12, and follows the potential change of the floating diffusion area 121 to obtain a potential signal. This process does not affect the photoelectric conversion of the photodiode 111. Under the premise that the first switch transistor 112 is disconnected, the source follower transistor 131 reads the potential change of the floating diffusion area 121, and the photodiode 111 continues to perform photoelectric conversion to collect charge. The selection transistor 132 is based on the external control signal Φ sel The control selects whether to output the target signal, and the external control signal Φ sel It can be an external clock signal or an external pulse signal, etc.; the external control signal Φ sel The timing is set according to the specific scenario. Optionally, an external control signal Φ can be sent regularly based on an external clock circuit. sel The pixel selection transistor is controlled to output a target signal.

[0098] Figure 5FIG. 1 is a circuit structure diagram of a signal processing circuit provided by an exemplary embodiment of the present disclosure. Figure 5 As shown, the signal processing circuit provided by this embodiment includes: a pixel array 510 composed of m rows*n columns of sensor pixel units 511, and n*k column processors 520; wherein, each column of m sensor pixel units 511 in the pixel array 510 corresponds to k column processors (for ease of representation, the figure only shows a structural schematic diagram in which k is 1, and when k is an integer greater than 1, the connection relationship of other column processors is the same as that of the column processor); each column processor 520 corresponds to at least a part of the circuit of each sensor pixel unit 511 in the m sensor pixel units 511 in a column; m and n are integers greater than or equal to 1, respectively.

[0099] Optionally, the signal acquisition module 11 in each sensor pixel unit 511 corresponds to a column processor 520; but since the k signal acquisition modules 11 are connected to the signal processing module 12 and the signal output module 13, and the k signal acquisition modules 11 output the target signal through the output port of the signal output module 13, each sensor pixel unit 511 corresponds to k column processors 520.

[0100] The pixel array 510 is used to quantize the pixel signals of each row of sensor pixel units 511 row by row according to the control of an external control signal, output n target signals and send them to n column processors respectively.

[0101] In this embodiment, the k signal acquisition modules 11 in each sensor pixel unit 511 sequentially output the target signal, that is, although the sensor pixel unit 511 has only one output terminal, since k photodiodes 111 are integrated therein, the photoelectric charges collected by the k signal acquisition modules 11 are sequentially output through k outputs. In this embodiment, each sensor pixel unit 511 can be considered as a row of k pixel units, but only outputs through one output port, that is, it can be understood that each row of the pixel array 510 includes n*k pixel units, but since each k pixel units correspond to the same signal processing module and signal output module, the number of components in the sensor pixel unit is reduced, and the space occupied by the sensor pixel unit is greatly reduced.

[0102] The column processor 520 is used to determine the coding signal corresponding to the sensor pixel unit 510 according to the received target signal, obtain the first feedback signal and the second feedback signal based on the coding signal, and control the operation of the sensor pixel unit through the first feedback signal and the second feedback signal.

[0103] In this embodiment, by setting a second switch transistor and a reset control transistor inside the sensor pixel unit (hereinafter referred to as the pixel unit) 511, the pixel unit can realize adjustable exposure time according to the first feedback signal and the second feedback signal fed back by the column processor 520, and can adaptively increase the exposure time of the sensor pixel unit in the dark light area, thereby improving the signal-to-noise ratio and the quality of the collected image. In addition, the output of the pixel unit is controlled by the first feedback signal and the second feedback signal fed back by the column processor 520, which reduces the external signal input and improves the reset efficiency of the pixel unit; and reduces the number of components in the pixel unit, reduces the size of the pixel unit, and improves the resolution of the image collected by the sensor using the pixel unit.

[0104] Figure 6 FIG. 1 is a circuit structure diagram of a signal processing circuit provided by another exemplary embodiment of the present disclosure. Figure 6 As shown, the signal processing circuit provided in this embodiment further includes: a digital readout circuit 530 and a double sampling readout circuit 540 .

[0105] Optionally, the method may further include providing a first switch signal Φ for each row of pixel units. TXx , the second switch signal Φ rstx and external control signal Φ sel The row control unit 550 sends a first switching signal Φ with a preset timing to each row of pixel units in sequence through a preset logic. TXx , the second switch signal Φ rstx and external control signal Φ sel , realizing exposure and reset control of the pixel units in the corresponding row.

[0106] The digital readout circuit 530 is used to read out the coded signal at every preset time interval to obtain a digital sequence.

[0107] Optionally, the digital sequence output by the digital readout circuit 530 is a sequence consisting of 0s and 1s, for example, Figure 7a As shown, for a specific point X in the imaging array, a digital sequence is output by the digital readout circuit 530. Wherein the time t0 represents the initial time, at which the transfer of the photoelectric charge of the photodiode in the pixel and the reset action of the floating diffusion area are completed, so that the signals in the photodiode and the floating diffusion area are cleared. The time interval between adjacent sampling is Δt (corresponding to the preset time interval), and the digital readout circuit 530 outputs a high signal (1) or a low signal (0) every Δt time interval. The number of low signals between two high signals in the obtained digital sequence can represent the light intensity of the specific point X at the current moment. Optionally, the more 0s between two 1s, the weaker the light intensity, and the fewer 0s between two 1s, the stronger the light intensity.

[0108] The double sampling readout circuit 540 outputs the exposure charge when the encoding signal meets the preset condition.

[0109] For the pixel unit of the i-th row selected in the pixel array, the row control unit 550 controls the first switch signal Φ TXx , the second switch signal Φ rstx and external control signal Φ sel = is a high level signal, and the other three signals of the rows are set to low level signals. After each column reads out the target signal Vout output by the pixel unit, the first feedback signal Φ is determined according to the magnitude relationship between the Vout signal and the reference signal Vth. TXy The second feedback signal Φ rsty The digital readout circuit 530 outputs 0 when Vout is greater than or equal to Vth, and whether the double sampling readout circuit 540 of the corresponding column is enabled to output an analog voltage signal. TXy and the second feedback signal Φ rsty Set to low level, turn off the corresponding double sampling readout circuit 540, do not output analog signals, and continue to execute the i+1th row; when Vout is less than Vth, the digital readout circuit 530 outputs 1, and the first feedback signal Φ of the corresponding column pixel unit is TXy and the second feedback signal Φ rsty Set to high level, enable the corresponding double sampling readout circuit 540 to output Vrst-Vsig, which represents the exposure charge amount in the photodiode in the corresponding time period, and continue to execute the i+1th row. Figure 7b As shown, refer to Figure 7a From the output digital sequence, we can see that the voltage output moment closest to the start moment has passed 5Δt. During this period, the amount of charge accumulated on the photodiode is represented by Vs1, so the light intensity signal during this period is Vs1 / 5Δt. The accumulation time during the second readout is 3Δt, the accumulated charge is Vs2, and the light intensity signal is Vs2 / 3Δt. The third light intensity signal can be represented by Vs3 / 6Δt. The signal light intensity in each time period is read out in turn.

[0110] Figure 8a FIG. 1 is a circuit structure diagram of a column processor in a signal processing circuit provided by an exemplary embodiment of the present disclosure. Figure 8a As shown, the column processor 520 includes a comparator 521 , a first AND logic circuit 522 , and a second AND logic circuit 523 .

[0111] The negative input terminal of the comparator 521 is connected to the output terminal of the sensor pixel unit 511 for receiving the target signal, the positive input terminal receives the reference signal Vth, the output terminal outputs the encoded signal and is connected to the digital readout circuit; and the output terminal is respectively connected to an input terminal of the first AND logic circuit 522 and the second AND logic circuit 523.

[0112] One input terminal of the first AND logic circuit 522 is connected to the output terminal of the comparator 521, and the other input terminal receives the first external AND signal Φ and1 , the output terminal outputs the first feedback signal Φ TXy .

[0113] One input terminal of the second AND logic circuit 523 is connected to the output terminal of the comparator 521, and the other input terminal receives the second external AND signal Φ and2 , the output terminal outputs the second feedback signal Φ rsty .

[0114] In this embodiment, the logic circuit determines the first feedback signal Φ corresponding to the output based on the coded signal output by the comparator. TXy and the second feedback signal Φ rsty , realizing the control of the exposure time in the sensor pixel unit through the column processor 520, optionally, the first and logic circuit 522 and the second and logic circuit 523 are both and logic, and the corresponding operation rule is that only when the two input terminals are both high level, the output is high level, and the output is low level in other cases.

[0115] Figure 8b FIG. 1 is a circuit structure diagram of a column processor in a signal processing circuit provided by another exemplary embodiment of the present disclosure. Figure 8b As shown, the column processor 520 further includes a third AND logic circuit 524 .

[0116] The output of the comparator 521 is also connected to one input of the third AND logic circuit 524 , and the other input of the third AND logic circuit 524 receives the power signal Vdd; the output of the third AND logic circuit 524 is connected to the enable port en of the double sampling readout circuit 540 .

[0117] The input end of the double sampling readout circuit 540 is connected to the output end of the sensor pixel unit 511 for receiving the target signal Vout, and the enable port en is connected to the output end of the third AND logic circuit 524. In response to the third AND logic circuit 524 outputting a high level, the double sampling readout circuit 540 processes the target signal Vout to obtain the exposure charge amount and outputs it. In response to the third AND logic circuit 524 outputting a low level, no analog signal is output.

[0118] The digital readout module is responsible for outputting the comparison result between the target signal Vout and the reference signal Vth, and the double sampling readout circuit is responsible for outputting the signal output result after double sampling. According to the magnitude relationship between the Vout signal and the reference signal Vth, the first feedback signal Φ is determined. TXy The second feedback signal Φ rsty The digital readout circuit 530 outputs 0 when Vout is greater than or equal to Vth, and whether the double sampling readout circuit 540 of the corresponding column is enabled to output an analog voltage signal. TXy and the second feedback signal Φ rsty Set to low level, turn off the corresponding double sampling readout circuit 540, do not output analog signals, and continue to execute the i+1th row; when Vout is less than Vth, the digital readout circuit 530 outputs 1, and the first feedback signal Φ of the corresponding column pixel unit is TXy and the second feedback signal Φ rsty Set to a high level to enable the corresponding double sampling readout circuit 540 to output Vrst-Vsig, which represents the amount of exposure charge in the photodiode during the corresponding time period, and continue to execute the i+1th row.

[0119] Fig. 9 FIG. 1 is a timing diagram of various signals of a signal processing circuit provided by an exemplary embodiment of the present disclosure in one example. Fig. 9 As shown, in the initial state, the reset transistor on the floating diffusion area 121 is closed, and the voltage on the floating diffusion area 121 is charged to a high level. Under light conditions, photoelectric charges are generated in both the photodiode 111 and the floating diffusion area 121, wherein the voltage on the floating diffusion area 121 gradually decreases under the action of the photoelectric charges, and the photoelectric charges on the photodiode 111 are confined in the depletion region of the photodiode 111 by the energy potential well, and when the first switch transistor is in the off state, the photogenerated charges in the photodiode 111 gradually accumulate.

[0120] The voltage on the floating diffusion region 121 is output to the outside for reading through the source follower transistor 131 and the selection transistor 132. When the voltage on the floating diffusion region 121 drops to a certain value (such as Fig. 9 Before time T1, Vout is less than Vth, which corresponds to Fig. 9 When the output voltage Vout drops below the reference signal Vth, the following circuit actions are triggered: T1, when the second switch signal Φ rstx and the second feedback signal Φ rsty is high level, so that the reset transistor 122 is closed, the floating diffusion area 121 is reset, and the reset voltage Vrst on the floating diffusion area 121 is read out; T2, when the first switch signal Φ TXx and the first feedback signal ΦTXy When the second switching signal Φ is high, the first switching transistor 112 is closed, the charge accumulated in the photodiode 111 is transferred to the floating diffusion area 121, and the voltage Vsig on the floating diffusion area 121 is read out; T3, when the second switching signal Φ rstx and the second feedback signal Φ rsty = is high, so that the reset transistor 122 is closed, and the floating diffusion area 121 is reset. After the floating diffusion area 121 is reset, the reset transistor 122 is closed, waiting for the next threshold trigger. If the voltage on the floating diffusion area 121 has not dropped below the reference signal Vth (corresponding to Fig. 9 The timing diagram of not reaching the threshold in the right half) indicates that the accumulated light intensity has not reached a certain threshold, and the circuit action will not be triggered to transfer the charge on the photodiode 111 to the floating diffusion area 121, and the floating diffusion area 121 continues to maintain the accumulated charge. Fig. 9 In this case, the first feedback signal Φ TXy and the second feedback signal Φ rsty It is always at low level, and the corresponding digital output circuit outputs 0.

[0121] The electronic device provided by the present disclosure may be incorporated into any of the following: pulse cameras, high-speed cameras, audio / video players, navigation devices, fixed-position terminals, entertainment units, smart phones, communication devices, devices in motor vehicles, cameras, sports or wearable cameras, detection equipment, flight equipment, medical equipment, security equipment, etc.

[0122] The electronic device provided by the present disclosure can be applied to any of the following: pulse cameras, high-speed cameras, audio / video players, navigation equipment, fixed-position terminals, entertainment units, smart phones, communication equipment, equipment in motor vehicles, cameras, sports or wearable cameras, detection equipment, flight equipment, medical equipment, security equipment, etc.

[0123] Below, reference Fig.10 The electronic device according to the embodiment of the present disclosure is described. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the collected input signals from them.

[0124] Fig.10 A block diagram of an electronic device according to an embodiment of the present disclosure is illustrated.

[0125] like Fig.10 As shown, the electronic device includes one or more processors and memory.

[0126] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0127] The memory may store one or more computer program products, and the memory may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program products may be stored on the computer-readable storage medium, and the processor may run the computer program product to implement the sensor pixel unit and / or other desired functions of the various embodiments of the present disclosure described above.

[0128] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0129] In addition, the input device may also include, for example, a keyboard, a mouse, and the like.

[0130] The output device can output various information to the outside, including the determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0131] Of course, to simplify, Fig.10 Only some of the components related to the present disclosure in the electronic device are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device may further include any other appropriate components.

[0132] In addition to the above-mentioned methods and devices, embodiments of the present disclosure may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps in the sensor pixel unit according to various embodiments of the present disclosure described in the above part of this specification.

[0133] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the disclosed embodiments, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0134] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, enables the processor to execute the sensor pixel unit according to various embodiments of the present disclosure described in the above part of this specification.

[0135] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0136] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0137] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0138] The block diagrams of the devices, apparatuses, equipment, and systems involved in this disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including," "comprising," "having," and the like are open words, referring to "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or," and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0139] The method and apparatus of the present disclosure may be implemented in many ways. For example, the method and apparatus of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of steps for the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above, unless otherwise specifically stated. In addition, in some embodiments, the present disclosure may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0140] It should also be noted that in the apparatus, device and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0141] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0142] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A sensor pixel unit, characterized in that: include: k signal acquisition modules, signal processing modules and signal output modules; wherein k is an integer greater than or equal to 1; Each of the signal acquisition modules is used to receive a light signal within an exposure time to generate a photoelectric charge, and output the photoelectric charge according to the control of the first feedback signal; The signal processing module is used to perform a reset or sequentially read the photoelectric charge generated by each of the k signal acquisition modules according to the control of the second feedback signal; The signal output module is used to output a target signal based on the photoelectric charge in the signal processing module according to the control of an external control signal; The signal processing module includes: a floating diffusion region, a reset transistor and a reset control transistor; One end of the floating diffusion region is grounded, and the other end is connected to the source end of the reset transistor as a connection end of the signal processing module; and is connected to the signal acquisition module and the signal output module through the connection end; The source terminal of the reset transistor is connected to the floating diffusion area, the drain terminal receives the power supply signal, and the gate terminal receives the second feedback signal through the reset control transistor; when the second feedback signal is at a high level, the signal processing module performs a reset, and when the second feedback signal is at a low level, the signal processing module sequentially reads the photoelectric charge generated by each of the k signal acquisition modules; The reset control transistor is used to be turned on or off according to the control of the second switch signal, so that when the reset control transistor is turned on, the second feedback signal is transmitted to the reset transistor.

2. The pixel unit according to claim 1, characterized in that: The signal acquisition module includes: a photodiode and a first switch transistor; One end of the photodiode is grounded, and the other end is connected to the signal processing module through the first switch transistor; The first switch transistor is used to be turned on or off according to the control of the first feedback signal.

3. The pixel unit according to claim 2, characterized in that: The signal acquisition module further includes: a second switch transistor; The second switch transistor is used to be turned on or off according to the control of the first switch signal, so that when the second switch transistor is turned on, the first feedback signal is transmitted to the first switch transistor to control the first switch transistor.

4. The pixel unit according to any one of claims 1 to 3, characterized in that: The floating diffusion area performs reset when the reset transistor is turned on; when the reset transistor is turned off and the first switch transistor in one of the signal acquisition modules is turned on, the floating diffusion area receives the photoelectric charge generated by the photodiode of the signal acquisition module.

5. The pixel unit according to any one of claims 1 to 3, characterized in that: The signal output module includes: a source follower transistor and a selection transistor; The gate terminal of the source follower transistor is connected to the signal processing module, the source terminal is connected to the selection transistor, and the drain terminal receives a power supply signal; it is used to detect and follow the charge change of the floating diffusion area to determine the target signal; The drain terminal of the selection transistor is connected to the source terminal of the source follower transistor, the source terminal is connected to the signal quantization module, the gate terminal receives an external control signal, and determines whether to output the target signal according to the control of the external control signal.

6. A signal processing circuit, characterized in that: include: A pixel array consisting of m rows*n columns of sensor pixel units according to any one of claims 1 to 5, and n*k column processors; wherein each of the column processors corresponds to at least a portion of the circuit of each of the m sensor pixel units in a column; m and n are integers greater than or equal to 1 respectively; The pixel array is used to quantize the pixel signals of each row of the sensor pixel units row by row according to the control of the external control signal, output n target signals and send them to the n column processors respectively; The column processor is used to determine the encoding signal corresponding to the sensor pixel unit according to the received target signal, and obtain a first feedback signal and a second feedback signal based on the encoding signal, and control the operation of the sensor pixel unit through the first feedback signal and the second feedback signal.

7. The signal processing circuit according to claim 6, characterized in that: Also includes: Digital readout circuit and double sampling readout circuit; The digital readout circuit is used to read out the coded signal at every preset time interval to obtain a digital sequence; The double sampling readout circuit outputs the exposure charge when the coded signal meets the preset condition.

8. The signal processing circuit according to claim 7, characterized in that: The column processor includes: a comparator, a first AND logic circuit and a second AND logic circuit; The negative input terminal of the comparator is connected to the output terminal of the sensor pixel unit for receiving the target signal, the positive input terminal receives the reference signal, the output terminal outputs the coded signal, and the output terminal is respectively connected to one input terminal of the first and second AND logic circuits; One input terminal of the first AND logic circuit is connected to the output terminal of the comparator, the other input terminal receives a first external AND signal, and the output terminal outputs the first feedback signal; One input terminal of the second AND logic circuit is connected to the output terminal of the comparator, the other input terminal receives a second external AND signal, and the output terminal outputs the second feedback signal.

9. The signal processing circuit according to claim 8, characterized in that: The column processor further includes: a third AND logic circuit; The output end of the comparator is also connected to an input end of the third AND logic circuit, and the other input end of the third AND logic circuit receives a power supply signal; the output end of the third AND logic circuit is connected to the enable port of the double sampling readout circuit; The input end of the double sampling readout circuit is connected to the output end of the sensor pixel unit for receiving the target signal, and the enable port is connected to the output end of the third AND logic circuit. In response to the third AND logic circuit outputting a high level, the double sampling readout circuit processes the target signal to obtain the exposure charge and outputs it.

10. An electronic device, characterized in that: include: A processor, and a memory communicatively connected to the processor, further comprising the sensor pixel unit according to any one of claims 1 to 5 or the signal processing circuit according to any one of claims 6 to 9; The memory stores computer-executable instructions; The processor executes computer-executable instructions stored in the memory to control the sensor pixel unit or the signal processing circuit.

11. The electronic device according to claim 10, characterized in that: The electronic device is included in any of the following: pulse camera, audio / video player, wearable camera, detection equipment, flight equipment, medical equipment, security equipment.

12. The electronic device according to claim 10, characterized in that: The electronic device is included as: a navigation device.

13. The electronic device according to claim 10, characterized in that: The electronic device is included as: a communication device.

14. The electronic device according to claim 10, characterized in that: The electronic device is included as: a sports camera.

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