Control method and device for current compensation and electronic equipment

By monitoring compensation conditions and detecting faults in the target output channel of the current closed-loop chip, and executing an automatic zeroing process only when there is no fault, the current compensation error problem of the current closed-loop chip under no-load conditions is solved, and the accuracy and stability of the current output are achieved.

CN117389365BActive Publication Date: 2026-04-21WEICHAI POWER CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
WEICHAI POWER CO LTD
Filing Date
2023-10-23
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Existing current closed-loop chips cannot accurately calculate the current compensation value when automatically returning to zero under no-load conditions, resulting in errors in the constant current.

Method used

The compensation conditions are monitored in the target output channel of the current closed-loop chip to detect whether there is a fault. The automatic zeroing process is only executed when there is no fault. Current compensation is performed by setting the pulse width modulation period and trigger command.

Benefits of technology

This improves the accuracy of current compensation, avoids constant current errors caused by faults, and ensures the stability and accuracy of the chip's output current.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application discloses a current compensation control method, apparatus, and electronic device. The method includes: monitoring whether compensation conditions are met for a target output channel in a current closed-loop chip; the current closed-loop chip can output a target current through closed-loop control using a drive current; the current closed-loop chip includes at least one output channel, each output channel being used to output a corresponding current; the target output channel is the output channel that outputs the target current from at least one output channel; if the compensation conditions are met, detecting whether a fault exists in the target output channel; if a fault exists in the target output channel, performing: monitoring whether the compensation conditions are met; if no fault exists in the target output channel, performing an automatic zeroing process on the target output channel, the automatic zeroing process being used to achieve current compensation for the target output channel.
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Description

Technical Field

[0001] This application relates to the field of current compensation technology, and in particular to a control method, device and electronic equipment for current compensation. Background Technology

[0002] Currently, some current-closed-loop chips can achieve stable current output through closed-loop control using the drive current. During the current output process of the current-closed-loop chip, current compensation is performed through automatic zeroing, enabling the current-closed-loop chip to continuously output a constant current.

[0003] However, if the current closed-loop chip is not connected to a load, i.e., the current output channel is open, automatic zeroing may cause the chip to be unable to accurately calculate the corresponding current compensation value, resulting in an error in the constant current output by the chip.

[0004] Therefore, there is an urgent need for a technical solution that can accurately perform current compensation control. Summary of the Invention

[0005] In view of this, this application provides a current compensation control method, apparatus, and electronic device to solve the technical problem that the inability to accurately calculate the corresponding current compensation value leads to errors in the constant current output by the current closed-loop chip, as follows:

[0006] A current compensation control method, the method comprising:

[0007] For the target output channel in the current closed-loop chip, it monitors whether the compensation condition is met. The current closed-loop chip can output the target current through closed-loop control using the drive current. The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. The target output channel is the output channel that outputs the target current among the at least one output channel.

[0008] If the compensation condition is met, detect whether there is a fault in the target output channel;

[0009] In the event of a fault in the target output channel, the following procedure is performed: monitor whether the compensation conditions are met;

[0010] If there is no fault in the target output channel, an automatic zeroing process is performed on the target output channel. The automatic zeroing process is used to perform current compensation on the target output channel.

[0011] Preferably, in the above method, the target output channel is free from faults, including:

[0012] The time elapsed since the current closed-loop chip is powered on exceeds the preset detection time, and the fault flag bit corresponding to the target output channel indicates that the target output channel does not have a fault;

[0013] The fault flag is read from the register in the current closed-loop chip.

[0014] Preferably, before detecting whether a fault exists in the target output channel, the above method further includes:

[0015] Determine whether the automatic zeroing process has been completed;

[0016] If the automatic zeroing process is not completed, proceed to: detect whether there is a fault in the target output channel;

[0017] If the automatic zeroing process is completed, at least one target command is executed, which is associated with the automatic zeroing process.

[0018] In the above method, preferably, the automatic zeroing process is completed, including:

[0019] The first flag indicates that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel;

[0020] The second flag indicates that the common-mode input voltage corresponding to the target output channel meets the first control condition; the common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel.

[0021] The third flag indicates that the differential input voltage corresponding to the target output channel meets the second control condition; the differential input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform the current compensation operation on the target output channel;

[0022] The first flag bit, the second flag bit, and the third flag bit are read from the register in the current closed-loop chip.

[0023] The above method, preferably, involves performing an automatic zeroing process on the target output channel, including:

[0024] The pulse width modulation period is set; the pulse width modulation period corresponds to the frequency of the target current;

[0025] Set the drive current on the target output channel to 0;

[0026] After waiting for at least one pulse width modulation cycle, a trigger command is written into the register in the current closed-loop chip. The trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel.

[0027] Preferably, in the case of a fault in the target output channel, the above method further includes:

[0028] Output fault information, which is used to prompt troubleshooting for the target output channel.

[0029] In the above method, preferably, the compensation condition being met includes: the time elapsed since the previous time the compensation condition was met reaching the preset target time.

[0030] A current compensation control device, the device comprising:

[0031] A condition monitoring unit is used to monitor whether the compensation condition is met for the target output channel in the current closed-loop chip. The current closed-loop chip can output a target current through closed-loop control using a drive current. The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. The target output channel is the output channel that outputs the target current among the at least one output channel. When the compensation condition is met, a fault detection unit is triggered.

[0032] The fault detection unit is used to detect whether there is a fault in the target output channel; if there is a fault in the target output channel, the condition monitoring unit is executed; if there is no fault in the target output channel, the compensation control unit is triggered.

[0033] The compensation control unit is used to perform an automatic zeroing process on the target output channel, and the automatic zeroing process is used to achieve current compensation for the target output channel.

[0034] An electronic device, comprising:

[0035] A current closed-loop chip, which can output a target current through a closed-loop control method using a drive current; the current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current.

[0036] A microcontroller is used to monitor whether the compensation condition is met for the target output channel in the current closed-loop chip; the target output channel is the output channel that outputs the target current in at least one output channel; if the compensation condition is met, the microcontroller detects whether the target output channel has a fault; if the target output channel has a fault, the microcontroller executes the following steps: monitoring whether the compensation condition is met; if the target output channel does not have a fault, the microcontroller executes an automatic zeroing process for the target output channel, the automatic zeroing process being used to achieve current compensation for the target output channel.

[0037] Preferably, in the aforementioned electronic device, the current closed-loop chip is equipped with a register;

[0038] Wherein, the target output channel is free from faults, including:

[0039] The time elapsed since the current closed-loop chip is powered on exceeds the preset detection time, and the fault flag bit corresponding to the target output channel indicates that the target output channel does not have a fault;

[0040] The fault flag bit is read from the register.

[0041] As can be seen from the above technical solution, in the current compensation control method, device, and electronic device disclosed in this application, the compensation conditions in the target output channel of the current closed-loop chip are monitored to see if they are met. Here, the target output channel is the output channel in the current closed-loop chip that can output a target current using a closed-loop control method with a driving current. Based on this, when the compensation conditions of the target output channel are met, the system detects whether there is a fault in the target output channel, such as whether it is open-circuited. If a fault exists, the automatic zeroing process is not executed on the target output channel; instead, the system continues to monitor whether the compensation conditions are met until there is no fault in the target output channel. Only then is the automatic zeroing process executed on the target output channel, thereby achieving current compensation for the target output channel. It is evident that this application performs fault detection on each output channel with a stable output current. Current compensation is only achieved through automatic zeroing when there is no fault, avoiding errors in the constant current output by the chip due to current compensation under fault conditions. This improves the accuracy of current compensation and, consequently, the accuracy of the current output by the chip. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 A flowchart of a current compensation control method provided in Embodiment 1 of this application;

[0044] Figure 2 This is an example diagram of the compensation conditions in the embodiments of this application;

[0045] Figure 3 This is a partial flowchart of a current compensation control method provided in Embodiment 1 of this application;

[0046] Figure 4 This is another flowchart of a current compensation control method provided in Embodiment 1 of this application;

[0047] Figure 5 Another flowchart of a current compensation control method provided in Embodiment 1 of this application;

[0048] Figure 6 This is a schematic diagram of the structure of a current compensation control device provided in Embodiment 2 of this application;

[0049] Figure 7 This is another structural schematic diagram of a current compensation control device provided in Embodiment 2 of this application;

[0050] Figure 8 This is another structural schematic diagram of a current compensation control device provided in Embodiment 2 of this application;

[0051] Figure 9 This is a schematic diagram of the structure of an electronic device provided in Embodiment 3 of this application;

[0052] Figure 10 This is a flowchart illustrating the automatic zeroing process applicable to power management chip scenarios in this application. Detailed Implementation

[0053] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0054] refer to Figure 1The diagram shown illustrates a flowchart of a current compensation control method provided in Embodiment 1 of this application. This method is applicable to electronic devices with current closed-loop chips. The current closed-loop chip, such as a power management chip, can output a target current using a drive current through closed-loop control. The current closed-loop chip includes at least one output channel, each used to output a corresponding current. For example, the current closed-loop signal has eight output channels, each capable of outputting a corresponding constant current. The constant current values ​​output by each channel can be the same or different. The technical solution in this embodiment primarily aims to improve the accuracy of current compensation, thereby enhancing the accuracy of the current output by the chip.

[0055] Specifically, the method in this embodiment may include the following steps:

[0056] Step 101: For the target output channel in the current closed-loop chip, monitor whether the compensation condition is met. If the compensation condition is met, execute step 102. If the compensation condition is not met, execute step 101 until the compensation condition is met.

[0057] The target output channel is the output channel of the target current in at least one output channel included in the output current closed-loop chip.

[0058] It should be noted that the technical solution in this embodiment applies to each output channel in the current closed-loop chip. This embodiment uses one target output channel as an example to illustrate the current compensation control scheme.

[0059] The satisfaction of the compensation condition can include: the time elapsed since the previous compensation condition was satisfied reaching the preset target time. For example, such as... Figure 2 As shown, in this embodiment, the technical solution in this embodiment is executed once every target duration, that is, the current compensation is performed once for each output channel in the current closed-loop chip with the target duration as the compensation period.

[0060] Step 102: Detect whether there is a fault in the target output channel. If there is a fault in the target output channel, proceed to step 101. If there is no fault in the target output channel, proceed to step 103.

[0061] The absence of a fault in the target output channel can include: the time elapsed since the current closed-loop chip was powered on exceeding a preset detection time, and the fault flag bit corresponding to the target output channel indicating that the target output channel is fault-free. This fault flag bit is read from a register in the current closed-loop chip. The value in the fault flag bit indicates whether a fault exists in the target output channel. For example, if the fault flag is 0, it indicates that the target output channel is fault-free; if the fault flag bit is 1, it indicates that the target output channel is faulty.

[0062] Based on this, in this embodiment, timing starts from the power-on of the current closed-loop chip. After the timing exceeds the detection time, if the fault flag bit corresponding to the target output channel in the register indicates that there is no fault in the target output channel, then it can be determined that there is no fault in the target output channel.

[0063] For example, in this embodiment, the timing starts from the power-on of the current closed-loop chip and is represented by 1msCnt. After 1msCnt exceeds 128 milliseconds, if the DiagDeb read in the register is 0, it can be determined that there is no fault in the target output channel. If the DiagDeb read in the register is 1 after 1msCnt exceeds 128 milliseconds, it can be determined that there is a fault in the target output channel.

[0064] Step 103: Perform an automatic zeroing process on the target output channel. The automatic zeroing process is used to achieve current compensation for the target output channel.

[0065] For example, in the automatic zeroing process, the current compensation value corresponding to the target output channel can be obtained by setting the drive current to 0, and then the target output channel can be compensated according to the current compensation value so that the current closed-loop chip outputs a constant current that meets the requirements on the target output channel.

[0066] As can be seen from the above technical solution, in the current compensation control method provided in Embodiment 1 of this application, for the target output channel in the current closed-loop chip, it is monitored whether the compensation condition is met. Here, the target output channel is the output channel in the current closed-loop chip that can output the target current through closed-loop control using the driving current. Based on this, when the compensation condition of the target output channel is met, it is detected whether there is a fault in the target output channel, such as whether it is open circuit. If there is a fault, the automatic zeroing process is not executed on the target output channel, but the monitoring of whether the compensation condition is met continues until there is no fault in the target output channel. Only then will the automatic zeroing process be executed on the target output channel, thereby achieving current compensation for the target output channel. It can be seen that in this embodiment, fault detection is performed on each output channel with a stable output current. Current compensation is only achieved through automatic zeroing when there is no fault, avoiding the situation where the constant current output by the chip is erroneous due to current compensation when there is a fault. This improves the accuracy of current compensation and thus improves the accuracy of the current output by the chip.

[0067] In one implementation, when performing the automatic zeroing process on the target output channel in step 103, it can be specifically implemented in the following way, such as... Figure 3 As shown:

[0068] Step 301: Set the pulse width modulation period, which corresponds to the frequency of the target current.

[0069] The pulse width modulation period can also be called the PWM (Pulse Width Modulation) period. The current closed-loop chip can output a PWM waveform signal on the target output channel according to the set PWM period to output a target current signal at the corresponding frequency.

[0070] Step 302: Set the drive current on the target output channel to 0.

[0071] Step 303: After waiting for at least one pulse width modulation cycle, write the trigger command into the register in the current closed-loop chip. The trigger command is used to trigger the current closed-loop chip to perform current compensation operation on the target output channel.

[0072] The trigger command can be represented by the Auto-Zero command. After the trigger command is written to the register, the current closed-loop chip will respond to the trigger command by performing current compensation operations on the target output channel, such as calculating the current compensation value and then performing current compensation operations according to the current compensation value.

[0073] In one implementation, if a fault is detected in the target output channel in step 102, the method in this embodiment may further include the following steps, such as... Figure 4 As shown:

[0074] Step 104: Output fault information. The fault information is used to prompt troubleshooting for the target output channel.

[0075] For example, in this embodiment, fault information can be transmitted to a user terminal, such as a mobile phone, to prompt staff to troubleshoot the fault in a timely manner, such as connecting a load to the target output channel.

[0076] In addition, in this embodiment, if a fault is detected in the target output channel, other operations can also be performed, such as reading chip identifiers, reading diagnostic information, and reading current.

[0077] In one implementation, in this embodiment, if the compensation condition is met, before step 102, the following steps may also be included: Figure 5 As shown:

[0078] Step 105: Determine whether the automatic zeroing process has been completed. If the automatic zeroing process has not been completed, proceed to step 102 to detect whether there is a fault in the target output channel. If the automatic zeroing process has been completed, proceed to step 106.

[0079] Step 106: Execute at least one target command, which is associated with the automatic zeroing process.

[0080] The target command can be: a command to write the PWM cycle duty cycle, a command to write the trigger dithering command, a command to write KpKi, etc.

[0081] In other words, in this embodiment, after the compensation condition is met and a new compensation cycle is entered, it is first determined whether the automatic zeroing process has been completed. If it has been completed, the target command affected by the automatic zeroing process can continue to be executed. If it has not been completed, the automatic zeroing process is started accurately. That is, it is first determined whether there is a fault in the target output channel. Only when there is no fault in the target output channel is the automatic zeroing process executed on the target output channel.

[0082] Specifically, the automatic zeroing process can be completed under the following conditions:

[0083] The first flag indicates that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to perform current compensation operation on the target output channel.

[0084] The second flag indicates that the common-mode input voltage corresponding to the target output channel meets the first control condition; the common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel.

[0085] The third flag indicates that the differential input voltage corresponding to the target output channel meets the second control condition; the differential input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform current compensation operation on the target output channel.

[0086] The first, second, and third flag bits are read from the registers in the current closed-loop chip.

[0087] For example, the value of the first flag bit can be 0 or 1. When the first flag bit is 1, it indicates that the trigger command corresponding to the target output channel has been written to the register of the current closed-loop chip. When the first flag bit is 0, it indicates that the trigger command corresponding to the target output channel has not been written to the register of the current closed-loop chip. The value of the second flag bit can be 0 or 1. When the second flag bit is 1, it indicates that the common-mode input voltage corresponding to the target output channel meets the first control condition. When the second flag bit is 0, it indicates that the common-mode input voltage corresponding to the target output channel meets the first control condition. The value of the third flag bit can be 0 or 1. When the third flag bit is 1, it indicates that the differential-mode input voltage corresponding to the target output channel meets the second control condition. When the third flag bit is 0, it indicates that the differential-mode input voltage corresponding to the target output channel meets the second control condition.

[0088] Specifically, the first control condition is the condition under which the common-mode input voltage is allowed to participate in the current compensation value calculation. For example, the first control condition may include: the voltage value of the common-mode input voltage is within a preset first voltage range. The second control condition is the condition under which the differential-mode input voltage is allowed to participate in the current compensation value calculation. For example, the second control condition may include: the voltage value of the differential-mode input voltage is within a preset second voltage range.

[0089] refer to Figure 6 This is a schematic diagram of a current compensation control device provided in Embodiment 2 of this application. This device can be configured in an electronic device with a current closed-loop chip. The current closed-loop chip can output a target current using a drive current through a closed-loop control method, such as a power management chip. The technical solution in this embodiment is mainly used to improve the accuracy of current compensation, thereby improving the accuracy of the current output by the chip.

[0090] Specifically, the device in this embodiment may include the following units:

[0091] The condition monitoring unit 601 is used to monitor whether the compensation condition is met for the target output channel in the current closed-loop chip. The current closed-loop chip can output a target current through closed-loop control using a drive current. The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. The target output channel is the output channel that outputs the target current among the at least one output channel. When the compensation condition is met, the fault detection unit 602 is triggered.

[0092] The fault detection unit 602 is used to detect whether there is a fault in the target output channel; if there is a fault in the target output channel, the condition monitoring unit 601 is executed; if there is no fault in the target output channel, the compensation control unit 603 is triggered.

[0093] The compensation control unit 603 is used to perform an automatic zeroing process on the target output channel, and the automatic zeroing process is used to achieve current compensation on the target output channel.

[0094] As can be seen from the above technical solution, in the current compensation control device provided in Embodiment 2 of this application, the compensation conditions in the target output channel of the current closed-loop chip are monitored to see if they are met. Here, the target output channel is the output channel in the current closed-loop chip that can output a target current using a closed-loop control method with a driving current. Based on this, when the compensation conditions of the target output channel are met, the device detects whether there is a fault in the target output channel, such as whether it is open-circuited. If a fault exists, the automatic zeroing process is not executed on the target output channel; instead, the device continues to monitor whether the compensation conditions are met until there is no fault in the target output channel. Only then is the automatic zeroing process executed on the target output channel, thereby achieving current compensation for the target output channel. It is evident that in this embodiment, fault detection is performed on each output channel with a stable output current. Current compensation is only achieved through automatic zeroing when there is no fault, avoiding errors in the constant current output by the chip due to current compensation under fault conditions. This improves the accuracy of current compensation and, consequently, the accuracy of the current output by the chip.

[0095] In one implementation, the absence of a fault in the target output channel includes: the time elapsed since the current closed-loop chip was powered on exceeds a preset detection time, and a fault flag bit corresponding to the target output channel indicates that the target output channel is fault-free; wherein the fault flag bit is read from a register in the current closed-loop chip.

[0096] In one implementation, the apparatus in this embodiment may further include the following units, such as... Figure 7 As shown:

[0097] The execution judgment unit 604 is used to determine whether the automatic zeroing process has been completed before the fault detection unit 602 detects whether there is a fault in the target output channel when the compensation condition is met; if the automatic zeroing process has not been completed, the fault detection unit 602 is triggered; if the automatic zeroing process has been completed, at least one target command is executed, the target command being associated with the automatic zeroing process.

[0098] In one implementation, the automatic zeroing process is completed, including:

[0099] The first flag indicates that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel;

[0100] The second flag indicates that the common-mode input voltage corresponding to the target output channel meets the first control condition; the common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel.

[0101] The third flag indicates that the differential input voltage corresponding to the target output channel meets the second control condition; the differential input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform the current compensation operation on the target output channel;

[0102] The first flag bit, the second flag bit, and the third flag bit are read from the register in the current closed-loop chip.

[0103] In one implementation, when the compensation control unit 603 performs an automatic zeroing process on the target output channel, it is specifically used to: set a pulse width modulation period; the pulse width modulation period corresponds to the frequency of the target current; set the drive current on the target output channel to 0; and after waiting for at least one pulse width modulation period, write a trigger command into the register in the current closed-loop chip, the trigger command being used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel.

[0104] In one implementation, the apparatus in this embodiment may further include the following units, such as... Figure 8 As shown:

[0105] The fault output unit 605 is used to output fault information when the fault detection unit 602 detects a fault in the target output channel. The fault information is used to prompt the target output channel to perform fault troubleshooting.

[0106] In one implementation, the compensation condition being satisfied includes: the time elapsed since the previous time the compensation condition was satisfied reaching a preset target time.

[0107] It should be noted that the specific implementation of each unit in this embodiment can be referred to the corresponding content above, and will not be described in detail here.

[0108] refer to Figure 9 This is a schematic diagram of the structure of an electronic device provided in Embodiment 3 of this application. The electronic device may include the following structure:

[0109] A current closed-loop chip 901 is provided, which can output a target current through a closed-loop control method using a drive current; the current closed-loop chip 901 includes at least one output channel, and each output channel is used to output a corresponding current.

[0110] The microcontroller 902 is used to monitor whether the compensation condition is met for the target output channel in the current closed-loop chip 901; the target output channel is the output channel that outputs the target current in at least one of the output channels; if the compensation condition is met, it detects whether there is a fault in the target output channel; if there is a fault in the target output channel, it executes the following: monitoring whether the compensation condition is met; if there is no fault in the target output channel, it executes an automatic zeroing process for the target output channel, the automatic zeroing process being used to achieve current compensation for the target output channel.

[0111] As can be seen from the above technical solution, in the electronic device provided in Embodiment 3 of this application, the compensation conditions in the target output channel of the current closed-loop chip are monitored to see if they are met. Here, the target output channel is the output channel in the current closed-loop chip that can output a target current using a closed-loop control method with a driving current. Based on this, when the compensation conditions of the target output channel are met, the system detects whether there is a fault in the target output channel, such as whether it is open-circuited. If a fault exists, the automatic zeroing process is not executed on the target output channel; instead, the system continues to monitor whether the compensation conditions are met until there is no fault in the target output channel. Only then is the automatic zeroing process executed on the target output channel, thereby achieving current compensation for the target output channel. It is evident that in this embodiment, fault detection is performed on each output channel with a stable output current. Current compensation is only achieved through automatic zeroing when there is no fault, avoiding errors in the constant current output by the chip due to current compensation under fault conditions. This improves the accuracy of current compensation and, consequently, the accuracy of the current output by the chip.

[0112] In one implementation, the current closed-loop chip 901 is configured with a register; the target output channel is free from faults, including: the time elapsed since the current closed-loop chip was powered on exceeds a preset detection time, and the fault flag bit corresponding to the target output channel indicates that the target output channel is free from faults; wherein, the fault flag bit is read from the register.

[0113] Taking an electronic device containing a power management chip as an example, the power management chip is a current closed-loop chip that can output a stable constant current. On the current closed-loop chip, after the electronic control unit (ECU) is powered on, it directly sends an Auto-Zero command to the hardware closed-loop current chip through the Serial Peripheral interface (SPI) to realize the chip's automatic zeroing function (i.e., the automatic zeroing process).

[0114] However, current current compensation schemes do not consider the scenario where the ECU is powered on without a load. In open-circuit or other fault conditions, if an Auto-Zero command is sent directly to the hardware closed-loop current chip via SPI, the chip will calculate an incorrect current compensation value, leading to a larger deviation in the drive current. Furthermore, current solutions do not account for the fact that the chip may not always complete the automatic zeroing process as expected after a single automatic zeroing sequence (i.e., the automatic zeroing procedure mentioned earlier). This also results in a large compensation deviation, causing instability in the chip's output current and leading to current errors.

[0115] In view of this, the technical solution of this application proposes a control scheme for automatic zeroing of the current closed-loop chip. The Auto-Zero automatic zeroing function can compensate for the drive current and greatly improve the accuracy of the drive current. However, directly sending the Auto-Zero SPI command cannot adapt to all situations. Incorrect automatic zeroing not only fails to perform reasonable current compensation, but also makes the current deviation greater. This application aims to deal with the situation where the drive chip channel is open when the ECU is powered on, and the problem that automatic zeroing is still not successful after sending one Auto-Zero SPI command.

[0116] The specific plan is as follows: Figure 10 As shown:

[0117] Initially, after the ECU is powered on, upon reaching a scheduling cycle, it first checks whether the following variables are 0: the first flag bit AZFinish (the automatic zeroing completion flag in the logic, used to determine whether registers are read or written in subsequent logic), the second flag bit Azon (automatic zeroing completion flag 1 read from the register, low common-mode input voltage), and the third flag bit Azoff (automatic zeroing completion flag 2 read from the register, high common-mode input voltage). If any one of these variables is 0, the automatic zeroing function is considered incomplete, and the subsequent automatic zeroing process will proceed. If all three variables are 1, the automatic zeroing process is considered complete, and subsequent write and read commands to other registers, such as pulse width modulation period (PWM) duty cycle, dithering, current loop proportional gain Kp, and current loop integral gain Ki, are executed.

[0118] Based on this, after the above judgment conditions are met, it is determined whether the counter variable 1msCnt is greater than the detection time WAITTIME (e.g., 128ms) and whether the fault flag bit DiagDeb has reported a fault. The first part of this judgment condition is to ensure that the chip can detect and report the fault normally, and the second part checks whether a fault has been reported. If both are met, the automatic zeroing transmission sequence is entered, such as: setting the PWM period, setting the drive current of the relevant channel (i.e., the target output channel) to 0, waiting for 256 PWM cycles, writing the automatic zeroing command and setting the first flag bit AZFinish of the corresponding channel to 1. If any one of them is not met, the automatic zeroing transmission sequence is skipped, and other subsequent read command registers are read directly, such as the chip identifier ChipID, diagnostics, current, (automatic zeroing) and other read commands are executed.

[0119] After the automatic zeroing transmission sequence is completed, the first flag bit AZFinish of the corresponding channel will be set to 1. At this time, by reading the register, the status values ​​of the second flag bit Azon and the third flag bit Azoff of the automatic zeroing completion of this channel are obtained. If they are 1, it is considered that the automatic zeroing function has been enabled. If any variable is 0, the automatic zeroing transmission sequence will continue to be executed in the next scheduling cycle.

[0120] After the ECU is powered off, the process ends and stops executing. Figure 10 The scheme shown.

[0121] In summary, in practical applications, the chip's state is not fixed. For example, initially, there may be no load connected (open circuit state). In this case, the automatic zeroing transmission sequence should not be executed, otherwise it will lead to a larger error in the drive current. The technical solution of this application can effectively avoid this situation. Moreover, after executing the automatic zeroing transmission sequence once, the automatic zeroing function cannot be completed due to the time required for this process. However, the technical solution of this application can perform the automatic zeroing transmission sequence multiple times under suitable conditions, ensuring the reliability of the automatic zeroing function and improving the accuracy of the chip's output current.

[0122] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0123] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0124] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0125] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A current compensation control method, characterized in that, The method includes: For the target output channel in the current closed-loop chip, it monitors whether the compensation condition is met. The current closed-loop chip can output the target current through closed-loop control using the drive current. The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. The target output channel is the output channel that outputs the target current among the at least one output channel. If the compensation condition is met, detect whether there is a fault in the target output channel; In the event of a fault in the target output channel, the following procedure is performed: monitor whether the compensation conditions are met; If there is no fault in the target output channel, an automatic zeroing process is performed on the target output channel. The automatic zeroing process is used to achieve current compensation for the target output channel. If the compensation condition is met, the method further includes, before detecting whether a fault exists in the target output channel: Determine whether the automatic zeroing process has been completed; If the automatic zeroing process is not completed, proceed to: detect whether there is a fault in the target output channel; If the automatic zeroing process is completed, at least one target command is executed, which is associated with the automatic zeroing process; The automatic zeroing process is completed, including: a first flag indicating that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel; a second flag indicating that the common-mode input voltage corresponding to the target output channel meets a first control condition; the common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel; a third flag indicating that the differential-mode input voltage corresponding to the target output channel meets a second control condition; the differential-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform the current compensation operation on the target output channel; wherein, the first flag, the second flag, and the third flag are read from the register in the current closed-loop chip.

2. The method according to claim 1, characterized in that, The target output channel is free of faults, including: The time elapsed since the current closed-loop chip is powered on exceeds the preset detection time, and the fault flag bit corresponding to the target output channel indicates that the target output channel does not have a fault; The fault flag is read from the register in the current closed-loop chip.

3. The method according to claim 1 or 2, characterized in that, The automatic zeroing process for the target output channel includes: The pulse width modulation period is set; the pulse width modulation period corresponds to the frequency of the target current; Set the drive current on the target output channel to 0; After waiting for at least one pulse width modulation cycle, a trigger command is written into the register in the current closed-loop chip. The trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel.

4. The method according to claim 1 or 2, characterized in that, In the event of a fault in the target output channel, the method further includes: Output fault information, which is used to prompt troubleshooting for the target output channel.

5. The method according to claim 1 or 2, characterized in that, The compensation condition being met includes: the time elapsed since the previous time the compensation condition was met reaching the preset target time.

6. A current compensation control device, characterized in that, The device includes: A condition monitoring unit is used to monitor whether the compensation condition is met for the target output channel in the current closed-loop chip. The current closed-loop chip can output a target current through closed-loop control using a drive current. The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. The target output channel is the output channel that outputs the target current among the at least one output channel. When the compensation condition is met, a fault detection unit is triggered. The fault detection unit is used to detect whether there is a fault in the target output channel; if there is a fault in the target output channel, the condition monitoring unit is executed; if there is no fault in the target output channel, the compensation control unit is triggered. A compensation control unit is used to perform an automatic zeroing process on the target output channel, wherein the automatic zeroing process is used to achieve current compensation on the target output channel; Before triggering the fault detection unit when the condition monitoring unit detects that the compensation condition is met, the following steps are performed: determining whether the automatic zeroing process has been completed; if the automatic zeroing process has not been completed, performing the following steps: detecting whether there is a fault in the target output channel; if the automatic zeroing process has been completed, executing at least one target command, the target command being associated with the automatic zeroing process; the automatic zeroing process being completed includes: a first flag indicating that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to execute on the target output channel. The current compensation operation involves a second flag indicating that the common-mode input voltage corresponding to the target output channel meets a first control condition. The common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel. A third flag indicates that the differential-mode input voltage corresponding to the target output channel meets a second control condition. The differential-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform the current compensation operation on the target output channel. The first, second, and third flags are read from a register in the current closed-loop chip.

7. An electronic device, characterized in that, include: A current closed-loop chip, which can output a target current through a closed-loop control method using the driving current; The current closed-loop chip includes at least one output channel, and each output channel is used to output a corresponding current. A microcontroller is used to monitor whether the compensation conditions are met for the target output channel in the current closed-loop chip. The target output channel is the output channel that outputs the target current in at least one of the output channels; If the compensation condition is met, detect whether there is a fault in the target output channel; If the target output channel is faulty, the following steps are performed: monitoring whether the compensation condition is met; if the target output channel is not faulty, performing an automatic zeroing procedure on the target output channel, the automatic zeroing procedure being used to perform current compensation on the target output channel; if the compensation condition is met, before detecting whether the target output channel is faulty, further steps are performed: determining whether the automatic zeroing procedure has been completed; if the automatic zeroing procedure has not been completed, performing the following steps: detecting whether the target output channel is faulty; if the automatic zeroing procedure has been completed, executing at least one target command, the target command being associated with the automatic zeroing procedure. The automatic zeroing process is completed, including: a first flag indicating that the trigger command corresponding to the target output channel is written into the register of the current closed-loop chip; the trigger command is used to trigger the current closed-loop chip to perform a current compensation operation on the target output channel; a second flag indicating that the common-mode input voltage corresponding to the target output channel meets a first control condition; the common-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel; a third flag indicating that the differential-mode input voltage corresponding to the target output channel meets a second control condition; the differential-mode input voltage is used by the current closed-loop chip to obtain the corresponding current compensation value on the target output channel, and the current compensation value is used by the current closed-loop chip to perform the current compensation operation on the target output channel; wherein, the first flag, the second flag, and the third flag are read from the register in the current closed-loop chip.

8. The electronic device according to claim 7, wherein the current closed-loop chip is configured with a register; in, The target output channel is free of faults, including: The time elapsed since the current closed-loop chip is powered on exceeds the preset detection time, and the fault flag bit corresponding to the target output channel indicates that the target output channel does not have a fault; The fault flag bit is read from the register.

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