A method for calculating equivalent resistance of nodes in a resistor network

Abstract

The present application discloses a method for calculating the equivalent resistance of a node in a resistor network, which includes: determining the admittance matrix #imgabs0# of the resistor network based on the permutation matrix P, performing LDL on the sorted admittance matrix #imgabs1# T Decompose to obtain the lower triangular matrix L and the diagonal matrix D; transform the constraint relationship between the permutation matrix P, the lower triangular matrix L, the diagonal matrix D and the admittance matrix #imgabs2# to obtain the constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D. The target matrix Z is the inverse matrix of the admittance matrix #imgabs3# after permutation; determine the i-th diagonal element Z in the target matrix Z ii The non-zero element Z in the lower right corner kj , based on the elements L in the triangular matrix L ki , calculate the off-diagonal element Z ij ; Based on the off-diagonal element Z ij , and the elements L in the triangular matrix L ji , the i-th diagonal element d in the diagonal matrix D ii , calculate the i-th diagonal element Z ii ; Based on the i-th diagonal element Z ii And the permutation matrix P, calculate the equivalent resistance R of node i relative to the ground node i .

Description

Technical Field

[0001] This patent application belongs to the field of circuit design technology, and in particular relates to a method for calculating the equivalent resistance of a node in a resistor network. Background Art

[0002] Extracting and analyzing circuit layout parasitic parameters is a crucial step in ensuring the reliability of circuit simulations. Especially with the continuous development of advanced manufacturing processes, the scale of resistor networks extracted from large-scale integrated circuit layouts is enormous, often containing hundreds of millions of resistors. The ability to quickly and accurately analyze the equivalent resistance of such large-scale resistor networks is an urgent need. However, existing techniques for calculating equivalent resistance require a large amount of data, resulting in low computational efficiency. Summary of the Invention

[0003] This patent application provides a method for calculating the equivalent resistance of a node in a resistor network to overcome or alleviate the defects of the prior art.

[0004] The present invention provides a method for calculating the equivalent resistance of a node in a resistor network, which includes:

[0005] Determine the admittance matrix of a resistor network

[0006] Based on the permutation matrix P, the sorted admittance matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and the diagonal matrix D;

[0007] Determine the ground node in the resistor network and calculate the equivalent resistance R relative to the ground node i Node i, i is a positive integer less than or equal to n;

[0008] based on The permutation matrix P, the lower triangular matrix L, the diagonal matrix D and the admittance matrix The constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D is transformed to obtain the constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D. The target matrix Z is the admittance matrix after permutation. The inverse matrix of

[0009] Determine the i-th diagonal element Z in the target matrix Z ii The non-zero element Z in the lower right corner kj , based on the elements L in the triangular matrix L ki , calculate the off-diagonal elements Z of the target matrix Z ij , where i+1≤j≤n, i+1≤k≤n, and n is the admittance matrix of the resistor network The matrix dimensions of

[0010] Based on the off-diagonal element Z ij , and the elements L in the triangular matrix L ji , the i-th diagonal element d in the diagonal matrix D ii , calculate the i-th diagonal element Z ii ;

[0011] Based on the i-th diagonal element Z ii and the permutation matrix P, calculate the equivalent resistance R of the node i relative to the ground node i .

[0012] Optionally, the admittance matrix The component filling rule based on the node analysis method MNA is determined, and its dimension is n.

[0013] Optionally, the sorted admittance matrix is ​​calculated based on the following formula:

[0014]

[0015] Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0016] Optionally, based on When the deformation is performed, Bring it into The constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D is obtained as follows:

[0017] Z=D -1 L -1 +(EL T )Z

[0018] Among them, D -1 L -1 The diagonal is 1 / d ii The lower triangular matrix of d ii is the i-th diagonal element in the diagonal matrix D, (EL T ) is an upper triangular matrix, E is the identity matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0019] Optionally, the off-diagonal element Z is calculated based on the following formula: ij :

[0020]

[0021] Optionally, the i-th diagonal element Z is calculated based on the following formulaii :

[0022]

[0023] Optionally, an inverse transformation is performed based on the following formula to calculate the equivalent resistance vector R of all nodes in the resistor network to ground:

[0024] R=PZ d

[0025] Where R=[R1,R2,...,R n ] T , R1, R2, ..., R n Z represents the equivalent resistance from node 1 to n to ground. d =[Z 11 , Z 22 ,...,Z nn ] T .

[0026] In this application, no solution is required The complete matrix element of L only needs to be calculated T The non-zero position distribution is consistent Matrix element of L. T is a sparse matrix and It is usually a dense matrix, so the total amount of calculation will be due to L T There are fewer non-zero elements and the number is greatly reduced. Since the entire solution is the same as LDL T The decomposition recursive formulas are similar, and the computational costs of the two methods should be comparable. While the conventional direct method, which requires a large number of back substitutions to calculate equivalent resistance, becomes a performance bottleneck, the equivalent solution method proposed in this patent has significant advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Schematic diagram of the flow of the method for calculating the equivalent resistance of a node in a resistor network in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of this patent application to clearly describe the technical solutions in the embodiments of this patent application. Obviously, the embodiments described are part of the embodiments of this patent application, not all of the embodiments. Based on the embodiments in this patent application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this patent application.

[0029] The terms "first," "second," and the like in the specification and claims of this patent application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this patent application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0030] In the following embodiments of the present application, the external power supply method is used to calculate the equivalent resistance, and only one-to-many calculation requirements are considered, that is, the equivalent resistance between all nodes and the ground reference node is calculated. This method first short-circuits the independent voltage source, disconnects the independent current source, and disconnects the capacitor in the original circuit; then, considering the one-to-many situation, an external 1A independent current source is connected to the fixed ground node and any node i; the equivalent resistance R between node i and the ground is calculated. i That is the voltage value V at node i i . Establish the solution V i The equation is generally expressed using the modified nodal analysis method (MNA) in circuit analysis. This equation can be expressed as Where V is the node voltage vector to be calculated, is the admittance matrix of the resistor network, which is determined by the MNA component filling rules and has a matrix dimension of n (excluding the ground node); I is the external independent current source vector, also determined by the filling rules. Because node i is connected to a 1A current source, I = e i , where e i is the standard unit vector, e i The i-th value in is 1, and the rest of the elements are 0. The final node voltage vector The equivalent resistance of any node i to ground can be expressed as

[0031]

[0032] That is to solve The i-th element on the main diagonal.

[0033] to this end, Figure 1 This is a flow chart of a method for calculating the equivalent resistance of a node in a resistor network according to an embodiment of the present application. Figure 1 As shown, it includes:

[0034] S1. Determine the admittance matrix of the resistor network

[0035] S2, based on the permutation matrix P, the sorted admittance matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and the diagonal matrix D;

[0036] S3, determining the ground node in the resistor network, and calculating the equivalent resistance R relative to the ground node i Node i, i is a positive integer less than or equal to n;

[0037] S4, based on The permutation matrix P, the lower triangular matrix L, the diagonal matrix D and the admittance matrix The constraint relationship between the target matrix z and the triangular matrix L and the diagonal matrix D is transformed to obtain the constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D. The target matrix Z is the admittance matrix after permutation. The inverse matrix of

[0038] S5. Determine the i-th diagonal element Z in the target matrix Z. ii The non-zero element Z in the lower right corner kj , based on the elements L in the triangular matrix L ki , calculate the off-diagonal elements Z in the target matrix Z ij , where i+1≤j≤n, i+1≤k≤n, and n is the admittance matrix of the resistor network The matrix dimensions of

[0039] S6, based on the non-diagonal element Z ij , and the elements L in the triangular matrix L ji , the i-th diagonal element d in the diagonal matrix D ii , calculate the i-th diagonal element Z ii ;

[0040] S7, based on the i-th diagonal element Z ii and the permutation matrix P, calculate the equivalent resistance R of the node i relative to the ground node i .

[0041] In this embodiment, in S1, as described above, the admittance matrix For example, it can be determined based on the component filling rule of the node analysis method MNA, and its dimension is n (the total number of nodes excluding the ground node).

[0042] In this embodiment, in S2, for example, the sorted admittance matrix is ​​calculated based on the following formula (2): Right now LDL T break down:

[0043]

[0044] Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0045] P is a permutation matrix determined by a given sorting algorithm, which is used to reduce the filler elements generated during the decomposition process to reduce the amount of computation.

[0046] In this embodiment, in S4, based on When the above transformation is performed, we get Substituting this into the above formula (2), we obtain the constraint relationship between the target matrix Z and the triangular matrix L and the diagonal matrix D expressed by the following formula (3):

[0047] Z=D -1 L -1 +(EL T )Z (3)

[0048] Among them, D -1 L -1 The diagonal is 1 / d ii The lower triangular matrix, d ii is the i-th diagonal element in the diagonal matrix D, (EL T ) is an upper triangular matrix, E is the identity matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0049] See also It can be seen that Z and The matrix only has one more permutation transformation, so we only need to find the main diagonal element of the Z matrix and then perform the inverse transformation to get The main diagonal element is the equivalent resistance. If it is a symmetric matrix, then the Z matrix is ​​also symmetric. When solving, only the diagonal and the upper or lower triangular part of Z need to be considered. This application uses the upper triangle as an example.

[0050] In this embodiment, in S5, the off-diagonal element Z is calculated based on the following formula (4): ij (1≤i≤n, i+1≤j≤n):

[0051]

[0052] In this embodiment, in S6, the i-th diagonal element Z is calculated based on the following formula (5): ii (1≤i≤n):

[0053]

[0054] When calculating the equivalent resistance of node i, the value of i is firstly n, that is, when calculating the diagonal element of Z matrix, the value of Z is n. nnStart by recursing backward along the main diagonal direction of Z, decreasing one index each time, and finally calculate Z 11 , thus obtaining all the diagonal elements of the Z matrix, and constructing the vector Z based on all the diagonal elements d =[Z 11 , Z 22 ,...,Z nn ] T This means that the calculation of the diagonal elements of the Z matrix must be performed in order from the lower right corner to the upper left corner. When calculating a matrix element of Z, you need to first calculate the element in the lower right corner of the matrix element, that is, the element with the larger matrix element index. Through recursion, you can gradually obtain the matrix elements with smaller matrix elements.

[0055] In the embodiment of the present application, the non-zero position distribution of Z that needs to be explicitly calculated is related to L T The position distribution of the non-zero elements of L is consistent, because L T It is a sparse matrix and z is generally a dense matrix, so there is no need to solve the complete matrix element of Z, that is, there is no need to solve The complete matrix element of L only needs to be calculated T The non-zero position distribution is consistent Matrix elements, so the total amount of calculation will be due to L T There are fewer non-zero elements and the computational complexity is greatly reduced.

[0056] To this end, when executing step S7, an inverse transformation can be performed for each diagonal element based on the following formula (6), thereby obtaining the equivalent resistance vector R of all nodes in the resistor network to ground:

[0057] R=PZ d (6)

[0058] Where R=[R1,R2,...,R n ] T , R1, R2, ..., R n It represents the equivalent resistance of nodes 1 to n to the reference ground.

[0059] In the above embodiments of the present application, there is no need to solve The complete matrix element of L only needs to be calculated T The non-zero position distribution is consistent Matrix element of L. T is a sparse matrix and It is usually a dense matrix, so the total amount of calculation will be due to L T There are fewer non-zero elements and the number is greatly reduced. Since the entire solution is the same as LDL TThe decomposition recursive formulas are similar, and the computational costs of the two methods should be comparable. While the conventional direct method, which requires a large number of back substitutions to calculate equivalent resistance, becomes a performance bottleneck, the equivalent solution method proposed in this patent has significant advantages.

[0060] In a specific test example, a resistor network with a matrix dimension of 1,285,711 is used to calculate the equivalent resistance of all pins to ground. Figure 1 The process shown in the figure first extracts the admittance matrix from the resistor network. Sort and decompose. Then calculate the diagonal and upper triangular parts of the Z matrix, and loop from the last node to the first node: first calculate the non-diagonal elements of the row where a node is located, and then calculate the diagonal elements of the node. When all the matrix elements on the main diagonal of the Z matrix are obtained, the original matrix is ​​obtained according to the permutation matrix. The nodes of the corresponding diagonal elements are finally obtained according to the known relationship between the pins and the nodes, and the equivalent resistance of all pins to the reference ground (that is, the equivalent resistance of all nodes to the reference ground) is obtained.

[0061] In this test case The matrix has 3,876,387 nonzero elements, and the L matrix obtained after sorting and decomposition has 2,763,040 nonzero elements. The numerical decomposition of this matrix takes a total of 48.93ms. Using a general direct method to calculate the equivalent resistance of 1,285,711 pins to ground takes a total of 29,255.86ms for a single thread and 2,860.93ms for 16 threads. Using this patented method, the total solution time is 93.17ms for a single thread. This patented method achieves an acceleration of approximately 313 times compared to a general direct method using a single thread and approximately 31 times compared to a general direct method using 16 threads.

[0062] The embodiments of the present patent application are described above in conjunction with the accompanying drawings, but the present patent application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this patent application, ordinary technicians in this field can also make many forms without departing from the purpose of this patent application and the scope of protection of the claims, all of which fall within the scope of protection of this patent application.

Claims

1. A method for calculating the equivalent resistance of a node in a resistor network, characterized in that: include: Determine the admittance matrix of a resistor network Based on the permutation matrix P, the sorted admittance matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and the diagonal matrix D; Determine the ground node in the resistor network and calculate the equivalent resistance R relative to the ground node i Node i, i is a positive integer less than or equal to n; based on The permutation matrix P, the lower triangular matrix L, the diagonal matrix D and the admittance matrix The constraint relationship between the target matrix Z and the lower triangular matrix L and the diagonal matrix D is transformed to obtain the constraint relationship between the target matrix Z and the lower triangular matrix L and the diagonal matrix D. The target matrix Z is the admittance matrix after permutation. The inverse matrix of Determine the i-th diagonal element Z in the target matrix Z ii The non-zero element Z in the lower right corner kj , based on the elements L in the lower triangular matrix L ki , calculate the off-diagonal elements Z of the target matrix Z ij , where i+1≤j≤n, i+1≤k≤n, and n is the admittance matrix of the resistor network The matrix dimensions of Based on the off-diagonal element Z ij , and the elements L in the lower triangular matrix L ji , the i-th diagonal element d in the diagonal matrix D ii , calculate the i-th diagonal element Z ii ; Based on the i-th diagonal element Z ii and the permutation matrix P, calculate the equivalent resistance R of the node i relative to the ground node i .

2. The method according to claim 1, characterized in that The admittance matrix The component filling rule based on the node analysis method MNA is determined, and its dimension is n.

3. The method according to claim 1, characterized in that The sorted admittance matrix is ​​calculated based on the following formula: Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

4. The method according to claim 1, wherein Based on When the deformation is performed, Bring it into The constraint relationship between the target matrix Z and the lower triangular matrix L and the diagonal matrix D is obtained as follows: Z=D -1 L -1 +(E-L T )Z Among them, D -1 L -1 The diagonal is 1 / d ii The lower triangular matrix (EL T ) is an upper triangular matrix, where d ii is the i-th diagonal element in the diagonal matrix D, E is the identity matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

5. The method according to claim 1, wherein The off-diagonal element Z is calculated based on the following formula ij :

6. The method according to claim 1, characterized in that The i-th diagonal element Z is calculated based on the following formula ii :

7. The method according to claim 1, characterized in that Perform the inverse transformation based on the following formula to calculate the equivalent resistance vector R of all nodes in the resistor network to ground: R=PZ d Where R=[R1,R2,…,R n ] T ,R1,R2,…,R n Z represents the equivalent resistance from node 1 to n to ground. d =[Z 11 ,Z 22 ,…,Z nn ] T .

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