Method for manufacturing an integrated circuit substrate and integrated circuit substrate

Abstract

The application provides a preparation method of an integrated circuit substrate and the integrated circuit substrate, and relates to the technical field of semiconductor manufacturing, and aims to solve the problem that the spin coating method cannot be applied to large-size high-density integrated circuits to reduce reflectivity. The preparation method comprises the following steps: providing a substrate, wherein the substrate comprises a substrate and a to-be-etched layer, the to-be-etched layer is located on the substrate, and the to-be-etched layer has a first surface; forming a siloxane-based anti-reflection film layer on the first surface by using a chemical vapor deposition method, the anti-reflection film layer has a second surface; forming a photoresist layer on the second surface; performing exposure and development on the photoresist layer to form a patterned photoresist layer; using the patterned photoresist layer as a mask, performing first etching on the anti-reflection film layer and the to-be-etched layer until the substrate is exposed; and performing second etching on the patterned photoresist layer and the remaining anti-reflection film layer until the patterned photoresist layer and the remaining anti-reflection film layer are completely removed, so as to obtain an integrated circuit substrate.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a method for preparing an integrated circuit substrate and an integrated circuit substrate. Background Technology

[0002] As critical dimensions in integrated circuit (IC) manufacturing processes shrink and the number of transistors within ICs increases, the precision requirements for IC manufacturing are also rising, especially regarding the anti-reflective properties of ICs during the manufacturing process. Currently, existing ICs typically reduce reflectivity by spin-coating an anti-reflective coating on the bottom or top of the photoresist. However, this method is only suitable for smaller ICs. For large-size, high-density ICs, spin-coating cannot meet the precision requirements of large-size, high-density ICs. Summary of the Invention

[0003] In view of this, this application provides a method for preparing an integrated circuit substrate and an integrated circuit substrate, in order to improve the problem that spin coating cannot be used to reduce reflectivity of large-size, high-density integrated circuits.

[0004] The technical solution adopted in this application to solve the above-mentioned technical problems is as follows:

[0005] In a first aspect, this application provides a method for fabricating an integrated circuit substrate, the method comprising:

[0006] A substrate is provided, the substrate including a substrate and a layer to be etched, the layer to be etched being located on the substrate, the layer to be etched having a first surface;

[0007] A siloxane-alkylated antireflective film is formed on the first surface by chemical vapor deposition, the antireflective film covering the entire first surface, and the antireflective film having a second surface;

[0008] A photoresist layer is formed on the second surface, and the photoresist layer covers the entire second surface;

[0009] The photoresist layer is exposed and developed to form a patterned photoresist layer.

[0010] Using the patterned photoresist layer as a mask, the anti-reflective film layer exposed from the patterned photoresist layer and the portion of the layer to be etched corresponding to the anti-reflective film layer exposed from the patterned photoresist layer are etched for the first time until the substrate is exposed.

[0011] The patterned photoresist layer and the remaining anti-reflective film layer are etched a second time until the patterned photoresist layer and the remaining anti-reflective film layer are completely removed to obtain the integrated circuit substrate.

[0012] In some embodiments of this application, a substrate is provided, the substrate including a substrate and a layer to be etched, the layer to be etched being located on the substrate, the layer to be etched having a first surface, including:

[0013] The substrate has a third surface on which an etchable layer is formed, the etchable layer covering the entire third surface.

[0014] In some embodiments of this application, forming a siloxane-alkylated antireflective film layer on the first surface by chemical vapor deposition includes:

[0015] Low-molecular-weight organosiloxane monomers and initiators are deposited on the surface of the layer to be etched using chemical vapor deposition (CVD).

[0016] The substrate and the antireflective film layer are subjected to heat treatment.

[0017] In some embodiments of this application, the organosiloxane monomer contains double bonds or epoxy groups.

[0018] In some embodiments of this application, the thickness of the antireflective film is less than 300 nm.

[0019] In some embodiments of this application, the refractive index of the antireflective coating is between 1.6% and 1.8%.

[0020] In some embodiments of this application, the patterned photoresist layer has at least one first trench, the first trench exposing a portion of the antireflective film layer.

[0021] In some embodiments of this application, in the step of using the patterned photoresist layer as a mask to perform a first etching on the anti-reflective film layer exposed from the patterned photoresist layer and the portion of the layer to be etched corresponding to the anti-reflective film layer exposed from the patterned photoresist layer until the substrate is exposed, the anti-reflective film layer after the first etching and the layer to be etched after the first etching will sequentially form a second trench and a third trench. The first trench, the second trench and the third trench are sequentially connected and expose a portion of the substrate.

[0022] In some embodiments of this application, the etching agent used for the first etching is carbon tetrafluoride.

[0023] Secondly, this application provides an integrated circuit substrate, which is prepared by the integrated circuit substrate preparation method described in the first aspect.

[0024] In summary, due to the adoption of the above technical solution, this application includes at least the following beneficial effects:

[0025] This application provides a method for fabricating an integrated circuit substrate and the integrated circuit substrate itself. The method primarily involves forming an anti-reflective film on a substrate using chemical vapor deposition (CVD). CVD is unaffected by substrate size, allowing for the formation of an anti-reflective film on both large and small substrates while ensuring precision. The process is simple and easy to implement. The anti-reflective film not only provides anti-reflection protection but also acts as a mask for subsequent pattern transfer, saving steps. During photoresist exposure, the anti-reflective film reduces the reflectivity of the photoresist layer, mitigating the standing wave effect caused by interference between reflected and incident light. Furthermore, a photoresist layer is formed on the anti-reflective film, serving as a mask for patterning and pattern transfer, resulting in more precise pattern transfer. Finally, after pattern transfer using the photoresist layer as a mask, a second etching process removes both the anti-reflective film and the photoresist layer, yielding the integrated circuit substrate. This integrated circuit substrate exhibits high process precision. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this application and are not intended to limit this application, wherein:

[0027] Figure 1 This is a schematic diagram illustrating the fabrication process of an integrated circuit substrate fabrication method provided in this application embodiment;

[0028] Figure 2 This is a schematic flowchart illustrating a method for fabricating an integrated circuit substrate provided in an embodiment of this application.

[0029] Explanation of reference numerals in the attached figures:

[0030] 1. Substrate; 2. Anti-reflective film; 3. Photoresist layer; 4. Layer to be etched; 5. First trench; 6. Second trench; 7. Patterned blocking layer; 8. Third trench. Detailed Implementation

[0031] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0032] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0033] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use this application. Details are set forth in the following description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be made without using these specific details. In other instances, known structures and processes are not described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles disclosed in this application.

[0034] To facilitate understanding of the present application, the spline curves and arrows used in the reference numerals in the accompanying drawings are explained below: spline curves without arrows indicate solid parts, that is, parts with solid structures; spline curves with arrows indicate virtual parts, that is, parts without solid structures.

[0035] Photolithography essentially replicates a temporary circuit structure onto a silicon wafer that will subsequently undergo etching and ion implantation. The typical photolithography process is as follows: First, photoresist, or photoresist layer (PR), is spin-coated onto the silicon wafer. Then, it is exposed to a light source, such as ultraviolet light, an electron beam, or X-rays, for selective exposure of the PR. After a development process, the PR layer remaining on the silicon wafer forms a pattern, protecting the area it covers. Then, a series of addition (e.g., depositing a metal film) or removal (e.g., etching) processes are performed on the areas where the photoresist has been removed to transfer the pattern of the PR layer onto the substrate surface.

[0036] During the exposure process of a photoresist layer, the reflective surface of the photoresist layer reflects incident light, causing some of the reflected light to interfere with the incident light. This results in inconsistent light intensity along the depth of the photoresist layer, creating a standing wave effect. Current technologies primarily address this by spin-coating an anti-reflective film at the bottom or top of the photoresist layer to reduce its reflectivity and prevent the standing wave effect. However, with the continuous development of integrated circuits towards higher density and larger sizes, spin-coating is becoming increasingly unsuitable and can negatively impact the precision of integrated circuit substrates.

[0037] Based on the above issues, please refer to the following: Figure 1 and Figure 2 This application provides a method for fabricating an integrated circuit substrate, the method comprising:

[0038] S1. A substrate is provided, the substrate including a substrate 1 and a layer to be etched 4, the layer to be etched 4 is located on the substrate 1, and the layer to be etched 4 has a first surface;

[0039] S2. A siloxane-alkylated antireflective film 2 is formed on the first surface by chemical vapor deposition. The antireflective film 2 covers the entire first surface and has a second surface.

[0040] S3. A photoresist layer 3 is formed on the second surface, and the photoresist layer 3 covers the entire second surface.

[0041] S4. Expose and develop the photoresist layer 3 to form a patterned photoresist layer 3.

[0042] S5. Using the patterned photoresist layer 3 as a mask, the anti-reflection film layer 2 exposed from the patterned photoresist layer 3 and the part of the layer 4 to be etched corresponding to the anti-reflection film layer 2 exposed from the patterned photoresist layer 3 are etched for the first time until the substrate 1 is exposed.

[0043] S6. Perform a second etching on the patterned photoresist layer 3 and the remaining anti-reflective film layer 2 until the patterned photoresist layer 3 and the remaining anti-reflective film layer 2 are completely removed to obtain the integrated circuit substrate.

[0044] The preparation method provided in this application mainly involves forming an anti-reflective film layer 2 on a substrate 1. This anti-reflective film layer 2 is primarily used to absorb incident light, reducing the interference between the incident light and reflected light caused by the incident light passing through the reflective surface of the photoresist layer 3. In this embodiment, chemical vapor deposition (CVD) is used to form the anti-reflective film layer 2 on the substrate 1. Compared to the spin-coating method used in the prior art, CVD is simpler to operate, requiring only the sputtering of the corresponding material onto the substrate 1 using CVD equipment. Furthermore, CVD is not limited by the size of the integrated circuit substrate; it is suitable for both small-size, high-density integrated circuit substrate processes and large-size, high-density integrated circuit substrate processes. Therefore, using CVD to form the anti-reflective film layer 2 is more suitable for large-size requirements, and the forming accuracy of the anti-reflective film layer 2 is easier to control. In addition, this preparation method mainly involves forming a photoresist layer 3 on the antireflective film layer 2. This serves two purposes: firstly, it protects the layers beneath the photoresist layer 3; secondly, the photoresist layer 3 acts as a mask, reducing the need for separate masking steps. The antireflective film layer 2 is located below the photoresist layer 3, which helps it absorb incident light and prevents the bottom surface of the photoresist layer 3 from reflecting the incident light, thus avoiding interference between the incident and reflected light.

[0045] In some embodiments, the step of providing a substrate, the substrate comprising a substrate 1 and a layer 4 to be etched, the layer 4 to be etched being located on the substrate 1 and having a first surface, specifically includes:

[0046] Substrate 1 has a third surface on which an etchable layer 4 is formed, covering the entire third surface. An anti-reflective film 2 is formed on the etchable layer 4. Since the anti-reflective film 2 covers the entire first surface, and the etchable layer 4 also covers the entire third surface, and since the orthographic projections of the first and third surfaces toward the substrate completely coincide, it can be inferred that the anti-reflective film 2 covers the entire first surface of the etchable layer. The etchable layer 4 is formed on substrate 1 to prepare for subsequent patterning of the etchable layer 4. Furthermore, the etchable layer 4 also protects substrate 1, preventing it from being subjected to excessive etching or corrosion during the manufacturing process.

[0047] In some embodiments, the step of forming the siloxane-alkylated antireflective film 2 on the first surface by chemical vapor deposition specifically includes:

[0048] Low-molecular-weight organosiloxane monomers and initiators are deposited on the surface of the layer to be etched 4 using chemical vapor deposition technology;

[0049] The substrate and the anti-reflective film layer are subjected to heat treatment.

[0050] The use of chemical vapor deposition (CVD) to deposit low-molecular-weight organosiloxane monomers and initiators onto the surface of the layer to be etched 4 mainly refers to using CVD equipment to deposit low-molecular-weight organosiloxane monomers onto the surface of the layer to be etched 4. This deposition process ensures that the organosiloxane monomers are deposited at a uniform rate across the entire surface of the layer to be etched 4 away from the substrate 1, resulting in a uniform thickness of the formed anti-reflective film layer 2, which is beneficial for improving the light emission uniformity of the subsequent display panel. As for the initiator, it is deposited along with the organosiloxane monomers onto the surface of the layer to be etched 4. Its main function is to act as an initiator for the subsequent polymerization reaction of the organosiloxane monomers, which can be understood as a catalytic effect.

[0051] The heating treatment for the substrate and the anti-reflective film 2 can be performed by using a UV lamp to irradiate and heat the substrate and the anti-reflective film 2, or by using a heating device to directly heat the substrate and the anti-reflective film 2.

[0052] It should also be noted that the organosiloxane monomers used in chemical vapor deposition contain reactive functional groups such as double bonds or epoxy groups. A double bond is a type of covalent bond, meaning a shared electron pair exists. Simply put, this pair of electrons is shared between the two sides of the bond; therefore, one covalent bond can fill a vacancy in the outermost electron shell. Organosiloxane monomers containing double bonds are unsaturated and can undergo addition and polymerization reactions. Here, the presence of double bonds in the organosiloxane monomer is utilized, and heat treatment is used to crosslink these double bonds. During the heat curing process, the organosiloxane monomer is molded into an organosiloxane polymer. The presence of epoxy groups in the organosiloxane monomer is also for the purpose of molding the monomer into a polymer. Epoxy groups are characterized by high reactivity; after ring-opening polymerization or addition reactions with other compounds, the molecular chain grows. Epoxy groups containing two or more epoxy groups react with multifunctional compounds to form a cured product with a crosslinked structure. Similarly, organosiloxane monomers containing epoxy groups undergo cross-linking and curing under heat treatment, thereby generating organosiloxane polymers.

[0053] Furthermore, for organosiloxane polymers, functional groups that absorb different wavelengths can be suspended according to the material, thickness, and other properties of the photoresist layer 3. In some embodiments, fluorocarbon groups are suspended, and the content of CF in the organosiloxane polymer can be controlled by adjusting the amount of fluorocarbon groups, thereby adjusting the hydrophobicity and refractive index of the antireflective film layer 2.

[0054] The higher the content of CF groups, and the more the anti-reflective film 2 is formed by the deposition of low-molecular-weight organosiloxane monomers, the lower the content of CxHy in the low-molecular-weight material, and the more CF groups there are, the lower the content of CxHy, resulting in better hydrophobicity of the anti-reflective film 2. Furthermore, by adjusting the reaction concentration of organosiloxanes, etc., anti-reflective films 2 with different fluorination depths of CF groups are obtained. The different chain lengths of the CF groups result in different molecular polarities in the obtained materials, thus leading to different refractive indices. Combined with adjusting the thickness of the anti-reflective film 2, the reflectivity of the anti-reflective film 2 can be controlled to meet the requirements of the exposure pattern.

[0055] Specifically, in some embodiments, the thickness of the anti-reflective film 2 is controlled within the range of less than 300nm. For example, the thickness of the anti-reflective film 2 can be 270nm, 250nm, 200nm, 150nm, 100nm, etc. The specific deposition thickness can be selected according to actual needs.

[0056] More specifically, regarding the refractive index of the antireflective coating 2, in some embodiments, the refractive index of the antireflective coating 2 is between 1.6% and 1.8%.

[0057] In some embodiments, during the step of exposing and developing the photoresist layer 3 to form a patterned photoresist layer 3, the formed patterned photoresist layer 3 has at least one first trench 5, the first trench 5 exposing a portion of the anti-reflective film layer 2. By exposing and developing the photoresist layer 3, the photoresist layer 3 is patterned. Here, the photoresist layer 3 acts as a mask, preventing the exposure and development processes from affecting the anti-reflective film layer 2, the substrate 1, etc. After patterning, the photoresist layer 3 forms trenches. The number of trenches formed on the surface of the photoresist layer 3 depends on the actual situation; in this embodiment, multiple trenches are formed at intervals. Since the anti-reflective film layer 2 is formed before the exposure and development process of the photoresist layer 3, when the photoresist layer 3 reflects light, the absorption of incident light by the anti-reflective film layer 2 reduces the reflection of incident light by the photoresist layer 3, avoiding excessive interference between reflected and incident light, which could lead to the formation of a standing wave effect and affect the patterning accuracy of the photoresist layer 3 during the exposure and development process.

[0058] In some embodiments, the step of using the patterned photoresist layer 3 as a mask to perform a first etching on the anti-reflective film layer 2 exposed from the patterned photoresist layer 3 and the portion of the anti-reflective film layer 2 corresponding to the exposed portion of the patterned photoresist layer 3 until the substrate 1 is exposed is specifically as follows:

[0059] Using the patterned photoresist layer 3 as a mask, the first etching is performed, sequentially etching the antireflective film layer 2 and the layer to be etched 4. Specifically, a second trench 6 is formed upon completion of etching the antireflective film layer 2, and a third trench 8 is formed upon completion of etching the layer to be etched 4. Because the etching is performed using the patterned photoresist layer as a mask, the shapes of the first trench 5, second trench 6, and third trench 8 are identical. The only possible difference is the depth between the trenches, as the trench depth depends on the thickness of each film layer. This completes the transfer of the patterned photoresist layer pattern onto the antireflective film layer 2 and the layer to be etched 4. Although the first etching targets two film layers, it is a single etching process, completed in one step, saving process steps, improving efficiency, and ensuring the accuracy of the shape transfer of the second trench 6 and the third trench 8. The etching depth required for the first etching depends on the actual situation. It is sufficient to ensure that the first trench 5, the second trench 6, and the third trench 8 are connected in sequence and expose part of the substrate, in order to prepare for the subsequent substrate forming.

[0060] In some embodiments, the main purpose of the second etching step of the patterned photoresist layer 3 and the remaining anti-reflective film layer 2 is to transfer the pattern of the patterned photoresist layer 3 to the layer to be etched 4, so that the layer to be etched 4 becomes the patterned blocking layer 7, and to remove the remaining patterned photoresist layer and anti-reflective film layer.

[0061] By utilizing the patterned photoresist layer 3 as a mask, the process is reduced and materials are saved without the need for a separate mask. Furthermore, the high patterning precision of the photoresist layer 3 provides a certain degree of accuracy guarantee for subsequent patterning etching, allowing the pattern to be accurately transferred to the next layer. The first etching is based on the pattern of the photoresist layer 3, etching away the anti-reflective film layer 2 and the layer to be etched 4 that are not covered by the photoresist layer 3. This forms the second trench 6 and the third trench 8, which have the same shape as the first trench 5, thus accurately transferring the pattern of the photoresist layer 3 onto the anti-reflective film layer 2 and the layer to be etched 4.

[0062] A second etching process is performed on the patterned photoresist layer 3 and anti-reflective film layer 2 to remove the remaining parts of these layers, thus fully exposing the layer to be etched 4. Based on the patterning achieved in the first etching, the removal of the photoresist layer 3 and anti-reflective film layer 2 allows the pattern of the photoresist layer 3 to be precisely transferred to the layer to be etched 4, making the layer to be etched 4 the patterned barrier layer 7. This completes the patterning of the layer to be etched 4 and transforms it into the patterned barrier layer 7. Through two etching processes and the exposure and development of the photoresist layer 3, the pattern transfer to the layer to be etched 4 is precisely achieved, resulting in the target layer, the patterned barrier layer 7. The exposure and development process for the photoresist layer 3 is the most crucial step in pattern formation. The anti-reflective film layer 2 absorbs the incident light, thereby improving the accuracy of the patterning of the photoresist layer 3 and ensuring the accuracy of the subsequent pattern formation of each film layer.

[0063] It should also be noted that, in the above etching process, the etchant used in the first etching step is carbon tetrafluoride, and the etching rate of F ions on the Si-containing bottom anti-reflective film layer 2 is higher than the etching rate of the photoresist layer 3. Specifically, the ratio of the etching rate of the bottom anti-reflective layer to the etching rate of the photoresist layer 3 by F ions is greater than 10:1.

[0064] This application also provides an integrated circuit substrate, which is mainly prepared by the integrated circuit substrate preparation method described in any of the above embodiments, and will not be repeated here.

[0065] The basic concepts have been described above. Obviously, for those skilled in the art, the detailed disclosure above is merely illustrative and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are suggested in this application, and therefore remain within the spirit and scope of the exemplary embodiments of this application.

[0066] Furthermore, this application uses specific terms to describe embodiments of the application. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that "an embodiment," "one embodiment," or "an alternative embodiment" mentioned twice or more in different locations in this specification do not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0067] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the present application requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.

[0068] For each patent, patent application, patent application publication, and other material such as articles, books, specifications, publications, and documents referenced in this application, the entire contents of that patent application are incorporated herein by reference, except for historical application documents that are inconsistent with or conflict with the content of this application, and documents that limit the broadest scope of the claims of this application (currently or subsequently appended to this application). It should be noted that if there are any inconsistencies or conflicts between the descriptions, definitions, and / or terminology used in the supplementary materials of this application and the content of this application, the descriptions, definitions, and / or terminology used in this application shall prevail.

Claims

1. A method for fabricating an integrated circuit substrate, characterized in that, include: A substrate is provided, the substrate including a substrate and a layer to be etched, the layer to be etched being located on the substrate, the layer to be etched having a first surface; A siloxane-alkylated antireflective film is formed on the first surface by chemical vapor deposition, the antireflective film covering the entire first surface, and the antireflective film having a second surface; the antireflective film is formed by cross-linking and curing of organosiloxane monomers containing double bonds or epoxy groups; A photoresist layer is formed on the second surface, and the photoresist layer covers the entire second surface; The photoresist layer is exposed and developed to form a patterned photoresist layer. Using the patterned photoresist layer as a mask, the anti-reflective film layer exposed from the patterned photoresist layer and the portion of the layer to be etched corresponding to the anti-reflective film layer exposed from the patterned photoresist layer are etched for the first time until the substrate is exposed. The patterned photoresist layer and the remaining anti-reflective film layer are etched a second time until the patterned photoresist layer and the remaining anti-reflective film layer are completely removed to obtain the integrated circuit substrate.

2. The method for preparing an integrated circuit substrate according to claim 1, characterized in that, The method provides a substrate, the substrate including a base and a layer to be etched, the layer to be etched being located on the base, the layer to be etched having a first surface, including: The substrate has a third surface on which an etchable layer is formed, the etchable layer covering the entire third surface.

3. The method for preparing an integrated circuit substrate according to claim 2, characterized in that, The formation of a silicon alkylation antireflective film layer on the first surface by chemical vapor deposition includes: Low-molecular-weight organosiloxane monomers and initiators are deposited on the surface of the layer to be etched using chemical vapor deposition technology. The substrate and the antireflective film layer are subjected to heat treatment.

4. The method for preparing an integrated circuit substrate according to claim 1, characterized in that, The thickness of the antireflective coating is less than 300 nm.

5. The method for preparing an integrated circuit substrate according to claim 1, characterized in that, The refractive index of the antireflective coating is between 1.6% and 1.8%.

6. The method for preparing an integrated circuit substrate according to claim 1, characterized in that, The patterned photoresist layer has at least one first trench, the first trench exposing a portion of the antireflective film layer.

7. The method for preparing an integrated circuit substrate according to claim 6, characterized in that, In the step of using the patterned photoresist layer as a mask to perform a first etching on the anti-reflective film layer exposed from the patterned photoresist layer and the portion of the layer to be etched corresponding to the anti-reflective film layer exposed from the patterned photoresist layer until the substrate is exposed, the anti-reflective film layer after the first etching and the layer to be etched after the first etching will sequentially form a second trench and a third trench. The first trench, the second trench and the third trench are sequentially connected and expose a portion of the substrate.

8. The method for preparing an integrated circuit substrate according to claim 7, characterized in that, The etching agent used in the first etching was carbon tetrafluoride.

9. An integrated circuit substrate, characterized in that, It is prepared by the method for preparing an integrated circuit substrate as described in any one of claims 1 to 8.

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