Display panel and display device

Abstract

The present invention provides a display panel and a display device, wherein the display panel includes a substrate and a thin film transistor layer arranged on the substrate, the thin film transistor layer includes a plurality of thin film transistors arranged at intervals; any one of the thin film transistor layers includes an active portion, the active portion includes a channel segment and a conductive segment connected to the channel segment in a bend, the spacing between the channel segment and the substrate is different from the spacing between the conductive segment and the substrate, that is, by setting the spacing between the channel segment and the substrate and the spacing between the conductive segment and the substrate to be different, the diffusion path of carriers and hydrogen in the conductive segment to the channel segment is extended, thereby reducing the amount of carriers and hydrogen diffused from the conductive segment to the channel segment, avoiding the short channel effect caused by the conductorization of the channel segment due to the presence of a large number of carriers and hydrogen, and further avoiding the problem of poor display caused by the segment channel effect.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In recent years, more and more display devices have been striving to meet performance requirements such as high resolution, high definition, and fast response, while also meeting more and more requirements for other performance indicators such as low cost, low energy consumption, environmental protection, and low blue light. Thin-film transistor devices in display panels play a vital role in improving the above performance.

[0003] To achieve overlap between the active layer and the source and drain electrodes in thin-film transistor devices, the non-channel region of the active layer must be conductively treated, typically through plasma bombardment or doping. However, this conductive treatment easily introduces excess carriers or hydrogen. As subsequent manufacturing processes proceed, particularly during high-temperature annealing, these excess carriers or hydrogen in the conductive region can easily diffuse into the channel region, reducing the effective channel length. This short-channel effect can occur, and in severe cases, can lead to device failure due to short circuits, resulting in poor display performance. Summary of the Invention

[0004] The present invention provides a display panel and a display device. The display panel can solve the problem of device short circuit caused by segment channel effect and thus causing poor display.

[0005] To solve the above problems, in a first aspect, the present invention provides a display panel, comprising:

[0006] substrate;

[0007] a thin film transistor layer, disposed on the substrate, comprising a plurality of thin film transistors spaced apart;

[0008] Wherein, any one of the thin film transistor layers includes an active portion, the active portion includes a channel segment and a conductive segment connected to the channel segment in a bend, and a distance between the channel segment and the substrate is different from a distance between the conductive segment and the substrate.

[0009] In the display panel provided by an embodiment of the present invention, a distance between the channel segment and the substrate is smaller than a distance between the conductive segment and the substrate.

[0010] In the display panel provided in one embodiment of the present invention, the display panel further includes a raising layer disposed between the thin film transistor layer and the substrate, the raising layer including a plurality of raising portions, and a conductive segment is correspondingly disposed above one of the raising portions.

[0011] In a display panel provided in one embodiment of the present invention, the display panel also includes a light-shielding layer arranged between the raised layer and the thin film transistor layer, the light-shielding layer includes a plurality of light-shielding portions arranged corresponding to each of the active portions, and the two opposite ends of a light-shielding portion are respectively arranged on the corresponding two raised portions.

[0012] In a display panel provided in one embodiment of the present invention, the display panel further includes a buffer layer arranged between the light-shielding layer and the thin-film transistor layer, the buffer layer having a groove in an area corresponding to each of the light-shielding portions, and for any of the active portions, the channel segment is arranged on the bottom of the corresponding groove, and one end of the conductive segment is arranged on the side wall of the groove and the other end extends outside the groove.

[0013] In the display panel provided by an embodiment of the present invention, the thickness of the elevation layer along a direction perpendicular to the substrate is 1000 angstroms to 3000 angstroms.

[0014] In the display panel provided by an embodiment of the present invention, the material of the spacer layer is selected from at least one of silicon oxide, silicon nitride and metal oxide.

[0015] In the display panel provided by an embodiment of the present invention, a distance between the channel segment and the substrate is greater than a distance between the conductive segment and the substrate.

[0016] In the display panel provided in one embodiment of the present invention, the display panel further includes a raising layer disposed between the thin film transistor layer and the substrate, the raising layer including a plurality of raising portions, and a channel segment is correspondingly disposed above one of the raising portions.

[0017] In a second aspect, the present invention provides a display device, comprising the aforementioned display panel.

[0018] Beneficial effect: An embodiment of the present invention provides a display panel and a display device, wherein the display panel includes a substrate and a thin film transistor layer arranged on the substrate, the thin film transistor layer includes a plurality of thin film transistors arranged at intervals; wherein any one of the thin film transistor layers includes an active portion, the active portion includes a channel segment and a conductive segment connected to the channel segment in a bend, the spacing between the channel segment and the substrate is different from the spacing between the conductive segment and the substrate. In the display panel, by setting the spacing between the channel segment and the substrate and the spacing between the conductive segment and the substrate to be different, the diffusion path of carriers and hydrogen in the conductive segment to the channel segment is extended, thereby reducing the number of carriers and hydrogen diffused from the conductive segment to the channel segment, avoiding the short channel effect caused by the conductorization of the channel segment due to the presence of a large number of carriers and hydrogen, and further avoiding the problem of poor display caused by the segment channel effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 This is a schematic diagram of the cross-sectional structure of a display panel provided by the prior art of the present invention;

[0021] Figure 2 is a schematic diagram of a cross-sectional structure of a display panel provided by an embodiment of the present invention;

[0022] Figure 3 is a schematic cross-sectional structural diagram of another display panel provided by an embodiment of the present invention;

[0023] Figures 4a-4f It is a structural flow diagram of a method for manufacturing a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0025] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0026] In this application, the word "exemplary" is used to mean "serving as an example, illustration, or illustration." Any embodiment described in this application as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is given to enable any person skilled in the art to make and use the invention. In the following description, details are listed for the purpose of explanation. It should be understood that one of ordinary skill in the art will recognize that the invention can be practiced without these specific details. In other instances, well-known structures and processes are not described in detail to avoid obscuring the description of the invention with unnecessary detail. Therefore, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0027] See also Figure 1The cross-sectional structure of a conventional display panel is shown. The display panel 100 includes a substrate 110, and a light shielding layer 130, a buffer layer 140, and a thin film transistor layer 120 sequentially arranged on the substrate 110. The thin film transistor layer 120 includes an active layer 121, a gate insulating layer 122, a gate metal layer 123, an interlayer insulating layer 124, and a source-drain metal layer 125 sequentially arranged on the buffer layer 140. The active layer 121 includes a channel segment 121a and a gate electrode 121a located on both sides of the channel segment 121a. The conductive segment 121b on the side is generally conductive by plasma bombardment or doping according to current conventional processes. However, excessive carriers or hydrogen are easily introduced during the conductive process. As subsequent process steps proceed, especially in the subsequent high-temperature annealing process, the excessive carriers or hydrogen in the conductive segment 121b are easily diffused into the channel segment 121a, reducing the actual effective channel length, i.e., causing a short channel effect. In severe cases, the device may fail due to a short circuit, resulting in poor display.

[0028] In order to solve the above problems, an embodiment of the present invention provides a display panel, which is combined with the following Figure 2 The cross-sectional structure of the display panel is shown in detail:

[0029] The display panel 200 includes a substrate 210 and a thin film transistor layer 220 disposed on the substrate 210;

[0030] The substrate 210 is a rigid substrate. The material of the rigid substrate is not limited in the present invention. The rigid substrate can be optionally a glass substrate, etc.; or the substrate 210 is a flexible substrate to achieve a flexible display function. The material of the flexible substrate is not limited in the present invention. It can be optionally an organic polymer. As an example, the flexible substrate can be a polyimide (PI) substrate, a polyamide (PA) substrate, a polycarbonate (PC) substrate, a polyethersulfone (PES) substrate, a polyethylene terephthalate (PET) substrate, a polyethylene naphthalate (PEN) substrate, a polymethylmethacrylate (PMMA) substrate, or a cycloolefin copolymer (COC) substrate.

[0031] The thin film transistor layer 220 is arranged on the substrate 210, and includes a plurality of thin film transistors TFT arranged at intervals. Any thin film transistor layer TFT includes an active portion 221, and the active portion 221 includes a channel segment 221a and conductive segments 221b located on both sides of the channel segment 221a and connected to the channel segment 221a. The spacing between the channel segment 221a and the substrate 210 is different from the spacing between the conductive segment 211b and the substrate 210.

[0032] In the display panel provided in this embodiment, the distance between the channel segment 211a in the active portion 221 and the substrate 210 is set to be unequal to the distance between the conductive segment 221b and the substrate 210. That is, in a direction perpendicular to the substrate 210, the channel segment 221a and the conductive segment 221b are located at different heights. This arrangement, on the one hand, prolongs the diffusion path of carriers and hydrogen in the conductive segment 221b to the channel segment 221a, thereby reducing the amount of carriers and hydrogen diffused from the conductive segment 221b to the channel segment 221a. On the other hand, according to research, most of the carriers and hydrogen in the conductive segment 221b diffuse horizontally, that is, parallel to the substrate 210. This allows the carriers and hydrogen in the conductive segment 221b to diffuse into other film layers, such as the insulating layer, at the same level as the conductive segment 221b. This does not affect the performance of the thin film transistor (TFT).

[0033] In summary, by setting the distance between the channel segment 211a in the active portion 221 and the substrate 210 to be unequal to the distance between the conductive segment 221b and the substrate 210, the number of carriers and hydrogen diffused from the conductive segment 221b to the channel segment 221a is greatly reduced, thereby avoiding the short channel effect caused by the conductorization of the channel segment 221a due to the presence of a large number of carriers and hydrogen, thereby avoiding the problem of poor display caused by the segment channel effect.

[0034] In some embodiments, the thin film transistor layer 220 includes an active layer, a gate insulating layer 222 , a gate metal layer 223 , an interlayer insulating layer 224 , and a source / drain metal layer 225 , which are sequentially disposed on the substrate 210 ;

[0035] The active layer includes a plurality of active portions 221 , and each thin film transistor TFT includes a corresponding active portion 221 ;

[0036] The gate metal layer 223 includes a plurality of gates, and each thin film transistor TFT includes a corresponding gate. The gate is disposed above the channel segment 221a in the corresponding active portion 221. The gate metal layer 223 is a single-layer film structure or a multi-layer film structure, and its material is selected from one or more of titanium, aluminum, molybdenum, copper, and neodymium.

[0037] The source-drain metal layer 225 includes a plurality of source electrodes and a plurality of drain electrodes. A thin film transistor TFT includes a corresponding source electrode and a corresponding drain electrode. The source electrode and the drain electrode are electrically connected to the corresponding conductive segment 221b through contact holes in the interlayer insulating layer 224. The source-drain metal layer 225 is a single-layer film structure or a multi-layer film structure, and its material is selected from one or more of titanium, aluminum, molybdenum, copper, and neodymium.

[0038] The gate insulating layer 222 and the interlayer insulating layer 224 are independently configured as a single-layer film structure or a multi-layer film structure, and the materials thereof are selected from one or more of silicon nitride and silicon oxide.

[0039] In some embodiments, the thin film transistor TFT is an oxide thin film transistor (Oxide Thin Film Transistor, Oxide-TFT), which has high carrier mobility, low off-state current and has the advantages of simple preparation process and low production cost. Correspondingly, the material of the active layer is a metal oxide system, specifically selected from one or more of indium gallium zinc oxide, indium gallium oxide, indium gallium zinc tin oxide, indium gallium tin oxide, indium zinc oxide and lanthanide oxide-doped indium zinc oxide or indium gallium zinc oxide.

[0040] It should be noted that when the thin film transistor TFT is an oxide thin film transistor, especially an oxide thin film transistor with high mobility, the conductorization process is more difficult to control than that of a low-temperature polysilicon thin film transistor, and it is easier to introduce excessive carriers or hydrogen during the conductorization process. However, the display panel provided by the embodiment of the present invention, by setting the active part to the above-mentioned special structure, can greatly reduce the number of carriers and hydrogen diffused from the conductorization segment 221b to the channel segment 221a even if its material is metal oxide, thereby avoiding the occurrence of poor display due to the segment channel effect.

[0041] In some embodiments, continue to refer to Figure 2 , the distance between the channel segment 221a and the substrate 210 is smaller than the distance between the conductive segment 221b and the substrate 210, that is, in a direction perpendicular to the substrate 210, the height of the conductive segment 221b is higher than the height of the channel segment 221a;

[0042] Furthermore, in order to achieve a larger spacing between the conductive segment 221b and the substrate 210, a raised structure is usually provided on the side of the conductive segment 221b close to the substrate 210. Specifically, the display panel 200 also includes a raised layer 250 provided between the thin film transistor layer 220 and the substrate 210. The raised layer 250 includes a plurality of raised portions 251. One conductive segment 221b is correspondingly provided above one of the raised portions 251. In this way, the height of the conductive segment 221b is higher than the height of the channel segment 221a, that is, the distance between the channel segment 221a and the substrate 210 is smaller than the distance between the conductive segment 221b and the substrate 210.

[0043] In some embodiments, since the performance of the active portion 221 is easily affected by light, especially when the material of the active portion 221 includes a metal oxide, the carrier density in the channel region 221a increases after the active portion 221 is exposed to light, causing the threshold voltage of the corresponding thin film transistor TFT to shift, thereby affecting the display quality. To avoid this problem, the display panel 200 further includes a light shielding layer 230 disposed on a side of the thin film transistor layer 220 close to the substrate 210. The light shielding layer 230 includes a plurality of light shielding portions 231, and each light shielding portion 231 is disposed corresponding to each active portion 221.

[0044] Based on this, in this embodiment, the light shielding layer 230 is further disposed between the elevating layer 250 and the thin film transistor layer 220, that is, the light shielding layer 230 is disposed on the elevating layer 250. Since one light shielding portion 231 is disposed corresponding to one active portion 221, and two elevating portions 251 are disposed correspondingly on the lower sides of the conductive segments 221b at both ends of one active portion 221, the two opposite ends of the light shielding portion 231 are respectively disposed on the corresponding two elevating portions 251, and the middle portion thereof is disposed in the interval area between the corresponding two elevating portions 251. That is, the ends of the light shielding portion 231 are elevated by the elevating portions 251, so that the light shielding portion 231 has a bowl-shaped structure. The light shielding portion 231 with such a structure can better wrap the corresponding channel portion 221a, thereby achieving a better light shielding effect.

[0045] The light shielding layer 230 is a single-layer film structure or a multi-layer film structure, and its material is selected from one or more of titanium, aluminum, molybdenum, copper, and neodymium.

[0046] In some embodiments, the display panel further includes a buffer layer 240 disposed between the light-shielding layer 230 and the thin-film transistor layer 220, and the buffer layer 240 has grooves in areas corresponding to the light-shielding portions 231. For any active portion 221, its channel segment 221a is disposed on the bottom of the corresponding groove, and one end of its conductive segment 22b connected to the channel segment 211a is disposed on the side wall of the groove and the other end extends beyond the groove.

[0047] In some embodiments, the thickness of the padding layer 250 in a direction perpendicular to the substrate 210 is 1000 angstroms to 3000 angstroms;

[0048] On the one hand, if the thickness of the raising layer 250 is too large, otherwise there is a greater risk of fracture at the portion where the conductive segment 221b is connected to the channel segment 221a, thereby causing failure of the thin film transistor device. On the other hand, the difference in spacing should not be too small, otherwise the difference in spacing between the channel segment 221a and the substrate 210 and the spacing between the conductive segment 221b and the substrate 210 will be too small, and the conductive segment 221b will still diffuse a certain number of carriers and hydrogen into the channel segment 221a, thereby affecting the performance of the thin film transistor device. Therefore, it has been verified that the thickness of the raising layer 250 in the direction perpendicular to the substrate 210 should be set to 1000 angstroms to 3000 angstroms.

[0049] In some embodiments, the difference between the spacing between the channel segment 221a and the substrate 210 and the spacing between the conductive segment 221b and the substrate 210 depends on the thickness of the raising layer 250 in a direction perpendicular to the substrate 210. Correspondingly, the difference between the spacing between the portion of the channel segment 221a located outside the groove of the buffer layer 240 and the substrate 210 and the spacing between the conductive segment 221b and the substrate 210 is 1000 angstroms to 3000 angstroms.

[0050] In some embodiments, the padding layer 250 is a single-layer film structure or a multi-layer film structure, and its material may be one or more of silicon oxide, silicon nitride, silicon oxynitride, and metal oxide.

[0051] It is to be noted that the material of the raised layer 250 is usually not a metal material, otherwise it will be electrically connected to both ends of the light shielding portion and affect the electrical signal in the light shielding layer 230;

[0052] The material of the padding layer 250 cannot usually be an organic material, because organic materials are currently conventionally formed into films through a coating process, and the film thickness is relatively thick, and the target film thickness of 1000 angstroms to 3000 angstroms cannot be achieved.

[0053] In some embodiments, see Figure 3, the distance between the channel segment 221a and the substrate 210 is greater than the distance between the conductive segment 221b and the substrate 210, that is, in a direction perpendicular to the substrate 210, the height of the conductive segment 221b is lower than the height of the channel segment 221a;

[0054] Furthermore, in order to achieve a larger spacing between the channel segment 221a and the substrate 210, a raising structure is usually provided on the side of the channel segment 221a close to the substrate 210. Specifically, the display panel 200 also includes a raising layer 250 arranged between the thin film transistor layer 220 and the substrate 210. The raising layer 250 includes a plurality of raising portions 251. One of the channel segments 221a is correspondingly arranged above one of the raising portions 251. In this way, the height of the channel segment 221a is higher than the height of the conductive segment 221b, that is, the distance between the channel segment 221a and the substrate 210 is greater than the distance between the conductive segment 221b and the substrate 210.

[0055] In some embodiments, the display panel is a liquid crystal display panel, an organic light emitting display panel, a micro light emitting diode display panel, a quantum dot display panel, or the like.

[0056] It should be noted that the above display panel embodiment only describes the above structure. It is understandable that, in addition to the above structure, the display panel of the embodiment of the present invention may also include any other necessary structures as needed, which is not specifically limited here.

[0057] Another embodiment of the present invention further provides a method for manufacturing a display panel, the method comprising the following steps:

[0058] S10: providing a substrate;

[0059] S20: forming a thin film transistor layer on the substrate, the thin film transistor layer including a plurality of thin film transistors spaced apart from each other, any one of the thin film transistor layers including an active portion, the active portion including a channel segment and conductive segments located on both sides of the channel segment, the spacing between the channel segment and the substrate being different from the spacing between the conductive segment and the substrate.

[0060] Combine as follows Figures 4a-4f The preparation method is further described:

[0061] See also Figure 4a , providing a substrate 210, forming a raising layer 250 on the substrate 210, the raising layer 250 including a plurality of raising portions 251 arranged at intervals;

[0062] See also Figure 4bA light shielding layer 230 is formed on the raised layer 250. The light shielding layer 230 includes a plurality of light shielding portions arranged at intervals. The two opposite ends of a light shielding portion 231 are respectively arranged on the corresponding two raised portions 251, and the middle portion thereof is arranged in the interval area between the corresponding two raised portions 251.

[0063] See also Figure 4c , forming a buffer layer 240 on the substrate 210 and the light shielding layer 230;

[0064] See also Figure 4d , forming an active layer on the buffer layer 240 , wherein the active layer includes a plurality of semiconductor portions 2211 spaced apart from each other, and two opposite ends of the semiconductor portion 2211 are respectively located above the corresponding two raised portions 251 ;

[0065] See also Figure 4e , forming a gate insulating layer 222 and a gate metal layer 223 on the semiconductor portion 2211, and performing plasma treatment on the semiconductor portion 2211 under the shielding of the gate insulating layer 222, so that the portion of the semiconductor portion 2211 not shielded by the gate insulating layer 222 is conductive, forming a conductive segment 211b, while the portion shielded by the gate insulating layer 222 is not conductive, forming a channel segment 211a. The channel segment 211a and the conductive segments 211b on both sides serve as the active portion 221;

[0066] See also Figure 4f An interlayer insulating layer 224 and a source-drain metal layer 225 are sequentially formed on the gate metal layer 223. The source-drain metal layer 225 includes a plurality of source electrodes and a plurality of drain electrodes. The source electrodes and the drain electrodes are electrically connected to the corresponding conductive segments 221 b through the contact holes of the interlayer insulating layer 224. In this way, the formation of the thin film transistor layer 220 is completed. The thin film transistor layer includes a plurality of thin film transistors TFT.

[0067] Another embodiment of the present invention further provides a display device, which includes the display panel provided by the above embodiment. The display device includes but is not limited to a mobile phone, a smart watch, a tablet computer, a laptop computer, a television, etc.

[0068] The above is a detailed introduction to a display panel and a display device provided by an embodiment of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A display panel, characterized in that: The display panel includes: substrate; a thin film transistor layer, disposed on the substrate, comprising a plurality of thin film transistors spaced apart; Wherein, any one of the thin film transistor layers includes an active portion, the active portion including a channel segment and a conductive segment connected to the channel segment in a bend, and a distance between the channel segment and the substrate is different from a distance between the conductive segment and the substrate; The display panel further includes a raising layer disposed between the thin film transistor layer and the substrate, the raising layer including a plurality of raising portions, and one of the conductive segments is correspondingly disposed above one of the raising portions; The display panel further includes a light shielding layer disposed between the elevated layer and the thin film transistor layer, the light shielding layer including a plurality of light shielding portions disposed corresponding to each of the active portions, two opposite ends of a light shielding portion being disposed on the corresponding two elevated portions, and a middle portion of the light shielding layer being disposed in a region between the corresponding two elevated portions, such that the light shielding portion has a bowl-shaped structure; The display panel also includes a buffer layer arranged between the light-shielding layer and the thin-film transistor layer, and the buffer layer has grooves in areas corresponding to each of the light-shielding parts. For any of the active parts, the channel section is arranged on the bottom of the corresponding groove, and one end of the conductive section is arranged on the side wall of the groove and the other end extends outside the groove.

2. The display panel according to claim 1, wherein: The distance between the channel segment and the substrate is smaller than the distance between the conductive segment and the substrate.

3. The display panel according to claim 1, wherein: The thickness of the raising layer in a direction perpendicular to the substrate is 1000 angstroms to 3000 angstroms.

4. The display panel according to claim 1, wherein: The material of the padding layer is selected from at least one of silicon oxide, silicon nitride and metal oxide.

5. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 4.

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