Pixel circuit, pixel structure and display panel

Abstract

The application discloses a pixel circuit, a pixel structure and a display panel, and belongs to the technical field of display. The pixel circuit comprises: a plurality of pixel units, the pixel units are sequentially connected through different data lines, the pixel unit comprises a plurality of groups of sub-pixel units, the sub-pixel units are sequentially connected through a gate driving line, and the sub-pixel unit comprises a driving circuit, a first red / green / blue / second red sub-pixel; the control end of the driving circuit is connected with the gate driving line, the first end of the driving circuit is connected with the data line, and the second end of the driving circuit is connected with the first red / green / blue / second red sub-pixel; wherein the driving circuit is used for driving the first red / green / blue sub-pixel to display when displaying in an odd frame, and driving the green / blue / second red sub-pixel to display when displaying in an even frame, thereby improving color deviation caused by the red pixel.

Description

Pixel circuits, pixel structure and display panel Technical Field

[0001] This application relates to the field of display technology, and in particular to pixel circuits, pixel structures and display panels. Background Technology

[0002] With the rapid development of Micro LED technology, users have increasingly higher requirements for full-color display in automotive products. The traditional pixel arrangement method for achieving full-color display is to arrange the three primary colors of RGB Micro LEDs in sequence and transfer the three primary color LEDs to the driver backplane to achieve full-color display. This pixel arrangement method for achieving full-color display has a major drawback. Due to its inherent properties, the red pixels in the three primary color LEDs will have a much greater attenuation than the green and blue pixels, resulting in color shift. Therefore, there is an urgent need for a new pixel arrangement method to improve the color shift caused by red pixels. Summary of the Invention

[0003] The main objective of this application is to provide a pixel circuit, pixel structure, and display panel, which aims to improve the technical problem of color shift caused by red pixels.

[0004] To achieve the above objectives, this application provides a pixel circuit, which includes multiple rows of pixel units connected sequentially via different data lines. Each pixel unit includes multiple groups of sub-pixel units connected sequentially via gate driving lines. Each sub-pixel unit includes a driving circuit and a sub-pixel group. The sub-pixel group includes a first red sub-pixel, a green sub-pixel, a blue sub-pixel, and a second red sub-pixel.

[0005] The control terminal of the driving circuit is connected to the gate driving line, the first terminal of the driving circuit is connected to the data line, and the second terminal of the driving circuit is connected to the first red sub-pixel, the green sub-pixel, the blue sub-pixel, and the second red sub-pixel, respectively.

[0006] The driving circuit is used to drive the first red sub-pixel, the green sub-pixel, and the blue sub-pixel to be displayed when odd-numbered frames are displayed; and to drive the green sub-pixel, the blue sub-pixel, and the second red sub-pixel to be displayed when even-numbered frames are displayed.

[0007] Optionally, the data lines include at least a first data line, a second data line, a third data line, and a fourth data line, and the driving circuit includes a first thin-film transistor, a second thin-film transistor, a third thin-film transistor, and a fourth thin-film transistor;

[0008] The control terminal of the first thin-film transistor is connected to the gate driving line, the first end of the first thin-film transistor is connected to the first data line, the second end of the first thin-film transistor is connected to the first red sub-pixel, the control terminal of the second thin-film transistor is connected to the gate driving line, the first end of the second thin-film transistor is connected to the second data line, the second end of the second thin-film transistor is connected to the green sub-pixel, the control terminal of the third thin-film transistor is connected to the gate driving line, the first end of the third thin-film transistor is connected to the third data line, the second end of the third thin-film transistor is connected to the blue sub-pixel, the control terminal of the fourth thin-film transistor is connected to the gate driving line, the first end of the fourth thin-film transistor is connected to the fourth data line, and the second end of the fourth thin-film transistor is connected to the second red sub-pixel.

[0009] Optionally, the pixel circuit further includes a first electrochromic layer, a first control signal terminal, a second electrochromic layer, and a second control signal terminal. The first electrochromic layer is disposed on the first red sub-pixel and connected to the first control signal terminal, and the second electrochromic layer is disposed on the second red sub-pixel and connected to the second control signal terminal.

[0010] Optionally, when the odd-numbered frames are displayed, the first data line, the second data line, and the third data line respectively output a first data signal, and drive the first red sub-pixel, the green sub-pixel, and the blue sub-pixel to be displayed based on the first data signal.

[0011] Optionally, the first control signal terminal outputs a conduction control signal to control the first electrochromic layer to be in a transparent state, and the second control signal terminal outputs a deactivation control signal to control the second electrochromic layer to be in a black state.

[0012] Optionally, when the even-numbered frames are displayed, the second data line, the third data line, and the fourth data line respectively output a second data signal, and drive the green sub-pixel, the blue sub-pixel, and the second red sub-pixel to be displayed based on the second data signal.

[0013] Optionally, the first control signal terminal outputs a shutdown control signal to control the first electrochromic layer to be in a black state, and the second control signal terminal outputs a conduction control signal to control the second electrochromic layer to be in a transparent state.

[0014] In addition, to achieve the above objectives, this application also provides a pixel structure, the pixel structure including the above-mentioned array substrate row driving circuit, the pixel structure including a driving backplane, an encapsulation layer and a plurality of electrodes;

[0015] The encapsulation layer and the driving circuit in the pixel circuit are disposed on the driving backplate. The first side of the first red sub-pixel, the first side of the green sub-pixel, the first side of the blue sub-pixel, and the first side of the second red sub-pixel in the pixel circuit are aligned with the side of the encapsulation layer away from the driving backplate and encapsulated in the encapsulation layer. The first red sub-pixel, the green sub-pixel, the blue sub-pixel, and the second red sub-pixel are encapsulated sequentially with a first spacing. The second side of the first red sub-pixel, the second side of the green sub-pixel, the second side of the blue sub-pixel, and the second side of the second red sub-pixel are respectively connected to the driving backplate through the electrode, wherein the second side and the first side are opposite sides of the sub-pixel.

[0016] Optionally, the pixel structure further includes a first electrochromic layer and a second electrochromic layer, wherein the first electrochromic layer is disposed on a first side of the first red sub-pixel, and the second electrochromic layer is disposed on a first side of the second red sub-pixel.

[0017] In addition, to achieve the above objectives, this application also provides a display panel, the display panel including an array substrate, the array substrate including the pixel structure as described above.

[0018] This application proposes a pixel circuit, pixel structure, and display panel. The pixel circuit is optimized to provide a pixel circuit comprising: multiple rows of pixel units connected sequentially via different data lines; each pixel unit includes multiple groups of sub-pixel units connected sequentially via gate drive lines; and each sub-pixel unit includes a driving circuit, a first red sub-pixel, a green sub-pixel, a blue sub-pixel, and a second red sub-pixel. Because red pixels in a tri-color LED exhibit significantly greater attenuation than green and blue pixels due to their inherent properties, leading to color shift, this application, combining the aforementioned modules, drives the first red, green, and blue sub-pixels for display during odd-numbered frame displays; and drives the green, blue, and second red sub-pixels for display during even-numbered frame displays. This reduces the usage time of the red sub-pixels, significantly decreasing their attenuation and improving the color shift problem caused by red pixels. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0020] Figure 1 is a functional module diagram of a pixel circuit according to an embodiment of the present application;

[0021] Figure 2 is a circuit connection diagram of an embodiment of the pixel circuit of this application;

[0022] Figure 3 is a circuit control schematic diagram of an embodiment of the pixel circuit of this application;

[0023] Figure 4 is a waveform control schematic diagram of an embodiment of the pixel circuit of this application;

[0024] Figure 5 is a schematic diagram of the structure of the display panel involved in the embodiment of this application;

[0025] Figure 6 is a schematic diagram of a pixel structure according to an embodiment of this application.

[0026] Explanation of icon numbers:

[0027] Label Name Label Name 1001 Processor 1002 Communication Bus 1003 User Interface 1004 Network Interface 1005 Memory G1-Gm First-m Gate Drive Lines D1-Dn First-n Data Lines 100 Pixel Unit (1) 110 Sub-pixel Unit (1) 10 Drive Circuit (1) 20 Sub-pixel Group (1) R1 First Red Sub-pixel R2 Second Red Sub-pixel G Green Sub-pixel B Blue Sub-pixel T1-T4 First-Four Thin Film Transistors 30 First Electrochromic Layer 40 Second Electrochromic Layer 200 Drive Backplane 300 Encapsulation Layer 400 Electrode 31 First Control Signal Terminal 41 Second Control Signal Terminal surface

[0028] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0029] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0030] This application provides a pixel circuit. Referring to FIG1, FIG1 is a functional module schematic diagram of an embodiment of a pixel circuit of this application.

[0031] In this embodiment, the pixel circuit includes multiple rows of pixel units 100, which are connected sequentially via different data lines D1-Dn. Each pixel unit 100 includes multiple sub-pixel units 110, which are connected sequentially via gate driving lines G1 (taking the first gate driving line as an example). Each sub-pixel unit 110 includes a driving circuit 10 and a sub-pixel group 20. The sub-pixel group 20 includes a first red sub-pixel R1, a green sub-pixel G, a blue sub-pixel B, and a second red sub-pixel R2.

[0032] The control terminal of the driving circuit 10 is connected to the gate driving line G1, the first terminal of the driving circuit 10 is connected to the data lines D1-Dn, and the second terminal of the driving circuit 10 is connected to the first red sub-pixel R1, the green sub-pixel G, the blue sub-pixel B and the second red sub-pixel R2 respectively.

[0033] The driving circuit 10 is used to drive the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B to be displayed when odd-numbered frames are displayed; and to drive the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2 to be displayed when even-numbered frames are displayed.

[0034] It should be noted that commonly used Micro LEDs, due to their advantages such as high color saturation, high resolution, and high brightness, have already begun to emerge in some display products, such as high-end automotive displays. Currently, there are two main ways to achieve full color with Micro LEDs: one is using blue Micro LEDs combined with quantum dot color conversion technology. However, quantum dots currently suffer from low efficiency, severe blue light leakage, and high cost, causing quality and cost issues. The other is using three-color RGB Micro LEDs, which transfer the three colors of LEDs to the driver backplane through three mass transfers. In the three-color RGB Micro LED display scheme, the brightness of the red LEDs decays over long-term use (the brightness decay of red LEDs is greater than that of blue and green LEDs), causing color shift and thus reducing the lifespan of the entire RGB Micro LED display device. Based on these problems, a pixel circuit is proposed to improve the color shift problem caused by the decay of R-micro LEDs and extend the product lifespan by improving color shift.

[0035] In this embodiment, the shortcomings of existing full-color displays are addressed by improving the RGB scheme, rather than by improving the performance of LEDs such as red LEDs. Instead, a pixel arrangement is designed, with the entire pixel circuit comprising multiple rows of pixel units 100 (refer to Figure 1). Each pixel unit 100 comprises 1-m units, and each pixel unit 100 is connected sequentially via different data lines D1-Dn. Each pixel unit 100 further comprises multiple groups of sub-pixel units 110 (refer to Figure 1). Each pixel unit 100 comprises 1-n units, and each sub-pixel unit 110 is connected sequentially via a gate driving line G1 (the first gate driving line when it is the first row of pixel units 100). Therefore, the entire pixel circuit consists of m*n groups of sub-pixel units 110, with each group of sub-pixel units 110 connected horizontally by gate driving lines and vertically by data lines. Furthermore, an arrangement design is carried out within each sub-pixel unit 110. Each sub-pixel unit 110 includes a driving circuit 10 and a sub-pixel group 20. The sub-pixel group 20 includes a first red sub-pixel R1, a green sub-pixel G, a blue sub-pixel B, and a second red sub-pixel R2. Meanwhile, the control terminal of the driving circuit 10 is connected to the gate driving line G1, the first terminal of the driving circuit 10 is connected to the data lines D1-Dn, and the second terminal of the driving circuit 10 is connected to the first red sub-pixel R1, the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2, respectively. The entire display control is further divided into odd-numbered frame display and even-numbered frame display. When displaying odd-numbered frames, the driving circuit 10 drives the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B for display. When displaying even-numbered frames, the driving circuit 10 drives the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2 for display. This allows the two red sub-pixels to work separately, thereby reducing the working time of the red sub-pixels and greatly reducing the attenuation of the red sub-pixels, thus improving the color shift problem caused by the red pixels.

[0036] This embodiment proposes a pixel circuit, pixel structure, and display panel. This application optimizes the pixel circuit, resulting in a pixel circuit comprising: multiple rows of pixel units connected sequentially via different data lines; each pixel unit includes multiple groups of sub-pixel units connected sequentially via gate driving lines; each sub-pixel unit includes a driving circuit, a first red sub-pixel, a green sub-pixel, a blue sub-pixel, and a second red sub-pixel. Because red pixels in a tri-color LED exhibit a much greater attenuation rate than green and blue pixels due to their inherent properties, leading to color shift, this application, combining the aforementioned modules, drives the first red sub-pixel, green sub-pixel, and blue sub-pixel for display during odd-numbered frame displays; and drives the green sub-pixel, blue sub-pixel, and second red sub-pixel for display during even-numbered frame displays. This reduces the usage time of the red sub-pixel, significantly decreasing its attenuation and improving the color shift problem caused by the red pixel.

[0037] Further, referring to Figure 2, which is a circuit connection diagram of an embodiment of the pixel circuit of this application.

[0038] As shown in Figure 2, in some feasible embodiments, the data lines D1-Dn include at least a first data line D1, a second data line D2, a third data line D3 and a fourth data line D4, and the driving circuit 10 includes a first thin-film transistor T1, a second thin-film transistor T2, a third thin-film transistor T3 and a fourth thin-film transistor T4.

[0039] The control terminal of the first thin-film transistor T1 is connected to the gate driving line G1, the first end of the first thin-film transistor T1 is connected to the first data line D1, and the second end of the first thin-film transistor T1 is connected to the first red sub-pixel R1. The control terminal of the second thin-film transistor T2 is connected to the gate driving line G1, the first end of the second thin-film transistor T2 is connected to the second data line D2, and the second end of the second thin-film transistor T2 is connected to the green sub-pixel G. The control terminal of the third thin-film transistor T3 is connected to the gate driving line G1, the first end of the third thin-film transistor T3 is connected to the third data line D3, and the second end of the third thin-film transistor T3 is connected to the blue sub-pixel B. The control terminal of the fourth thin-film transistor T4 is connected to the gate driving line G1, the first end of the fourth thin-film transistor T4 is connected to the fourth data line D4, and the second end of the fourth thin-film transistor T4 is connected to the second red sub-pixel R2.

[0040] Furthermore, in some feasible embodiments, the pixel circuit further includes a first electrochromic layer 30, a first control signal terminal 31, a second electrochromic layer 40, and a second control signal terminal 41. The first electrochromic layer 30 is disposed on the first red sub-pixel R1 and connected to the first control signal terminal 31, and the second electrochromic layer 40 is disposed on the second red sub-pixel R2 and connected to the second control signal terminal 41.

[0041] In this embodiment, taking the first group of sub-pixel units 110 as an example, the first thin-film transistor T1, the second thin-film transistor T2, the third thin-film transistor T3, and the fourth thin-film transistor T4 respectively control the display of the first red sub-pixel R1, the second sub-pixel G, the third sub-pixel B, and the fourth sub-pixel R2. Referring to Figure 3, which is a circuit control schematic diagram of an embodiment of the pixel circuit of this application, the arrangement of the entire first red sub-pixel R1, the second sub-pixel G, the third sub-pixel B, and the fourth sub-pixel R2 is divided into two parts for control, namely odd-numbered frames and even-numbered frames. A first electrochromic layer 30 is provided on the first red sub-pixel R1 and controlled by a first control signal terminal 31, and a second electrochromic layer 40 is provided on the second red sub-pixel R2 and controlled by a second control signal terminal 41. By forming display light-emitting units with R1 / R2 respectively through GB, the red brightness decay and lifespan reduction caused by the traditional design of using only one R sub-pixel are reduced.

[0042] It should be noted that the transistors used in all embodiments of this application can be TFTs (Thin Film Transistors), field-effect transistors, or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their source and drain are interchangeable. In the embodiments of this application, to distinguish the two poles of the transistor other than the gate, one pole is called the source and the other pole is called the drain. The characteristics of each port of the first thin film transistor T1 can be determined according to G, D, and S, where G is the gate of T1, S is the source of T1, and D is the drain of T1. The other transistors can be defined according to the configuration in Figure 2: the middle terminal of each transistor is the gate, the signal input terminal is the source, and the signal output terminal is the drain. In addition, the transistors used in the embodiments of this application can include both P-type transistors and / or N-type transistors. The P-type transistor is turned on when the gate is low and turned off when the gate is high, and the N-type transistor is turned on when the gate is high and turned off when the gate is low. The conduction modes of the first gate drive voltage Vgate and the second gate drive voltage Share_Vgate differ for N-type and P-type transistors, and the corresponding control methods also differ. The specific control method depends on the actual transistor and is not limited here.

[0043] Furthermore, in some feasible embodiments, the first thin-film transistor T1 to the third thin-film transistor T3 can be low-temperature polycrystalline silicon thin-film transistors, oxide semiconductor thin-film transistors, or amorphous silicon thin-film transistors. The transistors in the driving circuit provided in this application are all made of the same material, thereby avoiding the impact of differences between transistors of different materials on the driving circuit.

[0044] Furthermore, in some feasible embodiments, when the odd-numbered frames are displayed, the first data line D1, the second data line D2, and the third data line D3 respectively output a first data signal, and drive the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B to be displayed based on the first data signal.

[0045] In some feasible embodiments, the first control signal terminal 31 outputs a conduction control signal to control the first electrochromic layer 30 to be in a transparent state, and the second control signal terminal 41 outputs a deactivation control signal to control the second electrochromic layer 40 to be in a black state.

[0046] In this embodiment, when driven by odd-numbered frames, the first data line D1, the second data line D2, and the third data line D3 provide first data signals to the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B, respectively, forming a light-emitting pixel unit. At this time, the fourth data line D4 does not provide a signal to the second red sub-pixel R2, displaying a dark state. That is to say, at this time, the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B are displayed based on the first data signal. The first data signal refers to the data signal that controls the display of the first red sub-pixel R1, the green sub-pixel G, and the blue sub-pixel B, and can be the same or different. Simultaneously, when the first red sub-pixel R1 receives the first data signal, it illuminates, and the first electrochromic layer 30 on top of it is also powered through the first control signal terminal 31, appearing transparent. The "on" control signal is the instruction to power on the first electrochromic layer 30. The second red sub-pixel R2 does not receive a data signal and appears dark. At this time, the second electrochromic layer 40 above it is also not powered, appearing black. The "off" control signal is the instruction to de-power the second electrochromic layer 40, thus avoiding interference from internal metal reflections and other light emitters when the second red sub-pixel R2 is not working. Through different pixel designs and driving sequences, under different driving timings in odd / even frames, the GB sub-pixels use R1 or R2 respectively to form RGB three-color light-emitting units, reducing red light decay and improving product lifespan. Simultaneously, an electrochromic layer is placed above the R light-emitting layer to improve product contrast, ensuring display effectiveness and accuracy.

[0047] Furthermore, in some feasible embodiments, when the even-numbered frames are displayed, the second data line D2, the third data line D3, and the fourth data line D4 respectively output second data signals, and drive the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2 to be displayed based on the second data signals.

[0048] In some feasible embodiments, the first control signal terminal 31 outputs a shutdown control signal to control the first electrochromic layer 30 to be in a black state, and the second control signal terminal 41 outputs a conduction control signal to control the second electrochromic layer 40 to be in a transparent state.

[0049] In this embodiment, when driven by even-numbered frames, the second data line D2, the third data line D3, and the fourth data line D4 provide second data signals to the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2, respectively, forming a light-emitting pixel unit. At this time, the first data line D1 does not provide a signal to the first red sub-pixel R1, displaying a dark state. That is to say, at this time, the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2 are displayed based on the second data signal. The second data signal refers to the data signal that controls the display of the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2, and can be the same or different. Simultaneously, when the second red sub-pixel R2 receives the second data signal, it illuminates, and the second electrochromic layer 40 on top of R2 is also energized through the second control signal terminal 41, becoming transparent. The "on" control signal is the instruction to energize the second electrochromic layer 40. The first red sub-pixel R1 does not receive a data signal and remains dark. At this time, the first electrochromic layer 30 above R1 is also de-energized and appears black. The "off" control signal is the instruction to de-energize the first electrochromic layer 30, thus avoiding interference from internal metal reflections and other light emitters when the first red sub-pixel R1 is not working. Through different pixel designs and driving sequences, under different driving timings in odd / even frames, the GB sub-pixels use R1 or R2 respectively to form RGB three-color light-emitting units, reducing red light decay and improving product lifespan. Simultaneously, an electrochromic layer is placed above the R light-emitting layer to improve product contrast, ensuring display effectiveness and accuracy. At this point, by setting an electrochromic layer above R1 and R2, a certain sub-pixel becomes darker and has higher contrast in the dark state.

[0050] For example, referring to Figure 4, which is a waveform control schematic diagram of an embodiment of the pixel circuit of this application, different data signals are designed to drive the first red sub-pixel R1, green sub-pixel G, and blue sub-pixel B in odd-numbered frames, or to drive the green sub-pixel G, blue sub-pixel B, and second red sub-pixel R2 in even-numbered frames. The designed data signal voltages can be opposite in direction and equal in magnitude, as shown in Figure 4, or they can be designed in other ways, such as with different magnitudes. Furthermore, by driving with different waveforms in odd and even frames, the accuracy of the driving can be ensured, thereby improving the color shift problem caused by the red brightness decay of the red sub-pixel.

[0051] Furthermore, this application also proposes a pixel structure. Referring to FIG6, FIG6 is a schematic diagram of an embodiment of the pixel structure of this application. The pixel structure includes the pixel circuit described above, and the pixel structure includes a driving backplane 200, an encapsulation layer 300, and a plurality of electrodes 400;

[0052] The encapsulation layer 300 and the driving circuit 10 in the pixel circuit are disposed on the driving backplate 200. The first side of the first red sub-pixel R1, the first side of the green sub-pixel G, the first side of the blue sub-pixel B, and the first side of the second red sub-pixel R2 in the pixel circuit are aligned with the side of the encapsulation layer 300 away from the driving backplate and encapsulated in the encapsulation layer 300. The first red sub-pixel R1, the green sub-pixel G, the blue sub-pixel B, and the second red sub-pixel R2 are encapsulated sequentially with a first spacing. The second side of the first red sub-pixel R1, the second side of the green sub-pixel G, the second side of the blue sub-pixel B, and the second side of the second red sub-pixel R2 are respectively connected to the driving backplate 200 through the electrode 400, wherein the second side and the first side are opposite sides of the sub-pixel.

[0053] Specifically, the pixel structure further includes a first electrochromic layer 30 and a second electrochromic layer 40. The first electrochromic layer 30 is disposed on the first side of the first red sub-pixel R1, and the second electrochromic layer 40 is disposed on the first side of the second red sub-pixel R2.

[0054] In this embodiment, the pixel structure includes a driving backplate 200, an encapsulation layer 300, and multiple electrodes 400. A first red sub-pixel R1, a green sub-pixel G, a blue sub-pixel B, and a second red sub-pixel R2 are sequentially encapsulated within the encapsulation layer 300 at a first spacing. The encapsulation layer 300 is shown in a front view. It sits on the driving backplate 200 and encapsulates the electrodes 400 and each sub-pixel. The first and second sides of each sub-pixel are opposite sides. The first red sub-pixel R1 and the second red sub-pixel R2 can be identical, or they can be specifically designed based on the attenuation of the green sub-pixel G and the blue sub-pixel B. The first spacing can be a user-defined encapsulation distance. Furthermore, by designing a first electrochromic layer 30 on the first side of the first red sub-pixel R1 and a second electrochromic layer 40 on the first side of the second red sub-pixel R2, interference from internal metal reflections and other light emitters can be avoided when the pixel is not in operation, greatly improving control accuracy. Electrochromic layers can also be designed for the green sub-pixel G and the blue sub-pixel B to avoid interference. The overall structural design, combined with the control of the pixel circuit, allows the two red sub-pixels to work separately, thereby reducing the working time of the red sub-pixels and greatly reducing the attenuation of the red sub-pixels, thus improving the color shift problem caused by the red pixels.

[0055] Furthermore, this application also proposes a display panel, which includes at least an array substrate, the array substrate including the pixel structure described above. The display panel may also include the pixel structure described above. Referring to Figure 5, Figure 5 is a schematic diagram of the structure of the display panel involved in the embodiment of this application.

[0056] As shown in Figure 5, the display panel may include: a processor 1001, such as a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen and an input unit such as a keyboard; optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface). The memory 1005 may be a high-speed random access memory (RAM) or a stable non-volatile memory (NVM), such as a disk drive. The memory 1005 may also optionally be a storage device independent of the aforementioned processor 1001.

[0057] Those skilled in the art will understand that the structure shown in FIG5 does not constitute a limitation on the display panel, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0058] As shown in Figure 5, the memory 1005, which serves as a storage medium, may include an operating system, a data storage module, a network communication module, a user interface module, and a computer program.

[0059] In the display panel shown in Figure 5, the network interface 1004 is mainly used for data communication with other devices; the user interface 1003 is mainly used for data interaction with the user; the processor 1001 and the memory 1005 in this embodiment can be set in the display panel, and the display panel calls the computer program stored in the memory 1005 through the processor 1001 and controls the above-mentioned pixel circuit.

[0060] The various embodiments of the display panel in this application can be referred to the various embodiments of the pixel circuit in this application, and will not be repeated here.

[0061] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0062] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0063] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0064] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes multiple rows of pixel units connected sequentially via different data lines. Each pixel unit includes multiple groups of sub-pixel units connected sequentially via gate driving lines. Each sub-pixel unit includes a driving circuit and a sub-pixel group. The sub-pixel group includes a first red sub-pixel, a green sub-pixel, a blue sub-pixel, and a second red sub-pixel. The control terminal of the driving circuit is connected to the gate driving line. The first terminal of the driving circuit is connected to the data lines. The second terminal of the driving circuit is connected to the first red sub-pixel, the green sub-pixel, the blue sub-pixel, and the second red sub-pixel, respectively. The pixel circuit also includes a first electroluminescent... The circuit comprises a color-changing layer, a first control signal terminal, a second electrochromic layer, and a second control signal terminal. The first electrochromic layer is disposed on the first red sub-pixel and connected to the first control signal terminal. The second electrochromic layer is disposed on the second red sub-pixel and connected to the second control signal terminal. The driving circuit is used to drive the first red sub-pixel, the green sub-pixel, and the blue sub-pixel to display during odd-numbered frame displays, while the second electrochromic layer is controlled to display a black state. During even-numbered frame displays, the circuit drives the green sub-pixel, the blue sub-pixel, and the second red sub-pixel to display, while the first electrochromic layer is controlled to display a black state.

2. The pixel circuit as described in claim 1, characterized in that, The data lines include at least a first data line, a second data line, a third data line, and a fourth data line. The driving circuit includes a first thin-film transistor (TFT), a second thin-film transistor (TFT), a third thin-film transistor (TFT), and a fourth thin-film transistor (TFT). The control terminal of the first TFT is connected to the gate driving line. The first end of the first TFT is connected to the first data line. The second end of the first TFT is connected to the first red sub-pixel. The control terminal of the second TFT is connected to the gate driving line. The first end of the second TFT is connected to the second data line. The second end of the second TFT is connected to the green sub-pixel. The control terminal of the third TFT is connected to the gate driving line. The first end of the third TFT is connected to the third data line. The second end of the third TFT is connected to the blue sub-pixel. The control terminal of the fourth TFT is connected to the gate driving line. The first end of the fourth TFT is connected to the fourth data line. The second end of the fourth TFT is connected to the second red sub-pixel.

3. The pixel circuit as described in claim 2, characterized in that, When the odd-numbered frames are displayed, the first data line, the second data line, and the third data line respectively output a first data signal, and drive the first red sub-pixel, the green sub-pixel, and the blue sub-pixel to be displayed based on the first data signal.

4. The pixel circuit as described in claim 3, characterized in that, The first control signal terminal outputs a conduction control signal to control the first electrochromic layer to be in a transparent state, and the second control signal terminal outputs a deactivation control signal to control the second electrochromic layer to be in a black state.

5. The pixel circuit as described in claim 2, characterized in that, When the even-numbered frames are displayed, the second data line, the third data line, and the fourth data line respectively output the second data signal, and drive the green sub-pixel, the blue sub-pixel, and the second red sub-pixel to be displayed based on the second data signal.

6. The pixel circuit as described in claim 5, characterized in that, The first control signal terminal outputs a shutdown control signal to control the first electrochromic layer to be in a black state, and the second control signal terminal outputs a conduction control signal to control the second electrochromic layer to be in a transparent state.

7. A pixel structure, characterized in that, The pixel structure includes a pixel circuit as described in any one of claims 1-6, the pixel structure including a driving backplane, an encapsulation layer and a plurality of electrodes; the encapsulation layer and the driving circuit in the pixel circuit are disposed on the driving backplane, the first side of the first red sub-pixel, the first side of the green sub-pixel, the first side of the blue sub-pixel and the first side of the second red sub-pixel in the pixel circuit are aligned with the side of the encapsulation layer away from the driving backplane and encapsulated in the encapsulation layer, the first red sub-pixel, the green sub-pixel, the blue sub-pixel and the second red sub-pixel are encapsulated sequentially with a first spacing, the second side of the first red sub-pixel, the second side of the green sub-pixel, the second side of the blue sub-pixel and the second side of the second red sub-pixel are respectively connected to the driving backplane through the electrodes, wherein the second side and the first side are opposite sides of the sub-pixel.

8. The pixel structure according to claim 7, characterized in that, The pixel structure further includes a first electrochromic layer and a second electrochromic layer, wherein the first electrochromic layer is disposed on a first side of the first red sub-pixel, and the second electrochromic layer is disposed on a first side of the second red sub-pixel.

9. A display panel, characterized in that, The display panel includes an array substrate, which includes the pixel structure as described in any one of claims 7-8.

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