Quantum circuit simulation method, device and electronic equipment

Abstract

The present disclosure provides a quantum circuit simulation method, device and electronic device, which relates to the field of quantum computing technology, and specifically to the field of quantum circuit technology. The specific implementation scheme is: obtaining the first structural information of the first quantum circuit; based on the first structural information, determining the first tensor representation of the initial quantum state of a target quantum bit in the first quantum circuit; taking the target quantum bit as the starting quantum bit, sequentially based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit, judging the processing method of the first quantum state, and based on the judgment result and the tensor representation of the first quantum state, tensor contraction and merging of the first quantum state and the quantum gate in the first quantum circuit are performed to obtain the simulation result of the first quantum circuit; the judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded.

Description

Technical Field

[0001] The present disclosure relates to the field of quantum computing technology, in particular to the field of quantum circuit technology, and specifically to a quantum circuit simulation method, device and electronic equipment. Background Art

[0002] Quantum computing has shown great potential and advantages in computing speed and security due to its characteristics such as quantum superposition, quantum entanglement, and quantum interference. With the rapid development of the field of quantum computing, not only has significant progress been made in theoretical research, but also major breakthroughs have been made in hardware implementation. These advances have laid a solid foundation for the practical application and industrialization of quantum computing, heralding a new scientific and technological revolution. The potential impact of this revolution will extend to various fields, from information security to materials science, to pharmaceuticals and artificial intelligence, and so on.

[0003] In this era, quantum circuit simulation has become one of the important technologies in the field of quantum computing. Quantum circuit simulation not only helps simulate the behavior of quantum systems, but also provides an important testing and verification platform for the development of quantum computers. On a theoretical level, quantum circuit simulation enables researchers to verify the correctness and efficiency of quantum algorithms and ensure their usability in practical applications. At the same time, quantum circuit simulation also provides key tools and methods for exploring the potential applications of quantum computing, promoting scientific research and technological innovation in a wider range of fields.

[0004] In related technologies, during the quantum circuit simulation process, a complete quantum state tensor of the quantum circuit is usually constructed first, and then the quantum state is updated as the evolution of the quantum circuit simulation progresses. Summary of the invention

[0005] The present disclosure provides a quantum circuit simulation method, device and electronic device.

[0006] According to a first aspect of the present disclosure, a quantum circuit simulation method is provided, comprising:

[0007] Acquiring first structural information of a first quantum circuit;

[0008] Determining a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information;

[0009] Taking the target quantum bit as the starting quantum bit, judging the processing method of the first quantum state based on the quantum bits of the first quantum state and the active bits of the quantum gate in the first quantum circuit in the simulation process of the first quantum circuit, and performing tensor contraction on the first quantum state and the quantum gate in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state to obtain the simulation result of the first quantum circuit;

[0010] Among them, the judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded. When the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit.

[0011] According to a second aspect of the present disclosure, there is provided a quantum circuit simulation device, comprising:

[0012] An acquisition module, used to acquire first structural information of a first quantum circuit;

[0013] A determination module, configured to determine a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information;

[0014] A judgment module, configured to use the target quantum bit as a starting quantum bit and to judge a processing method of the first quantum state based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit in sequence;

[0015] A tensor contraction module, configured to perform tensor contraction on the first quantum state and the quantum gate in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state, so as to obtain a simulation result of the first quantum circuit;

[0016] Among them, the judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded. When the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit.

[0017] According to a third aspect of the present disclosure, there is provided an electronic device, including:

[0018] at least one processor; and

[0019] a memory communicatively connected to at least one processor; wherein,

[0020] The memory stores instructions that can be executed by at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform any method in the first aspect.

[0021] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to cause a computer to execute any one of the methods in the first aspect.

[0022] According to a fifth aspect of the present disclosure, a computer program product is provided, comprising a computer program, which implements any one of the methods in the first aspect when executed by a processor.

[0023] The technology disclosed in the present invention solves the problem of relatively low efficiency of quantum circuit simulation in the related art.

[0024] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.

[0026] Figure 1 is a flowchart of a quantum circuit simulation method according to the first embodiment of the present disclosure;

[0027] Figure 2 This is a schematic diagram of the equivalent process of exchanging different quantum gates;

[0028] Figure 3 This is a complete flowchart of an example quantum circuit simulation method;

[0029] Figure 4 is a schematic structural diagram of a quantum circuit simulation device according to a second embodiment of the present disclosure;

[0030] Figure 5 is a schematic block diagram of an example electronic device for implementing an embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0032] First embodiment

[0033] like Figure 1 As shown, the present disclosure provides a quantum circuit simulation method, comprising the following steps:

[0034] Step S101: Acquire first structural information of a first quantum circuit.

[0035] In this embodiment, the quantum circuit simulation method relates to the field of quantum computing technology, and in particular to the field of quantum circuit technology. It can be widely used in quantum circuit simulation scenarios and has potential impacts on practical applications of quantum computing, such as information security, material science, pharmaceuticals, and artificial intelligence. The quantum circuit simulation method of the disclosed embodiment can be performed by the quantum circuit simulation device of the disclosed embodiment. The quantum circuit simulation device of the disclosed embodiment can be configured in any electronic device to perform the quantum circuit simulation method of the disclosed embodiment.

[0036] In related technologies, quantum circuit simulation usually represents quantum circuits as tensor networks to effectively describe the structure of complex quantum circuits; then, the computational cost is reduced by selecting an appropriate tensor network contraction order; and tensor contraction is performed step by step according to the tensor network contraction order to complete the computational process of quantum circuit simulation.

[0037] However, this quantum circuit simulation method has a key limitation, that is, a quantum state tensor equal to the quantum bit scale of the quantum circuit is constructed from the beginning, and this quantum state is updated as the quantum circuit simulation progresses. In this way, each quantum state and quantum gate calculation during the simulation process needs to process the contraction and merging of high-dimensional tensors, which requires a huge amount of memory to store quantum state information, resulting in resource consumption. At the same time, the update of high-dimensional quantum states also requires a long computing time, making the simulation efficiency of quantum circuits low.

[0038] The purpose of this embodiment is to propose a quantum circuit simulation scheme for progressively expanding the quantum state tensor, so as to dynamically adjust the quantum state scale according to the quantum circuit structure, thereby improving the simulation efficiency of the quantum circuit.

[0039] The first structural information may be a circuit diagram of the first quantum circuit, or a list of operation instructions of the first quantum circuit, or other information that can express the structure of the first quantum circuit, such as a tensor network of the first quantum circuit, which is not specifically limited here. The first structural information may indicate that the first quantum circuit includes M quantum bits and N quantum gates, and the arrangement order of the quantum bits of the M quantum bits and the N quantum gates, where M and N are both positive integers.

[0040] The first structure information of the first quantum circuit generated by a device or input by a user may be obtained, or the first structure information of the first quantum circuit sent by other devices may be received, which is not specifically limited here.

[0041] Step S102: Based on the first structural information, determine a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit.

[0042] In some embodiments, the target quantum bit may be any quantum bit in the first quantum circuit; it may also be the quantum bit of the first quantum gate in the first quantum circuit, and the quantum bit may also be the active bit with the highest coverage of the first quantum gate.

[0043] Among them, the coverage rate can reflect the number of quantum gates acted by the quantum bit. The more quantum gates acted by the quantum bit, the greater the coverage rate of the quantum bit. Conversely, the fewer quantum gates acted by the quantum bit, the smaller the coverage rate of the quantum bit. For example, for a quantum circuit, which includes 4 quantum gates, if a quantum bit acts on two two-qubit gates, the coverage rate of the quantum bit can be 50%, and if it acts on three two-qubit gates, the coverage rate of the quantum bit can be 75%.

[0044] In other embodiments, the target quantum bit may be a quantum bit of the first quantum gate in a second quantum circuit equivalent to the first quantum circuit. The second quantum circuit is a quantum circuit obtained by rearranging the execution order of the quantum gates based on the first structural information of the first quantum circuit using a quantum circuit rearrangement technique. The target quantum gates in the second quantum circuit are arranged more tightly than the target quantum gates in the first quantum circuit, and the coverage of the action bits between the target quantum gates is greater than or equal to the coverage of the action bits between other quantum gates in the second quantum circuit.

[0045] The initial quantum state of the target quantum bit can be a zero state, that is, |0>, and the first tensor represents a 1st-order tensor that can be a zero state.

[0046] Step S103: Taking the target quantum bit as the starting quantum bit, judging the processing method of the first quantum state based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit.

[0047] Step S104: Based on the judgment result and the tensor representation of the first quantum state, tensor contraction is performed on the first quantum state and the quantum gates in the first quantum circuit to obtain a simulation result of the first quantum circuit.

[0048] Among them, the judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded. When the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit.

[0049] In step S103 and step S104, the target quantum bit can be used as the starting quantum bit, and the quantum gate and its active bit currently simulated in the first quantum circuit can be obtained in sequence according to a preset order. Based on the current quantum state, i.e., the quantum bit of the first quantum state and the active bit of the quantum gate, the processing method of the first quantum state is judged, and based on the judgment result and the tensor representation of the first quantum state, the first quantum state and the quantum gate are tensor-contracted to update the first quantum state, until the quantum gate processing in the first quantum circuit is completed, and the simulation result of the first quantum circuit can be obtained. Wherein, when the first quantum circuit starts simulating, the first quantum state is the initial quantum state, and the quantum bit of the initial quantum state is the target quantum bit.

[0050] The preset order may be the execution order of quantum gates in the first quantum circuit, or the execution order of quantum gates in the second quantum circuit equivalent to the first quantum circuit, which is not specifically limited here.

[0051] There are two kinds of judgment results. One kind indicates that the dimension of the tensor representation of the current quantum state, i.e., the first quantum state, needs to be expanded, and after the dimension of the tensor representation of the first quantum state is expanded, tensor contraction is performed based on the tensor representation after the dimension expansion. The other kind indicates that the dimension of the tensor representation of the first quantum state does not need to be expanded, and tensor contraction can be performed directly based on the tensor representation of the first quantum state.

[0052] In step S103, it can be determined whether the quantum bits of the current quantum state include all the active bits of the current quantum gate to judge the processing method of the current quantum state. If the quantum bits of the current quantum state include all the active bits of the current quantum gate, it is determined that the dimension of the tensor representation of the current quantum state, i.e., the first quantum state, does not need to be expanded. If the quantum bits of the current quantum state do not include all the active bits of the current quantum gate, it is determined that the dimension of the tensor representation of the current quantum state, i.e., the first quantum state, needs to be expanded.

[0053] In this embodiment, the initial quantum state of the quantum circuit is initialized as a quantum state tensor of a single quantum bit; the target quantum bit is used as the starting quantum bit, and the processing method of the first quantum state is judged based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit, allowing the quantum state tensor to be gradually expanded, and when necessary, a new dimension is introduced into the quantum state to dynamically expand the dimension of the quantum state tensor. In this way, the quantum state tensor can be expanded gradually, reducing resource requirements and reducing the computational complexity in the quantum circuit.

[0054] It is flexible and efficient. It can dynamically increase the scale of the system during the simulation process to adapt to problems of different scales, and dynamically adjust the scale of the quantum state according to the quantum circuit structure, thereby improving the simulation efficiency of the quantum circuit. It is particularly suitable for simulating large-scale quantum circuits and helps to accelerate the simulation process. At the same time, it can reduce memory requirements to a certain extent and help design parallel solutions to further improve the simulation efficiency of quantum circuits.

[0055] Accordingly, when the simulation result of the first quantum circuit is obtained, a quantum state measurement can be performed based on the simulation result to determine the task result of the quantum computing task performed by the first quantum circuit. The quantum computing task can be a task such as quantum communication, quantum computing protocol, quantum key distribution protocol, etc.

[0056] Optionally, the step S102 specifically includes:

[0057] Based on the first structure information, the execution order of the quantum gates in the first quantum circuit is rearranged to obtain second structure information of a second quantum circuit equivalent to the first quantum circuit, wherein the arrangement density of the target quantum gates in the second quantum circuit is higher than the arrangement density of the target quantum gates in the first quantum circuit, and the coverage rate of the action bits between the target quantum gates is greater than or equal to the coverage rate of the action bits between other quantum gates in the second quantum circuit;

[0058] Based on the second structural information, a first tensor representation of an initial quantum state of the target quantum bit is determined, where the target quantum bit is a quantum bit of one of the first quantum gates in the second quantum circuit.

[0059] In this embodiment, preprocessing, i.e., quantum circuit rearrangement, can be performed based on the first structural information. The core goal is to arrange quantum gates with high bit coverage together by rearranging the execution order of quantum gate operations, that is, to arrange quantum gates that act on the same target quantum bit together.

[0060] There are many ways to achieve quantum circuit rearrangement, such as heuristic algorithms based on directed acyclic graphs (DAGs), optimization algorithms based on combinatorial optimization, etc.

[0061] Afterwards, the first quantum gate in the second quantum circuit can be determined based on the second structural information, and one of the quantum bits of the first quantum gate in the second quantum circuit can be selected as the target quantum bit, and the first tensor representation of the initial quantum state of the target quantum bit can be obtained accordingly.

[0062] In this way, quantum circuit rearrangement technology can be used to optimize the quantum circuit structure, so that the quantum state can be kept in a low-dimensional quantum state for quantum circuit simulation, so as to better play the advantages of progressive quantum state tensor expansion and further improve the simulation efficiency of quantum circuits. In addition, by combining quantum circuit rearrangement with dynamic expansion of quantum state dimensions, the scope of application of quantum circuit simulation can be further expanded.

[0063] Optionally, in the second quantum circuit, the execution order of the target quantum gate is before other quantum gates in the second quantum circuit.

[0064] The commutativity of quantum gates can be used to perform the exchange of different quantum gates to put the execution order of the target quantum gate before other quantum gates in the second quantum circuit, such as Figure 2 As shown, the U gate and the V gate can be exchanged. After the exchange, the two quantum circuits are equivalent, which can improve the effect of quantum circuit rearrangement. It can not only keep the quantum state in a low-dimensional quantum state for quantum circuit simulation, but also smoothly expand the quantum state dimension during the simulation process, further improving the simulation efficiency of the quantum circuit.

[0065] Optionally, the target quantum bit is a quantum bit in the first quantum gate having the highest coverage with other quantum gates in the second quantum circuit.

[0066] In this way, the quantum state dimension can be expanded more smoothly during the simulation process, further improving the simulation efficiency of the quantum circuit.

[0067] Optionally, the step S103 specifically includes:

[0068] Obtaining an intersection of a quantum bit of the first quantum state and an action bit of a quantum gate currently simulated in the first quantum circuit, wherein the first quantum state is obtained by taking the target quantum bit as a starting quantum bit and performing tensor contraction based on the initial quantum state and a quantum gate previously simulated in the first quantum circuit;

[0069] Based on the intersection and the active bit of the currently simulated quantum gate, a processing method of the first quantum state is judged to obtain a judgment result.

[0070] In this way, by comparing the intersection of the quantum bit of the first quantum state and the action bit of the currently simulated quantum gate with the action bit of the quantum gate, it is possible to simply determine the processing method of the first quantum state.

[0071] Optionally, judging a processing method of the first quantum state based on the intersection and an action bit of a currently simulated quantum gate to obtain a judgment result includes:

[0072] In a case where the quantum bit in the intersection is the same as the action bit of the currently simulated quantum gate, determining that the judgment result indicates that the dimension of the tensor representation of the first quantum state is not to be expanded;

[0073] In a case where the quantum bit in the intersection is different from the action bit of the currently simulated quantum gate, it is determined that the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded.

[0074] In this way, the processing method of the first quantum state can be easily determined.

[0075] Optionally, the step S104 specifically includes:

[0076] When the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded, obtaining a relative complement of the quantum bits of the first quantum state and the action bits of the currently simulated quantum gate;

[0077] Based on the relative complement, the dimension of the tensor representation of the first quantum state is expanded to obtain a second tensor representation;

[0078] A tensor contraction of the quantum state and the quantum gate is performed based on the second tensor representation and the tensor representation of the currently simulated quantum gate.

[0079] Calculate the quantum bit of the current quantum state |ψ> The bit that interacts with the current quantum gate The relative complement T of expands the current quantum state dimension based on the following formula (1).

[0080]

[0081] In the case where the tensor representation dimension of the first quantum state is expanded, the tensor contraction of the quantum state and the quantum gate is performed based on the expanded second tensor representation and the tensor representation of the quantum gate to simulate the evolution of the quantum gate. In this way, the tensor contraction of the first quantum state and the quantum gate in the first quantum circuit can be realized according to the judgment result to realize the simulation of the quantum gate in the quantum circuit.

[0082] Optionally, obtaining the simulation result of the first quantum circuit includes:

[0083] When the quantum gate simulation is completed in the first quantum circuit and the dimension of the tensor representation of the second quantum state obtained by tensor contraction is smaller than the target dimension, the dimension of the tensor representation of the second quantum state is expanded to the target dimension to obtain the simulation result of the first quantum circuit;

[0084] The target dimension is determined based on the number of quantum bits in the first quantum circuit.

[0085] After processing all quantum gates, we can get the quantum final state |φ> and its corresponding quantum bits, and expand the quantum state to the target dimension 2 M , that is, an M-order tensor, where M is the number of quantum bits in the first quantum circuit, so that the simulation result of the first quantum circuit can be obtained and the simulation of the quantum circuit can be realized.

[0086] Optionally, obtaining the simulation result of the quantum circuit includes:

[0087] When the quantum gate simulation is completed in the first quantum circuit, the tensor representation of the quantum state obtained by tensor contraction is subjected to an axis shift operation with the standard arrangement order of quantum bits as the target index order to obtain the simulation result, wherein the standard arrangement order is to sort the quantum bits of the quantum bits from small to large starting from quantum bit 0.

[0088] In this way, by adjusting the quantum bit arrangement order of the quantum state, the quantum bit arrangement order can be standardized, the simulation result of the first quantum circuit can be obtained, and the simulation of the quantum circuit can be realized.

[0089] The specific process of the quantum circuit simulation method of this embodiment is described in detail below with specific examples. Figure 3 As shown:

[0090] Step 301: input a quantum circuit including M quantum bits and N quantum gates;

[0091] Step 302: perform preprocessing, i.e., rearrange the quantum circuit so that quantum gates with high action bit coverage are arranged together to obtain an equivalent quantum circuit;

[0092] Step 303: Initialize the quantum state corresponding to the quantum circuit as a 1st-order tensor, and set its corresponding quantum bit as one of the active bits of the first quantum gate in the quantum circuit;

[0093] Step 304: when the quantum gate in the quantum circuit has not been processed, obtain the current quantum gate tensor and its action bit;

[0094] Step 305: Calculate the intersection of the quantum bit of the current quantum state and the action bit of the quantum gate;

[0095] Step 306: Determine whether the quantum state tensor needs to be expanded; if the intersection is the same as the action bit of the quantum gate, then expansion is not required, and step 309 is executed; if the intersection is different from the action bit of the quantum gate, then expansion is required, and step 307 is executed;

[0096] Step 307: Calculate the relative complement of the quantum bit of the current quantum state and the action bit of the current quantum gate;

[0097] Step 308: Expand the current quantum state based on the relative complement;

[0098] Step 309: Calculate the tensor contraction of the quantum state and the quantum gate;

[0099] Step 310: After processing all quantum gates, obtain the quantum final state and its corresponding quantum bits; expand the quantum state to the target dimension, and perform a tensor axis shift operation on the quantum state to restore the standard arrangement order of the quantum bits.

[0100] Second embodiment

[0101] like Figure 4 As shown, the present disclosure provides a quantum circuit simulation device 400, comprising:

[0102] An acquisition module 401 is used to acquire first structural information of a first quantum circuit;

[0103] A determination module 402 is used to determine a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information;

[0104] A judgment module 403 is used to judge the processing method of the first quantum state based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit, taking the target quantum bit as the starting quantum bit;

[0105] A tensor contraction module 404 is used to perform tensor contraction on the first quantum state and the quantum gate in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state to obtain a simulation result of the first quantum circuit;

[0106] Among them, the judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded. When the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit.

[0107] Optionally, the determining module 402 is specifically configured to:

[0108] Based on the first structure information, the execution order of the quantum gates in the first quantum circuit is rearranged to obtain second structure information of a second quantum circuit equivalent to the first quantum circuit, wherein the arrangement density of the target quantum gates in the second quantum circuit is higher than the arrangement density of the target quantum gates in the first quantum circuit, and the coverage rate of the action bits between the target quantum gates is greater than or equal to the coverage rate of the action bits between other quantum gates in the second quantum circuit;

[0109] Based on the second structural information, a first tensor representation of an initial quantum state of the target quantum bit is determined, where the target quantum bit is a quantum bit of one of the first quantum gates in the second quantum circuit.

[0110] Optionally, in the second quantum circuit, the execution order of the target quantum gate is before other quantum gates in the second quantum circuit.

[0111] Optionally, the target quantum bit is a quantum bit in the first quantum gate having the highest coverage with other quantum gates in the second quantum circuit.

[0112] Optionally, the judging module 403 includes:

[0113] A first acquisition unit is used to acquire the intersection of the quantum bit of the first quantum state and the action bit of the quantum gate currently simulated in the first quantum circuit, wherein the first quantum state is obtained by taking the target quantum bit as the starting quantum bit and performing tensor contraction based on the initial quantum state and the quantum gate previously simulated in the first quantum circuit;

[0114] A judgment unit is used to judge the processing method of the first quantum state based on the intersection and the action bit of the currently simulated quantum gate to obtain a judgment result.

[0115] Optionally, the judging unit is specifically configured to:

[0116] In a case where the quantum bit in the intersection is the same as the action bit of the currently simulated quantum gate, determining that the judgment result indicates that the dimension of the tensor representation of the first quantum state is not to be expanded;

[0117] In a case where the quantum bit in the intersection is different from the action bit of the currently simulated quantum gate, it is determined that the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded.

[0118] Optionally, the tensor shrinking module 404 includes:

[0119] A second acquisition unit is used to acquire a relative complement of the quantum bits of the first quantum state and the action bits of the currently simulated quantum gate when the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded;

[0120] A first expansion unit, configured to expand the dimension of the tensor representation of the first quantum state based on the relative complement to obtain a second tensor representation;

[0121] A tensor contraction unit is used to perform tensor contraction of quantum states and quantum gates based on the second tensor representation and the tensor representation of the currently simulated quantum gate.

[0122] Optionally, the tensor shrinking module 404 includes:

[0123] A second expansion unit is used to expand the dimension of the tensor representation of the second quantum state to the target dimension when the quantum gate simulation is completed in the first quantum circuit and the dimension of the tensor representation of the second quantum state obtained by tensor contraction is smaller than the target dimension, so as to obtain the simulation result of the first quantum circuit;

[0124] The target dimension is determined based on the number of quantum bits in the first quantum circuit.

[0125] Optionally, the tensor shrinking module 404 includes:

[0126] The axis shifting operation unit is used to perform an axis shifting operation on the tensor representation of the quantum state obtained by tensor contraction and merging, taking the standard arrangement order of quantum bits as the target index order, to obtain the simulation result when the quantum gate simulation in the first quantum circuit is completed, wherein the standard arrangement order starts from quantum bit 0 and is arranged in ascending order according to the quantum bits of the quantum bits.

[0127] The quantum circuit simulation device 400 provided in the present disclosure can implement each process implemented by the quantum circuit simulation method embodiment and can achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0128] In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision and disclosure of user personal information involved are in compliance with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0129] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.

[0130] Figure 5 A schematic block diagram of an example electronic device that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.

[0131] like Figure 5 As shown, the device 500 includes a computing unit 501, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 502 or a computer program loaded from a storage unit 508 into a random access memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the device 500 can also be stored. The computing unit 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0132] A number of components in the device 500 are connected to the I / O interface 505, including: an input unit 506, such as a keyboard, a mouse, etc.; an output unit 507, such as various types of displays, speakers, etc.; a storage unit 508, such as a disk, an optical disk, etc.; and a communication unit 509, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0133] The computing unit 501 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 501 performs the various methods and processes described above, such as the quantum circuit simulation method. For example, in some embodiments, the quantum circuit simulation method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 508. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the computing unit 501, one or more steps of the quantum circuit simulation method described above may be performed. Alternatively, in other embodiments, the computing unit 501 may be configured to perform the quantum circuit simulation method in any other appropriate manner (e.g., by means of firmware).

[0134] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0135] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0136] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0137] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0138] The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0139] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, a server of a distributed system, or a server combined with a blockchain.

[0140] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.

[0141] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A quantum circuit simulation method, comprising: Acquiring first structural information of a first quantum circuit; Determining a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information; Taking the target quantum bit as the starting quantum bit, judging the processing method of the first quantum state based on the quantum bits of the first quantum state and the active bits of the quantum gate in the first quantum circuit in the simulation process of the first quantum circuit, and performing tensor contraction on the first quantum state and the quantum gate in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state to obtain the simulation result of the first quantum circuit; The judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded, and when the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit; Based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit, a processing method of the first quantum state is judged, including: when the quantum bits of the first quantum state include all the active bits of the current quantum gate, it is determined that the dimension of the tensor representation of the first quantum state is not expanded; when the quantum bits of the first quantum state do not include all the active bits of the current quantum gate, it is determined that the dimension of the tensor representation of the first quantum state is expanded.

2. The method according to claim 1, wherein: Determining a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information includes: Based on the first structure information, the execution order of the quantum gates in the first quantum circuit is rearranged to obtain second structure information of a second quantum circuit equivalent to the first quantum circuit, wherein the arrangement density of the target quantum gates in the second quantum circuit is higher than the arrangement density of the target quantum gates in the first quantum circuit, and the coverage rate of the action bits between the target quantum gates is greater than or equal to the coverage rate of the action bits between other quantum gates in the second quantum circuit; Based on the second structural information, a first tensor representation of an initial quantum state of the target quantum bit is determined, where the target quantum bit is a quantum bit of one of the first quantum gates in the second quantum circuit.

3. The method according to claim 2, wherein: In the second quantum circuit, the target quantum gate is executed before other quantum gates in the second quantum circuit.

4. The method according to claim 2, wherein: The target quantum bit is the quantum bit with the highest coverage rate between the first quantum gate and other quantum gates in the second quantum circuit.

5. The method according to claim 1, wherein: The method of determining the processing method of the first quantum state based on the target quantum bit as the starting quantum bit and the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit comprises: Obtaining an intersection of a quantum bit of the first quantum state and an action bit of a quantum gate currently simulated in the first quantum circuit, wherein the first quantum state is obtained by taking the target quantum bit as a starting quantum bit and performing tensor contraction based on the initial quantum state and a quantum gate previously simulated in the first quantum circuit; Based on the intersection and the active bit of the currently simulated quantum gate, a processing method of the first quantum state is judged to obtain a judgment result.

6. The method according to claim 5, wherein: The step of judging the processing method of the first quantum state based on the intersection and the action bit of the currently simulated quantum gate to obtain a judgment result includes: In a case where the quantum bit in the intersection is the same as the action bit of the currently simulated quantum gate, determining that the judgment result indicates that the dimension of the tensor representation of the first quantum state is not to be expanded; In a case where the quantum bit in the intersection is different from the action bit of the currently simulated quantum gate, it is determined that the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded.

7. The method according to claim 1, wherein: The step of performing tensor contraction on the first quantum state and the quantum gates in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state includes: When the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded, obtaining a relative complement of the quantum bits of the first quantum state and the action bits of the currently simulated quantum gate; Based on the relative complement, the dimension of the tensor representation of the first quantum state is expanded to obtain a second tensor representation; A tensor contraction of the quantum state and the quantum gate is performed based on the second tensor representation and the tensor representation of the currently simulated quantum gate.

8. The method according to claim 1, wherein: The obtaining of the simulation result of the first quantum circuit includes: When the quantum gate simulation is completed in the first quantum circuit and the dimension of the tensor representation of the second quantum state obtained by tensor contraction is smaller than the target dimension, the dimension of the tensor representation of the second quantum state is expanded to the target dimension to obtain the simulation result of the first quantum circuit; The target dimension is determined based on the number of quantum bits in the first quantum circuit.

9. The method according to claim 1 or 8, wherein: The obtaining of the simulation result of the quantum circuit comprises: When the quantum gate simulation is completed in the first quantum circuit, the tensor representation of the quantum state obtained by tensor contraction is subjected to an axis shift operation with the standard arrangement order of quantum bits as the target index order to obtain the simulation result, wherein the standard arrangement order is to sort the quantum bits of the quantum bits from small to large starting from quantum bit 0.

10. A quantum circuit simulation device, comprising: An acquisition module, used to acquire first structural information of a first quantum circuit; A determination module, configured to determine a first tensor representation of an initial quantum state of a target quantum bit in the first quantum circuit based on the first structural information; A judgment module, configured to use the target quantum bit as a starting quantum bit and to judge a processing method of the first quantum state based on the quantum bits of the first quantum state in the simulation process of the first quantum circuit and the active bits of the quantum gate in the first quantum circuit in sequence; A tensor contraction module, configured to perform tensor contraction on the first quantum state and the quantum gate in the first quantum circuit based on the judgment result and the tensor representation of the first quantum state, so as to obtain a simulation result of the first quantum circuit; The judgment result is used to indicate whether the dimension of the tensor representation of the first quantum state is expanded, and when the first quantum state is the initial quantum state, the tensor representation of the first quantum state is the first tensor representation, and the simulation result is used to determine the task result of the quantum computing task performed by the first quantum circuit; The judgment module is specifically used to determine that the dimension of the tensor representation of the first quantum state is not expanded when the quantum bits in the first quantum state contain all the active bits of the current quantum gate, and that the dimension of the tensor representation of the first quantum state is expanded when the quantum bits in the first quantum state do not contain all the active bits of the current quantum gate.

11. The device according to claim 10, wherein: The determining module is specifically used for: Based on the first structure information, the execution order of the quantum gates in the first quantum circuit is rearranged to obtain second structure information of a second quantum circuit equivalent to the first quantum circuit, wherein the arrangement density of the target quantum gates in the second quantum circuit is higher than the arrangement density of the target quantum gates in the first quantum circuit, and the coverage rate of the action bits between the target quantum gates is greater than or equal to the coverage rate of the action bits between other quantum gates in the second quantum circuit; Based on the second structural information, a first tensor representation of an initial quantum state of the target quantum bit is determined, where the target quantum bit is a quantum bit of one of the first quantum gates in the second quantum circuit.

12. The device according to claim 11, wherein In the second quantum circuit, the target quantum gate is executed before other quantum gates in the second quantum circuit.

13. The device according to claim 11, wherein: The target quantum bit is the quantum bit with the highest coverage rate between the first quantum gate and other quantum gates in the second quantum circuit.

14. The device according to claim 10, wherein: The judging module comprises: A first acquisition unit is used to acquire the intersection of the quantum bit of the first quantum state and the action bit of the quantum gate currently simulated in the first quantum circuit, wherein the first quantum state is obtained by taking the target quantum bit as the starting quantum bit and performing tensor contraction based on the initial quantum state and the quantum gate previously simulated in the first quantum circuit; A judgment unit is used to judge the processing method of the first quantum state based on the intersection and the action bit of the currently simulated quantum gate to obtain a judgment result.

15. The device according to claim 14, wherein: The judging unit is specifically used for: In a case where the quantum bit in the intersection is the same as the action bit of the currently simulated quantum gate, determining that the judgment result indicates that the dimension of the tensor representation of the first quantum state is not to be expanded; In a case where the quantum bit in the intersection is different from the action bit of the currently simulated quantum gate, it is determined that the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded.

16. The device according to claim 10, wherein: The tensor shrinking module comprises: A second acquisition unit is used to acquire a relative complement of the quantum bits of the first quantum state and the action bits of the currently simulated quantum gate when the judgment result indicates that the dimension of the tensor representation of the first quantum state is expanded; A first expansion unit, configured to expand the dimension of the tensor representation of the first quantum state based on the relative complement to obtain a second tensor representation; A tensor contraction unit is used to perform tensor contraction of quantum states and quantum gates based on the second tensor representation and the tensor representation of the currently simulated quantum gate.

17. The device according to claim 10, wherein: The tensor shrinking module comprises: A second expansion unit is used to expand the dimension of the tensor representation of the second quantum state to the target dimension when the quantum gate simulation is completed in the first quantum circuit and the dimension of the tensor representation of the second quantum state obtained by tensor contraction is smaller than the target dimension, so as to obtain the simulation result of the first quantum circuit; The target dimension is determined based on the number of quantum bits in the first quantum circuit.

18. The device according to claim 10 or 17, wherein: The tensor shrinking module comprises: The axis shifting operation unit is used to perform an axis shifting operation on the tensor representation of the quantum state obtained by tensor contraction and merging, taking the standard arrangement order of quantum bits as the target index order, to obtain the simulation result when the quantum gate simulation in the first quantum circuit is completed, wherein the standard arrangement order starts from quantum bit 0 and is arranged in ascending order according to the quantum bits of the quantum bits.

19. An electronic device comprising: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 9.

20. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1-9.

21. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 9.

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