Micro-machined ultrasonic transducer structure with dual PMUTs and method of manufacturing the same

Abstract

The present application relates to a kind of micromechanical ultrasonic transducer structures and its manufacturing method, the micromechanical ultrasonic transducer structure includes PMUT unit, including PMUT bearing layer and the first PMUT and second PMUT of PMUT bearing layer, each PMUT includes first electrode layer, second electrode layer and piezoelectric layer, wherein: the piezoelectric coefficient of the piezoelectric layer of first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of second PMUT, and the dielectric constant of the piezoelectric layer of first PMUT is lower than the dielectric constant of the piezoelectric layer of second PMUT.Further, first PMUT and second PMUT are respectively arranged on the two sides of PMUT bearing layer.The present application also relates to an electronic device comprising the above-mentioned micromechanical ultrasonic transducer structure.

Description

Technical Field

[0001] The embodiments of the present invention relate to the semiconductor field, and more particularly to a micromechanical ultrasonic transducer structure with a carrier layer provided with dual PMUTs (Piezoelectric micromachined ultrasonic transducers, PMUTs) and a method for manufacturing the same, and an electronic device having the micromechanical ultrasonic transducer structure. Background Technology

[0002] Ultrasonic transducers, as electroacoustic components, are widely used in production and daily life. They emit ultrasonic waves into the external environment and receive the reflected waves, converting them into electrical signals for sensing, imaging, and interaction with the environment. Typical applications of ultrasonic transducers include fingerprint recognition, ultrasonic imaging, ultrasonic radar and ranging, non-destructive testing, flow measurement, and force feedback. They are also used in human body imaging, automotive reversing radar, underwater sonar detection, robotic vacuum cleaners, and ultrasonic smoke detectors. All these applications involve the transmission and reception of ultrasonic signals by the transducer; therefore, the transmission and reception sensitivity of the ultrasonic transducer largely determine its quality and are key indicators for these applications.

[0003] Manufacturing ultrasonic transducers using traditional mechanical cutting methods is limited in terms of miniaturization of the vibration unit, production cost, efficiency, product consistency, and yield. It cannot meet the needs of further development of ultrasonic imaging instruments, especially in terms of low cost, portability, and high resolution.

[0004] MEMS manufacturing technology, based on the semiconductor industry, is a highly effective way to efficiently, cost-effectively, and mass-produce small-sized devices. Ultrasonic transducers developed using MEMS technology are mainly based on two principles: capacitive and piezoelectric, corresponding to Capacitive Micromachined Ultrasonic Transducers (CMUTs) and Piezoelectric Micromachined Ultrasonic Transducers (PMUTs), respectively. These can be integrated with Complementary Metal Oxide Semiconductor (CMOS) circuits to achieve low-cost, consistent, and large-scale manufacturing of highly integrated, computationally powerful miniature ultrasonic transducers. Of these two types of transducers, CMUTs require a large bias voltage to operate, resulting in higher power consumption and limiting their applications. In contrast, PMUTs are a promising solution. Effective integration of PMUTs with CMOS is a crucial factor in realizing these ultrasonic transducers.

[0005] The transmit sensitivity and receive sensitivity of the piezoelectric micromechanical ultrasonic transducer (PMUT) are key performance indicators that play a crucial role in the application of the PMUT in the above-mentioned scenarios. If the transmit sensitivity and receive sensitivity are too low, the signal-to-noise ratio will be affected, ultimately leading to the system failing to work or having poor performance.

[0006] PMUTs typically exhibit a bending vibration mode. When used as an ultrasonic transmitter, an alternating electric field is applied to the electrodes on both sides of the piezoelectric film. Due to the inverse piezoelectric effect, transverse stress is generated in the piezoelectric layer, which in turn generates a bending moment, forcing the film to deviate from the plane and emit acoustic pressure waves into the surrounding medium. As shown in Equation (1), the ultrasonic emission sensitivity S of the bending vibration PMUT is... T Proportional to the piezoelectric coefficient e of the piezoelectric thin film 31r :

[0007] S T ∝e 31f (1)

[0008] When the PMUT is used as an ultrasonic receiver, the incident ultrasonic wave deflects the piezoelectric film, generating transverse stress. Due to the positive piezoelectric effect, charges accumulate on the electrodes on both sides of the piezoelectric film, forming a voltage signal, as shown in formula (2). Its receiving sensitivity S R Proportional to the piezoelectric coefficient e 31r With dielectric constant ε 33 The ratio;

[0009] S R ∝e 31f / ε 33 (2)

[0010] In ultrasound imaging, the ultrasound transducer probe acts as both a transmitter to emit ultrasonic waves and a receiver to receive ultrasonic waves reflected back from the object being imaged. Its operating mode is typically pulse-echo mode, as shown in formula (3). The PMUT pulse-echo sensitivity S... T ·S R Proportional to the piezoelectric coefficient e 31 The square of the dielectric constant ε 33 The ratio of .

[0011]

[0012] Piezoelectric coefficient and dielectric constant are fundamental properties of piezoelectric materials. Table 1 lists the piezoelectric coefficient and dielectric constant characteristics of PZT and AlN, two common piezoelectric materials.

[0013] Table 1. Properties of PZT and AlN in common piezoelectric materials

[0014]

[0015] Comparing PZT and AlN, it can be seen that when used only as an ultrasonic transducer, PZT has a piezoelectric constant that is 10 times higher than that of AlN. Based on formula (1), the emission sensitivity of PZT-based PMUT will be 10 times that of AlN-based PMUT.

[0016] However, when used solely as a probe for receiving ultrasound waves, PZT's dielectric constant is approximately 110 times that of AlN. Therefore, the receiving sensitivity of a PZT-based PMUT will be approximately one-twelfth that of an AlN-based PMUT. When using a single piezoelectric material, PZT or AlN, as shown in Table 1, as an ultrasound probe operating in both transmit and receive modes, the pulse-echo (transmit-receive) signal sensitivities of the developed PMUTs are comparable.

[0017] Therefore, a single piezoelectric material cannot simultaneously possess both high piezoelectric coefficient and low dielectric constant. Devices based on a single piezoelectric material, such as PMUT-on-CMOS devices, cannot simultaneously meet the application requirements of ultra-high ultrasonic emission intensity and ultra-high ultrasonic receiving sensitivity.

[0018] Furthermore, the PMUT manufacturing process involves the deposition of various thin films (such as piezoelectric thin films and electrode thin films) at different temperatures and the etching of these films in different atmospheres and liquid environments. These processes can potentially damage CMOS circuits. Additionally, the thin-film formation and patterning processes for different piezoelectric materials, as well as the electrode materials deposited on both sides of the thin films, vary significantly. Therefore, fabricating PMUTs of two different materials on the same substrate presents process incompatibility issues. This makes the sequential fabrication of PMUTs with different piezoelectric thin film substrates on the same wafer a highly risky and challenging process. Therefore, it is necessary to develop a PMUT-on-CMOS integration solution with strong process compatibility and ease of use, incorporating different types of piezoelectric materials.

[0019] In addition, when two piezoelectric materials are integrated on one side of the wafer (i.e., coplanar), the difference in piezoelectric materials leads to a great difference in the processing technology. Usually, the two piezoelectric material-based PMUTs are processed separately, including the corresponding piezoelectric thin film layers and the top and bottom electrode layers on both sides of the piezoelectric thin film. This type of PMUT integration scheme usually requires the sequential rather than simultaneous construction of multiple types of microstructures in millimeter or even sub-millimeter space, which brings greater risks and difficulties to the processing and molding. Summary of the Invention

[0020] The present invention is proposed to alleviate or solve at least one of the above-mentioned problems in the prior art.

[0021] Embodiments of the present invention relate to a micromechanical ultrasonic transducer structure, comprising:

[0022] A PMUT unit includes a PMUT carrier layer and a first PMUT and a second PMUT disposed on the PMUT carrier layer. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer.

[0023] in:

[0024] The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

[0025] Furthermore, the first PMUT and the second PMUT are respectively located on both sides of the PMUT bearing layer.

[0026] Embodiments of the present invention also relate to a method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps:

[0027] Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and

[0028] A PMUT cell is provided that bonds to the circuit protection layer of a transistor cell. The PMUT cell includes a PMUT carrier layer, a first PMUT, and a second PMUT. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer.

[0029] in:

[0030] The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

[0031] Furthermore, in the above method, the first PMUT and the second PMUT are respectively disposed on both sides of the PMUT bearing layer.

[0032] Embodiments of the present invention also relate to an electronic device, including the micromechanical ultrasonic transducer structure described above, or the micromechanical ultrasonic transducer structure manufactured by the manufacturing method described above. Attached Figure Description

[0033] The following description and accompanying drawings will better aid in understanding these and other features and advantages of the various embodiments disclosed herein, wherein the same reference numerals in the drawings always denote the same parts, wherein:

[0034] Figures 1-5 This is a schematic diagram of a micromechanical ultrasonic transducer structure according to different exemplary embodiments of the present invention, wherein two PMUTs share the same PMUT support layer and are disposed on both sides of the PMUT support layer;

[0035] Figures 6-11CAn exemplary illustration of an exemplary embodiment of the present invention. Figure 1 A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure shown, wherein... Figures 11A-11C An example is shown Figure 1 A schematic diagram showing how the PMUTs on both sides of the micromechanical ultrasonic transducer structure form an electrical connection with the CMOS.

[0036] Figure 12-16 An exemplary illustration of an exemplary embodiment of the present invention. Figure 5 A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure shown;

[0037] Figure 17 This is a schematic diagram of a micromechanical ultrasonic transducer structure according to another exemplary embodiment of the present invention, wherein two PMUTs share the same PMUT support layer and are disposed on one side of the PMUT support layer;

[0038] Figure 18 This is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention. Detailed Implementation

[0039] The technical solution of the present invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings. In this specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the overall inventive concept of the present invention and should not be construed as a limitation thereof. These are only some embodiments of the invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0040] The inventors discovered that if a PMUT based on a high-voltage material is used as an ultrasonic transmitter and a PMUT based on a low-dielectric-constant material is used as an ultrasonic receiver, for example, if a PZT-based PMUT and an AlN-based PMUT are integrated together on a single ultrasonic transducer as shown in Table 1, with the PZT-based PMUT as the ultrasonic transmitter and the AlN-based PMUT as the ultrasonic receiver, its pulse-echo sensitivity will be 100 times higher than that of a single material-based PMUT.

[0041] Furthermore, the integration of PMUT and CMOS is mainly achieved through the following two schemes:

[0042] Option 1. Using a CMOS wafer as a substrate, various thin film deposition and etching processes are performed. However, the PMUT manufacturing process involves the deposition of various thin films (such as piezoelectric thin films and electrode thin films) at different temperatures and the etching of these films in different atmospheres and liquid environments. This necessitates that the processing flow does not damage the CMOS circuitry. Currently, among known piezoelectric materials, only a few piezoelectric thin films, such as AlN-based piezoelectric materials, have MEMS manufacturing processes compatible with CMOS. Therefore, this option is mainly used for the development of integrated ultrasonic transducers based on corresponding piezoelectric materials. However, the piezoelectric properties of the piezoelectric thin film are a crucial determinant of PMUT performance. For example, piezoelectric materials such as PZT and LiNbO3, which have excellent piezoelectric properties, have more demanding processing techniques than AlN and poor compatibility with CMOS. Therefore, the development of CMOS-integrated PMUTs based on the above-mentioned processes is subject to many limitations and is difficult to achieve.

[0043] Option 2. Process PMUT wafers and CMOS wafers separately. Define the side of the PMUT wafer containing the piezoelectric film and the side of the CMOS wafer containing the transistors as the respective front sides. Bond the front sides of the PMUT wafer and the CMOS wafer to construct a CMOS integrated PMUT. Compared to Option 1, this option has fewer limitations on piezoelectric materials. However, the effective vibration of the PMUT's mechanical vibration unit is crucial for efficient transmission and reception of ultrasound waves. This requires a cavity structure beneath the vibration unit to provide space for effective vibration, which necessitates a corresponding cavity on the CMOS. However, the cavity size is a core factor determining the PMUT's ultrasonic frequency; changes in cavity size will lead to changes in the PMUT's ultrasonic frequency. During the bonding of the PMUT and CMOS wafers, alignment deviations are unavoidable, resulting in random deviations between the vibration unit area and the design itself, causing frequency fluctuations in the developed CMOS integrated PMUT. It is worth noting that the diameter of PMUT elements used in ultrasonic imaging is very small, typically tens of micrometers or even smaller; even a 1-micrometer alignment deviation will have a significant adverse effect.

[0044] Therefore, there is a need in the prior art to develop a CMOS and PMUT integration scheme that is universally applicable to the piezoelectric material itself, and / or the integration process of the CMOS unit and the PMUT unit does not affect the cavity size.

[0045] Based on the above, the present invention proposes to integrate, on the same CMOS wafer, components with high voltage coefficients (e.g., absolute values ​​higher than 1C / m). 2 Further higher than 5C / m 2There are two types of ultrasonic transducers: piezoelectric PMUTs with high dielectric constants and piezoelectric PMUTs with low dielectric constants (e.g., below 1200, and further below 100). The piezoelectric PMUTs with high dielectric constants are specifically designed for emitting ultrasonic waves, while the piezoelectric PMUTs with low dielectric constants are used to receive reflected ultrasonic waves. The integration of these PMUTs with CMOS is key to developing MEMS ultrasonic transducers with excellent performance and low cost.

[0046] This invention also proposes a scheme for simultaneously integrating the above two types of piezoelectric material-based PMUTs onto the same CMOS wafer. This scheme is a PMUT-on-CMOS integration scheme with strong process compatibility and convenience, containing different types of piezoelectric materials.

[0047] This invention also proposes a micromechanical ultrasonic transducer structure that simultaneously includes both types of piezoelectric thin-film based PMUTs. This invention proposes a scheme to integrate the two types of piezoelectric material-based PMUTs back-to-back on both sides of a substrate. Each PMUT on a single side contains only one type of piezoelectric material and its matching electrode material, greatly reducing the impact of processing the second type of piezoelectric thin-film based PMUT on the first type of PMUT. Simultaneously, this method also reduces the transducer's occupied planar area (the two piezoelectric material-based PMUTs are integrated back-to-back in the longitudinal direction, rather than arranged laterally).

[0048] The reference numerals in the accompanying drawings of this invention are explained as follows:

[0049] 1000: CMOS cell or transistor cell, see [link / reference] Figure 6 .

[0050] 100: CMOS substrate or transistor substrate, with optional materials including single-crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.

[0051] 101: The source and drain of a transistor.

[0052] 110: Circuit protection layer, which is an insulating material layer, such as silicon dioxide or silicon nitride.

[0053] 111: The gate of a transistor.

[0054] 113A: Electrical connection layer within the transistor unit layer, corresponding to the first electrical connection layer. The material can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, or a composite or alloy of the above metals. The above materials are also suitable for other electrical connection layers.

[0055] 113B: Electrical connection layer within the transistor unit layer, corresponding to the second electrical connection layer.

[0056] 113, 115: Electrical connection layers within other transistor unit layers.

[0057] 112 and 114: Electrical connection layers between transistor unit layers.

[0058] 200: PMUT substrate, with optional materials including single-crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.

[0059] 201 and 202: Cavities used for PMUT.

[0060] 210: Oxide layer ( Figure 4 ) or bonding layer ( Figure 5 ).

[0061] 220, 221, 222: Support layers, whose material can be the same as or different from that of the electrode layers. The support layer can be placed between the PMUT and the PMUT substrate; in this case, the support layer is an insulating layer, and its material can be non-conductive materials such as silicon, silicon dioxide, or silicon nitride. The support layer can also be placed on top of the PMUT. It should be noted that a support layer may not be required.

[0062] 230, 250; 260, 280: Electrode layers, materials can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, or composites or alloys of the above metals. The materials of the two electrode layers can be the same or different.

[0063] 240, 270: Piezoelectric layer. Materials can be selected from polycrystalline aluminum nitride (AlN), polycrystalline zinc oxide, polycrystalline lead zirconate titanate (PZT), polycrystalline lithium niobate (LiNbO3), polycrystalline lithium tantalate (LiTaO3), polycrystalline potassium niobate (KNbO3), etc., or monocrystalline aluminum nitride, monocrystalline gallium nitride, monocrystalline lithium niobate, monocrystalline lead zirconate titanate, monocrystalline potassium niobate, monocrystalline quartz film, or monocrystalline lithium tantalate, etc. The aforementioned monocrystalline or polycrystalline materials may also include rare earth element doping materials with a certain atomic ratio, all of which are piezoelectric layers that can be used in this invention, such as scandium-doped aluminum nitride (AlScN).

[0064] 245: Conductive or electrical connection layer, the material of which may be selected from the material used to form the electrode layer.

[0065] 275: A conductive layer or electrical connection layer, the material of which may be selected from the materials used to form the electrode layer.

[0066] 290: Device protective layer, generally a dielectric material, such as silicon dioxide, aluminum nitride, silicon nitride, etc.

[0067] 400A: First conductive hole.

[0068] 400B: Second conductive hole.

[0069] 500: Bonding material layer, see Figure 1 and Figure 3 It can be a metal bonding layer, such as gold-gold bonding, aluminum-germanium bonding, etc., or other material layers that bond two layers together.

[0070] 3000: PMUT structure (see...) Figure 1 and Figure 18 ).

[0071] 4000: PMUT structure array (see...) Figure 18 ).

[0072] Figures 1-5 This is a schematic diagram of a micromechanical ultrasonic transducer structure according to different exemplary embodiments of the present invention, wherein two PMUTs share the same PMUT support layer and are disposed on both sides of the PMUT support layer.

[0073] In the illustrated embodiment, a single PMUT typically includes a support layer 220, a piezoelectric layer 240, and top electrode layers 250 and bottom electrode layers 230 on both sides of the piezoelectric layer 240. A cavity 201 shared by two PMUTs is provided on the side of the PMUT vibration unit facing the CMOS, enabling the PMUT vibration unit to generate effective bending vibrations to produce ultrasonic waves. In this invention, two types of ultrasonic transducers, a piezoelectric material-based PMUT with a high voltage coefficient and a piezoelectric material-based PMUT with a low dielectric constant, are simultaneously integrated on a CMOS wafer or a transistor unit 1000 as shown in the figure.

[0074] like Figures 1-5 As shown, 240 and 270 represent a high-dielectric-constant piezoelectric film and a low-dielectric-constant piezoelectric film, respectively. 201 is the cavity region where the PMUT, composed of the two types of piezoelectric films, can effectively bend and vibrate. 220 is the load-bearing layer supporting the PMUT. Figure 1 In the embodiment, 100 is the PMUT support layer, 100 is the substrate for building CMOS circuits or transistor substrate, and 110 is the circuit protection layer.

[0075] As previously mentioned, in a more specific embodiment, the absolute value of the piezoelectric coefficient of the piezoelectric layer 240 is greater than 1 C / m. 2 And / or the dielectric constant of piezoelectric layer 270 is less than 1200. Furthermore, the absolute value of the piezoelectric coefficient of piezoelectric layer 240 is greater than 5 C / m. 2 And / or the dielectric constant of the piezoelectric layer 270 is less than 100.

[0076] In a more specific embodiment, piezoelectric layer 240 is PZT or doped PZT, and piezoelectric layer 270 is ALN or AlScN.

[0077] In terms of PMUT-on-CMOS integration, this invention first constructs a piezoelectric material-based PMUT wafer on one side of the PMUT carrier layer, then bonds it to a CMOS wafer. Subsequently, on the partially integrated PMUT-on-CMOS wafer, another piezoelectric material-based PMUT is constructed on the other side of the PMUT carrier layer. In this integration scheme, even with stringent or incompatible process conditions, the different types of piezoelectric thin-film-based PMUTs do not come into contact during processing and will not affect each other's processing, resulting in good operability.

[0078] See below for reference. Figure 15 and Figure 16 Electrical connections can be achieved by interconnecting the PMUT wafer electrodes with corresponding electrodes on the CMOS wafer, and if necessary, surface protection can be applied to the device by providing a device protective layer 290. In the example of this invention... Figures 1-5 In the integrated scheme shown, even with harsh processing conditions on the upper PMUT, different types of piezoelectric thin film substrate PMUTs will not damage the CMOS wafer, demonstrating good process compatibility.

[0079] In addition, during the fabrication of the two piezoelectric material-based PMUTs, when the fabrication process of a certain piezoelectric material-based PMUT has poor or even incompatible compatibility with CMOS, the piezoelectric material-based PMUT can be fabricated on the PMUT carrier layer that is not bonded to the CMOS circuit. Then, another part of the PMUT can be constructed on the surface of a part of the PMUT-on-CMOS wafer to achieve the integration of piezoelectric material-based PMUTs with different performance indicators with CMOS, and obtain MEMS ultrasonic transducers with excellent ultrasonic emission and reception sensitivity.

[0080] The PMUT carrier layer here is used to form the PMUT on top of it, for example, it could be Figures 1-3 The support layer 220 in the middle can also be Figure 4 SOI structure in Figure 4 It includes a substrate 200, an oxide layer 210, and a support layer or silicon film layer 220, or Figure 5 The base 200 can also be other support structures used to generate the PMUT, all of which are within the scope of protection of this invention.

[0081] In embodiments of the present invention, the material of the PMUT carrier layer can be the same as or different from the material of the electrode layer; or the material of the PMUT carrier layer can be an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

[0082] like Figure 1As shown, two piezoelectric material-based PMUTs are located on both sides of the support layer 220. The two PMUTs share a cavity 201. The PMUT unit is bonded to a transistor unit, such as a CMOS unit, using a metal bonding layer 500. At the same time, the metal bonding layer is also connected to the circuitry within the transistor unit. Figure 1 In the middle, 290 is the device protection layer. As mentioned earlier, the device protection layer may not be set.

[0083] like Figure 2 As shown, two piezoelectric material-based PMUTs are located on both sides of the support layer 220. The two PMUTs share a cavity 201. The support layer 220 of the PMUT unit is directly bonded or directly connected to the circuit protection layer 110 of the transistor unit of a CMOS unit, for example. Figure 2 In the middle, 290 is the device protection layer. As mentioned earlier, the device protection layer may not be set.

[0084] exist Figures 1-2 In the illustrated embodiment, two PMUTs share the same PMUT carrier layer and are positioned opposite each other on both sides of the PMUT carrier layer in the thickness direction of the PMUT carrier layer. For example, the two PMUTs share a center line. This element layout or arrangement of the two PMUTs helps to reduce the size of the PMUT-on-CMOS chip, increase integration and the imaging performance of the ultimate ultrasonic transducer.

[0085] and Figure 1 and Figure 2 Comparing the positional relationships of the two material-based PMUTs distributed on both sides of the PMUT bearing layer in the structure shown, as follows: Figures 3-5 As shown, in the axial direction perpendicular to the substrate plane, the two types of PMUTs distributed on both sides can have positional deviations, that is, the two PMUTs are separated from each other in the lateral direction and are arranged on both sides of the PMUT carrier layer. Figures 3-5 In the structure shown, the two PMUTs do not share a cavity, but each has its own corresponding cavity.

[0086] like Figure 3 As shown, two piezoelectric material-based PMUTs are located on both sides of the support layer 220. The two material-based PMUTs are staggered and do not share a cavity. The PMUT unit is bonded to a transistor unit, such as a CMOS unit, using a metal bonding layer 500. At the same time, the metal bonding layer is also connected to the circuit within the transistor unit. Figure 3 In the middle, 290 is the device protective layer.

[0087] like Figure 4As shown, two piezoelectric material-based PMUTs are located on opposite sides of the SOI wafer. The two PMUTs are staggered and do not share a cavity. The SOI wafer includes a substrate 200, an oxide layer 210, and a top silicon thin film layer or silicon film layer 220. The silicon film layer 220 in the SOI used to construct the PMUTs is directly bonded to the circuit protection layer 110. 290 is the device protection layer. Figure 3 In contrast, this approach does not require the removal of the substrate 200 and oxide layer 210. The PMUT based on piezoelectric material 270 is constructed on a thicker substrate 200, simplifying the manufacturing process.

[0088] like Figure 5 As shown, two piezoelectric material-based PMUTs are located on both sides of the substrate 200. The two material-based PMUTs are staggered and integrated, without sharing a cavity. Each PMUT includes support layers 221 and 222, a piezoelectric layer, and cavities on both sides of the piezoelectric layer. The support layer can be located outside either electrode; alternatively, the PMUT may not contain a support layer. The substrate 200 on which the PMUT is constructed, or a bonding layer 210 formed on its surface, is directly bonded to the circuit protection layer 220. 290 is the device protection layer. Figure 4 Compared to the structure shown, the substrate for constructing PMUT can be a common substrate that is much cheaper than SOI, thus reducing costs.

[0089] In the bonding of PMUT wafers and CMOS wafers, the PMUT wafer substrate layer can be directly bonded to the circuit protection layer of the CMOS wafer (see, for example, [reference needed]). Figure 5 Alternatively, the integration of PMUT cells and CMOS cells can be achieved through an intermediate bonding layer material (such as metal bonding, corresponding to bonding material layer 500) (see, for example, [link to documentation]). Figure 1 ).

[0090] exist Figures 1-5 In the illustrated embodiment, the PMUT unit includes two PMUTs disposed on both sides of the PMUT carrier layer, namely a first PMUT and a second PMUT. The piezoelectric coefficient of the piezoelectric layer 240 of the first PMUT is higher than that of the piezoelectric layer 270 of the second PMUT, and the dielectric constant of the piezoelectric layer 240 of the first PMUT is lower than that of the piezoelectric layer 270 of the second PMUT. In a further embodiment, the piezoelectric layer 240 of the first PMUT is PZT or doped PZT, and the piezoelectric layer 270 of the second PMUT is AlN or AlScN.

[0091] exist Figures 1-5 The illustrated embodiment employs a PMUT-on-CMOS structure, but the invention is not limited thereto. The aforementioned PMUT unit can also be disposed on other structures; PMUT-on-CMOS is an advantageous embodiment of the invention.

[0092] exist Figures 1-5 In the embodiment shown, the first PMUT of the PMUT unit is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves.

[0093] Figure 6-Figure 1 1 is an exemplary illustration of an exemplary embodiment of the present invention. Figure 1 A cross-sectional schematic diagram illustrating the manufacturing method of the micromechanical ultrasonic transducer structure. More specifically, Figure 6-Figure 1 Example 1 illustrates an integration scheme that integrates a PZT piezoelectric thin film-based PMUT with a high voltage coefficient and an AlN piezoelectric thin film-based PMUT with a low dielectric constant onto a CMOS wafer. Specifically, the high voltage coefficient material 240 or the piezoelectric layer 240 of the first PMUT is selected from PZT or doped PZT, while the low dielectric constant material 270 or the piezoelectric layer 270 of the second PMUT is selected from AlN or AlScN. This allows for the construction of a PMUT-on-CMOS ultrasonic transducer with ultra-high pulse-echo sensitivity.

[0094] First, provide transistor unit 1000. Figure 6 This is a schematic diagram of a CMOS structure, showing only one transistor. 100 represents the CMOS substrate, i.e., the transistor substrate (which can be silicon, etc.), and 110 is the circuit protection layer (which can be silicon oxide, silicon nitride, etc.). 101 represents the source and drain of the transistor, 111 is the gate of the transistor, 113A, 113B, 113, and 115 are intra-CMOS electrical connection layers, and 112 and 114 are inter-CMOS electrical connection layers. Figure 6 As shown, the transistor unit includes a transistor substrate 100 and a first transistor and a second transistor arranged spaced apart in the lateral direction. It should be noted that... Figure 6 The structure shown is exemplary. For the present invention, the CMOS unit 1000 may include a CMOS transistor and a circuit protection layer 110, and may optionally include a first electrical connection layer 113A and a second electrical connection layer 113B.

[0095] like Figure 7 As shown, a PZT piezoelectric material-based PMUT is fabricated on an SOI wafer, where 200 is the substrate, 210 is the oxide layer, and 220 is the silicon film layer, forming an SOI wafer. 240 is the PZT piezoelectric thin film layer, and 230 and 250 are the top and bottom electrode layers on both sides of the piezoelectric thin film layer. 245 is an electrical connection channel or electrical connection layer connecting the top and bottom electrodes on both sides of the PZT piezoelectric thin film to the silicon layer 220, which will be interconnected with the electrical connection terminals of CMOS circuits.

[0096] like Figure 8 As shown, first remove the circuit protective layer material on the CMOS circuit corresponding to the electrical interconnection portion of the PMUT (i.e., as shown later). Figure 15 The conductive vias 400A and 400B are shown to expose the electrical connection terminals on the CMOS circuit; then, the piezoelectric film side of the PZT-based PMUT is bonded to the CMOS circuit side. Figure 8 The example demonstrates the integration and electrical interconnection of a piezoelectric thin-film PZT-based PMUT with a CMOS circuit via metal bonding. Specifically, the bonding material layer 500 also serves as part of the electrical connection between the PMUT and the CMOS circuit.

[0097] However, other bonding methods can also be selected, such as using a non-conductive material bonding layer, or directly bonding the silicon film layer 220 to the circuit protection layer 110 (such as silicon-silicon bonding, direct bonding of silicon and silicon oxide, etc.).

[0098] When using metal bonding, the bonding layer material can achieve both bonding and electrical interconnection between PMUT and CMOS. When using non-conductive bonding layer material or direct bonding of silicon film layer 220 to circuit protection layer 110, the height of the bonding layer and electrical interconnection layer needs to be strictly limited to achieve electrical interconnection while completing bonding.

[0099] Furthermore, the PMUT achieves effective bending vibration by having a cavity on the CMOS side. When two wafers are bonded together using an intermediate bonding layer material, the presence of the intermediate bonding layer can provide a cavity for the PMUT vibration unit to vibrate effectively. Alternatively, a cavity can be etched at the corresponding location on the CMOS wafer, or a combination of these methods can be used to provide effective vibration for the PMUT vibration unit. When directly bonded to the circuit protection layer 110 through the silicon film layer 220, sufficient cavities need to be formed on the CMOS circuit for the PMUT vibration unit to vibrate effectively.

[0100] See Figure 9 ,exist Figure 8 After the bonding step, the substrate 200 and oxide layer 210 of the SOI wafer are removed, exposing the unprocessed side of the silicon film layer 220 of the SOI wafer, and the second type of piezoelectric thin film substrate PMUT is processed and manufactured on this side.

[0101] See Figure 10 Another piezoelectric material-based PMUT, such as an AlN piezoelectric material-based PMUT, is constructed on one side of the exposed silicon film layer 220, where 270 is an AlN-based piezoelectric thin film layer, and 260 and 280 are the top and bottom electrode layers on both sides of the piezoelectric thin film, respectively.

[0102] Figure 11A and Figure 11B An example is shown Figure 1 The diagram shows how the PMUTs on both sides of the micromechanical ultrasonic transducer structure form an electrical connection with the CMOS. Figure 11A and Figure 11B This demonstrates the electrical interconnection between a PMUT (i.e., a second type of piezoelectric material-based PMUT) on the side of the PMUT carrier layer furthest from the CMOS wafer and a CMOS circuit. The track lines for the electrical interconnection between the PMUT and the CMOS circuit on both sides of the support layer 220 are located at different positions.

[0103] like Figure 11A As shown, the two PMUTs are electrically interconnected with the CMOS circuit through AA′ and BB′ respectively. Of course, the lines AA′ and BB′ do not need to be perpendicular, as long as they do not overlap.

[0104] Figure 11B Electrical interconnection is achieved between the electrode layers 260 and 280 of the piezoelectric thin film 270-based PMUT and the CMOS circuit. Specifically, when fabricating a piezoelectric material-based PMUT, bonding the PMUT wafer to the CMOS circuit, and interconnecting the electrode layers 230 and 250 of the piezoelectric thin film 240-based PMUT with the CMOS circuit, electrical interconnection material is also deposited at the electrical interconnection points between the second type of piezoelectric material-based PMUT and the CMOS circuit, forming interconnection channels. This means that only the corresponding support layer 220 needs to be etched to expose the electrical connection channel ends. Once the electrical connection ends are exposed, the PMUT-CMOS electrical connection layer 275 is deposited on the upper side of the support layer 220. Figure 11C The final PMUT-on-CMOS device is located on the side of the support layer 220 facing the CMOS circuit, where the PMUT and CMOS form an electrical interconnect. Figure 11A A schematic diagram of the cross-section along the middle AA. Finally, if necessary, such as... Figure 16 As shown, a protective layer 290 is deposited on the entire surface of the device.

[0105] Figure 12-16 An exemplary illustration of an exemplary embodiment of the present invention. Figure 5 A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure shown. Figures 12-16 Taking the fabrication of PMUTs on SOI wafers and their integration with CMOS wafers as an example, an integration scheme is proposed to integrate PZT piezoelectric thin film-based PMUTs with high voltage coefficients and AlN piezoelectric thin film-based PMUTs with low dielectric constants into CMOS wafers. The two types of PMUTs are staggered in the lateral direction and do not share cavities.

[0106] Figure 12A schematic diagram of the structure of a PZT piezoelectric material-based PMUT fabricated on an SOI wafer, where 200 is the substrate, 210 is the oxide layer, 220 is the silicon film layer; 240 is the PZT piezoelectric thin film layer, 230 and 250 are the top and bottom electrode layers on both sides of the piezoelectric thin film layer; 245 is an electrical connection channel or electrical connection layer that connects the top and bottom electrodes on both sides of the PZT piezoelectric thin film to the silicon layer 220, which will be interconnected with the electrical connection terminals of the CMOS circuit later.

[0107] like Figure 13 As shown, the cavity 201 required for the vibration of the PZT-based piezoelectric thin film PMUT is etched into the circuit protection layer of the CMOS. Figure 12 The structure shown is bonded to the circuit protection layer of the CMOS, so that the piezoelectric film side of the PZT-based PMUT is bonded to the CMOS circuit side, and the vibrating part of the PZT-based PMUT is located in the cavity 201.

[0108] like Figure 14 As shown, a PMUT based on another piezoelectric material 270, such as an AlN-based piezoelectric thin film PMUT, is constructed on a substrate 200. 260 and 280 are electrodes on both sides of the piezoelectric thin film. A cavity 202, required for the effective and complete vibration of the PMUT, can be formed using a sacrificial layer or similar method. This PMUT can be constructed on a support layer 222, or it can be constructed without this support layer.

[0109] like Figure 15 As shown, at the electrical connection points for connecting the PMUT electrodes to the CMOS circuit, conductive vias 400A and 400B are formed using an etching process. These vias penetrate the entire thickness of the PMUT into the circuit protection layer 110, exposing the conductive portions within the circuit protection layer. For each PMUT, conductive vias 400A and 400B are etched to expose the internal electrical connection layers 113A and 113B of the transistor cell layer, respectively. Optionally, the first electrical connection layer 113A is electrically connected to one of the electrodes of the CMOS transistor (e.g., the source), and the second electrical connection layer 113B is electrically connected to the other electrode of the CMOS transistor (e.g., the gate). However, if other electrical connection structures exist in the CMOS cell, the first electrical connection layer 113A and / or the second electrical connection layer 113B may also be electrically connected thereto, based on needs and requirements, which is also within the scope of this invention.

[0110] like Figure 16 As shown, for example, an electrical connection layer 275 between the PMUT and CMOS is set using a deposition process to achieve electrical connection between the PMUT and CMOS.

[0111] An electrical connection layer 275 is formed by deposition to achieve electrical connection between the PMUT and the CMOS. Finally, a device protection layer 290 is applied to the surface of the PMUT. The electrical connection layer 275 can be made of various conductive materials, such as the material used to form the electrode layer. Furthermore, the material used for the conductive channel connecting the PZT-based PMUT to the CMOS circuit, or the electrical connection layer 235, can be the same material as or a different material from the conductive channel or electrical connection layer 275 that achieves the electrical connection between the AlN-based PMUT and the CMOS. As will be understood, the electrical connection layers 235 and 275 are electrically insulated from each other. The electrical connection layers 235 and 275 are electrically connected to the transistor cell layer's internal electrical connection layer 113A and internal electrical connection layer 113B via conductive vias, respectively.

[0112] As can be understood, in the above method, if the bonding between the PMUT unit and the transistor unit is achieved by setting the bonding material layer 500, the PMUT unit, the transistor unit, and the bonding material layer together define the cavity, and the bonding material layer 500 can be used to define the lateral boundary of the cavity.

[0113] Furthermore, in the above technical solution, one side of the PMUT carrier layer is bonded to the circuit protection layer 110, thereby ensuring that when the PMUT needs to be fabricated on the other side of the PMUT carrier layer in subsequent steps, the PMUT carrier layer can protect the CMOS cell 1000 without considering the impact on the CMOS cell 1000 during PMUT fabrication. This makes the above-mentioned micromechanical ultrasonic transducer structure highly versatile in terms of piezoelectric materials, including aluminum nitride (AlN), lead zirconate titanate (PZT), lithium niobate (LiNbO3), lithium tantalate (LiTaO3), potassium niobate (KNbO3), and other materials.

[0114] It should be noted that the bonding of the two in this invention includes not only the case of direct bonding of the two as shown, but also the case where other bonding layers or films are provided between the two.

[0115] It should be specifically pointed out that, in the specific embodiments of the present invention, the bonding of the PMUT substrate and the circuit protection layer is used as an example for illustrative purposes. However, the bonding of the PMUT substrate and the CMOS cell 1000 can be the circuit protection layer that defines the surface of the CMOS cell, or it can be other layers that define the surface of the CMOS cell, all of which are within the protection scope of the present invention.

[0116] like Figures 1-5In the illustrated embodiment, the CMOS cell 1000 further includes a CMOS substrate 100, one side of the circuit protection layer 110 is bonded to the PMUT carrier layer, and the other side of the circuit protection layer 110 is bonded to the CMOS substrate 100. Optionally, in some cases, the PMUT cell may also be bonded to the CMOS substrate 100, which is also within the scope of protection of this invention.

[0117] It should also be specifically pointed out that in this invention, CMOS is used as an example of a transistor, and thus a CMOS unit is used as an example of a transistor unit. However, this invention is not limited to this. The transistor can also be a BiMOS unit or a BCD, and thus the transistor unit can also be a BiMOS unit or a BCD unit, etc.

[0118] like Figure 1 As shown, in wafer-level manufacturing, the cavity structure required for PMUT vibration is set on the PMUT wafer side, eliminating the need to form cavity 201 on the CMOS wafer before integration. Thus, the integration process of the CMOS wafer and PMUT wafer does not involve changes in the vibration region caused by alignment deviations, nor the resulting changes in the ultrasonic transducer frequency. This overcomes the technical problem in the prior art where the integration process of CMOS and PMUT has an adverse effect on the cavity size.

[0119] For example, such as Figure 5 and Figure 15 As shown, in an optional embodiment, for each PMUT, the micromechanical ultrasonic transducer structure is provided with a first conductive hole 400A and a second conductive hole 400B. The first conductive hole 400A penetrates the PMUT substrate 200 and / or support layer 210 and reaches the first electrical connection layer 113A within the circuit protection layer 110. The second conductive hole 400B penetrates the PMUT substrate 200 and / or support layer 210 and reaches the second electrical connection layer 113B within the circuit protection layer 110. The first conductive layer 235 is electrically connected to the first electrical connection layer 113A via the first conductive hole 400A, and the second conductive layer 275 is electrically connected to the second electrical connection layer 113B via the second conductive hole 400B.

[0120] Although not shown, the first conductive layer 235 and the second conductive layer 275 can be electrically connected to the first electrical connection layer 113A and the second electrical connection layer 113B exposed on the side of the micromechanical ultrasonic transducer structure, respectively, which is also within the scope of protection of the present invention.

[0121] exist Figures 1-16 The diagram illustrates a structure with two PMUTs positioned on either side of a PMUT support plate, but the invention is not limited thereto. For example... Figure 17 As shown, two PMUTs can also be set on the same side of the PMUT carrier plate, spaced apart in the lateral direction.

[0122] In addition, when the PMUT is placed inside the cavity, the cavity protects the PMUT (especially the piezoelectric layer) from the external environment, which can improve the reliability and long-term stability of the PMUT. Therefore, when the above-mentioned PMUT structure is used in, for example, an imager, the reliability and long-term stability of the final imaging system can be improved.

[0123] Figure 18 This is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention. Figure 18 As shown, the PMUT structure 3000 described above can be just one element of the array 4000. Figure 18 In the diagram, the hollow circle represents the PMUT vibration region of the PMUT structure 3000. Besides a circle, it can be any desired shape, such as an ellipse, polygon, or a combination thereof. The solid black circle represents the electrical connection between the PMUT unit and the CMOS unit, such as... Figure 6 The first electrical connection layer 113A and the second electrical connection layer 113B shown can also be any desired shape. The PMUT structures 3000 are combined to form the PMUT structure array 4000.

[0124] Each PMUT unit can be individually controlled by a matching CMOS circuit, forming a two-dimensional PMUT structure array 4000.

[0125] Multiple PMUT structures 3000 can also be connected together, such as interconnecting the electrodes of PMUT structures 3000 in the same column to form a one-dimensional linear array. In this case, the electrical connection points between the CMOS cell circuit and the PMUT cell are reduced, and a pair of electrical connection points between the CMOS cell and the PMUT cell can control multiple PMUT cells simultaneously.

[0126] An ultrasonic transducer can be formed based on a PMUT structure or an array of PMUT structures. This ultrasonic transducer can be used in an ultrasonic imaging instrument. The PMUT structure or PMUT array can also be used in other electronic devices, such as ultrasonic rangefinders, ultrasonic fingerprint sensors, and non-destructive testing instruments for industrial applications.

[0127] Based on the above, the present invention proposes the following technical solution:

[0128] 1. A micromechanical ultrasonic transducer structure, comprising:

[0129] A PMUT unit includes a PMUT carrier layer and a first PMUT and a second PMUT disposed on the PMUT carrier layer. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer.

[0130] in:

[0131] The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

[0132] 2. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0133] The first PMUT and the second PMUT are respectively located on both sides of the PMUT bearing layer.

[0134] 3. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0135] The piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and / or

[0136] The first PMUT is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves.

[0137] 4. The micromechanical ultrasonic transducer structure according to any one of 1-3, wherein:

[0138] The first PMUT and the second PMUT are disposed opposite each other on both sides of the PMUT support layer in the thickness direction of the PMUT support layer, and the first PMUT and the second PMUT share the cavity used for the PMUT.

[0139] 5. According to the micromechanical ultrasonic transducer structure described in 4, wherein:

[0140] The PMUT carrier layer is the PMUT support layer;

[0141] The micromechanical ultrasonic transducer structure also includes a transistor unit, comprising a transistor substrate, a transistor, and a circuit protection layer covering the transistor, with the circuit protection layer facing the PMUT unit.

[0142] The circuit protection layer is bonded to the PMUT support layer. The side of the circuit protection layer facing the PMUT unit has a cavity shared by the first PMUT and the second PMUT. The vibration part of the corresponding PMUT is located in the cavity. Alternatively, the circuit protection layer and the PMUT support layer are bonded through a metal bonding layer. A cavity for the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.

[0143] 6. According to the micromechanical ultrasonic transducer structure described in 5, wherein:

[0144] The transistor unit includes multiple electrical connection layers located within a circuit protection layer;

[0145] The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

[0146] 7. According to the micromechanical ultrasonic transducer structure described in 6, wherein:

[0147] The metal bonding layer forms part of the corresponding conductive path.

[0148] 8. The micromechanical ultrasonic transducer structure according to any one of 1-3, wherein:

[0149] The first PMUT and the second PMUT are arranged on both sides of the PMUT support layer, separated from each other in the lateral direction, and the micromechanical ultrasonic transducer structure is provided with cavities for the first PMUT and the second PMUT respectively.

[0150] 9. The micromechanical ultrasonic transducer structure described in 8 further includes:

[0151] A transistor unit includes a transistor substrate, a transistor, and a circuit protection layer covering the transistor. The circuit protection layer faces the PMUT unit and is bonded to the PMUT unit.

[0152] 10. According to the micromechanical ultrasonic transducer structure described in 9, wherein:

[0153] The PMUT carrier layer is the PMUT support layer, with the first PMUT and the second PMUT positioned on opposite sides of the PMUT support layer.

[0154] The circuit protection layer is directly bonded to the PMUT support layer, or the circuit protection layer and the PMUT support layer are bonded together by a bonding layer. The side of the circuit protection layer facing the PMUT unit has cavities for the first PMUT and the second PMUT, and the vibration part of the corresponding PMUT is located in the cavity. Alternatively, the circuit protection layer and the PMUT support layer are bonded together by a metal bonding layer, and the metal bonding layer defines at least a portion of the lateral boundary of the cavity for the first PMUT and the second PMUT. A cavity for the first PMUT and the second PMUT is provided between the circuit protection layer and the PMUT support layer.

[0155] 11. According to the micromechanical ultrasonic transducer structure described in 9, wherein:

[0156] The PMUT carrier layer includes a substrate layer, one of the first PMUT and the second PMUT is disposed on one side of the substrate layer, and the other PMUT is disposed on the other side of the substrate layer. The substrate layer is thinned or removed at the position corresponding to the first PMUT to facilitate the vibration of the vibrating portion of the first PMUT. A cavity for the other PMUT is disposed in the substrate layer.

[0157] The circuit protection layer is bonded to the substrate layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.

[0158] 12. According to the micromechanical ultrasonic transducer structure described in 11, wherein:

[0159] The micromechanical ultrasonic transducer structure further includes: a PMUT support layer for one PMUT, and / or a PMUT support layer for the other PMUT.

[0160] 13. According to the micromechanical ultrasonic transducer structure described in 9, wherein:

[0161] The PMUT carrier layer includes an SOI structure, which includes a substrate layer, an oxide layer, and a silicon film layer. One of the first PMUTs and the second PMUT is disposed on one side of the silicon film layer, and the other PMUT is disposed on one side of the substrate layer. A cavity for the other PMUT is disposed in the substrate layer. The substrate layer is thinned or removed at the position corresponding to the one PMUT to facilitate the vibration of the vibrating part of the one PMUT.

[0162] The circuit protection layer is directly bonded to the silicon film layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.

[0163] 14. The micromechanical ultrasonic transducer structure according to any one of 9-13, wherein:

[0164] The transistor unit includes multiple electrical connection layers located within a circuit protection layer;

[0165] The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

[0166] 15. According to the micromechanical ultrasonic transducer structure described in 14, wherein:

[0167] The metal bonding layer forms part of the corresponding conductive path.

[0168] 16. According to the micromechanical ultrasonic transducer structure described in 5 or 9, wherein:

[0169] The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

[0170] 17. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0171] The PMUT carrier layer material is a metal that is the same as or different from the material of the first electrode layer or the second electrode layer; or the PMUT carrier layer material is an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

[0172] 18. According to the micromechanical ultrasonic transducer structure described in 17, wherein:

[0173] The PMUT carrier layer material is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

[0174] 19. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0175] The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 1 C / m. 2 ; and / or

[0176] The dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.

[0177] 20. According to the micromechanical ultrasonic transducer structure described in 19, wherein:

[0178] The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 5 C / m. 2 ; and / or

[0179] The dielectric constant of the piezoelectric layer of the second PMUT is less than 100.

[0180] 21. A method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps:

[0181] Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and

[0182] A PMUT cell is provided that bonds to the circuit protection layer of a transistor cell. The PMUT cell includes a PMUT carrier layer, a first PMUT, and a second PMUT. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer.

[0183] in:

[0184] The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

[0185] 22. According to the method described in 21, wherein:

[0186] The first PMUT and the second PMUT are respectively located on both sides of the PMUT bearing layer.

[0187] 23. According to the method described in 22, wherein:

[0188] A PMUT cell that bonds to a circuit protection layer of a transistor cell includes the steps of: forming one of a first PMUT and a second PMUT on one side of a PMUT support layer, bonding said one side of a PMUT carrier layer to the circuit protection layer, and forming the other of the first PMUT and the second PMUT on the other side of the PMUT carrier layer; or

[0189] A PMUT cell that is bonded to a circuit protection layer of a transistor cell includes the steps of: forming one of a first PMUT and a second PMUT on one side of a PMUT support layer, forming the other of the first PMUT and the second PMUT on the other side of a PMUT carrier layer, and bonding said one side of the PMUT carrier layer to the circuit protection layer.

[0190] 24. According to the method described in 23, wherein:

[0191] This ensures that the first PMUT and the second PMUT are at least partially opposite each other in the thickness direction of the PMUT support layer.

[0192] 25. According to the method described in 24, wherein:

[0193] The PMUT carrier layer is the PMUT support layer;

[0194] The side of the circuit protection layer facing the PMUT unit has a cavity shared by the first PMUT and the second PMUT, and the side of the PMUT support layer is directly bonded to the circuit protection layer; or the circuit protection layer and the PMUT support layer are bonded by a metal bonding layer, and a cavity for the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.

[0195] 26. According to the method described in 23, wherein:

[0196] In the step of forming another PMUT on the other side of the PMUT carrier layer, the other PMUT and the first PMUT are arranged on both sides of the PMUT carrier layer, separated from each other in the lateral direction.

[0197] 27. According to the method described in 26, wherein:

[0198] The PMUT carrier layer is a PMUT support layer. On the side of the circuit protection layer facing the PMUT unit, cavities for the first PMUT and the second PMUT are respectively provided.

[0199] In the step of joining one side of the PMUT carrier layer to the circuit protection layer, the vibrating portion of the PMUT is placed within the cavity for the PMUT.

[0200] In the step of forming the other PMUT on the other side of the PMUT bearing layer, the vibrating portion of the other PMUT corresponds to the position of the cavity for the other PMUT.

[0201] 28. According to the method described in 26, wherein:

[0202] The PMUT carrier layer includes a substrate layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit;

[0203] In the step of joining one side of the PMUT carrier layer to the circuit protection layer, the circuit protection layer is joined to the substrate layer, and the vibrating portion of the PMUT is located within the cavity for the PMUT.

[0204] The step of forming the other PMUT on the other side of the PMUT carrier layer includes: forming a cavity for the other PMUT on the substrate layer, such that the vibrating portion of the other PMUT corresponds to the position of the cavity for the other PMUT;

[0205] The method further includes the step of thinning or removing a substrate layer at a location corresponding to one of the PMUTs so that the vibrating portion of the PMUT can vibrate.

[0206] 29. According to the method described in 26, wherein:

[0207] The PMUT carrier layer includes an SOI structure, which includes a substrate layer, an oxide layer, and a silicon film layer. A cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.

[0208] In the step of bonding one side of the PMUT carrier layer to the circuit protection layer, the circuit protection layer is directly bonded to the silicon film layer, and the vibrating part of the PMUT is located within the cavity of the PMUT.

[0209] The step of forming the other PMUT on the other side of the PMUT carrier layer includes: forming a cavity for the other PMUT on the substrate layer, such that the vibrating portion of the other PMUT corresponds to the position of the cavity for the other PMUT;

[0210] The method further includes the step of thinning or removing a substrate layer at a location corresponding to one of the PMUTs so that the vibrating portion of the PMUT can vibrate.

[0211] 30. According to the method described in 21, wherein:

[0212] The piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and / or

[0213] The first PMUT is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves.

[0214] 31. The method according to any one of 23-30, wherein:

[0215] The transistor unit includes multiple electrical connection layers located within a circuit protection layer;

[0216] The method further includes the step of: setting up multiple conductive paths, wherein the conductive paths electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

[0217] 32. The method according to any one of 23-30, wherein:

[0218] Providing a transistor unit includes providing a transistor wafer, based on a MEMS process, wherein a plurality of the transistor units are formed on the transistor wafer;

[0219] A PMUT cell that provides a circuit protection layer for bonding with a transistor cell includes: providing a PMUT wafer, based on a MEMS process, wherein a plurality of the PMUT cells are formed on the PMUT wafer;

[0220] The method further includes the step of performing a cutting to form a micromechanical ultrasonic transducer structure comprising a single PMUT unit and a single transistor unit.

[0221] 33. According to the method described in 21, wherein:

[0222] The absolute value of the piezoelectric coefficient of the first PMUT's piezoelectric layer is greater than 1 C / m²; and / or

[0223] The dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.

[0224] 34. According to the method described in 33, wherein:

[0225] The absolute value of the piezoelectric coefficient of the first PMUT's piezoelectric layer is greater than 5 C / m²; and / or

[0226] The dielectric constant of the piezoelectric layer of the second PMUT is less than 100.

[0227] 35. An electronic device comprising a micromechanical ultrasonic transducer structure according to any one of 1-20, or a micromechanical ultrasonic transducer structure manufactured according to any one of 21-34.

[0228] 36. The electronic device according to claim 35, wherein:

[0229] The electronic device includes at least one of the following: an ultrasonic imager, an ultrasonic rangefinder, an ultrasonic fingerprint sensor, a non-destructive testing instrument, a flow meter, a force feedback device, and a smoke alarm.

[0230] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that variations may be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A micromechanical ultrasonic transducer structure, comprising: A PMUT unit includes a PMUT carrier layer and a first PMUT and a second PMUT disposed on the PMUT carrier layer. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer. in: The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

2. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The first PMUT and the second PMUT are respectively located on both sides of the PMUT bearing layer.

3. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and / or The first PMUT is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves.

4. The micromechanical ultrasonic transducer structure according to any one of claims 1-3, wherein: The first PMUT and the second PMUT are disposed opposite each other on both sides of the PMUT support layer in the thickness direction of the PMUT support layer, and the first PMUT and the second PMUT share the cavity used for the PMUT.

5. The micromechanical ultrasonic transducer structure according to claim 4, wherein: The PMUT carrier layer is the PMUT support layer; The micromechanical ultrasonic transducer structure also includes a transistor unit, comprising a transistor substrate, a transistor, and a circuit protection layer covering the transistor, with the circuit protection layer facing the PMUT unit. The circuit protection layer is bonded to the PMUT support layer. The side of the circuit protection layer facing the PMUT unit has a cavity shared by the first PMUT and the second PMUT. The vibration part of the corresponding PMUT is located in the cavity. Alternatively, the circuit protection layer and the PMUT support layer are bonded through a metal bonding layer. A cavity for the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.

6. The micromechanical ultrasonic transducer structure according to claim 5, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

7. The micromechanical ultrasonic transducer structure according to claim 6, wherein: The metal bonding layer forms part of the corresponding conductive path.

8. The micromechanical ultrasonic transducer structure according to any one of claims 1-3, wherein: The first PMUT and the second PMUT are arranged on both sides of the PMUT support layer, separated from each other in the lateral direction, and the micromechanical ultrasonic transducer structure is provided with cavities for the first PMUT and the second PMUT respectively.

9. The micromechanical ultrasonic transducer structure according to claim 8 further includes: A transistor unit includes a transistor substrate, a transistor, and a circuit protection layer covering the transistor. The circuit protection layer faces the PMUT unit and is bonded to the PMUT unit.

10. The micromechanical ultrasonic transducer structure according to claim 9, wherein: The PMUT carrier layer is the PMUT support layer, with the first PMUT and the second PMUT positioned on opposite sides of the PMUT support layer. The circuit protection layer is directly bonded to the PMUT support layer, or the circuit protection layer and the PMUT support layer are bonded together by a bonding layer. The side of the circuit protection layer facing the PMUT unit has cavities for the first PMUT and the second PMUT, and the vibration part of the corresponding PMUT is located in the cavity. Alternatively, the circuit protection layer and the PMUT support layer are bonded together by a metal bonding layer, and the metal bonding layer defines at least a portion of the lateral boundary of the cavity for the first PMUT and the second PMUT. A cavity for the first PMUT and the second PMUT is provided between the circuit protection layer and the PMUT support layer.

11. The micromechanical ultrasonic transducer structure according to claim 9, wherein: The PMUT carrier layer includes a substrate layer, one of the first PMUT and the second PMUT is disposed on one side of the substrate layer, and the other PMUT is disposed on the other side of the substrate layer. The substrate layer is thinned or removed at the position corresponding to the first PMUT to facilitate the vibration of the vibrating portion of the first PMUT. A cavity for the other PMUT is disposed in the substrate layer. The circuit protection layer is bonded to the substrate layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.

12. The micromechanical ultrasonic transducer structure according to claim 11, wherein: The micromechanical ultrasonic transducer structure further includes: a PMUT support layer for one PMUT, and / or a PMUT support layer for the other PMUT.

13. The micromechanical ultrasonic transducer structure according to claim 9, wherein: The PMUT carrier layer includes an SOI structure, which includes a substrate layer, an oxide layer, and a silicon film layer. One of the first PMUTs and the second PMUT is disposed on one side of the silicon film layer, and the other PMUT is disposed on one side of the substrate layer. A cavity for the other PMUT is disposed in the substrate layer. The substrate layer is thinned or removed at the position corresponding to the one PMUT to facilitate the vibration of the vibrating part of the one PMUT. The circuit protection layer is directly bonded to the silicon film layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.

14. The micromechanical ultrasonic transducer structure according to any one of claims 9-13, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

15. The micromechanical ultrasonic transducer structure according to claim 10, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers. The metal bonding layer forms part of the corresponding conductive path.

16. The micromechanical ultrasonic transducer structure according to claim 5 or 9, wherein: The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

17. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The PMUT carrier layer material is a metal that is the same as or different from the material of the first electrode layer or the second electrode layer; or the PMUT carrier layer material is an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

18. The micromechanical ultrasonic transducer structure according to claim 17, wherein: The PMUT carrier layer material is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

19. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 1 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.

20. The micromechanical ultrasonic transducer structure according to claim 19, wherein: The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 5 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the second PMUT is less than 100.

21. A method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps: Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and A PMUT cell is provided that bonds to the circuit protection layer of a transistor cell. The PMUT cell includes a PMUT carrier layer, a first PMUT, and a second PMUT. Each PMUT includes a first electrode layer, a second electrode layer, and a piezoelectric layer. in: The piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than that of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the second PMUT.

22. The method according to claim 21, wherein: The first PMUT and the second PMUT are respectively located on both sides of the PMUT bearing layer.

23. The method according to claim 22, wherein: A PMUT cell that bonds to a circuit protection layer of a transistor cell includes the steps of: forming one of a first PMUT and a second PMUT on one side of a PMUT support layer, bonding said one side of a PMUT carrier layer to the circuit protection layer, and forming the other of the first PMUT and the second PMUT on the other side of the PMUT carrier layer; or A PMUT cell that is bonded to a circuit protection layer of a transistor cell includes the steps of: forming one of a first PMUT and a second PMUT on one side of a PMUT support layer, forming the other of the first PMUT and the second PMUT on the other side of a PMUT carrier layer, and bonding said one side of the PMUT carrier layer to the circuit protection layer.

24. The method according to claim 23, wherein: This ensures that the first PMUT and the second PMUT are at least partially opposite each other in the thickness direction of the PMUT support layer.

25. The method of claim 24, wherein: The PMUT carrier layer is the PMUT support layer; The side of the circuit protection layer facing the PMUT unit has a cavity shared by the first PMUT and the second PMUT, and the side of the PMUT support layer is directly bonded to the circuit protection layer; or the circuit protection layer and the PMUT support layer are bonded by a metal bonding layer, and a cavity for the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.

26. The method according to claim 23, wherein: In the step of forming another PMUT on the other side of the PMUT carrier layer, the other PMUT and the first PMUT are arranged on both sides of the PMUT carrier layer, separated from each other in the lateral direction.

27. The method of claim 26, wherein: The PMUT carrier layer is a PMUT support layer. On the side of the circuit protection layer facing the PMUT unit, cavities for the first PMUT and the second PMUT are respectively provided. In the step of joining one side of the PMUT carrier layer to the circuit protection layer, the vibrating portion of the PMUT is placed within the cavity for the PMUT. In the step of forming the other PMUT on the other side of the PMUT bearing layer, the vibrating portion of the other PMUT corresponds to the position of the cavity for the other PMUT.

28. The method according to claim 26, wherein: The PMUT carrier layer includes a substrate layer, and a cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit; In the step of joining one side of the PMUT carrier layer to the circuit protection layer, the circuit protection layer is joined to the substrate layer, and the vibrating portion of the PMUT is located within the cavity for the PMUT. The step of forming the other PMUT on the other side of the PMUT carrier layer includes: forming a cavity for the other PMUT on the substrate layer, such that the vibrating portion of the other PMUT corresponds to the position of the cavity for the other PMUT; The method further includes the step of thinning or removing a substrate layer at a location corresponding to one of the PMUTs so that the vibrating portion of the PMUT can vibrate.

29. The method according to claim 26, wherein: The PMUT carrier layer includes an SOI structure, which includes a substrate layer, an oxide layer, and a silicon film layer. A cavity for one PMUT is provided on the side of the circuit protection layer facing the PMUT unit. In the step of bonding one side of the PMUT carrier layer to the circuit protection layer, the circuit protection layer is directly bonded to the silicon film layer, and the vibrating part of the PMUT is located within the cavity of the PMUT. The step of forming the other PMUT on the other side of the PMUT carrier layer includes: forming a cavity for the other PMUT on the substrate layer, such that the vibration portion of the other PMUT corresponds to the position of the cavity for the other PMUT; The method further includes the step of thinning or removing a substrate layer at a location corresponding to one of the PMUTs so that the vibrating portion of the PMUT can vibrate.

30. The method according to claim 21, wherein: The piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and / or The first PMUT is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves.

31. The method according to any one of claims 23-30, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The method further includes the step of: setting up multiple conductive paths, wherein the conductive paths electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

32. The method according to any one of claims 23-30, wherein: Providing a transistor unit includes providing a transistor wafer, based on a MEMS process, wherein a plurality of the transistor units are formed on the transistor wafer; A PMUT cell that provides a circuit protection layer for bonding with a transistor cell includes: providing a PMUT wafer, based on a MEMS process, wherein a plurality of the PMUT cells are formed on the PMUT wafer; The method further includes the step of performing a cut to form a micromechanical ultrasonic transducer structure comprising a single PMUT unit and a single transistor unit.

33. The method according to claim 21, wherein: The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 1 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.

34. The method according to claim 33, wherein: The absolute value of the piezoelectric coefficient of the first PMUT piezoelectric layer is greater than 5 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the second PMUT is less than 100.

35. An electronic device comprising a micromechanical ultrasonic transducer structure according to any one of claims 1-20, or a micromechanical ultrasonic transducer structure manufactured by the manufacturing method according to any one of claims 21-34.

36. The electronic device according to claim 35, wherein: The electronic device includes at least one of the following: an ultrasonic imager, an ultrasonic rangefinder, an ultrasonic fingerprint sensor, a non-destructive testing instrument, a flow meter, a force feedback device, and a smoke alarm.

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