Routing method for chip and ring interconnect hardware nodes

Abstract

A chip and a routing method of ring interconnection hardware nodes are disclosed. The chip includes a plurality of hardware nodes and a ring bus connecting the hardware nodes in a ring. The ring bus includes a ring credit bus transmitting credit between the hardware nodes connected in a ring, so that a source node having a credit of a target node among the hardware nodes is allowed to send a request to the target node. The target node runs a credit sending logic to send a credit specifying a target, which is transmitted by the ring credit bus to realize point-to-point transmission from a credit issuing end to a credit target end.

Description

Technical Field

[0001] This invention relates to communication between hardware nodes in a chip, and particularly to communication management of ring-interconnected hardware nodes. Background Technology

[0002] With the complexity of modern chip design, how to enable smooth communication between internal hardware nodes using simple wiring is an important issue in this field. Summary of the Invention

[0003] A chip according to one embodiment of this application includes multiple hardware nodes and a ring bus connecting the hardware nodes in a ring configuration. The ring bus includes a ring-shaped credit license bus for transmitting credit licenses between the ring-connected hardware nodes. Only a source node possessing a credit license for a target node is permitted to issue a request to that target node. The target node executes credit license transmission logic to issue a credit license specifying the target, which is then transmitted via the ring-shaped credit license bus, achieving point-to-point transmission from the license issuer to the license target.

[0004] Peer-to-peer delivery ensures that the credit licenses issued by the target node are not concentrated and shared among adjacent hardware nodes. Even hardware nodes located far from the license issuer, separated by multiple intermediate nodes, have an equal chance of obtaining credit licenses granted by the target node.

[0005] In one implementation, the source node runs a credit license identification logic, receives credit licenses with the source node as the designated license target, and forwards credit licenses that do not specify the source node as the designated license target to the next hardware node in the ring connection. The source node may omit the decoding of credit licenses that do not specify the source node as the designated license target.

[0006] In one embodiment, the credit license bus includes a plurality of numbered transmission lines. The source node assigns a specific numbered transmission line to a specific hardware node, and considers a credit license transmitted by the specific hardware node via the specific numbered transmission line as a credit license with the source node as the designated license target.

[0007] In one implementation, the target node determines the transmission direction of the credit license with the source node as the designated license target based on the shortest distance between the target node and the source node in the ring connection.

[0008] In one embodiment, the number of such hardware nodes is M. The credit granting bus includes (M-1) transmission lines with different numbers, each corresponding to one of the other hardware nodes besides the source node itself.

[0009] In one implementation, when M is even, the number of intermediate nodes traversed by the credit-permitted transmission between the hardware nodes does not exceed (M / 2)-1; and when M is odd, the number of intermediate nodes traversed by the credit-permitted transmission between the hardware nodes does not exceed [(M-1) / 2]-1.

[0010] Another implementation method, based on the above concept, provides a ring-connected hardware node routing method for a chip comprising multiple hardware nodes. These hardware nodes are connected in a ring by a ring bus. The method includes: providing a ring-shaped credit license bus to transmit credit licenses between the ring-connected hardware nodes, such that only a source node possessing a credit license for a target node allows a request to be issued to that target node; and having the target node issue a credit license specifying the target, which is then transmitted via the ring-shaped credit license bus, achieving point-to-point transmission from the license issuer to the license target.

[0011] The present disclosure is described in detail below with reference to specific embodiments and accompanying drawings. Attached Figure Description

[0012] Figure 1 The diagram illustrates a chip 100, which includes multiple hardware nodes N0…N5 and a ring bus connecting these hardware nodes N0…N5 in a ring shape;

[0013] Figure 2 Diagram Figure 1 Routing rule 200 between hardware nodes N0 and N5;

[0014] Figure 3 A block diagram describing the implementation details of hardware nodes; and

[0015] Figure 4 This is a flowchart illustrating the credit license issuance process.

[0016] [Symbol Explanation]

[0017] 1…5: Transmission lines with different numbers in the credit license bus

[0018] 100: Chip

[0019] 200: Routing Rules

[0020] 302: Source Node

[0021] 304: Target Node

[0022] 306: Credit Permission Sending Logic

[0023] 308: Credit Permission Identification Logic

[0024] 310: Decoder

[0025] Main_Stream: Main stream bus

[0026] N0…N5: Hardware nodes

[0027] R1, R2: First and second registers

[0028] S402…S408: Steps Detailed Implementation

[0029] The following description illustrates various embodiments of this application. This description introduces the basic concepts of this application and is not intended to limit its scope. The actual scope of the invention should be defined in accordance with the claims.

[0030] Figure 1 The diagram illustrates a chip 100, which includes multiple hardware nodes N0…N5 and a ring bus connecting these hardware nodes N0…N5 in a ring configuration. Hardware nodes N0…N5 can be hardware units such as computing modules or circuits. The ring bus, as shown, includes a ring-shaped main stream bus Main_Stream and a license bus (composed of ring-shaped transmission lines numbered 1 to 5). The ring-shaped main stream bus Main_Stream is used for transmitting requests. The license bus (including ring-shaped transmission lines numbered 1 to 5) is designed to transmit licenses. Licenses are used to improve the smoothness of transmission on the main stream bus Main_Stream. Only a source node among these hardware nodes N0…N5 that possesses a license for a target node is allowed to issue a request to that target node. In this way, the source node only issues a request to the target node when the target node has sufficient capacity. The main stream bus Main_Stream can operate smoothly.

[0031] In particular, the target node in this application is the one issuing the credit license to the designated license target. Even if the credit license is transmitted via a ring-shaped credit license bus (including transmission lines numbered 1 to 5), the designated license target will achieve point-to-point transmission from the license issuing end (the target node receiving the request) to the license target end (the source node sending the request). Under this point-to-point transmission design, the source node will receive the credit license with itself as the designated license target and will transmit the credit license without its own designated license target to the next hardware node in the ring connection. The source node can skip decoding the credit license without its own designated license target. In this way, even if the source node is far from the target node (separated by multiple intermediate nodes), it still has the opportunity to receive the credit license issued by the target node. The credit license issued by the target node is not divided by intermediate nodes, but is indeed transmitted to the source node. The source node also has the right to send requests to the target node. Communication between the hardware nodes inside chip 100 is smooth.

[0032] This paragraph illustrates an example where hardware node N0 is the license issuer and hardware node N2 is the license recipient. A credit license issued by license issuer N0 specifying hardware node N2 is routed to license recipient N2 via intermediate node N1, where it is successfully received, thus achieving point-to-point transmission between license issuer N0 and license recipient N2. For credit licenses issued by license issuer N0 specifying hardware node N2, intermediate node N1 can skip the decoding process, improving the credit license transmission speed.

[0033] To facilitate smoother peer-to-peer credit license transmission, one embodiment of this application employs a transmission line-license issuer pairing concept.

[0034] The license bus used in this application consists of multiple numbered ring-shaped transmission lines. A source node assigns a specific numbered transmission line to a specific hardware node, and a license transmitted from that specific hardware node via that specific numbered transmission line is considered a license with that source node as the designated license target. Each hardware node can manage how transmission lines are paired with other hardware nodes using registers. Point-to-point transmission from the license issuer to the license target can be done using the shortest distance—passing through the fewest number of intermediate nodes. The license issuer determines the direction of license transmission based on the shortest distance between itself and the license target in the ring connection.

[0035] Figure 1 An example of six hardware nodes N0 to N5 uses five numbered (1 to 5) ring-shaped transmission lines to implement a license bus. Each of the five numbered transmission lines is paired with one other hardware node, excluding itself.

[0036] by Figure 1For example, hardware node N0 pairs transmission line number 1 with hardware node N5, transmission line number 2 with hardware node N4, transmission line number 3 with hardware node N3, transmission line number 4 with hardware node N2, and transmission line number 5 with hardware node N1. Hardware node N1 pairs transmission line number 1 with hardware node N0, transmission line number 2 with hardware node N5, transmission line number 3 with hardware node N4, transmission line number 4 with hardware node N3, and transmission line number 5 with hardware node N2. Hardware node N2 pairs transmission line number 1 with hardware node N1, transmission line number 2 with hardware node N0, transmission line number 3 with hardware node N5, transmission line number 4 with hardware node N4, and transmission line number 5 with hardware node N3. Hardware node N3 pairs transmission line number 1 to hardware node N2, transmission line number 2 to hardware node N1, transmission line number 3 to hardware node N0, transmission line number 4 to hardware node N5, and transmission line number 5 to hardware node N4. Hardware node N4 pairs transmission line number 1 to hardware node N3, transmission line number 2 to hardware node N2, transmission line number 3 to hardware node N1, transmission line number 4 to hardware node N0, and transmission line number 5 to hardware node N5. Hardware node N5 pairs transmission line number 1 to hardware node N4, transmission line number 2 to hardware node N3, transmission line number 3 to hardware node N2, transmission line number 4 to hardware node N1, and transmission line number 5 to hardware node N0.

[0037] Figure 2 Diagram Figure 1 Routing rule 200 between hardware nodes N0 and N5. Vertically differentiates between license issuers. Horizontally differentiates between license destinations. Taking hardware node N0 as the license issuer as an example, the rule is as follows.

[0038] If the target of the license is hardware node N1, the shortest distance is clockwise. The route for the credit license is from the license issuer N0 to transmission line number 1, and then to the target of the license N1. It is labeled N0→1→N1.

[0039] If the target of the license is hardware node N2, the shortest distance is clockwise. The route for the credit license is from the license issuer N0 to transmission line number 2, to intermediate node N1, to transmission line number 2, and to the target of the license N2; labeled as N0→2→N1→2→N2.

[0040] If the target of the license is hardware node N3, both clockwise and counterclockwise routes are feasible shortest distances; the diagram illustrates clockwise. The credit license route is: license issuer N0 to transmission line number 3, to intermediate node N1, to transmission line number 3, to intermediate node N2, to transmission line number 3, and finally to the target of the license, N3. This is labeled N0→3→N1→3→N2→3→N3.

[0041] If the target of the license is hardware node N4, the shortest distance is determined by counterclockwise rotation. The credit license route is from the license issuer N0 to transmission line number 5, to intermediate node N5, to transmission line number 5, and finally to the target of the license, N4. This is labeled N0→5→N5→5→N4.

[0042] If the target of the license is hardware node N5, the shortest distance is determined by counterclockwise rotation. The route for the credit license is from the license issuer N0 to transmission line number 4, and then to the target of the license N5. This is labeled N0→4→N5.

[0043] The routing rules for other paired license issuers and license recipients are detailed in [the relevant section]. Figure 2 middle.

[0044] Routing rule 200 also clearly shows that each hardware node is assigned a different numbered transmission line to receive the credits issued by the different hardware nodes.

[0045] The number of hardware nodes is not limited to six. In other embodiments, the number of hardware nodes is M. The license bus includes (M-1) transmission lines with different numbers, each corresponding to one of the other hardware nodes in the same hardware node group.

[0046] When M is even, the number of intermediate nodes traversed in the credit-permitted transmission between these hardware nodes does not exceed (M / 2)-1; the clockwise / counterclockwise transmission direction is determined accordingly to ensure the shortest transmission path. When M is odd, the number of intermediate nodes traversed in the credit-permitted transmission between these hardware nodes does not exceed [(M-1) / 2]-1; the clockwise / counterclockwise transmission direction is determined accordingly to ensure the shortest transmission path.

[0047] The number of transmission lines on the credit license bus is not limited to (M-1). Any technology that enables point-to-point (specified license target) credit license transfer between ring-connected hardware nodes falls within the scope of this application.

[0048] Figure 3 This is a block diagram describing the implementation details of the hardware nodes.

[0049] Source node 302 must possess a credit license issued by target node 304 before it can issue a request to target node 304. Target node 304 runs a credit license transmission logic 306, which issues a credit license to a specified target. This credit license is transmitted via a ring-shaped credit license bus, achieving point-to-point transmission from the license issuer to the license target. The credit license transmission logic 306 can be a hardware module with a hybrid hardware and software design.

[0050] Source node 302 runs a credit license identification logic 308, which receives credit licenses with source node 302 as the specified license target, and passes credit licenses that do not specify source node 302 as the specified license target to the next hardware node in the ring connection. The credit license identification logic 308 can be a hardware module with a hybrid hardware and software design.

[0051] The source node 302 also includes a decoder 310, a first register R1, and a second register R2.

[0052] For credit licenses that do not specify the source node 302 as the target of the license, the source node 302 will not operate the decoder 310 to decode the received credit license. System performance is thus improved.

[0053] Source node 302 uses the first register R1 to record the hardware nodes corresponding to each numbered transmission line connected to source node 302, thereby realizing the pairing of transmission line and license issuing end.

[0054] Source node 302 uses the second register R2 to record the number of credit licenses issued by target node 304 to source node 302. Based on the record in the second register R2, source node 302 releases its own requests to target node 304 before the credit licenses issued by target node 304 to source node 304 are exhausted.

[0055] In one implementation, credit permission is represented numerically. Each increment of 1 indicates that there is leeway for the source node to accept one more request.

[0056] Figure 4 This is a flowchart illustrating the credit license issuance process.

[0057] Step S402: The licensee issues a credit license to the target of the licensee. The licensee determines the issuance direction (clockwise or counterclockwise) by navigating through the fewest intermediate nodes.

[0058] Step S404 involves determining the intermediate node. The hardware node that receives the credit license can determine, based on the first register R1, whether the credit license transmitted from the transmission line comes from the license issuing end paired with the transmission line, thereby determining whether it is a credit license assigned to itself, and thus determining whether it is an intermediate node.

[0059] If it is an intermediate node, the process proceeds to step S406, where the intermediate node sends the received credit permission to the next hardware node in the ring structure. The process then proceeds to step S404 to determine whether the next hardware node is an intermediate node.

[0060] If it is not an intermediate node, the process proceeds to step S408, indicating that the credit license has been delivered to the license target. This hardware node, acting as the license target, receives the credit license and records it in the second register R2, indicating that it has the right to send a request to the license issuer.

[0061] The aforementioned concepts are also used to implement a ring interconnect hardware node routing method, including: enabling the ring bus to provide a ring-shaped credit granting bus (one implementation is...). Figure 1 Transmission lines 1 to 5 transmit credit licenses between the hardware nodes N0…N5 in a ring connection, such that a source node among the hardware nodes N0…N5 that possesses a credit license for a target node is allowed to issue a request to that target node; and the target node issues a credit license for a specified target, which is transmitted through the ring-shaped credit license bus, realizing point-to-point transmission from the license issuer to the license target.

[0062] Any technology that enables point-to-point licensed transmission between ring-shaped hardware nodes falls within the scope of protection of this application.

[0063] Although this application has been disclosed above with reference to preferred embodiments, it is not intended to limit this application. Those skilled in the art can make some modifications and refinements without departing from the spirit and scope of this application. Therefore, the scope of protection of this application shall be determined by the scope defined in the appended claims.

Claims

1. A chip, comprising: Multiple hardware nodes; as well as A ring bus connects the hardware nodes in a ring shape; The ring bus includes a ring-shaped credit license bus that transmits credit licenses between the ring-connected hardware nodes, so that only the source node that has the credit license of the target node in the hardware node is allowed to make a request to the target node. The target node runs the credit license sending logic, issues a credit license to the specified license target, and transmits it through the ring-shaped credit license bus to realize point-to-point transmission from the license issuer to the license target.

2. The chip as described in claim 1, wherein: The source node runs credit license identification logic, receives credit licenses with the source node as the specified license target, and passes credit licenses that do not specify the source node as the license target to the next hardware node in the ring connection.

3. The chip as described in claim 2, wherein: The source node omits decoding of credit licenses that do not specify the source node as the target of the license.

4. The chip as described in claim 2, wherein: The credit license bus includes multiple numbered transmission lines. The source node assigns a specific numbered transmission line to a specific hardware node. The credit license transmitted by the specific hardware node via the specific numbered transmission line is a credit license with the source node as the designated license target.

5. The chip as described in claim 4, wherein: The source node includes a first register that records the hardware nodes corresponding to each numbered transmission line connected to the source node.

6. The chip as described in claim 4, wherein: The target node determines the direction of credit granting with the source node as the designated license target based on the shortest distance between the target node and the source node in the ring connection.

7. The chip as described in claim 4, wherein: The number of hardware nodes is M; and The credit license bus includes (M-1) transmission lines with different numbers, each corresponding to one of the other hardware nodes in the hardware node group, excluding the source node itself.

8. The chip as claimed in claim 7, wherein: When M is even, the number of intermediate nodes traversed in the credit-permitted transmission between the hardware nodes does not exceed (M / 2) - 1; and When M is an odd number, the number of intermediate nodes traversed by the credit-permitted transmission between the hardware nodes does not exceed [(M-1) / 2]-1.

9. The chip as claimed in claim 1, wherein: This ring bus includes a ring-shaped main stream bus, which is different from the license bus.

10. The chip as claimed in claim 1, wherein: The source node includes a second register that records the number of credit licenses issued by the target node to the source node; and According to the record in the second register, the source node releases its own request to the target node before the credit permission sent to the source node by the target node is exhausted.

11. A ring-connected hardware node routing method for a chip comprising multiple hardware nodes connected in a ring by a ring bus, the method comprising: This ring bus further provides a ring-shaped credit licensing bus, transmitting credit licenses between the ring-connected hardware nodes, ensuring that only the source node possessing the credit license for the target node is authorized to issue a request to that target node; and The target node issues a credit license to the specified target, which is transmitted via the ring-shaped credit license bus, realizing point-to-point transmission from the license issuer to the license target.

12. The ring interconnection hardware node routing method as described in claim 11, further comprising: The source node is instructed to receive a credit license with the source node as the specified license target, and to pass credit licenses that do not specify the source node as the license target to the next hardware node in the ring connection.

13. The ring interconnection hardware node routing method as described in claim 12, wherein: The source node omits decoding of credit licenses that do not specify the source node as the target of the license.

14. The ring interconnection hardware node routing method as described in claim 12, wherein: The credit license bus includes multiple numbered transmission lines. The source node assigns a specific numbered transmission line to a specific hardware node. The credit license transmitted by the specific hardware node via the specific numbered transmission line is a credit license with the source node as the designated license target.

15. The ring interconnection hardware node routing method as described in claim 14, wherein: The source node includes a first register that records the hardware nodes corresponding to each numbered transmission line connected to the source node.

16. The ring interconnection hardware node routing method as described in claim 14, wherein: The target node determines the direction of credit granting with the source node as the designated license target based on the shortest distance between the target node and the source node in the ring connection.

17. The ring interconnection hardware node routing method as described in claim 14, wherein: The number of hardware nodes is M; and The credit license bus includes (M-1) transmission lines with different numbers, each corresponding to one of the other hardware nodes in the hardware node group, excluding the source node itself.

18. The ring interconnection hardware node routing method as described in claim 17, wherein: When M is even, the number of intermediate nodes traversed in the credit-permitted transmission between the hardware nodes does not exceed (M / 2) - 1; and When M is an odd number, the number of intermediate nodes traversed by the credit-permitted transmission between the hardware nodes does not exceed [(M-1) / 2]-1.

19. The ring interconnection hardware node routing method as described in claim 11, wherein: This ring bus includes a ring-shaped main stream bus, which is different from the license bus.

20. The ring interconnection hardware node routing method as described in claim 11, wherein: The source node includes a second register that records the number of credit licenses issued by the target node to the source node; and According to the record in the second register, the source node releases its own request to the target node before the credit permission sent to the source node by the target node is exhausted.

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